1 /* 2 * drivers/s390/net/qeth_core_main.c 3 * 4 * Copyright IBM Corp. 2007 5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 6 * Frank Pavlic <fpavlic@de.ibm.com>, 7 * Thomas Spatzier <tspat@de.ibm.com>, 8 * Frank Blaschka <frank.blaschka@de.ibm.com> 9 */ 10 11 #include <linux/module.h> 12 #include <linux/moduleparam.h> 13 #include <linux/string.h> 14 #include <linux/errno.h> 15 #include <linux/kernel.h> 16 #include <linux/ip.h> 17 #include <linux/ipv6.h> 18 #include <linux/tcp.h> 19 #include <linux/mii.h> 20 #include <linux/kthread.h> 21 22 #include <asm-s390/ebcdic.h> 23 #include <asm-s390/io.h> 24 #include <asm/s390_rdev.h> 25 26 #include "qeth_core.h" 27 #include "qeth_core_offl.h" 28 29 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 30 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 31 /* N P A M L V H */ 32 [QETH_DBF_SETUP] = {"qeth_setup", 33 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 34 [QETH_DBF_QERR] = {"qeth_qerr", 35 2, 1, 8, 2, &debug_hex_ascii_view, NULL}, 36 [QETH_DBF_TRACE] = {"qeth_trace", 37 4, 1, 8, 3, &debug_hex_ascii_view, NULL}, 38 [QETH_DBF_MSG] = {"qeth_msg", 39 8, 1, 128, 3, &debug_sprintf_view, NULL}, 40 [QETH_DBF_SENSE] = {"qeth_sense", 41 2, 1, 64, 2, &debug_hex_ascii_view, NULL}, 42 [QETH_DBF_MISC] = {"qeth_misc", 43 2, 1, 256, 2, &debug_hex_ascii_view, NULL}, 44 [QETH_DBF_CTRL] = {"qeth_control", 45 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 46 }; 47 EXPORT_SYMBOL_GPL(qeth_dbf); 48 49 struct qeth_card_list_struct qeth_core_card_list; 50 EXPORT_SYMBOL_GPL(qeth_core_card_list); 51 52 static struct device *qeth_core_root_dev; 53 static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY; 54 static struct lock_class_key qdio_out_skb_queue_key; 55 56 static void qeth_send_control_data_cb(struct qeth_channel *, 57 struct qeth_cmd_buffer *); 58 static int qeth_issue_next_read(struct qeth_card *); 59 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 60 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 61 static void qeth_free_buffer_pool(struct qeth_card *); 62 static int qeth_qdio_establish(struct qeth_card *); 63 64 65 static inline void __qeth_fill_buffer_frag(struct sk_buff *skb, 66 struct qdio_buffer *buffer, int is_tso, 67 int *next_element_to_fill) 68 { 69 struct skb_frag_struct *frag; 70 int fragno; 71 unsigned long addr; 72 int element, cnt, dlen; 73 74 fragno = skb_shinfo(skb)->nr_frags; 75 element = *next_element_to_fill; 76 dlen = 0; 77 78 if (is_tso) 79 buffer->element[element].flags = 80 SBAL_FLAGS_MIDDLE_FRAG; 81 else 82 buffer->element[element].flags = 83 SBAL_FLAGS_FIRST_FRAG; 84 dlen = skb->len - skb->data_len; 85 if (dlen) { 86 buffer->element[element].addr = skb->data; 87 buffer->element[element].length = dlen; 88 element++; 89 } 90 for (cnt = 0; cnt < fragno; cnt++) { 91 frag = &skb_shinfo(skb)->frags[cnt]; 92 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) + 93 frag->page_offset; 94 buffer->element[element].addr = (char *)addr; 95 buffer->element[element].length = frag->size; 96 if (cnt < (fragno - 1)) 97 buffer->element[element].flags = 98 SBAL_FLAGS_MIDDLE_FRAG; 99 else 100 buffer->element[element].flags = 101 SBAL_FLAGS_LAST_FRAG; 102 element++; 103 } 104 *next_element_to_fill = element; 105 } 106 107 static inline const char *qeth_get_cardname(struct qeth_card *card) 108 { 109 if (card->info.guestlan) { 110 switch (card->info.type) { 111 case QETH_CARD_TYPE_OSAE: 112 return " Guest LAN QDIO"; 113 case QETH_CARD_TYPE_IQD: 114 return " Guest LAN Hiper"; 115 default: 116 return " unknown"; 117 } 118 } else { 119 switch (card->info.type) { 120 case QETH_CARD_TYPE_OSAE: 121 return " OSD Express"; 122 case QETH_CARD_TYPE_IQD: 123 return " HiperSockets"; 124 case QETH_CARD_TYPE_OSN: 125 return " OSN QDIO"; 126 default: 127 return " unknown"; 128 } 129 } 130 return " n/a"; 131 } 132 133 /* max length to be returned: 14 */ 134 const char *qeth_get_cardname_short(struct qeth_card *card) 135 { 136 if (card->info.guestlan) { 137 switch (card->info.type) { 138 case QETH_CARD_TYPE_OSAE: 139 return "GuestLAN QDIO"; 140 case QETH_CARD_TYPE_IQD: 141 return "GuestLAN Hiper"; 142 default: 143 return "unknown"; 144 } 145 } else { 146 switch (card->info.type) { 147 case QETH_CARD_TYPE_OSAE: 148 switch (card->info.link_type) { 149 case QETH_LINK_TYPE_FAST_ETH: 150 return "OSD_100"; 151 case QETH_LINK_TYPE_HSTR: 152 return "HSTR"; 153 case QETH_LINK_TYPE_GBIT_ETH: 154 return "OSD_1000"; 155 case QETH_LINK_TYPE_10GBIT_ETH: 156 return "OSD_10GIG"; 157 case QETH_LINK_TYPE_LANE_ETH100: 158 return "OSD_FE_LANE"; 159 case QETH_LINK_TYPE_LANE_TR: 160 return "OSD_TR_LANE"; 161 case QETH_LINK_TYPE_LANE_ETH1000: 162 return "OSD_GbE_LANE"; 163 case QETH_LINK_TYPE_LANE: 164 return "OSD_ATM_LANE"; 165 default: 166 return "OSD_Express"; 167 } 168 case QETH_CARD_TYPE_IQD: 169 return "HiperSockets"; 170 case QETH_CARD_TYPE_OSN: 171 return "OSN"; 172 default: 173 return "unknown"; 174 } 175 } 176 return "n/a"; 177 } 178 179 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 180 int clear_start_mask) 181 { 182 unsigned long flags; 183 184 spin_lock_irqsave(&card->thread_mask_lock, flags); 185 card->thread_allowed_mask = threads; 186 if (clear_start_mask) 187 card->thread_start_mask &= threads; 188 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 189 wake_up(&card->wait_q); 190 } 191 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 192 193 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 194 { 195 unsigned long flags; 196 int rc = 0; 197 198 spin_lock_irqsave(&card->thread_mask_lock, flags); 199 rc = (card->thread_running_mask & threads); 200 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 201 return rc; 202 } 203 EXPORT_SYMBOL_GPL(qeth_threads_running); 204 205 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 206 { 207 return wait_event_interruptible(card->wait_q, 208 qeth_threads_running(card, threads) == 0); 209 } 210 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 211 212 void qeth_clear_working_pool_list(struct qeth_card *card) 213 { 214 struct qeth_buffer_pool_entry *pool_entry, *tmp; 215 216 QETH_DBF_TEXT(TRACE, 5, "clwrklst"); 217 list_for_each_entry_safe(pool_entry, tmp, 218 &card->qdio.in_buf_pool.entry_list, list){ 219 list_del(&pool_entry->list); 220 } 221 } 222 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 223 224 static int qeth_alloc_buffer_pool(struct qeth_card *card) 225 { 226 struct qeth_buffer_pool_entry *pool_entry; 227 void *ptr; 228 int i, j; 229 230 QETH_DBF_TEXT(TRACE, 5, "alocpool"); 231 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 232 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL); 233 if (!pool_entry) { 234 qeth_free_buffer_pool(card); 235 return -ENOMEM; 236 } 237 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 238 ptr = (void *) __get_free_page(GFP_KERNEL); 239 if (!ptr) { 240 while (j > 0) 241 free_page((unsigned long) 242 pool_entry->elements[--j]); 243 kfree(pool_entry); 244 qeth_free_buffer_pool(card); 245 return -ENOMEM; 246 } 247 pool_entry->elements[j] = ptr; 248 } 249 list_add(&pool_entry->init_list, 250 &card->qdio.init_pool.entry_list); 251 } 252 return 0; 253 } 254 255 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 256 { 257 QETH_DBF_TEXT(TRACE, 2, "realcbp"); 258 259 if ((card->state != CARD_STATE_DOWN) && 260 (card->state != CARD_STATE_RECOVER)) 261 return -EPERM; 262 263 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 264 qeth_clear_working_pool_list(card); 265 qeth_free_buffer_pool(card); 266 card->qdio.in_buf_pool.buf_count = bufcnt; 267 card->qdio.init_pool.buf_count = bufcnt; 268 return qeth_alloc_buffer_pool(card); 269 } 270 271 int qeth_set_large_send(struct qeth_card *card, 272 enum qeth_large_send_types type) 273 { 274 int rc = 0; 275 276 if (card->dev == NULL) { 277 card->options.large_send = type; 278 return 0; 279 } 280 if (card->state == CARD_STATE_UP) 281 netif_tx_disable(card->dev); 282 card->options.large_send = type; 283 switch (card->options.large_send) { 284 case QETH_LARGE_SEND_EDDP: 285 card->dev->features |= NETIF_F_TSO | NETIF_F_SG | 286 NETIF_F_HW_CSUM; 287 break; 288 case QETH_LARGE_SEND_TSO: 289 if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) { 290 card->dev->features |= NETIF_F_TSO | NETIF_F_SG | 291 NETIF_F_HW_CSUM; 292 } else { 293 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG | 294 NETIF_F_HW_CSUM); 295 card->options.large_send = QETH_LARGE_SEND_NO; 296 rc = -EOPNOTSUPP; 297 } 298 break; 299 default: /* includes QETH_LARGE_SEND_NO */ 300 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG | 301 NETIF_F_HW_CSUM); 302 break; 303 } 304 if (card->state == CARD_STATE_UP) 305 netif_wake_queue(card->dev); 306 return rc; 307 } 308 EXPORT_SYMBOL_GPL(qeth_set_large_send); 309 310 static int qeth_issue_next_read(struct qeth_card *card) 311 { 312 int rc; 313 struct qeth_cmd_buffer *iob; 314 315 QETH_DBF_TEXT(TRACE, 5, "issnxrd"); 316 if (card->read.state != CH_STATE_UP) 317 return -EIO; 318 iob = qeth_get_buffer(&card->read); 319 if (!iob) { 320 PRINT_WARN("issue_next_read failed: no iob available!\n"); 321 return -ENOMEM; 322 } 323 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 324 QETH_DBF_TEXT(TRACE, 6, "noirqpnd"); 325 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 326 (addr_t) iob, 0, 0); 327 if (rc) { 328 PRINT_ERR("Error in starting next read ccw! rc=%i\n", rc); 329 atomic_set(&card->read.irq_pending, 0); 330 qeth_schedule_recovery(card); 331 wake_up(&card->wait_q); 332 } 333 return rc; 334 } 335 336 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 337 { 338 struct qeth_reply *reply; 339 340 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 341 if (reply) { 342 atomic_set(&reply->refcnt, 1); 343 atomic_set(&reply->received, 0); 344 reply->card = card; 345 }; 346 return reply; 347 } 348 349 static void qeth_get_reply(struct qeth_reply *reply) 350 { 351 WARN_ON(atomic_read(&reply->refcnt) <= 0); 352 atomic_inc(&reply->refcnt); 353 } 354 355 static void qeth_put_reply(struct qeth_reply *reply) 356 { 357 WARN_ON(atomic_read(&reply->refcnt) <= 0); 358 if (atomic_dec_and_test(&reply->refcnt)) 359 kfree(reply); 360 } 361 362 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 363 struct qeth_card *card) 364 { 365 char *ipa_name; 366 int com = cmd->hdr.command; 367 ipa_name = qeth_get_ipa_cmd_name(com); 368 if (rc) 369 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n", 370 ipa_name, com, QETH_CARD_IFNAME(card), 371 rc, qeth_get_ipa_msg(rc)); 372 else 373 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n", 374 ipa_name, com, QETH_CARD_IFNAME(card)); 375 } 376 377 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 378 struct qeth_cmd_buffer *iob) 379 { 380 struct qeth_ipa_cmd *cmd = NULL; 381 382 QETH_DBF_TEXT(TRACE, 5, "chkipad"); 383 if (IS_IPA(iob->data)) { 384 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 385 if (IS_IPA_REPLY(cmd)) { 386 if (cmd->hdr.command < IPA_CMD_SETCCID || 387 cmd->hdr.command > IPA_CMD_MODCCID) 388 qeth_issue_ipa_msg(cmd, 389 cmd->hdr.return_code, card); 390 return cmd; 391 } else { 392 switch (cmd->hdr.command) { 393 case IPA_CMD_STOPLAN: 394 PRINT_WARN("Link failure on %s (CHPID 0x%X) - " 395 "there is a network problem or " 396 "someone pulled the cable or " 397 "disabled the port.\n", 398 QETH_CARD_IFNAME(card), 399 card->info.chpid); 400 card->lan_online = 0; 401 if (card->dev && netif_carrier_ok(card->dev)) 402 netif_carrier_off(card->dev); 403 return NULL; 404 case IPA_CMD_STARTLAN: 405 PRINT_INFO("Link reestablished on %s " 406 "(CHPID 0x%X). Scheduling " 407 "IP address reset.\n", 408 QETH_CARD_IFNAME(card), 409 card->info.chpid); 410 netif_carrier_on(card->dev); 411 card->lan_online = 1; 412 qeth_schedule_recovery(card); 413 return NULL; 414 case IPA_CMD_MODCCID: 415 return cmd; 416 case IPA_CMD_REGISTER_LOCAL_ADDR: 417 QETH_DBF_TEXT(TRACE, 3, "irla"); 418 break; 419 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 420 QETH_DBF_TEXT(TRACE, 3, "urla"); 421 break; 422 default: 423 QETH_DBF_MESSAGE(2, "Received data is IPA " 424 "but not a reply!\n"); 425 break; 426 } 427 } 428 } 429 return cmd; 430 } 431 432 void qeth_clear_ipacmd_list(struct qeth_card *card) 433 { 434 struct qeth_reply *reply, *r; 435 unsigned long flags; 436 437 QETH_DBF_TEXT(TRACE, 4, "clipalst"); 438 439 spin_lock_irqsave(&card->lock, flags); 440 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 441 qeth_get_reply(reply); 442 reply->rc = -EIO; 443 atomic_inc(&reply->received); 444 list_del_init(&reply->list); 445 wake_up(&reply->wait_q); 446 qeth_put_reply(reply); 447 } 448 spin_unlock_irqrestore(&card->lock, flags); 449 } 450 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 451 452 static int qeth_check_idx_response(unsigned char *buffer) 453 { 454 if (!buffer) 455 return 0; 456 457 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 458 if ((buffer[2] & 0xc0) == 0xc0) { 459 PRINT_WARN("received an IDX TERMINATE " 460 "with cause code 0x%02x%s\n", 461 buffer[4], 462 ((buffer[4] == 0x22) ? 463 " -- try another portname" : "")); 464 QETH_DBF_TEXT(TRACE, 2, "ckidxres"); 465 QETH_DBF_TEXT(TRACE, 2, " idxterm"); 466 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO); 467 return -EIO; 468 } 469 return 0; 470 } 471 472 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 473 __u32 len) 474 { 475 struct qeth_card *card; 476 477 QETH_DBF_TEXT(TRACE, 4, "setupccw"); 478 card = CARD_FROM_CDEV(channel->ccwdev); 479 if (channel == &card->read) 480 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 481 else 482 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 483 channel->ccw.count = len; 484 channel->ccw.cda = (__u32) __pa(iob); 485 } 486 487 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 488 { 489 __u8 index; 490 491 QETH_DBF_TEXT(TRACE, 6, "getbuff"); 492 index = channel->io_buf_no; 493 do { 494 if (channel->iob[index].state == BUF_STATE_FREE) { 495 channel->iob[index].state = BUF_STATE_LOCKED; 496 channel->io_buf_no = (channel->io_buf_no + 1) % 497 QETH_CMD_BUFFER_NO; 498 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 499 return channel->iob + index; 500 } 501 index = (index + 1) % QETH_CMD_BUFFER_NO; 502 } while (index != channel->io_buf_no); 503 504 return NULL; 505 } 506 507 void qeth_release_buffer(struct qeth_channel *channel, 508 struct qeth_cmd_buffer *iob) 509 { 510 unsigned long flags; 511 512 QETH_DBF_TEXT(TRACE, 6, "relbuff"); 513 spin_lock_irqsave(&channel->iob_lock, flags); 514 memset(iob->data, 0, QETH_BUFSIZE); 515 iob->state = BUF_STATE_FREE; 516 iob->callback = qeth_send_control_data_cb; 517 iob->rc = 0; 518 spin_unlock_irqrestore(&channel->iob_lock, flags); 519 } 520 EXPORT_SYMBOL_GPL(qeth_release_buffer); 521 522 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 523 { 524 struct qeth_cmd_buffer *buffer = NULL; 525 unsigned long flags; 526 527 spin_lock_irqsave(&channel->iob_lock, flags); 528 buffer = __qeth_get_buffer(channel); 529 spin_unlock_irqrestore(&channel->iob_lock, flags); 530 return buffer; 531 } 532 533 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 534 { 535 struct qeth_cmd_buffer *buffer; 536 wait_event(channel->wait_q, 537 ((buffer = qeth_get_buffer(channel)) != NULL)); 538 return buffer; 539 } 540 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 541 542 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 543 { 544 int cnt; 545 546 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 547 qeth_release_buffer(channel, &channel->iob[cnt]); 548 channel->buf_no = 0; 549 channel->io_buf_no = 0; 550 } 551 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 552 553 static void qeth_send_control_data_cb(struct qeth_channel *channel, 554 struct qeth_cmd_buffer *iob) 555 { 556 struct qeth_card *card; 557 struct qeth_reply *reply, *r; 558 struct qeth_ipa_cmd *cmd; 559 unsigned long flags; 560 int keep_reply; 561 562 QETH_DBF_TEXT(TRACE, 4, "sndctlcb"); 563 564 card = CARD_FROM_CDEV(channel->ccwdev); 565 if (qeth_check_idx_response(iob->data)) { 566 qeth_clear_ipacmd_list(card); 567 qeth_schedule_recovery(card); 568 goto out; 569 } 570 571 cmd = qeth_check_ipa_data(card, iob); 572 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 573 goto out; 574 /*in case of OSN : check if cmd is set */ 575 if (card->info.type == QETH_CARD_TYPE_OSN && 576 cmd && 577 cmd->hdr.command != IPA_CMD_STARTLAN && 578 card->osn_info.assist_cb != NULL) { 579 card->osn_info.assist_cb(card->dev, cmd); 580 goto out; 581 } 582 583 spin_lock_irqsave(&card->lock, flags); 584 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 585 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 586 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 587 qeth_get_reply(reply); 588 list_del_init(&reply->list); 589 spin_unlock_irqrestore(&card->lock, flags); 590 keep_reply = 0; 591 if (reply->callback != NULL) { 592 if (cmd) { 593 reply->offset = (__u16)((char *)cmd - 594 (char *)iob->data); 595 keep_reply = reply->callback(card, 596 reply, 597 (unsigned long)cmd); 598 } else 599 keep_reply = reply->callback(card, 600 reply, 601 (unsigned long)iob); 602 } 603 if (cmd) 604 reply->rc = (u16) cmd->hdr.return_code; 605 else if (iob->rc) 606 reply->rc = iob->rc; 607 if (keep_reply) { 608 spin_lock_irqsave(&card->lock, flags); 609 list_add_tail(&reply->list, 610 &card->cmd_waiter_list); 611 spin_unlock_irqrestore(&card->lock, flags); 612 } else { 613 atomic_inc(&reply->received); 614 wake_up(&reply->wait_q); 615 } 616 qeth_put_reply(reply); 617 goto out; 618 } 619 } 620 spin_unlock_irqrestore(&card->lock, flags); 621 out: 622 memcpy(&card->seqno.pdu_hdr_ack, 623 QETH_PDU_HEADER_SEQ_NO(iob->data), 624 QETH_SEQ_NO_LENGTH); 625 qeth_release_buffer(channel, iob); 626 } 627 628 static int qeth_setup_channel(struct qeth_channel *channel) 629 { 630 int cnt; 631 632 QETH_DBF_TEXT(SETUP, 2, "setupch"); 633 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 634 channel->iob[cnt].data = (char *) 635 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 636 if (channel->iob[cnt].data == NULL) 637 break; 638 channel->iob[cnt].state = BUF_STATE_FREE; 639 channel->iob[cnt].channel = channel; 640 channel->iob[cnt].callback = qeth_send_control_data_cb; 641 channel->iob[cnt].rc = 0; 642 } 643 if (cnt < QETH_CMD_BUFFER_NO) { 644 while (cnt-- > 0) 645 kfree(channel->iob[cnt].data); 646 return -ENOMEM; 647 } 648 channel->buf_no = 0; 649 channel->io_buf_no = 0; 650 atomic_set(&channel->irq_pending, 0); 651 spin_lock_init(&channel->iob_lock); 652 653 init_waitqueue_head(&channel->wait_q); 654 return 0; 655 } 656 657 static int qeth_set_thread_start_bit(struct qeth_card *card, 658 unsigned long thread) 659 { 660 unsigned long flags; 661 662 spin_lock_irqsave(&card->thread_mask_lock, flags); 663 if (!(card->thread_allowed_mask & thread) || 664 (card->thread_start_mask & thread)) { 665 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 666 return -EPERM; 667 } 668 card->thread_start_mask |= thread; 669 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 670 return 0; 671 } 672 673 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 674 { 675 unsigned long flags; 676 677 spin_lock_irqsave(&card->thread_mask_lock, flags); 678 card->thread_start_mask &= ~thread; 679 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 680 wake_up(&card->wait_q); 681 } 682 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 683 684 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 685 { 686 unsigned long flags; 687 688 spin_lock_irqsave(&card->thread_mask_lock, flags); 689 card->thread_running_mask &= ~thread; 690 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 691 wake_up(&card->wait_q); 692 } 693 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 694 695 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 696 { 697 unsigned long flags; 698 int rc = 0; 699 700 spin_lock_irqsave(&card->thread_mask_lock, flags); 701 if (card->thread_start_mask & thread) { 702 if ((card->thread_allowed_mask & thread) && 703 !(card->thread_running_mask & thread)) { 704 rc = 1; 705 card->thread_start_mask &= ~thread; 706 card->thread_running_mask |= thread; 707 } else 708 rc = -EPERM; 709 } 710 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 711 return rc; 712 } 713 714 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 715 { 716 int rc = 0; 717 718 wait_event(card->wait_q, 719 (rc = __qeth_do_run_thread(card, thread)) >= 0); 720 return rc; 721 } 722 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 723 724 void qeth_schedule_recovery(struct qeth_card *card) 725 { 726 QETH_DBF_TEXT(TRACE, 2, "startrec"); 727 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 728 schedule_work(&card->kernel_thread_starter); 729 } 730 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 731 732 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 733 { 734 int dstat, cstat; 735 char *sense; 736 737 sense = (char *) irb->ecw; 738 cstat = irb->scsw.cmd.cstat; 739 dstat = irb->scsw.cmd.dstat; 740 741 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 742 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 743 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 744 QETH_DBF_TEXT(TRACE, 2, "CGENCHK"); 745 PRINT_WARN("check on device %s, dstat=x%x, cstat=x%x ", 746 cdev->dev.bus_id, dstat, cstat); 747 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 748 16, 1, irb, 64, 1); 749 return 1; 750 } 751 752 if (dstat & DEV_STAT_UNIT_CHECK) { 753 if (sense[SENSE_RESETTING_EVENT_BYTE] & 754 SENSE_RESETTING_EVENT_FLAG) { 755 QETH_DBF_TEXT(TRACE, 2, "REVIND"); 756 return 1; 757 } 758 if (sense[SENSE_COMMAND_REJECT_BYTE] & 759 SENSE_COMMAND_REJECT_FLAG) { 760 QETH_DBF_TEXT(TRACE, 2, "CMDREJi"); 761 return 0; 762 } 763 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 764 QETH_DBF_TEXT(TRACE, 2, "AFFE"); 765 return 1; 766 } 767 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 768 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN"); 769 return 0; 770 } 771 QETH_DBF_TEXT(TRACE, 2, "DGENCHK"); 772 return 1; 773 } 774 return 0; 775 } 776 777 static long __qeth_check_irb_error(struct ccw_device *cdev, 778 unsigned long intparm, struct irb *irb) 779 { 780 if (!IS_ERR(irb)) 781 return 0; 782 783 switch (PTR_ERR(irb)) { 784 case -EIO: 785 PRINT_WARN("i/o-error on device %s\n", cdev->dev.bus_id); 786 QETH_DBF_TEXT(TRACE, 2, "ckirberr"); 787 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO); 788 break; 789 case -ETIMEDOUT: 790 PRINT_WARN("timeout on device %s\n", cdev->dev.bus_id); 791 QETH_DBF_TEXT(TRACE, 2, "ckirberr"); 792 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT); 793 if (intparm == QETH_RCD_PARM) { 794 struct qeth_card *card = CARD_FROM_CDEV(cdev); 795 796 if (card && (card->data.ccwdev == cdev)) { 797 card->data.state = CH_STATE_DOWN; 798 wake_up(&card->wait_q); 799 } 800 } 801 break; 802 default: 803 PRINT_WARN("unknown error %ld on device %s\n", PTR_ERR(irb), 804 cdev->dev.bus_id); 805 QETH_DBF_TEXT(TRACE, 2, "ckirberr"); 806 QETH_DBF_TEXT(TRACE, 2, " rc???"); 807 } 808 return PTR_ERR(irb); 809 } 810 811 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 812 struct irb *irb) 813 { 814 int rc; 815 int cstat, dstat; 816 struct qeth_cmd_buffer *buffer; 817 struct qeth_channel *channel; 818 struct qeth_card *card; 819 struct qeth_cmd_buffer *iob; 820 __u8 index; 821 822 QETH_DBF_TEXT(TRACE, 5, "irq"); 823 824 if (__qeth_check_irb_error(cdev, intparm, irb)) 825 return; 826 cstat = irb->scsw.cmd.cstat; 827 dstat = irb->scsw.cmd.dstat; 828 829 card = CARD_FROM_CDEV(cdev); 830 if (!card) 831 return; 832 833 if (card->read.ccwdev == cdev) { 834 channel = &card->read; 835 QETH_DBF_TEXT(TRACE, 5, "read"); 836 } else if (card->write.ccwdev == cdev) { 837 channel = &card->write; 838 QETH_DBF_TEXT(TRACE, 5, "write"); 839 } else { 840 channel = &card->data; 841 QETH_DBF_TEXT(TRACE, 5, "data"); 842 } 843 atomic_set(&channel->irq_pending, 0); 844 845 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 846 channel->state = CH_STATE_STOPPED; 847 848 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 849 channel->state = CH_STATE_HALTED; 850 851 /*let's wake up immediately on data channel*/ 852 if ((channel == &card->data) && (intparm != 0) && 853 (intparm != QETH_RCD_PARM)) 854 goto out; 855 856 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 857 QETH_DBF_TEXT(TRACE, 6, "clrchpar"); 858 /* we don't have to handle this further */ 859 intparm = 0; 860 } 861 if (intparm == QETH_HALT_CHANNEL_PARM) { 862 QETH_DBF_TEXT(TRACE, 6, "hltchpar"); 863 /* we don't have to handle this further */ 864 intparm = 0; 865 } 866 if ((dstat & DEV_STAT_UNIT_EXCEP) || 867 (dstat & DEV_STAT_UNIT_CHECK) || 868 (cstat)) { 869 if (irb->esw.esw0.erw.cons) { 870 /* TODO: we should make this s390dbf */ 871 PRINT_WARN("sense data available on channel %s.\n", 872 CHANNEL_ID(channel)); 873 PRINT_WARN(" cstat 0x%X\n dstat 0x%X\n", cstat, dstat); 874 print_hex_dump(KERN_WARNING, "qeth: irb ", 875 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 876 print_hex_dump(KERN_WARNING, "qeth: sense data ", 877 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 878 } 879 if (intparm == QETH_RCD_PARM) { 880 channel->state = CH_STATE_DOWN; 881 goto out; 882 } 883 rc = qeth_get_problem(cdev, irb); 884 if (rc) { 885 qeth_schedule_recovery(card); 886 goto out; 887 } 888 } 889 890 if (intparm == QETH_RCD_PARM) { 891 channel->state = CH_STATE_RCD_DONE; 892 goto out; 893 } 894 if (intparm) { 895 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 896 buffer->state = BUF_STATE_PROCESSED; 897 } 898 if (channel == &card->data) 899 return; 900 if (channel == &card->read && 901 channel->state == CH_STATE_UP) 902 qeth_issue_next_read(card); 903 904 iob = channel->iob; 905 index = channel->buf_no; 906 while (iob[index].state == BUF_STATE_PROCESSED) { 907 if (iob[index].callback != NULL) 908 iob[index].callback(channel, iob + index); 909 910 index = (index + 1) % QETH_CMD_BUFFER_NO; 911 } 912 channel->buf_no = index; 913 out: 914 wake_up(&card->wait_q); 915 return; 916 } 917 918 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 919 struct qeth_qdio_out_buffer *buf) 920 { 921 int i; 922 struct sk_buff *skb; 923 924 /* is PCI flag set on buffer? */ 925 if (buf->buffer->element[0].flags & 0x40) 926 atomic_dec(&queue->set_pci_flags_count); 927 928 skb = skb_dequeue(&buf->skb_list); 929 while (skb) { 930 atomic_dec(&skb->users); 931 dev_kfree_skb_any(skb); 932 skb = skb_dequeue(&buf->skb_list); 933 } 934 qeth_eddp_buf_release_contexts(buf); 935 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 936 buf->buffer->element[i].length = 0; 937 buf->buffer->element[i].addr = NULL; 938 buf->buffer->element[i].flags = 0; 939 } 940 buf->next_element_to_fill = 0; 941 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY); 942 } 943 944 void qeth_clear_qdio_buffers(struct qeth_card *card) 945 { 946 int i, j; 947 948 QETH_DBF_TEXT(TRACE, 2, "clearqdbf"); 949 /* clear outbound buffers to free skbs */ 950 for (i = 0; i < card->qdio.no_out_queues; ++i) 951 if (card->qdio.out_qs[i]) { 952 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) 953 qeth_clear_output_buffer(card->qdio.out_qs[i], 954 &card->qdio.out_qs[i]->bufs[j]); 955 } 956 } 957 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 958 959 static void qeth_free_buffer_pool(struct qeth_card *card) 960 { 961 struct qeth_buffer_pool_entry *pool_entry, *tmp; 962 int i = 0; 963 QETH_DBF_TEXT(TRACE, 5, "freepool"); 964 list_for_each_entry_safe(pool_entry, tmp, 965 &card->qdio.init_pool.entry_list, init_list){ 966 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 967 free_page((unsigned long)pool_entry->elements[i]); 968 list_del(&pool_entry->init_list); 969 kfree(pool_entry); 970 } 971 } 972 973 static void qeth_free_qdio_buffers(struct qeth_card *card) 974 { 975 int i, j; 976 977 QETH_DBF_TEXT(TRACE, 2, "freeqdbf"); 978 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 979 QETH_QDIO_UNINITIALIZED) 980 return; 981 kfree(card->qdio.in_q); 982 card->qdio.in_q = NULL; 983 /* inbound buffer pool */ 984 qeth_free_buffer_pool(card); 985 /* free outbound qdio_qs */ 986 if (card->qdio.out_qs) { 987 for (i = 0; i < card->qdio.no_out_queues; ++i) { 988 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) 989 qeth_clear_output_buffer(card->qdio.out_qs[i], 990 &card->qdio.out_qs[i]->bufs[j]); 991 kfree(card->qdio.out_qs[i]); 992 } 993 kfree(card->qdio.out_qs); 994 card->qdio.out_qs = NULL; 995 } 996 } 997 998 static void qeth_clean_channel(struct qeth_channel *channel) 999 { 1000 int cnt; 1001 1002 QETH_DBF_TEXT(SETUP, 2, "freech"); 1003 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 1004 kfree(channel->iob[cnt].data); 1005 } 1006 1007 static int qeth_is_1920_device(struct qeth_card *card) 1008 { 1009 int single_queue = 0; 1010 struct ccw_device *ccwdev; 1011 struct channelPath_dsc { 1012 u8 flags; 1013 u8 lsn; 1014 u8 desc; 1015 u8 chpid; 1016 u8 swla; 1017 u8 zeroes; 1018 u8 chla; 1019 u8 chpp; 1020 } *chp_dsc; 1021 1022 QETH_DBF_TEXT(SETUP, 2, "chk_1920"); 1023 1024 ccwdev = card->data.ccwdev; 1025 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0); 1026 if (chp_dsc != NULL) { 1027 /* CHPP field bit 6 == 1 -> single queue */ 1028 single_queue = ((chp_dsc->chpp & 0x02) == 0x02); 1029 kfree(chp_dsc); 1030 } 1031 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue); 1032 return single_queue; 1033 } 1034 1035 static void qeth_init_qdio_info(struct qeth_card *card) 1036 { 1037 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1038 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1039 /* inbound */ 1040 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1041 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1042 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1043 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1044 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1045 } 1046 1047 static void qeth_set_intial_options(struct qeth_card *card) 1048 { 1049 card->options.route4.type = NO_ROUTER; 1050 card->options.route6.type = NO_ROUTER; 1051 card->options.checksum_type = QETH_CHECKSUM_DEFAULT; 1052 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS; 1053 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL; 1054 card->options.fake_broadcast = 0; 1055 card->options.add_hhlen = DEFAULT_ADD_HHLEN; 1056 card->options.fake_ll = 0; 1057 card->options.performance_stats = 0; 1058 card->options.rx_sg_cb = QETH_RX_SG_CB; 1059 } 1060 1061 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1062 { 1063 unsigned long flags; 1064 int rc = 0; 1065 1066 spin_lock_irqsave(&card->thread_mask_lock, flags); 1067 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x", 1068 (u8) card->thread_start_mask, 1069 (u8) card->thread_allowed_mask, 1070 (u8) card->thread_running_mask); 1071 rc = (card->thread_start_mask & thread); 1072 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1073 return rc; 1074 } 1075 1076 static void qeth_start_kernel_thread(struct work_struct *work) 1077 { 1078 struct qeth_card *card = container_of(work, struct qeth_card, 1079 kernel_thread_starter); 1080 QETH_DBF_TEXT(TRACE , 2, "strthrd"); 1081 1082 if (card->read.state != CH_STATE_UP && 1083 card->write.state != CH_STATE_UP) 1084 return; 1085 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) 1086 kthread_run(card->discipline.recover, (void *) card, 1087 "qeth_recover"); 1088 } 1089 1090 static int qeth_setup_card(struct qeth_card *card) 1091 { 1092 1093 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1094 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1095 1096 card->read.state = CH_STATE_DOWN; 1097 card->write.state = CH_STATE_DOWN; 1098 card->data.state = CH_STATE_DOWN; 1099 card->state = CARD_STATE_DOWN; 1100 card->lan_online = 0; 1101 card->use_hard_stop = 0; 1102 card->dev = NULL; 1103 spin_lock_init(&card->vlanlock); 1104 spin_lock_init(&card->mclock); 1105 card->vlangrp = NULL; 1106 spin_lock_init(&card->lock); 1107 spin_lock_init(&card->ip_lock); 1108 spin_lock_init(&card->thread_mask_lock); 1109 card->thread_start_mask = 0; 1110 card->thread_allowed_mask = 0; 1111 card->thread_running_mask = 0; 1112 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1113 INIT_LIST_HEAD(&card->ip_list); 1114 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL); 1115 if (!card->ip_tbd_list) { 1116 QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); 1117 return -ENOMEM; 1118 } 1119 INIT_LIST_HEAD(card->ip_tbd_list); 1120 INIT_LIST_HEAD(&card->cmd_waiter_list); 1121 init_waitqueue_head(&card->wait_q); 1122 /* intial options */ 1123 qeth_set_intial_options(card); 1124 /* IP address takeover */ 1125 INIT_LIST_HEAD(&card->ipato.entries); 1126 card->ipato.enabled = 0; 1127 card->ipato.invert4 = 0; 1128 card->ipato.invert6 = 0; 1129 /* init QDIO stuff */ 1130 qeth_init_qdio_info(card); 1131 return 0; 1132 } 1133 1134 static struct qeth_card *qeth_alloc_card(void) 1135 { 1136 struct qeth_card *card; 1137 1138 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1139 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1140 if (!card) 1141 return NULL; 1142 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1143 if (qeth_setup_channel(&card->read)) { 1144 kfree(card); 1145 return NULL; 1146 } 1147 if (qeth_setup_channel(&card->write)) { 1148 qeth_clean_channel(&card->read); 1149 kfree(card); 1150 return NULL; 1151 } 1152 card->options.layer2 = -1; 1153 return card; 1154 } 1155 1156 static int qeth_determine_card_type(struct qeth_card *card) 1157 { 1158 int i = 0; 1159 1160 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1161 1162 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1163 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1164 while (known_devices[i][4]) { 1165 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) && 1166 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) { 1167 card->info.type = known_devices[i][4]; 1168 card->qdio.no_out_queues = known_devices[i][8]; 1169 card->info.is_multicast_different = known_devices[i][9]; 1170 if (qeth_is_1920_device(card)) { 1171 PRINT_INFO("Priority Queueing not able " 1172 "due to hardware limitations!\n"); 1173 card->qdio.no_out_queues = 1; 1174 card->qdio.default_out_queue = 0; 1175 } 1176 return 0; 1177 } 1178 i++; 1179 } 1180 card->info.type = QETH_CARD_TYPE_UNKNOWN; 1181 PRINT_ERR("unknown card type on device %s\n", CARD_BUS_ID(card)); 1182 return -ENOENT; 1183 } 1184 1185 static int qeth_clear_channel(struct qeth_channel *channel) 1186 { 1187 unsigned long flags; 1188 struct qeth_card *card; 1189 int rc; 1190 1191 QETH_DBF_TEXT(TRACE, 3, "clearch"); 1192 card = CARD_FROM_CDEV(channel->ccwdev); 1193 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1194 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1195 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1196 1197 if (rc) 1198 return rc; 1199 rc = wait_event_interruptible_timeout(card->wait_q, 1200 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1201 if (rc == -ERESTARTSYS) 1202 return rc; 1203 if (channel->state != CH_STATE_STOPPED) 1204 return -ETIME; 1205 channel->state = CH_STATE_DOWN; 1206 return 0; 1207 } 1208 1209 static int qeth_halt_channel(struct qeth_channel *channel) 1210 { 1211 unsigned long flags; 1212 struct qeth_card *card; 1213 int rc; 1214 1215 QETH_DBF_TEXT(TRACE, 3, "haltch"); 1216 card = CARD_FROM_CDEV(channel->ccwdev); 1217 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1218 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1219 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1220 1221 if (rc) 1222 return rc; 1223 rc = wait_event_interruptible_timeout(card->wait_q, 1224 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1225 if (rc == -ERESTARTSYS) 1226 return rc; 1227 if (channel->state != CH_STATE_HALTED) 1228 return -ETIME; 1229 return 0; 1230 } 1231 1232 static int qeth_halt_channels(struct qeth_card *card) 1233 { 1234 int rc1 = 0, rc2 = 0, rc3 = 0; 1235 1236 QETH_DBF_TEXT(TRACE, 3, "haltchs"); 1237 rc1 = qeth_halt_channel(&card->read); 1238 rc2 = qeth_halt_channel(&card->write); 1239 rc3 = qeth_halt_channel(&card->data); 1240 if (rc1) 1241 return rc1; 1242 if (rc2) 1243 return rc2; 1244 return rc3; 1245 } 1246 1247 static int qeth_clear_channels(struct qeth_card *card) 1248 { 1249 int rc1 = 0, rc2 = 0, rc3 = 0; 1250 1251 QETH_DBF_TEXT(TRACE, 3, "clearchs"); 1252 rc1 = qeth_clear_channel(&card->read); 1253 rc2 = qeth_clear_channel(&card->write); 1254 rc3 = qeth_clear_channel(&card->data); 1255 if (rc1) 1256 return rc1; 1257 if (rc2) 1258 return rc2; 1259 return rc3; 1260 } 1261 1262 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1263 { 1264 int rc = 0; 1265 1266 QETH_DBF_TEXT(TRACE, 3, "clhacrd"); 1267 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *)); 1268 1269 if (halt) 1270 rc = qeth_halt_channels(card); 1271 if (rc) 1272 return rc; 1273 return qeth_clear_channels(card); 1274 } 1275 1276 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1277 { 1278 int rc = 0; 1279 1280 QETH_DBF_TEXT(TRACE, 3, "qdioclr"); 1281 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1282 QETH_QDIO_CLEANING)) { 1283 case QETH_QDIO_ESTABLISHED: 1284 if (card->info.type == QETH_CARD_TYPE_IQD) 1285 rc = qdio_cleanup(CARD_DDEV(card), 1286 QDIO_FLAG_CLEANUP_USING_HALT); 1287 else 1288 rc = qdio_cleanup(CARD_DDEV(card), 1289 QDIO_FLAG_CLEANUP_USING_CLEAR); 1290 if (rc) 1291 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc); 1292 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1293 break; 1294 case QETH_QDIO_CLEANING: 1295 return rc; 1296 default: 1297 break; 1298 } 1299 rc = qeth_clear_halt_card(card, use_halt); 1300 if (rc) 1301 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc); 1302 card->state = CARD_STATE_DOWN; 1303 return rc; 1304 } 1305 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1306 1307 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1308 int *length) 1309 { 1310 struct ciw *ciw; 1311 char *rcd_buf; 1312 int ret; 1313 struct qeth_channel *channel = &card->data; 1314 unsigned long flags; 1315 1316 /* 1317 * scan for RCD command in extended SenseID data 1318 */ 1319 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1320 if (!ciw || ciw->cmd == 0) 1321 return -EOPNOTSUPP; 1322 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1323 if (!rcd_buf) 1324 return -ENOMEM; 1325 1326 channel->ccw.cmd_code = ciw->cmd; 1327 channel->ccw.cda = (__u32) __pa(rcd_buf); 1328 channel->ccw.count = ciw->count; 1329 channel->ccw.flags = CCW_FLAG_SLI; 1330 channel->state = CH_STATE_RCD; 1331 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1332 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1333 QETH_RCD_PARM, LPM_ANYPATH, 0, 1334 QETH_RCD_TIMEOUT); 1335 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1336 if (!ret) 1337 wait_event(card->wait_q, 1338 (channel->state == CH_STATE_RCD_DONE || 1339 channel->state == CH_STATE_DOWN)); 1340 if (channel->state == CH_STATE_DOWN) 1341 ret = -EIO; 1342 else 1343 channel->state = CH_STATE_DOWN; 1344 if (ret) { 1345 kfree(rcd_buf); 1346 *buffer = NULL; 1347 *length = 0; 1348 } else { 1349 *length = ciw->count; 1350 *buffer = rcd_buf; 1351 } 1352 return ret; 1353 } 1354 1355 static int qeth_get_unitaddr(struct qeth_card *card) 1356 { 1357 int length; 1358 char *prcd; 1359 int rc; 1360 1361 QETH_DBF_TEXT(SETUP, 2, "getunit"); 1362 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 1363 if (rc) { 1364 PRINT_ERR("qeth_read_conf_data for device %s returned %i\n", 1365 CARD_DDEV_ID(card), rc); 1366 return rc; 1367 } 1368 card->info.chpid = prcd[30]; 1369 card->info.unit_addr2 = prcd[31]; 1370 card->info.cula = prcd[63]; 1371 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1372 (prcd[0x11] == _ascebc['M'])); 1373 kfree(prcd); 1374 return 0; 1375 } 1376 1377 static void qeth_init_tokens(struct qeth_card *card) 1378 { 1379 card->token.issuer_rm_w = 0x00010103UL; 1380 card->token.cm_filter_w = 0x00010108UL; 1381 card->token.cm_connection_w = 0x0001010aUL; 1382 card->token.ulp_filter_w = 0x0001010bUL; 1383 card->token.ulp_connection_w = 0x0001010dUL; 1384 } 1385 1386 static void qeth_init_func_level(struct qeth_card *card) 1387 { 1388 if (card->ipato.enabled) { 1389 if (card->info.type == QETH_CARD_TYPE_IQD) 1390 card->info.func_level = 1391 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT; 1392 else 1393 card->info.func_level = 1394 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT; 1395 } else { 1396 if (card->info.type == QETH_CARD_TYPE_IQD) 1397 /*FIXME:why do we have same values for dis and ena for 1398 osae??? */ 1399 card->info.func_level = 1400 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT; 1401 else 1402 card->info.func_level = 1403 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT; 1404 } 1405 } 1406 1407 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1408 void (*idx_reply_cb)(struct qeth_channel *, 1409 struct qeth_cmd_buffer *)) 1410 { 1411 struct qeth_cmd_buffer *iob; 1412 unsigned long flags; 1413 int rc; 1414 struct qeth_card *card; 1415 1416 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1417 card = CARD_FROM_CDEV(channel->ccwdev); 1418 iob = qeth_get_buffer(channel); 1419 iob->callback = idx_reply_cb; 1420 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1421 channel->ccw.count = QETH_BUFSIZE; 1422 channel->ccw.cda = (__u32) __pa(iob->data); 1423 1424 wait_event(card->wait_q, 1425 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1426 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1427 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1428 rc = ccw_device_start(channel->ccwdev, 1429 &channel->ccw, (addr_t) iob, 0, 0); 1430 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1431 1432 if (rc) { 1433 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1434 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1435 atomic_set(&channel->irq_pending, 0); 1436 wake_up(&card->wait_q); 1437 return rc; 1438 } 1439 rc = wait_event_interruptible_timeout(card->wait_q, 1440 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1441 if (rc == -ERESTARTSYS) 1442 return rc; 1443 if (channel->state != CH_STATE_UP) { 1444 rc = -ETIME; 1445 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1446 qeth_clear_cmd_buffers(channel); 1447 } else 1448 rc = 0; 1449 return rc; 1450 } 1451 1452 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1453 void (*idx_reply_cb)(struct qeth_channel *, 1454 struct qeth_cmd_buffer *)) 1455 { 1456 struct qeth_card *card; 1457 struct qeth_cmd_buffer *iob; 1458 unsigned long flags; 1459 __u16 temp; 1460 __u8 tmp; 1461 int rc; 1462 struct ccw_dev_id temp_devid; 1463 1464 card = CARD_FROM_CDEV(channel->ccwdev); 1465 1466 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1467 1468 iob = qeth_get_buffer(channel); 1469 iob->callback = idx_reply_cb; 1470 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1471 channel->ccw.count = IDX_ACTIVATE_SIZE; 1472 channel->ccw.cda = (__u32) __pa(iob->data); 1473 if (channel == &card->write) { 1474 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1475 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1476 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1477 card->seqno.trans_hdr++; 1478 } else { 1479 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1480 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1481 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1482 } 1483 tmp = ((__u8)card->info.portno) | 0x80; 1484 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1485 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1486 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1487 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1488 &card->info.func_level, sizeof(__u16)); 1489 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1490 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1491 temp = (card->info.cula << 8) + card->info.unit_addr2; 1492 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1493 1494 wait_event(card->wait_q, 1495 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1496 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1497 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1498 rc = ccw_device_start(channel->ccwdev, 1499 &channel->ccw, (addr_t) iob, 0, 0); 1500 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1501 1502 if (rc) { 1503 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1504 rc); 1505 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1506 atomic_set(&channel->irq_pending, 0); 1507 wake_up(&card->wait_q); 1508 return rc; 1509 } 1510 rc = wait_event_interruptible_timeout(card->wait_q, 1511 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1512 if (rc == -ERESTARTSYS) 1513 return rc; 1514 if (channel->state != CH_STATE_ACTIVATING) { 1515 PRINT_WARN("IDX activate timed out!\n"); 1516 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1517 qeth_clear_cmd_buffers(channel); 1518 return -ETIME; 1519 } 1520 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1521 } 1522 1523 static int qeth_peer_func_level(int level) 1524 { 1525 if ((level & 0xff) == 8) 1526 return (level & 0xff) + 0x400; 1527 if (((level >> 8) & 3) == 1) 1528 return (level & 0xff) + 0x200; 1529 return level; 1530 } 1531 1532 static void qeth_idx_write_cb(struct qeth_channel *channel, 1533 struct qeth_cmd_buffer *iob) 1534 { 1535 struct qeth_card *card; 1536 __u16 temp; 1537 1538 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1539 1540 if (channel->state == CH_STATE_DOWN) { 1541 channel->state = CH_STATE_ACTIVATING; 1542 goto out; 1543 } 1544 card = CARD_FROM_CDEV(channel->ccwdev); 1545 1546 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1547 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19) 1548 PRINT_ERR("IDX_ACTIVATE on write channel device %s: " 1549 "adapter exclusively used by another host\n", 1550 CARD_WDEV_ID(card)); 1551 else 1552 PRINT_ERR("IDX_ACTIVATE on write channel device %s: " 1553 "negative reply\n", CARD_WDEV_ID(card)); 1554 goto out; 1555 } 1556 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1557 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1558 PRINT_WARN("IDX_ACTIVATE on write channel device %s: " 1559 "function level mismatch " 1560 "(sent: 0x%x, received: 0x%x)\n", 1561 CARD_WDEV_ID(card), card->info.func_level, temp); 1562 goto out; 1563 } 1564 channel->state = CH_STATE_UP; 1565 out: 1566 qeth_release_buffer(channel, iob); 1567 } 1568 1569 static void qeth_idx_read_cb(struct qeth_channel *channel, 1570 struct qeth_cmd_buffer *iob) 1571 { 1572 struct qeth_card *card; 1573 __u16 temp; 1574 1575 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1576 if (channel->state == CH_STATE_DOWN) { 1577 channel->state = CH_STATE_ACTIVATING; 1578 goto out; 1579 } 1580 1581 card = CARD_FROM_CDEV(channel->ccwdev); 1582 if (qeth_check_idx_response(iob->data)) 1583 goto out; 1584 1585 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1586 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19) 1587 PRINT_ERR("IDX_ACTIVATE on read channel device %s: " 1588 "adapter exclusively used by another host\n", 1589 CARD_RDEV_ID(card)); 1590 else 1591 PRINT_ERR("IDX_ACTIVATE on read channel device %s: " 1592 "negative reply\n", CARD_RDEV_ID(card)); 1593 goto out; 1594 } 1595 1596 /** 1597 * temporary fix for microcode bug 1598 * to revert it,replace OR by AND 1599 */ 1600 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) || 1601 (card->info.type == QETH_CARD_TYPE_OSAE)) 1602 card->info.portname_required = 1; 1603 1604 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1605 if (temp != qeth_peer_func_level(card->info.func_level)) { 1606 PRINT_WARN("IDX_ACTIVATE on read channel device %s: function " 1607 "level mismatch (sent: 0x%x, received: 0x%x)\n", 1608 CARD_RDEV_ID(card), card->info.func_level, temp); 1609 goto out; 1610 } 1611 memcpy(&card->token.issuer_rm_r, 1612 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1613 QETH_MPC_TOKEN_LENGTH); 1614 memcpy(&card->info.mcl_level[0], 1615 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 1616 channel->state = CH_STATE_UP; 1617 out: 1618 qeth_release_buffer(channel, iob); 1619 } 1620 1621 void qeth_prepare_control_data(struct qeth_card *card, int len, 1622 struct qeth_cmd_buffer *iob) 1623 { 1624 qeth_setup_ccw(&card->write, iob->data, len); 1625 iob->callback = qeth_release_buffer; 1626 1627 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1628 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1629 card->seqno.trans_hdr++; 1630 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 1631 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 1632 card->seqno.pdu_hdr++; 1633 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 1634 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 1635 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1636 } 1637 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 1638 1639 int qeth_send_control_data(struct qeth_card *card, int len, 1640 struct qeth_cmd_buffer *iob, 1641 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 1642 unsigned long), 1643 void *reply_param) 1644 { 1645 int rc; 1646 unsigned long flags; 1647 struct qeth_reply *reply = NULL; 1648 unsigned long timeout; 1649 1650 QETH_DBF_TEXT(TRACE, 2, "sendctl"); 1651 1652 reply = qeth_alloc_reply(card); 1653 if (!reply) { 1654 return -ENOMEM; 1655 } 1656 reply->callback = reply_cb; 1657 reply->param = reply_param; 1658 if (card->state == CARD_STATE_DOWN) 1659 reply->seqno = QETH_IDX_COMMAND_SEQNO; 1660 else 1661 reply->seqno = card->seqno.ipa++; 1662 init_waitqueue_head(&reply->wait_q); 1663 spin_lock_irqsave(&card->lock, flags); 1664 list_add_tail(&reply->list, &card->cmd_waiter_list); 1665 spin_unlock_irqrestore(&card->lock, flags); 1666 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1667 1668 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 1669 qeth_prepare_control_data(card, len, iob); 1670 1671 if (IS_IPA(iob->data)) 1672 timeout = jiffies + QETH_IPA_TIMEOUT; 1673 else 1674 timeout = jiffies + QETH_TIMEOUT; 1675 1676 QETH_DBF_TEXT(TRACE, 6, "noirqpnd"); 1677 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 1678 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 1679 (addr_t) iob, 0, 0); 1680 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 1681 if (rc) { 1682 PRINT_WARN("qeth_send_control_data: " 1683 "ccw_device_start rc = %i\n", rc); 1684 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc); 1685 spin_lock_irqsave(&card->lock, flags); 1686 list_del_init(&reply->list); 1687 qeth_put_reply(reply); 1688 spin_unlock_irqrestore(&card->lock, flags); 1689 qeth_release_buffer(iob->channel, iob); 1690 atomic_set(&card->write.irq_pending, 0); 1691 wake_up(&card->wait_q); 1692 return rc; 1693 } 1694 while (!atomic_read(&reply->received)) { 1695 if (time_after(jiffies, timeout)) { 1696 spin_lock_irqsave(&reply->card->lock, flags); 1697 list_del_init(&reply->list); 1698 spin_unlock_irqrestore(&reply->card->lock, flags); 1699 reply->rc = -ETIME; 1700 atomic_inc(&reply->received); 1701 wake_up(&reply->wait_q); 1702 } 1703 cpu_relax(); 1704 }; 1705 rc = reply->rc; 1706 qeth_put_reply(reply); 1707 return rc; 1708 } 1709 EXPORT_SYMBOL_GPL(qeth_send_control_data); 1710 1711 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 1712 unsigned long data) 1713 { 1714 struct qeth_cmd_buffer *iob; 1715 1716 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 1717 1718 iob = (struct qeth_cmd_buffer *) data; 1719 memcpy(&card->token.cm_filter_r, 1720 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 1721 QETH_MPC_TOKEN_LENGTH); 1722 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1723 return 0; 1724 } 1725 1726 static int qeth_cm_enable(struct qeth_card *card) 1727 { 1728 int rc; 1729 struct qeth_cmd_buffer *iob; 1730 1731 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 1732 1733 iob = qeth_wait_for_buffer(&card->write); 1734 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 1735 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 1736 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 1737 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 1738 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 1739 1740 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 1741 qeth_cm_enable_cb, NULL); 1742 return rc; 1743 } 1744 1745 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 1746 unsigned long data) 1747 { 1748 1749 struct qeth_cmd_buffer *iob; 1750 1751 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 1752 1753 iob = (struct qeth_cmd_buffer *) data; 1754 memcpy(&card->token.cm_connection_r, 1755 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 1756 QETH_MPC_TOKEN_LENGTH); 1757 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1758 return 0; 1759 } 1760 1761 static int qeth_cm_setup(struct qeth_card *card) 1762 { 1763 int rc; 1764 struct qeth_cmd_buffer *iob; 1765 1766 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 1767 1768 iob = qeth_wait_for_buffer(&card->write); 1769 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 1770 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 1771 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 1772 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 1773 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 1774 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 1775 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 1776 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 1777 qeth_cm_setup_cb, NULL); 1778 return rc; 1779 1780 } 1781 1782 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) 1783 { 1784 switch (card->info.type) { 1785 case QETH_CARD_TYPE_UNKNOWN: 1786 return 1500; 1787 case QETH_CARD_TYPE_IQD: 1788 return card->info.max_mtu; 1789 case QETH_CARD_TYPE_OSAE: 1790 switch (card->info.link_type) { 1791 case QETH_LINK_TYPE_HSTR: 1792 case QETH_LINK_TYPE_LANE_TR: 1793 return 2000; 1794 default: 1795 return 1492; 1796 } 1797 default: 1798 return 1500; 1799 } 1800 } 1801 1802 static inline int qeth_get_max_mtu_for_card(int cardtype) 1803 { 1804 switch (cardtype) { 1805 1806 case QETH_CARD_TYPE_UNKNOWN: 1807 case QETH_CARD_TYPE_OSAE: 1808 case QETH_CARD_TYPE_OSN: 1809 return 61440; 1810 case QETH_CARD_TYPE_IQD: 1811 return 57344; 1812 default: 1813 return 1500; 1814 } 1815 } 1816 1817 static inline int qeth_get_mtu_out_of_mpc(int cardtype) 1818 { 1819 switch (cardtype) { 1820 case QETH_CARD_TYPE_IQD: 1821 return 1; 1822 default: 1823 return 0; 1824 } 1825 } 1826 1827 static inline int qeth_get_mtu_outof_framesize(int framesize) 1828 { 1829 switch (framesize) { 1830 case 0x4000: 1831 return 8192; 1832 case 0x6000: 1833 return 16384; 1834 case 0xa000: 1835 return 32768; 1836 case 0xffff: 1837 return 57344; 1838 default: 1839 return 0; 1840 } 1841 } 1842 1843 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 1844 { 1845 switch (card->info.type) { 1846 case QETH_CARD_TYPE_OSAE: 1847 return ((mtu >= 576) && (mtu <= 61440)); 1848 case QETH_CARD_TYPE_IQD: 1849 return ((mtu >= 576) && 1850 (mtu <= card->info.max_mtu + 4096 - 32)); 1851 case QETH_CARD_TYPE_OSN: 1852 case QETH_CARD_TYPE_UNKNOWN: 1853 default: 1854 return 1; 1855 } 1856 } 1857 1858 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 1859 unsigned long data) 1860 { 1861 1862 __u16 mtu, framesize; 1863 __u16 len; 1864 __u8 link_type; 1865 struct qeth_cmd_buffer *iob; 1866 1867 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 1868 1869 iob = (struct qeth_cmd_buffer *) data; 1870 memcpy(&card->token.ulp_filter_r, 1871 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 1872 QETH_MPC_TOKEN_LENGTH); 1873 if (qeth_get_mtu_out_of_mpc(card->info.type)) { 1874 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 1875 mtu = qeth_get_mtu_outof_framesize(framesize); 1876 if (!mtu) { 1877 iob->rc = -EINVAL; 1878 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1879 return 0; 1880 } 1881 card->info.max_mtu = mtu; 1882 card->info.initial_mtu = mtu; 1883 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 1884 } else { 1885 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card); 1886 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type); 1887 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1888 } 1889 1890 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 1891 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 1892 memcpy(&link_type, 1893 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 1894 card->info.link_type = link_type; 1895 } else 1896 card->info.link_type = 0; 1897 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1898 return 0; 1899 } 1900 1901 static int qeth_ulp_enable(struct qeth_card *card) 1902 { 1903 int rc; 1904 char prot_type; 1905 struct qeth_cmd_buffer *iob; 1906 1907 /*FIXME: trace view callbacks*/ 1908 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 1909 1910 iob = qeth_wait_for_buffer(&card->write); 1911 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 1912 1913 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 1914 (__u8) card->info.portno; 1915 if (card->options.layer2) 1916 if (card->info.type == QETH_CARD_TYPE_OSN) 1917 prot_type = QETH_PROT_OSN2; 1918 else 1919 prot_type = QETH_PROT_LAYER2; 1920 else 1921 prot_type = QETH_PROT_TCPIP; 1922 1923 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 1924 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 1925 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 1926 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 1927 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 1928 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data), 1929 card->info.portname, 9); 1930 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 1931 qeth_ulp_enable_cb, NULL); 1932 return rc; 1933 1934 } 1935 1936 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 1937 unsigned long data) 1938 { 1939 struct qeth_cmd_buffer *iob; 1940 1941 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 1942 1943 iob = (struct qeth_cmd_buffer *) data; 1944 memcpy(&card->token.ulp_connection_r, 1945 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 1946 QETH_MPC_TOKEN_LENGTH); 1947 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1948 return 0; 1949 } 1950 1951 static int qeth_ulp_setup(struct qeth_card *card) 1952 { 1953 int rc; 1954 __u16 temp; 1955 struct qeth_cmd_buffer *iob; 1956 struct ccw_dev_id dev_id; 1957 1958 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 1959 1960 iob = qeth_wait_for_buffer(&card->write); 1961 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 1962 1963 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 1964 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 1965 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 1966 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 1967 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 1968 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 1969 1970 ccw_device_get_id(CARD_DDEV(card), &dev_id); 1971 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 1972 temp = (card->info.cula << 8) + card->info.unit_addr2; 1973 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 1974 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 1975 qeth_ulp_setup_cb, NULL); 1976 return rc; 1977 } 1978 1979 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 1980 { 1981 int i, j; 1982 1983 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 1984 1985 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 1986 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 1987 return 0; 1988 1989 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q), 1990 GFP_KERNEL); 1991 if (!card->qdio.in_q) 1992 goto out_nomem; 1993 QETH_DBF_TEXT(SETUP, 2, "inq"); 1994 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *)); 1995 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q)); 1996 /* give inbound qeth_qdio_buffers their qdio_buffers */ 1997 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) 1998 card->qdio.in_q->bufs[i].buffer = 1999 &card->qdio.in_q->qdio_bufs[i]; 2000 /* inbound buffer pool */ 2001 if (qeth_alloc_buffer_pool(card)) 2002 goto out_freeinq; 2003 /* outbound */ 2004 card->qdio.out_qs = 2005 kmalloc(card->qdio.no_out_queues * 2006 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2007 if (!card->qdio.out_qs) 2008 goto out_freepool; 2009 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2010 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q), 2011 GFP_KERNEL); 2012 if (!card->qdio.out_qs[i]) 2013 goto out_freeoutq; 2014 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2015 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2016 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q)); 2017 card->qdio.out_qs[i]->queue_no = i; 2018 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2019 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2020 card->qdio.out_qs[i]->bufs[j].buffer = 2021 &card->qdio.out_qs[i]->qdio_bufs[j]; 2022 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j]. 2023 skb_list); 2024 lockdep_set_class( 2025 &card->qdio.out_qs[i]->bufs[j].skb_list.lock, 2026 &qdio_out_skb_queue_key); 2027 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list); 2028 } 2029 } 2030 return 0; 2031 2032 out_freeoutq: 2033 while (i > 0) 2034 kfree(card->qdio.out_qs[--i]); 2035 kfree(card->qdio.out_qs); 2036 card->qdio.out_qs = NULL; 2037 out_freepool: 2038 qeth_free_buffer_pool(card); 2039 out_freeinq: 2040 kfree(card->qdio.in_q); 2041 card->qdio.in_q = NULL; 2042 out_nomem: 2043 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2044 return -ENOMEM; 2045 } 2046 2047 static void qeth_create_qib_param_field(struct qeth_card *card, 2048 char *param_field) 2049 { 2050 2051 param_field[0] = _ascebc['P']; 2052 param_field[1] = _ascebc['C']; 2053 param_field[2] = _ascebc['I']; 2054 param_field[3] = _ascebc['T']; 2055 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2056 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2057 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2058 } 2059 2060 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2061 char *param_field) 2062 { 2063 param_field[16] = _ascebc['B']; 2064 param_field[17] = _ascebc['L']; 2065 param_field[18] = _ascebc['K']; 2066 param_field[19] = _ascebc['T']; 2067 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2068 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2069 *((unsigned int *) (¶m_field[28])) = 2070 card->info.blkt.inter_packet_jumbo; 2071 } 2072 2073 static int qeth_qdio_activate(struct qeth_card *card) 2074 { 2075 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2076 return qdio_activate(CARD_DDEV(card)); 2077 } 2078 2079 static int qeth_dm_act(struct qeth_card *card) 2080 { 2081 int rc; 2082 struct qeth_cmd_buffer *iob; 2083 2084 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2085 2086 iob = qeth_wait_for_buffer(&card->write); 2087 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2088 2089 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2090 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2091 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2092 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2093 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2094 return rc; 2095 } 2096 2097 static int qeth_mpc_initialize(struct qeth_card *card) 2098 { 2099 int rc; 2100 2101 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2102 2103 rc = qeth_issue_next_read(card); 2104 if (rc) { 2105 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2106 return rc; 2107 } 2108 rc = qeth_cm_enable(card); 2109 if (rc) { 2110 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2111 goto out_qdio; 2112 } 2113 rc = qeth_cm_setup(card); 2114 if (rc) { 2115 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2116 goto out_qdio; 2117 } 2118 rc = qeth_ulp_enable(card); 2119 if (rc) { 2120 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2121 goto out_qdio; 2122 } 2123 rc = qeth_ulp_setup(card); 2124 if (rc) { 2125 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2126 goto out_qdio; 2127 } 2128 rc = qeth_alloc_qdio_buffers(card); 2129 if (rc) { 2130 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2131 goto out_qdio; 2132 } 2133 rc = qeth_qdio_establish(card); 2134 if (rc) { 2135 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2136 qeth_free_qdio_buffers(card); 2137 goto out_qdio; 2138 } 2139 rc = qeth_qdio_activate(card); 2140 if (rc) { 2141 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2142 goto out_qdio; 2143 } 2144 rc = qeth_dm_act(card); 2145 if (rc) { 2146 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2147 goto out_qdio; 2148 } 2149 2150 return 0; 2151 out_qdio: 2152 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2153 return rc; 2154 } 2155 2156 static void qeth_print_status_with_portname(struct qeth_card *card) 2157 { 2158 char dbf_text[15]; 2159 int i; 2160 2161 sprintf(dbf_text, "%s", card->info.portname + 1); 2162 for (i = 0; i < 8; i++) 2163 dbf_text[i] = 2164 (char) _ebcasc[(__u8) dbf_text[i]]; 2165 dbf_text[8] = 0; 2166 PRINT_INFO("Device %s/%s/%s is a%s card%s%s%s\n" 2167 "with link type %s (portname: %s)\n", 2168 CARD_RDEV_ID(card), 2169 CARD_WDEV_ID(card), 2170 CARD_DDEV_ID(card), 2171 qeth_get_cardname(card), 2172 (card->info.mcl_level[0]) ? " (level: " : "", 2173 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2174 (card->info.mcl_level[0]) ? ")" : "", 2175 qeth_get_cardname_short(card), 2176 dbf_text); 2177 2178 } 2179 2180 static void qeth_print_status_no_portname(struct qeth_card *card) 2181 { 2182 if (card->info.portname[0]) 2183 PRINT_INFO("Device %s/%s/%s is a%s " 2184 "card%s%s%s\nwith link type %s " 2185 "(no portname needed by interface).\n", 2186 CARD_RDEV_ID(card), 2187 CARD_WDEV_ID(card), 2188 CARD_DDEV_ID(card), 2189 qeth_get_cardname(card), 2190 (card->info.mcl_level[0]) ? " (level: " : "", 2191 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2192 (card->info.mcl_level[0]) ? ")" : "", 2193 qeth_get_cardname_short(card)); 2194 else 2195 PRINT_INFO("Device %s/%s/%s is a%s " 2196 "card%s%s%s\nwith link type %s.\n", 2197 CARD_RDEV_ID(card), 2198 CARD_WDEV_ID(card), 2199 CARD_DDEV_ID(card), 2200 qeth_get_cardname(card), 2201 (card->info.mcl_level[0]) ? " (level: " : "", 2202 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2203 (card->info.mcl_level[0]) ? ")" : "", 2204 qeth_get_cardname_short(card)); 2205 } 2206 2207 void qeth_print_status_message(struct qeth_card *card) 2208 { 2209 switch (card->info.type) { 2210 case QETH_CARD_TYPE_OSAE: 2211 /* VM will use a non-zero first character 2212 * to indicate a HiperSockets like reporting 2213 * of the level OSA sets the first character to zero 2214 * */ 2215 if (!card->info.mcl_level[0]) { 2216 sprintf(card->info.mcl_level, "%02x%02x", 2217 card->info.mcl_level[2], 2218 card->info.mcl_level[3]); 2219 2220 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2221 break; 2222 } 2223 /* fallthrough */ 2224 case QETH_CARD_TYPE_IQD: 2225 if (card->info.guestlan) { 2226 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2227 card->info.mcl_level[0]]; 2228 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2229 card->info.mcl_level[1]]; 2230 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2231 card->info.mcl_level[2]]; 2232 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2233 card->info.mcl_level[3]]; 2234 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2235 } 2236 break; 2237 default: 2238 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2239 } 2240 if (card->info.portname_required) 2241 qeth_print_status_with_portname(card); 2242 else 2243 qeth_print_status_no_portname(card); 2244 } 2245 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2246 2247 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2248 { 2249 struct qeth_buffer_pool_entry *entry; 2250 2251 QETH_DBF_TEXT(TRACE, 5, "inwrklst"); 2252 2253 list_for_each_entry(entry, 2254 &card->qdio.init_pool.entry_list, init_list) { 2255 qeth_put_buffer_pool_entry(card, entry); 2256 } 2257 } 2258 2259 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2260 struct qeth_card *card) 2261 { 2262 struct list_head *plh; 2263 struct qeth_buffer_pool_entry *entry; 2264 int i, free; 2265 struct page *page; 2266 2267 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2268 return NULL; 2269 2270 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2271 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2272 free = 1; 2273 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2274 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2275 free = 0; 2276 break; 2277 } 2278 } 2279 if (free) { 2280 list_del_init(&entry->list); 2281 return entry; 2282 } 2283 } 2284 2285 /* no free buffer in pool so take first one and swap pages */ 2286 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2287 struct qeth_buffer_pool_entry, list); 2288 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2289 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2290 page = alloc_page(GFP_ATOMIC); 2291 if (!page) { 2292 return NULL; 2293 } else { 2294 free_page((unsigned long)entry->elements[i]); 2295 entry->elements[i] = page_address(page); 2296 if (card->options.performance_stats) 2297 card->perf_stats.sg_alloc_page_rx++; 2298 } 2299 } 2300 } 2301 list_del_init(&entry->list); 2302 return entry; 2303 } 2304 2305 static int qeth_init_input_buffer(struct qeth_card *card, 2306 struct qeth_qdio_buffer *buf) 2307 { 2308 struct qeth_buffer_pool_entry *pool_entry; 2309 int i; 2310 2311 pool_entry = qeth_find_free_buffer_pool_entry(card); 2312 if (!pool_entry) 2313 return 1; 2314 2315 /* 2316 * since the buffer is accessed only from the input_tasklet 2317 * there shouldn't be a need to synchronize; also, since we use 2318 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2319 * buffers 2320 */ 2321 BUG_ON(!pool_entry); 2322 2323 buf->pool_entry = pool_entry; 2324 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2325 buf->buffer->element[i].length = PAGE_SIZE; 2326 buf->buffer->element[i].addr = pool_entry->elements[i]; 2327 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2328 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY; 2329 else 2330 buf->buffer->element[i].flags = 0; 2331 } 2332 return 0; 2333 } 2334 2335 int qeth_init_qdio_queues(struct qeth_card *card) 2336 { 2337 int i, j; 2338 int rc; 2339 2340 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2341 2342 /* inbound queue */ 2343 memset(card->qdio.in_q->qdio_bufs, 0, 2344 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2345 qeth_initialize_working_pool_list(card); 2346 /*give only as many buffers to hardware as we have buffer pool entries*/ 2347 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2348 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2349 card->qdio.in_q->next_buf_to_init = 2350 card->qdio.in_buf_pool.buf_count - 1; 2351 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2352 card->qdio.in_buf_pool.buf_count - 1); 2353 if (rc) { 2354 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2355 return rc; 2356 } 2357 /* outbound queue */ 2358 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2359 memset(card->qdio.out_qs[i]->qdio_bufs, 0, 2360 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2361 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2362 qeth_clear_output_buffer(card->qdio.out_qs[i], 2363 &card->qdio.out_qs[i]->bufs[j]); 2364 } 2365 card->qdio.out_qs[i]->card = card; 2366 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2367 card->qdio.out_qs[i]->do_pack = 0; 2368 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2369 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2370 atomic_set(&card->qdio.out_qs[i]->state, 2371 QETH_OUT_Q_UNLOCKED); 2372 } 2373 return 0; 2374 } 2375 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2376 2377 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2378 { 2379 switch (link_type) { 2380 case QETH_LINK_TYPE_HSTR: 2381 return 2; 2382 default: 2383 return 1; 2384 } 2385 } 2386 2387 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2388 struct qeth_ipa_cmd *cmd, __u8 command, 2389 enum qeth_prot_versions prot) 2390 { 2391 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2392 cmd->hdr.command = command; 2393 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2394 cmd->hdr.seqno = card->seqno.ipa; 2395 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2396 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2397 if (card->options.layer2) 2398 cmd->hdr.prim_version_no = 2; 2399 else 2400 cmd->hdr.prim_version_no = 1; 2401 cmd->hdr.param_count = 1; 2402 cmd->hdr.prot_version = prot; 2403 cmd->hdr.ipa_supported = 0; 2404 cmd->hdr.ipa_enabled = 0; 2405 } 2406 2407 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2408 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2409 { 2410 struct qeth_cmd_buffer *iob; 2411 struct qeth_ipa_cmd *cmd; 2412 2413 iob = qeth_wait_for_buffer(&card->write); 2414 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2415 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2416 2417 return iob; 2418 } 2419 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2420 2421 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2422 char prot_type) 2423 { 2424 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2425 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2426 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2427 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2428 } 2429 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2430 2431 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2432 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2433 unsigned long), 2434 void *reply_param) 2435 { 2436 int rc; 2437 char prot_type; 2438 2439 QETH_DBF_TEXT(TRACE, 4, "sendipa"); 2440 2441 if (card->options.layer2) 2442 if (card->info.type == QETH_CARD_TYPE_OSN) 2443 prot_type = QETH_PROT_OSN2; 2444 else 2445 prot_type = QETH_PROT_LAYER2; 2446 else 2447 prot_type = QETH_PROT_TCPIP; 2448 qeth_prepare_ipa_cmd(card, iob, prot_type); 2449 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2450 iob, reply_cb, reply_param); 2451 return rc; 2452 } 2453 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 2454 2455 static int qeth_send_startstoplan(struct qeth_card *card, 2456 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2457 { 2458 int rc; 2459 struct qeth_cmd_buffer *iob; 2460 2461 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot); 2462 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 2463 2464 return rc; 2465 } 2466 2467 int qeth_send_startlan(struct qeth_card *card) 2468 { 2469 int rc; 2470 2471 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 2472 2473 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0); 2474 return rc; 2475 } 2476 EXPORT_SYMBOL_GPL(qeth_send_startlan); 2477 2478 int qeth_send_stoplan(struct qeth_card *card) 2479 { 2480 int rc = 0; 2481 2482 /* 2483 * TODO: according to the IPA format document page 14, 2484 * TCP/IP (we!) never issue a STOPLAN 2485 * is this right ?!? 2486 */ 2487 QETH_DBF_TEXT(SETUP, 2, "stoplan"); 2488 2489 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0); 2490 return rc; 2491 } 2492 EXPORT_SYMBOL_GPL(qeth_send_stoplan); 2493 2494 int qeth_default_setadapterparms_cb(struct qeth_card *card, 2495 struct qeth_reply *reply, unsigned long data) 2496 { 2497 struct qeth_ipa_cmd *cmd; 2498 2499 QETH_DBF_TEXT(TRACE, 4, "defadpcb"); 2500 2501 cmd = (struct qeth_ipa_cmd *) data; 2502 if (cmd->hdr.return_code == 0) 2503 cmd->hdr.return_code = 2504 cmd->data.setadapterparms.hdr.return_code; 2505 return 0; 2506 } 2507 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb); 2508 2509 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 2510 struct qeth_reply *reply, unsigned long data) 2511 { 2512 struct qeth_ipa_cmd *cmd; 2513 2514 QETH_DBF_TEXT(TRACE, 3, "quyadpcb"); 2515 2516 cmd = (struct qeth_ipa_cmd *) data; 2517 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) 2518 card->info.link_type = 2519 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 2520 card->options.adp.supported_funcs = 2521 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 2522 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 2523 } 2524 2525 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 2526 __u32 command, __u32 cmdlen) 2527 { 2528 struct qeth_cmd_buffer *iob; 2529 struct qeth_ipa_cmd *cmd; 2530 2531 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 2532 QETH_PROT_IPV4); 2533 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2534 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 2535 cmd->data.setadapterparms.hdr.command_code = command; 2536 cmd->data.setadapterparms.hdr.used_total = 1; 2537 cmd->data.setadapterparms.hdr.seq_no = 1; 2538 2539 return iob; 2540 } 2541 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd); 2542 2543 int qeth_query_setadapterparms(struct qeth_card *card) 2544 { 2545 int rc; 2546 struct qeth_cmd_buffer *iob; 2547 2548 QETH_DBF_TEXT(TRACE, 3, "queryadp"); 2549 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 2550 sizeof(struct qeth_ipacmd_setadpparms)); 2551 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 2552 return rc; 2553 } 2554 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 2555 2556 int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error, 2557 const char *dbftext) 2558 { 2559 if (qdio_error) { 2560 QETH_DBF_TEXT(TRACE, 2, dbftext); 2561 QETH_DBF_TEXT(QERR, 2, dbftext); 2562 QETH_DBF_TEXT_(QERR, 2, " F15=%02X", 2563 buf->element[15].flags & 0xff); 2564 QETH_DBF_TEXT_(QERR, 2, " F14=%02X", 2565 buf->element[14].flags & 0xff); 2566 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error); 2567 return 1; 2568 } 2569 return 0; 2570 } 2571 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); 2572 2573 void qeth_queue_input_buffer(struct qeth_card *card, int index) 2574 { 2575 struct qeth_qdio_q *queue = card->qdio.in_q; 2576 int count; 2577 int i; 2578 int rc; 2579 int newcount = 0; 2580 2581 count = (index < queue->next_buf_to_init)? 2582 card->qdio.in_buf_pool.buf_count - 2583 (queue->next_buf_to_init - index) : 2584 card->qdio.in_buf_pool.buf_count - 2585 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 2586 /* only requeue at a certain threshold to avoid SIGAs */ 2587 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 2588 for (i = queue->next_buf_to_init; 2589 i < queue->next_buf_to_init + count; ++i) { 2590 if (qeth_init_input_buffer(card, 2591 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 2592 break; 2593 } else { 2594 newcount++; 2595 } 2596 } 2597 2598 if (newcount < count) { 2599 /* we are in memory shortage so we switch back to 2600 traditional skb allocation and drop packages */ 2601 atomic_set(&card->force_alloc_skb, 3); 2602 count = newcount; 2603 } else { 2604 atomic_add_unless(&card->force_alloc_skb, -1, 0); 2605 } 2606 2607 /* 2608 * according to old code it should be avoided to requeue all 2609 * 128 buffers in order to benefit from PCI avoidance. 2610 * this function keeps at least one buffer (the buffer at 2611 * 'index') un-requeued -> this buffer is the first buffer that 2612 * will be requeued the next time 2613 */ 2614 if (card->options.performance_stats) { 2615 card->perf_stats.inbound_do_qdio_cnt++; 2616 card->perf_stats.inbound_do_qdio_start_time = 2617 qeth_get_micros(); 2618 } 2619 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 2620 queue->next_buf_to_init, count); 2621 if (card->options.performance_stats) 2622 card->perf_stats.inbound_do_qdio_time += 2623 qeth_get_micros() - 2624 card->perf_stats.inbound_do_qdio_start_time; 2625 if (rc) { 2626 PRINT_WARN("qeth_queue_input_buffer's do_QDIO " 2627 "return %i (device %s).\n", 2628 rc, CARD_DDEV_ID(card)); 2629 QETH_DBF_TEXT(TRACE, 2, "qinberr"); 2630 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card)); 2631 } 2632 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 2633 QDIO_MAX_BUFFERS_PER_Q; 2634 } 2635 } 2636 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); 2637 2638 static int qeth_handle_send_error(struct qeth_card *card, 2639 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 2640 { 2641 int sbalf15 = buffer->buffer->element[15].flags & 0xff; 2642 int cc = qdio_err & 3; 2643 2644 QETH_DBF_TEXT(TRACE, 6, "hdsnderr"); 2645 qeth_check_qdio_errors(buffer->buffer, qdio_err, "qouterr"); 2646 switch (cc) { 2647 case 0: 2648 if (qdio_err) { 2649 QETH_DBF_TEXT(TRACE, 1, "lnkfail"); 2650 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card)); 2651 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x", 2652 (u16)qdio_err, (u8)sbalf15); 2653 return QETH_SEND_ERROR_LINK_FAILURE; 2654 } 2655 return QETH_SEND_ERROR_NONE; 2656 case 2: 2657 if (qdio_err & QDIO_ERROR_SIGA_BUSY) { 2658 QETH_DBF_TEXT(TRACE, 1, "SIGAcc2B"); 2659 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card)); 2660 return QETH_SEND_ERROR_KICK_IT; 2661 } 2662 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 2663 return QETH_SEND_ERROR_RETRY; 2664 return QETH_SEND_ERROR_LINK_FAILURE; 2665 /* look at qdio_error and sbalf 15 */ 2666 case 1: 2667 QETH_DBF_TEXT(TRACE, 1, "SIGAcc1"); 2668 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card)); 2669 return QETH_SEND_ERROR_LINK_FAILURE; 2670 case 3: 2671 default: 2672 QETH_DBF_TEXT(TRACE, 1, "SIGAcc3"); 2673 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card)); 2674 return QETH_SEND_ERROR_KICK_IT; 2675 } 2676 } 2677 2678 /* 2679 * Switched to packing state if the number of used buffers on a queue 2680 * reaches a certain limit. 2681 */ 2682 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 2683 { 2684 if (!queue->do_pack) { 2685 if (atomic_read(&queue->used_buffers) 2686 >= QETH_HIGH_WATERMARK_PACK){ 2687 /* switch non-PACKING -> PACKING */ 2688 QETH_DBF_TEXT(TRACE, 6, "np->pack"); 2689 if (queue->card->options.performance_stats) 2690 queue->card->perf_stats.sc_dp_p++; 2691 queue->do_pack = 1; 2692 } 2693 } 2694 } 2695 2696 /* 2697 * Switches from packing to non-packing mode. If there is a packing 2698 * buffer on the queue this buffer will be prepared to be flushed. 2699 * In that case 1 is returned to inform the caller. If no buffer 2700 * has to be flushed, zero is returned. 2701 */ 2702 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 2703 { 2704 struct qeth_qdio_out_buffer *buffer; 2705 int flush_count = 0; 2706 2707 if (queue->do_pack) { 2708 if (atomic_read(&queue->used_buffers) 2709 <= QETH_LOW_WATERMARK_PACK) { 2710 /* switch PACKING -> non-PACKING */ 2711 QETH_DBF_TEXT(TRACE, 6, "pack->np"); 2712 if (queue->card->options.performance_stats) 2713 queue->card->perf_stats.sc_p_dp++; 2714 queue->do_pack = 0; 2715 /* flush packing buffers */ 2716 buffer = &queue->bufs[queue->next_buf_to_fill]; 2717 if ((atomic_read(&buffer->state) == 2718 QETH_QDIO_BUF_EMPTY) && 2719 (buffer->next_element_to_fill > 0)) { 2720 atomic_set(&buffer->state, 2721 QETH_QDIO_BUF_PRIMED); 2722 flush_count++; 2723 queue->next_buf_to_fill = 2724 (queue->next_buf_to_fill + 1) % 2725 QDIO_MAX_BUFFERS_PER_Q; 2726 } 2727 } 2728 } 2729 return flush_count; 2730 } 2731 2732 /* 2733 * Called to flush a packing buffer if no more pci flags are on the queue. 2734 * Checks if there is a packing buffer and prepares it to be flushed. 2735 * In that case returns 1, otherwise zero. 2736 */ 2737 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) 2738 { 2739 struct qeth_qdio_out_buffer *buffer; 2740 2741 buffer = &queue->bufs[queue->next_buf_to_fill]; 2742 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 2743 (buffer->next_element_to_fill > 0)) { 2744 /* it's a packing buffer */ 2745 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 2746 queue->next_buf_to_fill = 2747 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 2748 return 1; 2749 } 2750 return 0; 2751 } 2752 2753 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 2754 int count) 2755 { 2756 struct qeth_qdio_out_buffer *buf; 2757 int rc; 2758 int i; 2759 unsigned int qdio_flags; 2760 2761 for (i = index; i < index + count; ++i) { 2762 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; 2763 buf->buffer->element[buf->next_element_to_fill - 1].flags |= 2764 SBAL_FLAGS_LAST_ENTRY; 2765 2766 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 2767 continue; 2768 2769 if (!queue->do_pack) { 2770 if ((atomic_read(&queue->used_buffers) >= 2771 (QETH_HIGH_WATERMARK_PACK - 2772 QETH_WATERMARK_PACK_FUZZ)) && 2773 !atomic_read(&queue->set_pci_flags_count)) { 2774 /* it's likely that we'll go to packing 2775 * mode soon */ 2776 atomic_inc(&queue->set_pci_flags_count); 2777 buf->buffer->element[0].flags |= 0x40; 2778 } 2779 } else { 2780 if (!atomic_read(&queue->set_pci_flags_count)) { 2781 /* 2782 * there's no outstanding PCI any more, so we 2783 * have to request a PCI to be sure the the PCI 2784 * will wake at some time in the future then we 2785 * can flush packed buffers that might still be 2786 * hanging around, which can happen if no 2787 * further send was requested by the stack 2788 */ 2789 atomic_inc(&queue->set_pci_flags_count); 2790 buf->buffer->element[0].flags |= 0x40; 2791 } 2792 } 2793 } 2794 2795 queue->card->dev->trans_start = jiffies; 2796 if (queue->card->options.performance_stats) { 2797 queue->card->perf_stats.outbound_do_qdio_cnt++; 2798 queue->card->perf_stats.outbound_do_qdio_start_time = 2799 qeth_get_micros(); 2800 } 2801 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 2802 if (atomic_read(&queue->set_pci_flags_count)) 2803 qdio_flags |= QDIO_FLAG_PCI_OUT; 2804 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 2805 queue->queue_no, index, count); 2806 if (queue->card->options.performance_stats) 2807 queue->card->perf_stats.outbound_do_qdio_time += 2808 qeth_get_micros() - 2809 queue->card->perf_stats.outbound_do_qdio_start_time; 2810 if (rc) { 2811 QETH_DBF_TEXT(TRACE, 2, "flushbuf"); 2812 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc); 2813 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card)); 2814 queue->card->stats.tx_errors += count; 2815 /* this must not happen under normal circumstances. if it 2816 * happens something is really wrong -> recover */ 2817 qeth_schedule_recovery(queue->card); 2818 return; 2819 } 2820 atomic_add(count, &queue->used_buffers); 2821 if (queue->card->options.performance_stats) 2822 queue->card->perf_stats.bufs_sent += count; 2823 } 2824 2825 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 2826 { 2827 int index; 2828 int flush_cnt = 0; 2829 int q_was_packing = 0; 2830 2831 /* 2832 * check if weed have to switch to non-packing mode or if 2833 * we have to get a pci flag out on the queue 2834 */ 2835 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 2836 !atomic_read(&queue->set_pci_flags_count)) { 2837 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 2838 QETH_OUT_Q_UNLOCKED) { 2839 /* 2840 * If we get in here, there was no action in 2841 * do_send_packet. So, we check if there is a 2842 * packing buffer to be flushed here. 2843 */ 2844 netif_stop_queue(queue->card->dev); 2845 index = queue->next_buf_to_fill; 2846 q_was_packing = queue->do_pack; 2847 /* queue->do_pack may change */ 2848 barrier(); 2849 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 2850 if (!flush_cnt && 2851 !atomic_read(&queue->set_pci_flags_count)) 2852 flush_cnt += 2853 qeth_flush_buffers_on_no_pci(queue); 2854 if (queue->card->options.performance_stats && 2855 q_was_packing) 2856 queue->card->perf_stats.bufs_sent_pack += 2857 flush_cnt; 2858 if (flush_cnt) 2859 qeth_flush_buffers(queue, index, flush_cnt); 2860 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 2861 } 2862 } 2863 } 2864 2865 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 2866 unsigned int qdio_error, int __queue, int first_element, 2867 int count, unsigned long card_ptr) 2868 { 2869 struct qeth_card *card = (struct qeth_card *) card_ptr; 2870 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 2871 struct qeth_qdio_out_buffer *buffer; 2872 int i; 2873 2874 QETH_DBF_TEXT(TRACE, 6, "qdouhdl"); 2875 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) { 2876 QETH_DBF_TEXT(TRACE, 2, "achkcond"); 2877 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card)); 2878 netif_stop_queue(card->dev); 2879 qeth_schedule_recovery(card); 2880 return; 2881 } 2882 if (card->options.performance_stats) { 2883 card->perf_stats.outbound_handler_cnt++; 2884 card->perf_stats.outbound_handler_start_time = 2885 qeth_get_micros(); 2886 } 2887 for (i = first_element; i < (first_element + count); ++i) { 2888 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; 2889 /*we only handle the KICK_IT error by doing a recovery */ 2890 if (qeth_handle_send_error(card, buffer, qdio_error) 2891 == QETH_SEND_ERROR_KICK_IT){ 2892 netif_stop_queue(card->dev); 2893 qeth_schedule_recovery(card); 2894 return; 2895 } 2896 qeth_clear_output_buffer(queue, buffer); 2897 } 2898 atomic_sub(count, &queue->used_buffers); 2899 /* check if we need to do something on this outbound queue */ 2900 if (card->info.type != QETH_CARD_TYPE_IQD) 2901 qeth_check_outbound_queue(queue); 2902 2903 netif_wake_queue(queue->card->dev); 2904 if (card->options.performance_stats) 2905 card->perf_stats.outbound_handler_time += qeth_get_micros() - 2906 card->perf_stats.outbound_handler_start_time; 2907 } 2908 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 2909 2910 int qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb) 2911 { 2912 int cast_type = RTN_UNSPEC; 2913 2914 if (card->info.type == QETH_CARD_TYPE_OSN) 2915 return cast_type; 2916 2917 if (skb->dst && skb->dst->neighbour) { 2918 cast_type = skb->dst->neighbour->type; 2919 if ((cast_type == RTN_BROADCAST) || 2920 (cast_type == RTN_MULTICAST) || 2921 (cast_type == RTN_ANYCAST)) 2922 return cast_type; 2923 else 2924 return RTN_UNSPEC; 2925 } 2926 /* try something else */ 2927 if (skb->protocol == ETH_P_IPV6) 2928 return (skb_network_header(skb)[24] == 0xff) ? 2929 RTN_MULTICAST : 0; 2930 else if (skb->protocol == ETH_P_IP) 2931 return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ? 2932 RTN_MULTICAST : 0; 2933 /* ... */ 2934 if (!memcmp(skb->data, skb->dev->broadcast, 6)) 2935 return RTN_BROADCAST; 2936 else { 2937 u16 hdr_mac; 2938 2939 hdr_mac = *((u16 *)skb->data); 2940 /* tr multicast? */ 2941 switch (card->info.link_type) { 2942 case QETH_LINK_TYPE_HSTR: 2943 case QETH_LINK_TYPE_LANE_TR: 2944 if ((hdr_mac == QETH_TR_MAC_NC) || 2945 (hdr_mac == QETH_TR_MAC_C)) 2946 return RTN_MULTICAST; 2947 break; 2948 /* eth or so multicast? */ 2949 default: 2950 if ((hdr_mac == QETH_ETH_MAC_V4) || 2951 (hdr_mac == QETH_ETH_MAC_V6)) 2952 return RTN_MULTICAST; 2953 } 2954 } 2955 return cast_type; 2956 } 2957 EXPORT_SYMBOL_GPL(qeth_get_cast_type); 2958 2959 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 2960 int ipv, int cast_type) 2961 { 2962 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE)) 2963 return card->qdio.default_out_queue; 2964 switch (card->qdio.no_out_queues) { 2965 case 4: 2966 if (cast_type && card->info.is_multicast_different) 2967 return card->info.is_multicast_different & 2968 (card->qdio.no_out_queues - 1); 2969 if (card->qdio.do_prio_queueing && (ipv == 4)) { 2970 const u8 tos = ip_hdr(skb)->tos; 2971 2972 if (card->qdio.do_prio_queueing == 2973 QETH_PRIO_Q_ING_TOS) { 2974 if (tos & IP_TOS_NOTIMPORTANT) 2975 return 3; 2976 if (tos & IP_TOS_HIGHRELIABILITY) 2977 return 2; 2978 if (tos & IP_TOS_HIGHTHROUGHPUT) 2979 return 1; 2980 if (tos & IP_TOS_LOWDELAY) 2981 return 0; 2982 } 2983 if (card->qdio.do_prio_queueing == 2984 QETH_PRIO_Q_ING_PREC) 2985 return 3 - (tos >> 6); 2986 } else if (card->qdio.do_prio_queueing && (ipv == 6)) { 2987 /* TODO: IPv6!!! */ 2988 } 2989 return card->qdio.default_out_queue; 2990 case 1: /* fallthrough for single-out-queue 1920-device */ 2991 default: 2992 return card->qdio.default_out_queue; 2993 } 2994 } 2995 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 2996 2997 int qeth_get_elements_no(struct qeth_card *card, void *hdr, 2998 struct sk_buff *skb, int elems) 2999 { 3000 int elements_needed = 0; 3001 3002 if (skb_shinfo(skb)->nr_frags > 0) 3003 elements_needed = (skb_shinfo(skb)->nr_frags + 1); 3004 if (elements_needed == 0) 3005 elements_needed = 1 + (((((unsigned long) hdr) % PAGE_SIZE) 3006 + skb->len) >> PAGE_SHIFT); 3007 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 3008 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 3009 "(Number=%d / Length=%d). Discarded.\n", 3010 (elements_needed+elems), skb->len); 3011 return 0; 3012 } 3013 return elements_needed; 3014 } 3015 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 3016 3017 static inline void __qeth_fill_buffer(struct sk_buff *skb, 3018 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill) 3019 { 3020 int length = skb->len; 3021 int length_here; 3022 int element; 3023 char *data; 3024 int first_lap ; 3025 3026 element = *next_element_to_fill; 3027 data = skb->data; 3028 first_lap = (is_tso == 0 ? 1 : 0); 3029 3030 while (length > 0) { 3031 /* length_here is the remaining amount of data in this page */ 3032 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3033 if (length < length_here) 3034 length_here = length; 3035 3036 buffer->element[element].addr = data; 3037 buffer->element[element].length = length_here; 3038 length -= length_here; 3039 if (!length) { 3040 if (first_lap) 3041 buffer->element[element].flags = 0; 3042 else 3043 buffer->element[element].flags = 3044 SBAL_FLAGS_LAST_FRAG; 3045 } else { 3046 if (first_lap) 3047 buffer->element[element].flags = 3048 SBAL_FLAGS_FIRST_FRAG; 3049 else 3050 buffer->element[element].flags = 3051 SBAL_FLAGS_MIDDLE_FRAG; 3052 } 3053 data += length_here; 3054 element++; 3055 first_lap = 0; 3056 } 3057 *next_element_to_fill = element; 3058 } 3059 3060 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 3061 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb) 3062 { 3063 struct qdio_buffer *buffer; 3064 struct qeth_hdr_tso *hdr; 3065 int flush_cnt = 0, hdr_len, large_send = 0; 3066 3067 buffer = buf->buffer; 3068 atomic_inc(&skb->users); 3069 skb_queue_tail(&buf->skb_list, skb); 3070 3071 hdr = (struct qeth_hdr_tso *) skb->data; 3072 /*check first on TSO ....*/ 3073 if (hdr->hdr.hdr.l3.id == QETH_HEADER_TYPE_TSO) { 3074 int element = buf->next_element_to_fill; 3075 3076 hdr_len = sizeof(struct qeth_hdr_tso) + hdr->ext.dg_hdr_len; 3077 /*fill first buffer entry only with header information */ 3078 buffer->element[element].addr = skb->data; 3079 buffer->element[element].length = hdr_len; 3080 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG; 3081 buf->next_element_to_fill++; 3082 skb->data += hdr_len; 3083 skb->len -= hdr_len; 3084 large_send = 1; 3085 } 3086 if (skb_shinfo(skb)->nr_frags == 0) 3087 __qeth_fill_buffer(skb, buffer, large_send, 3088 (int *)&buf->next_element_to_fill); 3089 else 3090 __qeth_fill_buffer_frag(skb, buffer, large_send, 3091 (int *)&buf->next_element_to_fill); 3092 3093 if (!queue->do_pack) { 3094 QETH_DBF_TEXT(TRACE, 6, "fillbfnp"); 3095 /* set state to PRIMED -> will be flushed */ 3096 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3097 flush_cnt = 1; 3098 } else { 3099 QETH_DBF_TEXT(TRACE, 6, "fillbfpa"); 3100 if (queue->card->options.performance_stats) 3101 queue->card->perf_stats.skbs_sent_pack++; 3102 if (buf->next_element_to_fill >= 3103 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 3104 /* 3105 * packed buffer if full -> set state PRIMED 3106 * -> will be flushed 3107 */ 3108 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3109 flush_cnt = 1; 3110 } 3111 } 3112 return flush_cnt; 3113 } 3114 3115 int qeth_do_send_packet_fast(struct qeth_card *card, 3116 struct qeth_qdio_out_q *queue, struct sk_buff *skb, 3117 struct qeth_hdr *hdr, int elements_needed, 3118 struct qeth_eddp_context *ctx) 3119 { 3120 struct qeth_qdio_out_buffer *buffer; 3121 int buffers_needed = 0; 3122 int flush_cnt = 0; 3123 int index; 3124 3125 /* spin until we get the queue ... */ 3126 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3127 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3128 /* ... now we've got the queue */ 3129 index = queue->next_buf_to_fill; 3130 buffer = &queue->bufs[queue->next_buf_to_fill]; 3131 /* 3132 * check if buffer is empty to make sure that we do not 'overtake' 3133 * ourselves and try to fill a buffer that is already primed 3134 */ 3135 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 3136 goto out; 3137 if (ctx == NULL) 3138 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % 3139 QDIO_MAX_BUFFERS_PER_Q; 3140 else { 3141 buffers_needed = qeth_eddp_check_buffers_for_context(queue, 3142 ctx); 3143 if (buffers_needed < 0) 3144 goto out; 3145 queue->next_buf_to_fill = 3146 (queue->next_buf_to_fill + buffers_needed) % 3147 QDIO_MAX_BUFFERS_PER_Q; 3148 } 3149 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3150 if (ctx == NULL) { 3151 qeth_fill_buffer(queue, buffer, skb); 3152 qeth_flush_buffers(queue, index, 1); 3153 } else { 3154 flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index); 3155 WARN_ON(buffers_needed != flush_cnt); 3156 qeth_flush_buffers(queue, index, flush_cnt); 3157 } 3158 return 0; 3159 out: 3160 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3161 return -EBUSY; 3162 } 3163 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 3164 3165 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 3166 struct sk_buff *skb, struct qeth_hdr *hdr, 3167 int elements_needed, struct qeth_eddp_context *ctx) 3168 { 3169 struct qeth_qdio_out_buffer *buffer; 3170 int start_index; 3171 int flush_count = 0; 3172 int do_pack = 0; 3173 int tmp; 3174 int rc = 0; 3175 3176 /* spin until we get the queue ... */ 3177 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3178 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3179 start_index = queue->next_buf_to_fill; 3180 buffer = &queue->bufs[queue->next_buf_to_fill]; 3181 /* 3182 * check if buffer is empty to make sure that we do not 'overtake' 3183 * ourselves and try to fill a buffer that is already primed 3184 */ 3185 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 3186 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3187 return -EBUSY; 3188 } 3189 /* check if we need to switch packing state of this queue */ 3190 qeth_switch_to_packing_if_needed(queue); 3191 if (queue->do_pack) { 3192 do_pack = 1; 3193 if (ctx == NULL) { 3194 /* does packet fit in current buffer? */ 3195 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 3196 buffer->next_element_to_fill) < elements_needed) { 3197 /* ... no -> set state PRIMED */ 3198 atomic_set(&buffer->state, 3199 QETH_QDIO_BUF_PRIMED); 3200 flush_count++; 3201 queue->next_buf_to_fill = 3202 (queue->next_buf_to_fill + 1) % 3203 QDIO_MAX_BUFFERS_PER_Q; 3204 buffer = &queue->bufs[queue->next_buf_to_fill]; 3205 /* we did a step forward, so check buffer state 3206 * again */ 3207 if (atomic_read(&buffer->state) != 3208 QETH_QDIO_BUF_EMPTY){ 3209 qeth_flush_buffers(queue, start_index, 3210 flush_count); 3211 atomic_set(&queue->state, 3212 QETH_OUT_Q_UNLOCKED); 3213 return -EBUSY; 3214 } 3215 } 3216 } else { 3217 /* check if we have enough elements (including following 3218 * free buffers) to handle eddp context */ 3219 if (qeth_eddp_check_buffers_for_context(queue, ctx) 3220 < 0) { 3221 rc = -EBUSY; 3222 goto out; 3223 } 3224 } 3225 } 3226 if (ctx == NULL) 3227 tmp = qeth_fill_buffer(queue, buffer, skb); 3228 else { 3229 tmp = qeth_eddp_fill_buffer(queue, ctx, 3230 queue->next_buf_to_fill); 3231 if (tmp < 0) { 3232 rc = -EBUSY; 3233 goto out; 3234 } 3235 } 3236 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 3237 QDIO_MAX_BUFFERS_PER_Q; 3238 flush_count += tmp; 3239 out: 3240 if (flush_count) 3241 qeth_flush_buffers(queue, start_index, flush_count); 3242 else if (!atomic_read(&queue->set_pci_flags_count)) 3243 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 3244 /* 3245 * queue->state will go from LOCKED -> UNLOCKED or from 3246 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 3247 * (switch packing state or flush buffer to get another pci flag out). 3248 * In that case we will enter this loop 3249 */ 3250 while (atomic_dec_return(&queue->state)) { 3251 flush_count = 0; 3252 start_index = queue->next_buf_to_fill; 3253 /* check if we can go back to non-packing state */ 3254 flush_count += qeth_switch_to_nonpacking_if_needed(queue); 3255 /* 3256 * check if we need to flush a packing buffer to get a pci 3257 * flag out on the queue 3258 */ 3259 if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) 3260 flush_count += qeth_flush_buffers_on_no_pci(queue); 3261 if (flush_count) 3262 qeth_flush_buffers(queue, start_index, flush_count); 3263 } 3264 /* at this point the queue is UNLOCKED again */ 3265 if (queue->card->options.performance_stats && do_pack) 3266 queue->card->perf_stats.bufs_sent_pack += flush_count; 3267 3268 return rc; 3269 } 3270 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 3271 3272 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 3273 struct qeth_reply *reply, unsigned long data) 3274 { 3275 struct qeth_ipa_cmd *cmd; 3276 struct qeth_ipacmd_setadpparms *setparms; 3277 3278 QETH_DBF_TEXT(TRACE, 4, "prmadpcb"); 3279 3280 cmd = (struct qeth_ipa_cmd *) data; 3281 setparms = &(cmd->data.setadapterparms); 3282 3283 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 3284 if (cmd->hdr.return_code) { 3285 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code); 3286 setparms->data.mode = SET_PROMISC_MODE_OFF; 3287 } 3288 card->info.promisc_mode = setparms->data.mode; 3289 return 0; 3290 } 3291 3292 void qeth_setadp_promisc_mode(struct qeth_card *card) 3293 { 3294 enum qeth_ipa_promisc_modes mode; 3295 struct net_device *dev = card->dev; 3296 struct qeth_cmd_buffer *iob; 3297 struct qeth_ipa_cmd *cmd; 3298 3299 QETH_DBF_TEXT(TRACE, 4, "setprom"); 3300 3301 if (((dev->flags & IFF_PROMISC) && 3302 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 3303 (!(dev->flags & IFF_PROMISC) && 3304 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 3305 return; 3306 mode = SET_PROMISC_MODE_OFF; 3307 if (dev->flags & IFF_PROMISC) 3308 mode = SET_PROMISC_MODE_ON; 3309 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode); 3310 3311 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 3312 sizeof(struct qeth_ipacmd_setadpparms)); 3313 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 3314 cmd->data.setadapterparms.data.mode = mode; 3315 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 3316 } 3317 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 3318 3319 int qeth_change_mtu(struct net_device *dev, int new_mtu) 3320 { 3321 struct qeth_card *card; 3322 char dbf_text[15]; 3323 3324 card = netdev_priv(dev); 3325 3326 QETH_DBF_TEXT(TRACE, 4, "chgmtu"); 3327 sprintf(dbf_text, "%8x", new_mtu); 3328 QETH_DBF_TEXT(TRACE, 4, dbf_text); 3329 3330 if (new_mtu < 64) 3331 return -EINVAL; 3332 if (new_mtu > 65535) 3333 return -EINVAL; 3334 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && 3335 (!qeth_mtu_is_valid(card, new_mtu))) 3336 return -EINVAL; 3337 dev->mtu = new_mtu; 3338 return 0; 3339 } 3340 EXPORT_SYMBOL_GPL(qeth_change_mtu); 3341 3342 struct net_device_stats *qeth_get_stats(struct net_device *dev) 3343 { 3344 struct qeth_card *card; 3345 3346 card = netdev_priv(dev); 3347 3348 QETH_DBF_TEXT(TRACE, 5, "getstat"); 3349 3350 return &card->stats; 3351 } 3352 EXPORT_SYMBOL_GPL(qeth_get_stats); 3353 3354 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 3355 struct qeth_reply *reply, unsigned long data) 3356 { 3357 struct qeth_ipa_cmd *cmd; 3358 3359 QETH_DBF_TEXT(TRACE, 4, "chgmaccb"); 3360 3361 cmd = (struct qeth_ipa_cmd *) data; 3362 if (!card->options.layer2 || 3363 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 3364 memcpy(card->dev->dev_addr, 3365 &cmd->data.setadapterparms.data.change_addr.addr, 3366 OSA_ADDR_LEN); 3367 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 3368 } 3369 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 3370 return 0; 3371 } 3372 3373 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 3374 { 3375 int rc; 3376 struct qeth_cmd_buffer *iob; 3377 struct qeth_ipa_cmd *cmd; 3378 3379 QETH_DBF_TEXT(TRACE, 4, "chgmac"); 3380 3381 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 3382 sizeof(struct qeth_ipacmd_setadpparms)); 3383 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3384 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 3385 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 3386 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 3387 card->dev->dev_addr, OSA_ADDR_LEN); 3388 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 3389 NULL); 3390 return rc; 3391 } 3392 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 3393 3394 void qeth_tx_timeout(struct net_device *dev) 3395 { 3396 struct qeth_card *card; 3397 3398 card = netdev_priv(dev); 3399 card->stats.tx_errors++; 3400 qeth_schedule_recovery(card); 3401 } 3402 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 3403 3404 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 3405 { 3406 struct qeth_card *card = netdev_priv(dev); 3407 int rc = 0; 3408 3409 switch (regnum) { 3410 case MII_BMCR: /* Basic mode control register */ 3411 rc = BMCR_FULLDPLX; 3412 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 3413 (card->info.link_type != QETH_LINK_TYPE_OSN) && 3414 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 3415 rc |= BMCR_SPEED100; 3416 break; 3417 case MII_BMSR: /* Basic mode status register */ 3418 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 3419 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 3420 BMSR_100BASE4; 3421 break; 3422 case MII_PHYSID1: /* PHYS ID 1 */ 3423 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 3424 dev->dev_addr[2]; 3425 rc = (rc >> 5) & 0xFFFF; 3426 break; 3427 case MII_PHYSID2: /* PHYS ID 2 */ 3428 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 3429 break; 3430 case MII_ADVERTISE: /* Advertisement control reg */ 3431 rc = ADVERTISE_ALL; 3432 break; 3433 case MII_LPA: /* Link partner ability reg */ 3434 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 3435 LPA_100BASE4 | LPA_LPACK; 3436 break; 3437 case MII_EXPANSION: /* Expansion register */ 3438 break; 3439 case MII_DCOUNTER: /* disconnect counter */ 3440 break; 3441 case MII_FCSCOUNTER: /* false carrier counter */ 3442 break; 3443 case MII_NWAYTEST: /* N-way auto-neg test register */ 3444 break; 3445 case MII_RERRCOUNTER: /* rx error counter */ 3446 rc = card->stats.rx_errors; 3447 break; 3448 case MII_SREVISION: /* silicon revision */ 3449 break; 3450 case MII_RESV1: /* reserved 1 */ 3451 break; 3452 case MII_LBRERROR: /* loopback, rx, bypass error */ 3453 break; 3454 case MII_PHYADDR: /* physical address */ 3455 break; 3456 case MII_RESV2: /* reserved 2 */ 3457 break; 3458 case MII_TPISTATUS: /* TPI status for 10mbps */ 3459 break; 3460 case MII_NCONFIG: /* network interface config */ 3461 break; 3462 default: 3463 break; 3464 } 3465 return rc; 3466 } 3467 EXPORT_SYMBOL_GPL(qeth_mdio_read); 3468 3469 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 3470 struct qeth_cmd_buffer *iob, int len, 3471 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 3472 unsigned long), 3473 void *reply_param) 3474 { 3475 u16 s1, s2; 3476 3477 QETH_DBF_TEXT(TRACE, 4, "sendsnmp"); 3478 3479 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 3480 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 3481 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 3482 /* adjust PDU length fields in IPA_PDU_HEADER */ 3483 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 3484 s2 = (u32) len; 3485 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 3486 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 3487 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 3488 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 3489 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 3490 reply_cb, reply_param); 3491 } 3492 3493 static int qeth_snmp_command_cb(struct qeth_card *card, 3494 struct qeth_reply *reply, unsigned long sdata) 3495 { 3496 struct qeth_ipa_cmd *cmd; 3497 struct qeth_arp_query_info *qinfo; 3498 struct qeth_snmp_cmd *snmp; 3499 unsigned char *data; 3500 __u16 data_len; 3501 3502 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb"); 3503 3504 cmd = (struct qeth_ipa_cmd *) sdata; 3505 data = (unsigned char *)((char *)cmd - reply->offset); 3506 qinfo = (struct qeth_arp_query_info *) reply->param; 3507 snmp = &cmd->data.setadapterparms.data.snmp; 3508 3509 if (cmd->hdr.return_code) { 3510 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code); 3511 return 0; 3512 } 3513 if (cmd->data.setadapterparms.hdr.return_code) { 3514 cmd->hdr.return_code = 3515 cmd->data.setadapterparms.hdr.return_code; 3516 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code); 3517 return 0; 3518 } 3519 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 3520 if (cmd->data.setadapterparms.hdr.seq_no == 1) 3521 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 3522 else 3523 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 3524 3525 /* check if there is enough room in userspace */ 3526 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 3527 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM); 3528 cmd->hdr.return_code = -ENOMEM; 3529 return 0; 3530 } 3531 QETH_DBF_TEXT_(TRACE, 4, "snore%i", 3532 cmd->data.setadapterparms.hdr.used_total); 3533 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i", 3534 cmd->data.setadapterparms.hdr.seq_no); 3535 /*copy entries to user buffer*/ 3536 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 3537 memcpy(qinfo->udata + qinfo->udata_offset, 3538 (char *)snmp, 3539 data_len + offsetof(struct qeth_snmp_cmd, data)); 3540 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 3541 } else { 3542 memcpy(qinfo->udata + qinfo->udata_offset, 3543 (char *)&snmp->request, data_len); 3544 } 3545 qinfo->udata_offset += data_len; 3546 /* check if all replies received ... */ 3547 QETH_DBF_TEXT_(TRACE, 4, "srtot%i", 3548 cmd->data.setadapterparms.hdr.used_total); 3549 QETH_DBF_TEXT_(TRACE, 4, "srseq%i", 3550 cmd->data.setadapterparms.hdr.seq_no); 3551 if (cmd->data.setadapterparms.hdr.seq_no < 3552 cmd->data.setadapterparms.hdr.used_total) 3553 return 1; 3554 return 0; 3555 } 3556 3557 int qeth_snmp_command(struct qeth_card *card, char __user *udata) 3558 { 3559 struct qeth_cmd_buffer *iob; 3560 struct qeth_ipa_cmd *cmd; 3561 struct qeth_snmp_ureq *ureq; 3562 int req_len; 3563 struct qeth_arp_query_info qinfo = {0, }; 3564 int rc = 0; 3565 3566 QETH_DBF_TEXT(TRACE, 3, "snmpcmd"); 3567 3568 if (card->info.guestlan) 3569 return -EOPNOTSUPP; 3570 3571 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 3572 (!card->options.layer2)) { 3573 return -EOPNOTSUPP; 3574 } 3575 /* skip 4 bytes (data_len struct member) to get req_len */ 3576 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 3577 return -EFAULT; 3578 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL); 3579 if (!ureq) { 3580 QETH_DBF_TEXT(TRACE, 2, "snmpnome"); 3581 return -ENOMEM; 3582 } 3583 if (copy_from_user(ureq, udata, 3584 req_len + sizeof(struct qeth_snmp_ureq_hdr))) { 3585 kfree(ureq); 3586 return -EFAULT; 3587 } 3588 qinfo.udata_len = ureq->hdr.data_len; 3589 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 3590 if (!qinfo.udata) { 3591 kfree(ureq); 3592 return -ENOMEM; 3593 } 3594 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 3595 3596 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 3597 QETH_SNMP_SETADP_CMDLENGTH + req_len); 3598 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3599 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 3600 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 3601 qeth_snmp_command_cb, (void *)&qinfo); 3602 if (rc) 3603 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 3604 QETH_CARD_IFNAME(card), rc); 3605 else { 3606 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 3607 rc = -EFAULT; 3608 } 3609 3610 kfree(ureq); 3611 kfree(qinfo.udata); 3612 return rc; 3613 } 3614 EXPORT_SYMBOL_GPL(qeth_snmp_command); 3615 3616 static inline int qeth_get_qdio_q_format(struct qeth_card *card) 3617 { 3618 switch (card->info.type) { 3619 case QETH_CARD_TYPE_IQD: 3620 return 2; 3621 default: 3622 return 0; 3623 } 3624 } 3625 3626 static int qeth_qdio_establish(struct qeth_card *card) 3627 { 3628 struct qdio_initialize init_data; 3629 char *qib_param_field; 3630 struct qdio_buffer **in_sbal_ptrs; 3631 struct qdio_buffer **out_sbal_ptrs; 3632 int i, j, k; 3633 int rc = 0; 3634 3635 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 3636 3637 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 3638 GFP_KERNEL); 3639 if (!qib_param_field) 3640 return -ENOMEM; 3641 3642 qeth_create_qib_param_field(card, qib_param_field); 3643 qeth_create_qib_param_field_blkt(card, qib_param_field); 3644 3645 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 3646 GFP_KERNEL); 3647 if (!in_sbal_ptrs) { 3648 kfree(qib_param_field); 3649 return -ENOMEM; 3650 } 3651 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) 3652 in_sbal_ptrs[i] = (struct qdio_buffer *) 3653 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 3654 3655 out_sbal_ptrs = 3656 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 3657 sizeof(void *), GFP_KERNEL); 3658 if (!out_sbal_ptrs) { 3659 kfree(in_sbal_ptrs); 3660 kfree(qib_param_field); 3661 return -ENOMEM; 3662 } 3663 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 3664 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 3665 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 3666 card->qdio.out_qs[i]->bufs[j].buffer); 3667 } 3668 3669 memset(&init_data, 0, sizeof(struct qdio_initialize)); 3670 init_data.cdev = CARD_DDEV(card); 3671 init_data.q_format = qeth_get_qdio_q_format(card); 3672 init_data.qib_param_field_format = 0; 3673 init_data.qib_param_field = qib_param_field; 3674 init_data.no_input_qs = 1; 3675 init_data.no_output_qs = card->qdio.no_out_queues; 3676 init_data.input_handler = card->discipline.input_handler; 3677 init_data.output_handler = card->discipline.output_handler; 3678 init_data.int_parm = (unsigned long) card; 3679 init_data.flags = QDIO_INBOUND_0COPY_SBALS | 3680 QDIO_OUTBOUND_0COPY_SBALS | 3681 QDIO_USE_OUTBOUND_PCIS; 3682 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 3683 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 3684 3685 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 3686 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 3687 rc = qdio_initialize(&init_data); 3688 if (rc) 3689 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 3690 } 3691 kfree(out_sbal_ptrs); 3692 kfree(in_sbal_ptrs); 3693 kfree(qib_param_field); 3694 return rc; 3695 } 3696 3697 static void qeth_core_free_card(struct qeth_card *card) 3698 { 3699 3700 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 3701 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 3702 qeth_clean_channel(&card->read); 3703 qeth_clean_channel(&card->write); 3704 if (card->dev) 3705 free_netdev(card->dev); 3706 kfree(card->ip_tbd_list); 3707 qeth_free_qdio_buffers(card); 3708 kfree(card); 3709 } 3710 3711 static struct ccw_device_id qeth_ids[] = { 3712 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE}, 3713 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD}, 3714 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN}, 3715 {}, 3716 }; 3717 MODULE_DEVICE_TABLE(ccw, qeth_ids); 3718 3719 static struct ccw_driver qeth_ccw_driver = { 3720 .name = "qeth", 3721 .ids = qeth_ids, 3722 .probe = ccwgroup_probe_ccwdev, 3723 .remove = ccwgroup_remove_ccwdev, 3724 }; 3725 3726 static int qeth_core_driver_group(const char *buf, struct device *root_dev, 3727 unsigned long driver_id) 3728 { 3729 return ccwgroup_create_from_string(root_dev, driver_id, 3730 &qeth_ccw_driver, 3, buf); 3731 } 3732 3733 int qeth_core_hardsetup_card(struct qeth_card *card) 3734 { 3735 struct qdio_ssqd_desc *qdio_ssqd; 3736 int retries = 3; 3737 int mpno = 0; 3738 int rc; 3739 3740 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 3741 atomic_set(&card->force_alloc_skb, 0); 3742 retry: 3743 if (retries < 3) { 3744 PRINT_WARN("Retrying to do IDX activates.\n"); 3745 ccw_device_set_offline(CARD_DDEV(card)); 3746 ccw_device_set_offline(CARD_WDEV(card)); 3747 ccw_device_set_offline(CARD_RDEV(card)); 3748 ccw_device_set_online(CARD_RDEV(card)); 3749 ccw_device_set_online(CARD_WDEV(card)); 3750 ccw_device_set_online(CARD_DDEV(card)); 3751 } 3752 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 3753 if (rc == -ERESTARTSYS) { 3754 QETH_DBF_TEXT(SETUP, 2, "break1"); 3755 return rc; 3756 } else if (rc) { 3757 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 3758 if (--retries < 0) 3759 goto out; 3760 else 3761 goto retry; 3762 } 3763 3764 rc = qeth_get_unitaddr(card); 3765 if (rc) { 3766 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 3767 return rc; 3768 } 3769 3770 qdio_ssqd = qdio_get_ssqd_desc(CARD_DDEV(card)); 3771 if (qdio_ssqd) 3772 mpno = qdio_ssqd->pcnt; 3773 if (mpno) 3774 mpno = min(mpno - 1, QETH_MAX_PORTNO); 3775 if (card->info.portno > mpno) { 3776 QETH_DBF_MESSAGE(2, "Device %s does not offer port number %d" 3777 "\n.", CARD_BUS_ID(card), card->info.portno); 3778 rc = -ENODEV; 3779 goto out; 3780 } 3781 qeth_init_tokens(card); 3782 qeth_init_func_level(card); 3783 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 3784 if (rc == -ERESTARTSYS) { 3785 QETH_DBF_TEXT(SETUP, 2, "break2"); 3786 return rc; 3787 } else if (rc) { 3788 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 3789 if (--retries < 0) 3790 goto out; 3791 else 3792 goto retry; 3793 } 3794 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 3795 if (rc == -ERESTARTSYS) { 3796 QETH_DBF_TEXT(SETUP, 2, "break3"); 3797 return rc; 3798 } else if (rc) { 3799 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 3800 if (--retries < 0) 3801 goto out; 3802 else 3803 goto retry; 3804 } 3805 rc = qeth_mpc_initialize(card); 3806 if (rc) { 3807 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 3808 goto out; 3809 } 3810 return 0; 3811 out: 3812 PRINT_ERR("Initialization in hardsetup failed! rc=%d\n", rc); 3813 return rc; 3814 } 3815 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 3816 3817 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element, 3818 struct sk_buff **pskb, int offset, int *pfrag, int data_len) 3819 { 3820 struct page *page = virt_to_page(element->addr); 3821 if (*pskb == NULL) { 3822 /* the upper protocol layers assume that there is data in the 3823 * skb itself. Copy a small amount (64 bytes) to make them 3824 * happy. */ 3825 *pskb = dev_alloc_skb(64 + ETH_HLEN); 3826 if (!(*pskb)) 3827 return -ENOMEM; 3828 skb_reserve(*pskb, ETH_HLEN); 3829 if (data_len <= 64) { 3830 memcpy(skb_put(*pskb, data_len), element->addr + offset, 3831 data_len); 3832 } else { 3833 get_page(page); 3834 memcpy(skb_put(*pskb, 64), element->addr + offset, 64); 3835 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64, 3836 data_len - 64); 3837 (*pskb)->data_len += data_len - 64; 3838 (*pskb)->len += data_len - 64; 3839 (*pskb)->truesize += data_len - 64; 3840 (*pfrag)++; 3841 } 3842 } else { 3843 get_page(page); 3844 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); 3845 (*pskb)->data_len += data_len; 3846 (*pskb)->len += data_len; 3847 (*pskb)->truesize += data_len; 3848 (*pfrag)++; 3849 } 3850 return 0; 3851 } 3852 3853 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 3854 struct qdio_buffer *buffer, 3855 struct qdio_buffer_element **__element, int *__offset, 3856 struct qeth_hdr **hdr) 3857 { 3858 struct qdio_buffer_element *element = *__element; 3859 int offset = *__offset; 3860 struct sk_buff *skb = NULL; 3861 int skb_len; 3862 void *data_ptr; 3863 int data_len; 3864 int headroom = 0; 3865 int use_rx_sg = 0; 3866 int frag = 0; 3867 3868 /* qeth_hdr must not cross element boundaries */ 3869 if (element->length < offset + sizeof(struct qeth_hdr)) { 3870 if (qeth_is_last_sbale(element)) 3871 return NULL; 3872 element++; 3873 offset = 0; 3874 if (element->length < sizeof(struct qeth_hdr)) 3875 return NULL; 3876 } 3877 *hdr = element->addr + offset; 3878 3879 offset += sizeof(struct qeth_hdr); 3880 if (card->options.layer2) { 3881 if (card->info.type == QETH_CARD_TYPE_OSN) { 3882 skb_len = (*hdr)->hdr.osn.pdu_length; 3883 headroom = sizeof(struct qeth_hdr); 3884 } else { 3885 skb_len = (*hdr)->hdr.l2.pkt_length; 3886 } 3887 } else { 3888 skb_len = (*hdr)->hdr.l3.length; 3889 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) || 3890 (card->info.link_type == QETH_LINK_TYPE_HSTR)) 3891 headroom = TR_HLEN; 3892 else 3893 headroom = ETH_HLEN; 3894 } 3895 3896 if (!skb_len) 3897 return NULL; 3898 3899 if ((skb_len >= card->options.rx_sg_cb) && 3900 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 3901 (!atomic_read(&card->force_alloc_skb))) { 3902 use_rx_sg = 1; 3903 } else { 3904 skb = dev_alloc_skb(skb_len + headroom); 3905 if (!skb) 3906 goto no_mem; 3907 if (headroom) 3908 skb_reserve(skb, headroom); 3909 } 3910 3911 data_ptr = element->addr + offset; 3912 while (skb_len) { 3913 data_len = min(skb_len, (int)(element->length - offset)); 3914 if (data_len) { 3915 if (use_rx_sg) { 3916 if (qeth_create_skb_frag(element, &skb, offset, 3917 &frag, data_len)) 3918 goto no_mem; 3919 } else { 3920 memcpy(skb_put(skb, data_len), data_ptr, 3921 data_len); 3922 } 3923 } 3924 skb_len -= data_len; 3925 if (skb_len) { 3926 if (qeth_is_last_sbale(element)) { 3927 QETH_DBF_TEXT(TRACE, 4, "unexeob"); 3928 QETH_DBF_TEXT_(TRACE, 4, "%s", 3929 CARD_BUS_ID(card)); 3930 QETH_DBF_TEXT(QERR, 2, "unexeob"); 3931 QETH_DBF_TEXT_(QERR, 2, "%s", 3932 CARD_BUS_ID(card)); 3933 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer)); 3934 dev_kfree_skb_any(skb); 3935 card->stats.rx_errors++; 3936 return NULL; 3937 } 3938 element++; 3939 offset = 0; 3940 data_ptr = element->addr; 3941 } else { 3942 offset += data_len; 3943 } 3944 } 3945 *__element = element; 3946 *__offset = offset; 3947 if (use_rx_sg && card->options.performance_stats) { 3948 card->perf_stats.sg_skbs_rx++; 3949 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 3950 } 3951 return skb; 3952 no_mem: 3953 if (net_ratelimit()) { 3954 QETH_DBF_TEXT(TRACE, 2, "noskbmem"); 3955 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card)); 3956 } 3957 card->stats.rx_dropped++; 3958 return NULL; 3959 } 3960 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 3961 3962 static void qeth_unregister_dbf_views(void) 3963 { 3964 int x; 3965 for (x = 0; x < QETH_DBF_INFOS; x++) { 3966 debug_unregister(qeth_dbf[x].id); 3967 qeth_dbf[x].id = NULL; 3968 } 3969 } 3970 3971 void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...) 3972 { 3973 char dbf_txt_buf[32]; 3974 va_list args; 3975 3976 if (level > (qeth_dbf[dbf_nix].id)->level) 3977 return; 3978 va_start(args, fmt); 3979 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 3980 va_end(args); 3981 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf); 3982 } 3983 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 3984 3985 static int qeth_register_dbf_views(void) 3986 { 3987 int ret; 3988 int x; 3989 3990 for (x = 0; x < QETH_DBF_INFOS; x++) { 3991 /* register the areas */ 3992 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 3993 qeth_dbf[x].pages, 3994 qeth_dbf[x].areas, 3995 qeth_dbf[x].len); 3996 if (qeth_dbf[x].id == NULL) { 3997 qeth_unregister_dbf_views(); 3998 return -ENOMEM; 3999 } 4000 4001 /* register a view */ 4002 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 4003 if (ret) { 4004 qeth_unregister_dbf_views(); 4005 return ret; 4006 } 4007 4008 /* set a passing level */ 4009 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 4010 } 4011 4012 return 0; 4013 } 4014 4015 int qeth_core_load_discipline(struct qeth_card *card, 4016 enum qeth_discipline_id discipline) 4017 { 4018 int rc = 0; 4019 switch (discipline) { 4020 case QETH_DISCIPLINE_LAYER3: 4021 card->discipline.ccwgdriver = try_then_request_module( 4022 symbol_get(qeth_l3_ccwgroup_driver), 4023 "qeth_l3"); 4024 break; 4025 case QETH_DISCIPLINE_LAYER2: 4026 card->discipline.ccwgdriver = try_then_request_module( 4027 symbol_get(qeth_l2_ccwgroup_driver), 4028 "qeth_l2"); 4029 break; 4030 } 4031 if (!card->discipline.ccwgdriver) { 4032 PRINT_ERR("Support for discipline %d not present\n", 4033 discipline); 4034 rc = -EINVAL; 4035 } 4036 return rc; 4037 } 4038 4039 void qeth_core_free_discipline(struct qeth_card *card) 4040 { 4041 if (card->options.layer2) 4042 symbol_put(qeth_l2_ccwgroup_driver); 4043 else 4044 symbol_put(qeth_l3_ccwgroup_driver); 4045 card->discipline.ccwgdriver = NULL; 4046 } 4047 4048 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 4049 { 4050 struct qeth_card *card; 4051 struct device *dev; 4052 int rc; 4053 unsigned long flags; 4054 4055 QETH_DBF_TEXT(SETUP, 2, "probedev"); 4056 4057 dev = &gdev->dev; 4058 if (!get_device(dev)) 4059 return -ENODEV; 4060 4061 QETH_DBF_TEXT_(SETUP, 2, "%s", gdev->dev.bus_id); 4062 4063 card = qeth_alloc_card(); 4064 if (!card) { 4065 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 4066 rc = -ENOMEM; 4067 goto err_dev; 4068 } 4069 card->read.ccwdev = gdev->cdev[0]; 4070 card->write.ccwdev = gdev->cdev[1]; 4071 card->data.ccwdev = gdev->cdev[2]; 4072 dev_set_drvdata(&gdev->dev, card); 4073 card->gdev = gdev; 4074 gdev->cdev[0]->handler = qeth_irq; 4075 gdev->cdev[1]->handler = qeth_irq; 4076 gdev->cdev[2]->handler = qeth_irq; 4077 4078 rc = qeth_determine_card_type(card); 4079 if (rc) { 4080 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4081 goto err_card; 4082 } 4083 rc = qeth_setup_card(card); 4084 if (rc) { 4085 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 4086 goto err_card; 4087 } 4088 4089 if (card->info.type == QETH_CARD_TYPE_OSN) { 4090 rc = qeth_core_create_osn_attributes(dev); 4091 if (rc) 4092 goto err_card; 4093 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); 4094 if (rc) { 4095 qeth_core_remove_osn_attributes(dev); 4096 goto err_card; 4097 } 4098 rc = card->discipline.ccwgdriver->probe(card->gdev); 4099 if (rc) { 4100 qeth_core_free_discipline(card); 4101 qeth_core_remove_osn_attributes(dev); 4102 goto err_card; 4103 } 4104 } else { 4105 rc = qeth_core_create_device_attributes(dev); 4106 if (rc) 4107 goto err_card; 4108 } 4109 4110 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 4111 list_add_tail(&card->list, &qeth_core_card_list.list); 4112 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 4113 return 0; 4114 4115 err_card: 4116 qeth_core_free_card(card); 4117 err_dev: 4118 put_device(dev); 4119 return rc; 4120 } 4121 4122 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 4123 { 4124 unsigned long flags; 4125 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4126 4127 if (card->discipline.ccwgdriver) { 4128 card->discipline.ccwgdriver->remove(gdev); 4129 qeth_core_free_discipline(card); 4130 } 4131 4132 if (card->info.type == QETH_CARD_TYPE_OSN) { 4133 qeth_core_remove_osn_attributes(&gdev->dev); 4134 } else { 4135 qeth_core_remove_device_attributes(&gdev->dev); 4136 } 4137 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 4138 list_del(&card->list); 4139 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 4140 qeth_core_free_card(card); 4141 dev_set_drvdata(&gdev->dev, NULL); 4142 put_device(&gdev->dev); 4143 return; 4144 } 4145 4146 static int qeth_core_set_online(struct ccwgroup_device *gdev) 4147 { 4148 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4149 int rc = 0; 4150 int def_discipline; 4151 4152 if (!card->discipline.ccwgdriver) { 4153 if (card->info.type == QETH_CARD_TYPE_IQD) 4154 def_discipline = QETH_DISCIPLINE_LAYER3; 4155 else 4156 def_discipline = QETH_DISCIPLINE_LAYER2; 4157 rc = qeth_core_load_discipline(card, def_discipline); 4158 if (rc) 4159 goto err; 4160 rc = card->discipline.ccwgdriver->probe(card->gdev); 4161 if (rc) 4162 goto err; 4163 } 4164 rc = card->discipline.ccwgdriver->set_online(gdev); 4165 err: 4166 return rc; 4167 } 4168 4169 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 4170 { 4171 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4172 return card->discipline.ccwgdriver->set_offline(gdev); 4173 } 4174 4175 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 4176 { 4177 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4178 if (card->discipline.ccwgdriver && 4179 card->discipline.ccwgdriver->shutdown) 4180 card->discipline.ccwgdriver->shutdown(gdev); 4181 } 4182 4183 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 4184 .owner = THIS_MODULE, 4185 .name = "qeth", 4186 .driver_id = 0xD8C5E3C8, 4187 .probe = qeth_core_probe_device, 4188 .remove = qeth_core_remove_device, 4189 .set_online = qeth_core_set_online, 4190 .set_offline = qeth_core_set_offline, 4191 .shutdown = qeth_core_shutdown, 4192 }; 4193 4194 static ssize_t 4195 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf, 4196 size_t count) 4197 { 4198 int err; 4199 err = qeth_core_driver_group(buf, qeth_core_root_dev, 4200 qeth_core_ccwgroup_driver.driver_id); 4201 if (err) 4202 return err; 4203 else 4204 return count; 4205 } 4206 4207 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); 4208 4209 static struct { 4210 const char str[ETH_GSTRING_LEN]; 4211 } qeth_ethtool_stats_keys[] = { 4212 /* 0 */{"rx skbs"}, 4213 {"rx buffers"}, 4214 {"tx skbs"}, 4215 {"tx buffers"}, 4216 {"tx skbs no packing"}, 4217 {"tx buffers no packing"}, 4218 {"tx skbs packing"}, 4219 {"tx buffers packing"}, 4220 {"tx sg skbs"}, 4221 {"tx sg frags"}, 4222 /* 10 */{"rx sg skbs"}, 4223 {"rx sg frags"}, 4224 {"rx sg page allocs"}, 4225 {"tx large kbytes"}, 4226 {"tx large count"}, 4227 {"tx pk state ch n->p"}, 4228 {"tx pk state ch p->n"}, 4229 {"tx pk watermark low"}, 4230 {"tx pk watermark high"}, 4231 {"queue 0 buffer usage"}, 4232 /* 20 */{"queue 1 buffer usage"}, 4233 {"queue 2 buffer usage"}, 4234 {"queue 3 buffer usage"}, 4235 {"rx handler time"}, 4236 {"rx handler count"}, 4237 {"rx do_QDIO time"}, 4238 {"rx do_QDIO count"}, 4239 {"tx handler time"}, 4240 {"tx handler count"}, 4241 {"tx time"}, 4242 /* 30 */{"tx count"}, 4243 {"tx do_QDIO time"}, 4244 {"tx do_QDIO count"}, 4245 }; 4246 4247 int qeth_core_get_stats_count(struct net_device *dev) 4248 { 4249 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 4250 } 4251 EXPORT_SYMBOL_GPL(qeth_core_get_stats_count); 4252 4253 void qeth_core_get_ethtool_stats(struct net_device *dev, 4254 struct ethtool_stats *stats, u64 *data) 4255 { 4256 struct qeth_card *card = netdev_priv(dev); 4257 data[0] = card->stats.rx_packets - 4258 card->perf_stats.initial_rx_packets; 4259 data[1] = card->perf_stats.bufs_rec; 4260 data[2] = card->stats.tx_packets - 4261 card->perf_stats.initial_tx_packets; 4262 data[3] = card->perf_stats.bufs_sent; 4263 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 4264 - card->perf_stats.skbs_sent_pack; 4265 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 4266 data[6] = card->perf_stats.skbs_sent_pack; 4267 data[7] = card->perf_stats.bufs_sent_pack; 4268 data[8] = card->perf_stats.sg_skbs_sent; 4269 data[9] = card->perf_stats.sg_frags_sent; 4270 data[10] = card->perf_stats.sg_skbs_rx; 4271 data[11] = card->perf_stats.sg_frags_rx; 4272 data[12] = card->perf_stats.sg_alloc_page_rx; 4273 data[13] = (card->perf_stats.large_send_bytes >> 10); 4274 data[14] = card->perf_stats.large_send_cnt; 4275 data[15] = card->perf_stats.sc_dp_p; 4276 data[16] = card->perf_stats.sc_p_dp; 4277 data[17] = QETH_LOW_WATERMARK_PACK; 4278 data[18] = QETH_HIGH_WATERMARK_PACK; 4279 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 4280 data[20] = (card->qdio.no_out_queues > 1) ? 4281 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 4282 data[21] = (card->qdio.no_out_queues > 2) ? 4283 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 4284 data[22] = (card->qdio.no_out_queues > 3) ? 4285 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 4286 data[23] = card->perf_stats.inbound_time; 4287 data[24] = card->perf_stats.inbound_cnt; 4288 data[25] = card->perf_stats.inbound_do_qdio_time; 4289 data[26] = card->perf_stats.inbound_do_qdio_cnt; 4290 data[27] = card->perf_stats.outbound_handler_time; 4291 data[28] = card->perf_stats.outbound_handler_cnt; 4292 data[29] = card->perf_stats.outbound_time; 4293 data[30] = card->perf_stats.outbound_cnt; 4294 data[31] = card->perf_stats.outbound_do_qdio_time; 4295 data[32] = card->perf_stats.outbound_do_qdio_cnt; 4296 } 4297 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 4298 4299 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 4300 { 4301 switch (stringset) { 4302 case ETH_SS_STATS: 4303 memcpy(data, &qeth_ethtool_stats_keys, 4304 sizeof(qeth_ethtool_stats_keys)); 4305 break; 4306 default: 4307 WARN_ON(1); 4308 break; 4309 } 4310 } 4311 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 4312 4313 void qeth_core_get_drvinfo(struct net_device *dev, 4314 struct ethtool_drvinfo *info) 4315 { 4316 struct qeth_card *card = netdev_priv(dev); 4317 if (card->options.layer2) 4318 strcpy(info->driver, "qeth_l2"); 4319 else 4320 strcpy(info->driver, "qeth_l3"); 4321 4322 strcpy(info->version, "1.0"); 4323 strcpy(info->fw_version, card->info.mcl_level); 4324 sprintf(info->bus_info, "%s/%s/%s", 4325 CARD_RDEV_ID(card), 4326 CARD_WDEV_ID(card), 4327 CARD_DDEV_ID(card)); 4328 } 4329 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 4330 4331 int qeth_core_ethtool_get_settings(struct net_device *netdev, 4332 struct ethtool_cmd *ecmd) 4333 { 4334 struct qeth_card *card = netdev_priv(netdev); 4335 enum qeth_link_types link_type; 4336 4337 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 4338 link_type = QETH_LINK_TYPE_10GBIT_ETH; 4339 else 4340 link_type = card->info.link_type; 4341 4342 ecmd->transceiver = XCVR_INTERNAL; 4343 ecmd->supported = SUPPORTED_Autoneg; 4344 ecmd->advertising = ADVERTISED_Autoneg; 4345 ecmd->duplex = DUPLEX_FULL; 4346 ecmd->autoneg = AUTONEG_ENABLE; 4347 4348 switch (link_type) { 4349 case QETH_LINK_TYPE_FAST_ETH: 4350 case QETH_LINK_TYPE_LANE_ETH100: 4351 ecmd->supported |= SUPPORTED_10baseT_Half | 4352 SUPPORTED_10baseT_Full | 4353 SUPPORTED_100baseT_Half | 4354 SUPPORTED_100baseT_Full | 4355 SUPPORTED_TP; 4356 ecmd->advertising |= ADVERTISED_10baseT_Half | 4357 ADVERTISED_10baseT_Full | 4358 ADVERTISED_100baseT_Half | 4359 ADVERTISED_100baseT_Full | 4360 ADVERTISED_TP; 4361 ecmd->speed = SPEED_100; 4362 ecmd->port = PORT_TP; 4363 break; 4364 4365 case QETH_LINK_TYPE_GBIT_ETH: 4366 case QETH_LINK_TYPE_LANE_ETH1000: 4367 ecmd->supported |= SUPPORTED_10baseT_Half | 4368 SUPPORTED_10baseT_Full | 4369 SUPPORTED_100baseT_Half | 4370 SUPPORTED_100baseT_Full | 4371 SUPPORTED_1000baseT_Half | 4372 SUPPORTED_1000baseT_Full | 4373 SUPPORTED_FIBRE; 4374 ecmd->advertising |= ADVERTISED_10baseT_Half | 4375 ADVERTISED_10baseT_Full | 4376 ADVERTISED_100baseT_Half | 4377 ADVERTISED_100baseT_Full | 4378 ADVERTISED_1000baseT_Half | 4379 ADVERTISED_1000baseT_Full | 4380 ADVERTISED_FIBRE; 4381 ecmd->speed = SPEED_1000; 4382 ecmd->port = PORT_FIBRE; 4383 break; 4384 4385 case QETH_LINK_TYPE_10GBIT_ETH: 4386 ecmd->supported |= SUPPORTED_10baseT_Half | 4387 SUPPORTED_10baseT_Full | 4388 SUPPORTED_100baseT_Half | 4389 SUPPORTED_100baseT_Full | 4390 SUPPORTED_1000baseT_Half | 4391 SUPPORTED_1000baseT_Full | 4392 SUPPORTED_10000baseT_Full | 4393 SUPPORTED_FIBRE; 4394 ecmd->advertising |= ADVERTISED_10baseT_Half | 4395 ADVERTISED_10baseT_Full | 4396 ADVERTISED_100baseT_Half | 4397 ADVERTISED_100baseT_Full | 4398 ADVERTISED_1000baseT_Half | 4399 ADVERTISED_1000baseT_Full | 4400 ADVERTISED_10000baseT_Full | 4401 ADVERTISED_FIBRE; 4402 ecmd->speed = SPEED_10000; 4403 ecmd->port = PORT_FIBRE; 4404 break; 4405 4406 default: 4407 ecmd->supported |= SUPPORTED_10baseT_Half | 4408 SUPPORTED_10baseT_Full | 4409 SUPPORTED_TP; 4410 ecmd->advertising |= ADVERTISED_10baseT_Half | 4411 ADVERTISED_10baseT_Full | 4412 ADVERTISED_TP; 4413 ecmd->speed = SPEED_10; 4414 ecmd->port = PORT_TP; 4415 } 4416 4417 return 0; 4418 } 4419 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); 4420 4421 static int __init qeth_core_init(void) 4422 { 4423 int rc; 4424 4425 PRINT_INFO("loading core functions\n"); 4426 INIT_LIST_HEAD(&qeth_core_card_list.list); 4427 rwlock_init(&qeth_core_card_list.rwlock); 4428 4429 rc = qeth_register_dbf_views(); 4430 if (rc) 4431 goto out_err; 4432 rc = ccw_driver_register(&qeth_ccw_driver); 4433 if (rc) 4434 goto ccw_err; 4435 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 4436 if (rc) 4437 goto ccwgroup_err; 4438 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver, 4439 &driver_attr_group); 4440 if (rc) 4441 goto driver_err; 4442 qeth_core_root_dev = s390_root_dev_register("qeth"); 4443 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0; 4444 if (rc) 4445 goto register_err; 4446 return 0; 4447 4448 register_err: 4449 driver_remove_file(&qeth_core_ccwgroup_driver.driver, 4450 &driver_attr_group); 4451 driver_err: 4452 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 4453 ccwgroup_err: 4454 ccw_driver_unregister(&qeth_ccw_driver); 4455 ccw_err: 4456 qeth_unregister_dbf_views(); 4457 out_err: 4458 PRINT_ERR("Initialization failed with code %d\n", rc); 4459 return rc; 4460 } 4461 4462 static void __exit qeth_core_exit(void) 4463 { 4464 s390_root_dev_unregister(qeth_core_root_dev); 4465 driver_remove_file(&qeth_core_ccwgroup_driver.driver, 4466 &driver_attr_group); 4467 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 4468 ccw_driver_unregister(&qeth_ccw_driver); 4469 qeth_unregister_dbf_views(); 4470 PRINT_INFO("core functions removed\n"); 4471 } 4472 4473 module_init(qeth_core_init); 4474 module_exit(qeth_core_exit); 4475 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 4476 MODULE_DESCRIPTION("qeth core functions"); 4477 MODULE_LICENSE("GPL"); 4478