1 /* 2 * drivers/s390/net/qeth_core_main.c 3 * 4 * Copyright IBM Corp. 2007, 2009 5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 6 * Frank Pavlic <fpavlic@de.ibm.com>, 7 * Thomas Spatzier <tspat@de.ibm.com>, 8 * Frank Blaschka <frank.blaschka@de.ibm.com> 9 */ 10 11 #define KMSG_COMPONENT "qeth" 12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 13 14 #include <linux/module.h> 15 #include <linux/moduleparam.h> 16 #include <linux/string.h> 17 #include <linux/errno.h> 18 #include <linux/kernel.h> 19 #include <linux/ip.h> 20 #include <linux/tcp.h> 21 #include <linux/mii.h> 22 #include <linux/kthread.h> 23 #include <linux/slab.h> 24 25 #include <asm/ebcdic.h> 26 #include <asm/io.h> 27 #include <asm/sysinfo.h> 28 29 #include "qeth_core.h" 30 31 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 32 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 33 /* N P A M L V H */ 34 [QETH_DBF_SETUP] = {"qeth_setup", 35 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 36 [QETH_DBF_MSG] = {"qeth_msg", 37 8, 1, 128, 3, &debug_sprintf_view, NULL}, 38 [QETH_DBF_CTRL] = {"qeth_control", 39 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 40 }; 41 EXPORT_SYMBOL_GPL(qeth_dbf); 42 43 struct qeth_card_list_struct qeth_core_card_list; 44 EXPORT_SYMBOL_GPL(qeth_core_card_list); 45 struct kmem_cache *qeth_core_header_cache; 46 EXPORT_SYMBOL_GPL(qeth_core_header_cache); 47 48 static struct device *qeth_core_root_dev; 49 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY; 50 static struct lock_class_key qdio_out_skb_queue_key; 51 52 static void qeth_send_control_data_cb(struct qeth_channel *, 53 struct qeth_cmd_buffer *); 54 static int qeth_issue_next_read(struct qeth_card *); 55 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 56 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 57 static void qeth_free_buffer_pool(struct qeth_card *); 58 static int qeth_qdio_establish(struct qeth_card *); 59 60 61 static inline const char *qeth_get_cardname(struct qeth_card *card) 62 { 63 if (card->info.guestlan) { 64 switch (card->info.type) { 65 case QETH_CARD_TYPE_OSD: 66 return " Guest LAN QDIO"; 67 case QETH_CARD_TYPE_IQD: 68 return " Guest LAN Hiper"; 69 case QETH_CARD_TYPE_OSM: 70 return " Guest LAN QDIO - OSM"; 71 case QETH_CARD_TYPE_OSX: 72 return " Guest LAN QDIO - OSX"; 73 default: 74 return " unknown"; 75 } 76 } else { 77 switch (card->info.type) { 78 case QETH_CARD_TYPE_OSD: 79 return " OSD Express"; 80 case QETH_CARD_TYPE_IQD: 81 return " HiperSockets"; 82 case QETH_CARD_TYPE_OSN: 83 return " OSN QDIO"; 84 case QETH_CARD_TYPE_OSM: 85 return " OSM QDIO"; 86 case QETH_CARD_TYPE_OSX: 87 return " OSX QDIO"; 88 default: 89 return " unknown"; 90 } 91 } 92 return " n/a"; 93 } 94 95 /* max length to be returned: 14 */ 96 const char *qeth_get_cardname_short(struct qeth_card *card) 97 { 98 if (card->info.guestlan) { 99 switch (card->info.type) { 100 case QETH_CARD_TYPE_OSD: 101 return "GuestLAN QDIO"; 102 case QETH_CARD_TYPE_IQD: 103 return "GuestLAN Hiper"; 104 case QETH_CARD_TYPE_OSM: 105 return "GuestLAN OSM"; 106 case QETH_CARD_TYPE_OSX: 107 return "GuestLAN OSX"; 108 default: 109 return "unknown"; 110 } 111 } else { 112 switch (card->info.type) { 113 case QETH_CARD_TYPE_OSD: 114 switch (card->info.link_type) { 115 case QETH_LINK_TYPE_FAST_ETH: 116 return "OSD_100"; 117 case QETH_LINK_TYPE_HSTR: 118 return "HSTR"; 119 case QETH_LINK_TYPE_GBIT_ETH: 120 return "OSD_1000"; 121 case QETH_LINK_TYPE_10GBIT_ETH: 122 return "OSD_10GIG"; 123 case QETH_LINK_TYPE_LANE_ETH100: 124 return "OSD_FE_LANE"; 125 case QETH_LINK_TYPE_LANE_TR: 126 return "OSD_TR_LANE"; 127 case QETH_LINK_TYPE_LANE_ETH1000: 128 return "OSD_GbE_LANE"; 129 case QETH_LINK_TYPE_LANE: 130 return "OSD_ATM_LANE"; 131 default: 132 return "OSD_Express"; 133 } 134 case QETH_CARD_TYPE_IQD: 135 return "HiperSockets"; 136 case QETH_CARD_TYPE_OSN: 137 return "OSN"; 138 case QETH_CARD_TYPE_OSM: 139 return "OSM_1000"; 140 case QETH_CARD_TYPE_OSX: 141 return "OSX_10GIG"; 142 default: 143 return "unknown"; 144 } 145 } 146 return "n/a"; 147 } 148 149 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 150 int clear_start_mask) 151 { 152 unsigned long flags; 153 154 spin_lock_irqsave(&card->thread_mask_lock, flags); 155 card->thread_allowed_mask = threads; 156 if (clear_start_mask) 157 card->thread_start_mask &= threads; 158 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 159 wake_up(&card->wait_q); 160 } 161 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 162 163 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 164 { 165 unsigned long flags; 166 int rc = 0; 167 168 spin_lock_irqsave(&card->thread_mask_lock, flags); 169 rc = (card->thread_running_mask & threads); 170 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 171 return rc; 172 } 173 EXPORT_SYMBOL_GPL(qeth_threads_running); 174 175 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 176 { 177 return wait_event_interruptible(card->wait_q, 178 qeth_threads_running(card, threads) == 0); 179 } 180 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 181 182 void qeth_clear_working_pool_list(struct qeth_card *card) 183 { 184 struct qeth_buffer_pool_entry *pool_entry, *tmp; 185 186 QETH_CARD_TEXT(card, 5, "clwrklst"); 187 list_for_each_entry_safe(pool_entry, tmp, 188 &card->qdio.in_buf_pool.entry_list, list){ 189 list_del(&pool_entry->list); 190 } 191 } 192 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 193 194 static int qeth_alloc_buffer_pool(struct qeth_card *card) 195 { 196 struct qeth_buffer_pool_entry *pool_entry; 197 void *ptr; 198 int i, j; 199 200 QETH_CARD_TEXT(card, 5, "alocpool"); 201 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 202 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL); 203 if (!pool_entry) { 204 qeth_free_buffer_pool(card); 205 return -ENOMEM; 206 } 207 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 208 ptr = (void *) __get_free_page(GFP_KERNEL); 209 if (!ptr) { 210 while (j > 0) 211 free_page((unsigned long) 212 pool_entry->elements[--j]); 213 kfree(pool_entry); 214 qeth_free_buffer_pool(card); 215 return -ENOMEM; 216 } 217 pool_entry->elements[j] = ptr; 218 } 219 list_add(&pool_entry->init_list, 220 &card->qdio.init_pool.entry_list); 221 } 222 return 0; 223 } 224 225 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 226 { 227 QETH_CARD_TEXT(card, 2, "realcbp"); 228 229 if ((card->state != CARD_STATE_DOWN) && 230 (card->state != CARD_STATE_RECOVER)) 231 return -EPERM; 232 233 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 234 qeth_clear_working_pool_list(card); 235 qeth_free_buffer_pool(card); 236 card->qdio.in_buf_pool.buf_count = bufcnt; 237 card->qdio.init_pool.buf_count = bufcnt; 238 return qeth_alloc_buffer_pool(card); 239 } 240 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool); 241 242 static int qeth_issue_next_read(struct qeth_card *card) 243 { 244 int rc; 245 struct qeth_cmd_buffer *iob; 246 247 QETH_CARD_TEXT(card, 5, "issnxrd"); 248 if (card->read.state != CH_STATE_UP) 249 return -EIO; 250 iob = qeth_get_buffer(&card->read); 251 if (!iob) { 252 dev_warn(&card->gdev->dev, "The qeth device driver " 253 "failed to recover an error on the device\n"); 254 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " 255 "available\n", dev_name(&card->gdev->dev)); 256 return -ENOMEM; 257 } 258 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 259 QETH_CARD_TEXT(card, 6, "noirqpnd"); 260 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 261 (addr_t) iob, 0, 0); 262 if (rc) { 263 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " 264 "rc=%i\n", dev_name(&card->gdev->dev), rc); 265 atomic_set(&card->read.irq_pending, 0); 266 card->read_or_write_problem = 1; 267 qeth_schedule_recovery(card); 268 wake_up(&card->wait_q); 269 } 270 return rc; 271 } 272 273 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 274 { 275 struct qeth_reply *reply; 276 277 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 278 if (reply) { 279 atomic_set(&reply->refcnt, 1); 280 atomic_set(&reply->received, 0); 281 reply->card = card; 282 }; 283 return reply; 284 } 285 286 static void qeth_get_reply(struct qeth_reply *reply) 287 { 288 WARN_ON(atomic_read(&reply->refcnt) <= 0); 289 atomic_inc(&reply->refcnt); 290 } 291 292 static void qeth_put_reply(struct qeth_reply *reply) 293 { 294 WARN_ON(atomic_read(&reply->refcnt) <= 0); 295 if (atomic_dec_and_test(&reply->refcnt)) 296 kfree(reply); 297 } 298 299 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 300 struct qeth_card *card) 301 { 302 char *ipa_name; 303 int com = cmd->hdr.command; 304 ipa_name = qeth_get_ipa_cmd_name(com); 305 if (rc) 306 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned " 307 "x%X \"%s\"\n", 308 ipa_name, com, dev_name(&card->gdev->dev), 309 QETH_CARD_IFNAME(card), rc, 310 qeth_get_ipa_msg(rc)); 311 else 312 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n", 313 ipa_name, com, dev_name(&card->gdev->dev), 314 QETH_CARD_IFNAME(card)); 315 } 316 317 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 318 struct qeth_cmd_buffer *iob) 319 { 320 struct qeth_ipa_cmd *cmd = NULL; 321 322 QETH_CARD_TEXT(card, 5, "chkipad"); 323 if (IS_IPA(iob->data)) { 324 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 325 if (IS_IPA_REPLY(cmd)) { 326 if (cmd->hdr.command != IPA_CMD_SETCCID && 327 cmd->hdr.command != IPA_CMD_DELCCID && 328 cmd->hdr.command != IPA_CMD_MODCCID && 329 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS) 330 qeth_issue_ipa_msg(cmd, 331 cmd->hdr.return_code, card); 332 return cmd; 333 } else { 334 switch (cmd->hdr.command) { 335 case IPA_CMD_STOPLAN: 336 dev_warn(&card->gdev->dev, 337 "The link for interface %s on CHPID" 338 " 0x%X failed\n", 339 QETH_CARD_IFNAME(card), 340 card->info.chpid); 341 card->lan_online = 0; 342 if (card->dev && netif_carrier_ok(card->dev)) 343 netif_carrier_off(card->dev); 344 return NULL; 345 case IPA_CMD_STARTLAN: 346 dev_info(&card->gdev->dev, 347 "The link for %s on CHPID 0x%X has" 348 " been restored\n", 349 QETH_CARD_IFNAME(card), 350 card->info.chpid); 351 netif_carrier_on(card->dev); 352 card->lan_online = 1; 353 if (card->info.hwtrap) 354 card->info.hwtrap = 2; 355 qeth_schedule_recovery(card); 356 return NULL; 357 case IPA_CMD_MODCCID: 358 return cmd; 359 case IPA_CMD_REGISTER_LOCAL_ADDR: 360 QETH_CARD_TEXT(card, 3, "irla"); 361 break; 362 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 363 QETH_CARD_TEXT(card, 3, "urla"); 364 break; 365 default: 366 QETH_DBF_MESSAGE(2, "Received data is IPA " 367 "but not a reply!\n"); 368 break; 369 } 370 } 371 } 372 return cmd; 373 } 374 375 void qeth_clear_ipacmd_list(struct qeth_card *card) 376 { 377 struct qeth_reply *reply, *r; 378 unsigned long flags; 379 380 QETH_CARD_TEXT(card, 4, "clipalst"); 381 382 spin_lock_irqsave(&card->lock, flags); 383 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 384 qeth_get_reply(reply); 385 reply->rc = -EIO; 386 atomic_inc(&reply->received); 387 list_del_init(&reply->list); 388 wake_up(&reply->wait_q); 389 qeth_put_reply(reply); 390 } 391 spin_unlock_irqrestore(&card->lock, flags); 392 atomic_set(&card->write.irq_pending, 0); 393 } 394 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 395 396 static int qeth_check_idx_response(struct qeth_card *card, 397 unsigned char *buffer) 398 { 399 if (!buffer) 400 return 0; 401 402 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 403 if ((buffer[2] & 0xc0) == 0xc0) { 404 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " 405 "with cause code 0x%02x%s\n", 406 buffer[4], 407 ((buffer[4] == 0x22) ? 408 " -- try another portname" : "")); 409 QETH_CARD_TEXT(card, 2, "ckidxres"); 410 QETH_CARD_TEXT(card, 2, " idxterm"); 411 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 412 if (buffer[4] == 0xf6) { 413 dev_err(&card->gdev->dev, 414 "The qeth device is not configured " 415 "for the OSI layer required by z/VM\n"); 416 return -EPERM; 417 } 418 return -EIO; 419 } 420 return 0; 421 } 422 423 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 424 __u32 len) 425 { 426 struct qeth_card *card; 427 428 card = CARD_FROM_CDEV(channel->ccwdev); 429 QETH_CARD_TEXT(card, 4, "setupccw"); 430 if (channel == &card->read) 431 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 432 else 433 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 434 channel->ccw.count = len; 435 channel->ccw.cda = (__u32) __pa(iob); 436 } 437 438 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 439 { 440 __u8 index; 441 442 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff"); 443 index = channel->io_buf_no; 444 do { 445 if (channel->iob[index].state == BUF_STATE_FREE) { 446 channel->iob[index].state = BUF_STATE_LOCKED; 447 channel->io_buf_no = (channel->io_buf_no + 1) % 448 QETH_CMD_BUFFER_NO; 449 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 450 return channel->iob + index; 451 } 452 index = (index + 1) % QETH_CMD_BUFFER_NO; 453 } while (index != channel->io_buf_no); 454 455 return NULL; 456 } 457 458 void qeth_release_buffer(struct qeth_channel *channel, 459 struct qeth_cmd_buffer *iob) 460 { 461 unsigned long flags; 462 463 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff"); 464 spin_lock_irqsave(&channel->iob_lock, flags); 465 memset(iob->data, 0, QETH_BUFSIZE); 466 iob->state = BUF_STATE_FREE; 467 iob->callback = qeth_send_control_data_cb; 468 iob->rc = 0; 469 spin_unlock_irqrestore(&channel->iob_lock, flags); 470 } 471 EXPORT_SYMBOL_GPL(qeth_release_buffer); 472 473 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 474 { 475 struct qeth_cmd_buffer *buffer = NULL; 476 unsigned long flags; 477 478 spin_lock_irqsave(&channel->iob_lock, flags); 479 buffer = __qeth_get_buffer(channel); 480 spin_unlock_irqrestore(&channel->iob_lock, flags); 481 return buffer; 482 } 483 484 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 485 { 486 struct qeth_cmd_buffer *buffer; 487 wait_event(channel->wait_q, 488 ((buffer = qeth_get_buffer(channel)) != NULL)); 489 return buffer; 490 } 491 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 492 493 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 494 { 495 int cnt; 496 497 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 498 qeth_release_buffer(channel, &channel->iob[cnt]); 499 channel->buf_no = 0; 500 channel->io_buf_no = 0; 501 } 502 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 503 504 static void qeth_send_control_data_cb(struct qeth_channel *channel, 505 struct qeth_cmd_buffer *iob) 506 { 507 struct qeth_card *card; 508 struct qeth_reply *reply, *r; 509 struct qeth_ipa_cmd *cmd; 510 unsigned long flags; 511 int keep_reply; 512 int rc = 0; 513 514 card = CARD_FROM_CDEV(channel->ccwdev); 515 QETH_CARD_TEXT(card, 4, "sndctlcb"); 516 rc = qeth_check_idx_response(card, iob->data); 517 switch (rc) { 518 case 0: 519 break; 520 case -EIO: 521 qeth_clear_ipacmd_list(card); 522 qeth_schedule_recovery(card); 523 /* fall through */ 524 default: 525 goto out; 526 } 527 528 cmd = qeth_check_ipa_data(card, iob); 529 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 530 goto out; 531 /*in case of OSN : check if cmd is set */ 532 if (card->info.type == QETH_CARD_TYPE_OSN && 533 cmd && 534 cmd->hdr.command != IPA_CMD_STARTLAN && 535 card->osn_info.assist_cb != NULL) { 536 card->osn_info.assist_cb(card->dev, cmd); 537 goto out; 538 } 539 540 spin_lock_irqsave(&card->lock, flags); 541 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 542 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 543 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 544 qeth_get_reply(reply); 545 list_del_init(&reply->list); 546 spin_unlock_irqrestore(&card->lock, flags); 547 keep_reply = 0; 548 if (reply->callback != NULL) { 549 if (cmd) { 550 reply->offset = (__u16)((char *)cmd - 551 (char *)iob->data); 552 keep_reply = reply->callback(card, 553 reply, 554 (unsigned long)cmd); 555 } else 556 keep_reply = reply->callback(card, 557 reply, 558 (unsigned long)iob); 559 } 560 if (cmd) 561 reply->rc = (u16) cmd->hdr.return_code; 562 else if (iob->rc) 563 reply->rc = iob->rc; 564 if (keep_reply) { 565 spin_lock_irqsave(&card->lock, flags); 566 list_add_tail(&reply->list, 567 &card->cmd_waiter_list); 568 spin_unlock_irqrestore(&card->lock, flags); 569 } else { 570 atomic_inc(&reply->received); 571 wake_up(&reply->wait_q); 572 } 573 qeth_put_reply(reply); 574 goto out; 575 } 576 } 577 spin_unlock_irqrestore(&card->lock, flags); 578 out: 579 memcpy(&card->seqno.pdu_hdr_ack, 580 QETH_PDU_HEADER_SEQ_NO(iob->data), 581 QETH_SEQ_NO_LENGTH); 582 qeth_release_buffer(channel, iob); 583 } 584 585 static int qeth_setup_channel(struct qeth_channel *channel) 586 { 587 int cnt; 588 589 QETH_DBF_TEXT(SETUP, 2, "setupch"); 590 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 591 channel->iob[cnt].data = 592 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 593 if (channel->iob[cnt].data == NULL) 594 break; 595 channel->iob[cnt].state = BUF_STATE_FREE; 596 channel->iob[cnt].channel = channel; 597 channel->iob[cnt].callback = qeth_send_control_data_cb; 598 channel->iob[cnt].rc = 0; 599 } 600 if (cnt < QETH_CMD_BUFFER_NO) { 601 while (cnt-- > 0) 602 kfree(channel->iob[cnt].data); 603 return -ENOMEM; 604 } 605 channel->buf_no = 0; 606 channel->io_buf_no = 0; 607 atomic_set(&channel->irq_pending, 0); 608 spin_lock_init(&channel->iob_lock); 609 610 init_waitqueue_head(&channel->wait_q); 611 return 0; 612 } 613 614 static int qeth_set_thread_start_bit(struct qeth_card *card, 615 unsigned long thread) 616 { 617 unsigned long flags; 618 619 spin_lock_irqsave(&card->thread_mask_lock, flags); 620 if (!(card->thread_allowed_mask & thread) || 621 (card->thread_start_mask & thread)) { 622 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 623 return -EPERM; 624 } 625 card->thread_start_mask |= thread; 626 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 627 return 0; 628 } 629 630 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 631 { 632 unsigned long flags; 633 634 spin_lock_irqsave(&card->thread_mask_lock, flags); 635 card->thread_start_mask &= ~thread; 636 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 637 wake_up(&card->wait_q); 638 } 639 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 640 641 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 642 { 643 unsigned long flags; 644 645 spin_lock_irqsave(&card->thread_mask_lock, flags); 646 card->thread_running_mask &= ~thread; 647 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 648 wake_up(&card->wait_q); 649 } 650 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 651 652 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 653 { 654 unsigned long flags; 655 int rc = 0; 656 657 spin_lock_irqsave(&card->thread_mask_lock, flags); 658 if (card->thread_start_mask & thread) { 659 if ((card->thread_allowed_mask & thread) && 660 !(card->thread_running_mask & thread)) { 661 rc = 1; 662 card->thread_start_mask &= ~thread; 663 card->thread_running_mask |= thread; 664 } else 665 rc = -EPERM; 666 } 667 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 668 return rc; 669 } 670 671 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 672 { 673 int rc = 0; 674 675 wait_event(card->wait_q, 676 (rc = __qeth_do_run_thread(card, thread)) >= 0); 677 return rc; 678 } 679 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 680 681 void qeth_schedule_recovery(struct qeth_card *card) 682 { 683 QETH_CARD_TEXT(card, 2, "startrec"); 684 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 685 schedule_work(&card->kernel_thread_starter); 686 } 687 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 688 689 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 690 { 691 int dstat, cstat; 692 char *sense; 693 struct qeth_card *card; 694 695 sense = (char *) irb->ecw; 696 cstat = irb->scsw.cmd.cstat; 697 dstat = irb->scsw.cmd.dstat; 698 card = CARD_FROM_CDEV(cdev); 699 700 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 701 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 702 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 703 QETH_CARD_TEXT(card, 2, "CGENCHK"); 704 dev_warn(&cdev->dev, "The qeth device driver " 705 "failed to recover an error on the device\n"); 706 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n", 707 dev_name(&cdev->dev), dstat, cstat); 708 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 709 16, 1, irb, 64, 1); 710 return 1; 711 } 712 713 if (dstat & DEV_STAT_UNIT_CHECK) { 714 if (sense[SENSE_RESETTING_EVENT_BYTE] & 715 SENSE_RESETTING_EVENT_FLAG) { 716 QETH_CARD_TEXT(card, 2, "REVIND"); 717 return 1; 718 } 719 if (sense[SENSE_COMMAND_REJECT_BYTE] & 720 SENSE_COMMAND_REJECT_FLAG) { 721 QETH_CARD_TEXT(card, 2, "CMDREJi"); 722 return 1; 723 } 724 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 725 QETH_CARD_TEXT(card, 2, "AFFE"); 726 return 1; 727 } 728 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 729 QETH_CARD_TEXT(card, 2, "ZEROSEN"); 730 return 0; 731 } 732 QETH_CARD_TEXT(card, 2, "DGENCHK"); 733 return 1; 734 } 735 return 0; 736 } 737 738 static long __qeth_check_irb_error(struct ccw_device *cdev, 739 unsigned long intparm, struct irb *irb) 740 { 741 struct qeth_card *card; 742 743 card = CARD_FROM_CDEV(cdev); 744 745 if (!IS_ERR(irb)) 746 return 0; 747 748 switch (PTR_ERR(irb)) { 749 case -EIO: 750 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", 751 dev_name(&cdev->dev)); 752 QETH_CARD_TEXT(card, 2, "ckirberr"); 753 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 754 break; 755 case -ETIMEDOUT: 756 dev_warn(&cdev->dev, "A hardware operation timed out" 757 " on the device\n"); 758 QETH_CARD_TEXT(card, 2, "ckirberr"); 759 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT); 760 if (intparm == QETH_RCD_PARM) { 761 if (card && (card->data.ccwdev == cdev)) { 762 card->data.state = CH_STATE_DOWN; 763 wake_up(&card->wait_q); 764 } 765 } 766 break; 767 default: 768 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", 769 dev_name(&cdev->dev), PTR_ERR(irb)); 770 QETH_CARD_TEXT(card, 2, "ckirberr"); 771 QETH_CARD_TEXT(card, 2, " rc???"); 772 } 773 return PTR_ERR(irb); 774 } 775 776 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 777 struct irb *irb) 778 { 779 int rc; 780 int cstat, dstat; 781 struct qeth_cmd_buffer *buffer; 782 struct qeth_channel *channel; 783 struct qeth_card *card; 784 struct qeth_cmd_buffer *iob; 785 __u8 index; 786 787 if (__qeth_check_irb_error(cdev, intparm, irb)) 788 return; 789 cstat = irb->scsw.cmd.cstat; 790 dstat = irb->scsw.cmd.dstat; 791 792 card = CARD_FROM_CDEV(cdev); 793 if (!card) 794 return; 795 796 QETH_CARD_TEXT(card, 5, "irq"); 797 798 if (card->read.ccwdev == cdev) { 799 channel = &card->read; 800 QETH_CARD_TEXT(card, 5, "read"); 801 } else if (card->write.ccwdev == cdev) { 802 channel = &card->write; 803 QETH_CARD_TEXT(card, 5, "write"); 804 } else { 805 channel = &card->data; 806 QETH_CARD_TEXT(card, 5, "data"); 807 } 808 atomic_set(&channel->irq_pending, 0); 809 810 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 811 channel->state = CH_STATE_STOPPED; 812 813 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 814 channel->state = CH_STATE_HALTED; 815 816 /*let's wake up immediately on data channel*/ 817 if ((channel == &card->data) && (intparm != 0) && 818 (intparm != QETH_RCD_PARM)) 819 goto out; 820 821 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 822 QETH_CARD_TEXT(card, 6, "clrchpar"); 823 /* we don't have to handle this further */ 824 intparm = 0; 825 } 826 if (intparm == QETH_HALT_CHANNEL_PARM) { 827 QETH_CARD_TEXT(card, 6, "hltchpar"); 828 /* we don't have to handle this further */ 829 intparm = 0; 830 } 831 if ((dstat & DEV_STAT_UNIT_EXCEP) || 832 (dstat & DEV_STAT_UNIT_CHECK) || 833 (cstat)) { 834 if (irb->esw.esw0.erw.cons) { 835 dev_warn(&channel->ccwdev->dev, 836 "The qeth device driver failed to recover " 837 "an error on the device\n"); 838 QETH_DBF_MESSAGE(2, "%s sense data available. cstat " 839 "0x%X dstat 0x%X\n", 840 dev_name(&channel->ccwdev->dev), cstat, dstat); 841 print_hex_dump(KERN_WARNING, "qeth: irb ", 842 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 843 print_hex_dump(KERN_WARNING, "qeth: sense data ", 844 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 845 } 846 if (intparm == QETH_RCD_PARM) { 847 channel->state = CH_STATE_DOWN; 848 goto out; 849 } 850 rc = qeth_get_problem(cdev, irb); 851 if (rc) { 852 qeth_clear_ipacmd_list(card); 853 qeth_schedule_recovery(card); 854 goto out; 855 } 856 } 857 858 if (intparm == QETH_RCD_PARM) { 859 channel->state = CH_STATE_RCD_DONE; 860 goto out; 861 } 862 if (intparm) { 863 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 864 buffer->state = BUF_STATE_PROCESSED; 865 } 866 if (channel == &card->data) 867 return; 868 if (channel == &card->read && 869 channel->state == CH_STATE_UP) 870 qeth_issue_next_read(card); 871 872 iob = channel->iob; 873 index = channel->buf_no; 874 while (iob[index].state == BUF_STATE_PROCESSED) { 875 if (iob[index].callback != NULL) 876 iob[index].callback(channel, iob + index); 877 878 index = (index + 1) % QETH_CMD_BUFFER_NO; 879 } 880 channel->buf_no = index; 881 out: 882 wake_up(&card->wait_q); 883 return; 884 } 885 886 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 887 struct qeth_qdio_out_buffer *buf) 888 { 889 int i; 890 struct sk_buff *skb; 891 892 /* is PCI flag set on buffer? */ 893 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ) 894 atomic_dec(&queue->set_pci_flags_count); 895 896 skb = skb_dequeue(&buf->skb_list); 897 while (skb) { 898 atomic_dec(&skb->users); 899 dev_kfree_skb_any(skb); 900 skb = skb_dequeue(&buf->skb_list); 901 } 902 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 903 if (buf->buffer->element[i].addr && buf->is_header[i]) 904 kmem_cache_free(qeth_core_header_cache, 905 buf->buffer->element[i].addr); 906 buf->is_header[i] = 0; 907 buf->buffer->element[i].length = 0; 908 buf->buffer->element[i].addr = NULL; 909 buf->buffer->element[i].eflags = 0; 910 buf->buffer->element[i].sflags = 0; 911 } 912 buf->buffer->element[15].eflags = 0; 913 buf->buffer->element[15].sflags = 0; 914 buf->next_element_to_fill = 0; 915 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY); 916 } 917 918 void qeth_clear_qdio_buffers(struct qeth_card *card) 919 { 920 int i, j; 921 922 QETH_CARD_TEXT(card, 2, "clearqdbf"); 923 /* clear outbound buffers to free skbs */ 924 for (i = 0; i < card->qdio.no_out_queues; ++i) 925 if (card->qdio.out_qs[i]) { 926 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) 927 qeth_clear_output_buffer(card->qdio.out_qs[i], 928 &card->qdio.out_qs[i]->bufs[j]); 929 } 930 } 931 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 932 933 static void qeth_free_buffer_pool(struct qeth_card *card) 934 { 935 struct qeth_buffer_pool_entry *pool_entry, *tmp; 936 int i = 0; 937 list_for_each_entry_safe(pool_entry, tmp, 938 &card->qdio.init_pool.entry_list, init_list){ 939 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 940 free_page((unsigned long)pool_entry->elements[i]); 941 list_del(&pool_entry->init_list); 942 kfree(pool_entry); 943 } 944 } 945 946 static void qeth_free_qdio_buffers(struct qeth_card *card) 947 { 948 int i, j; 949 950 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 951 QETH_QDIO_UNINITIALIZED) 952 return; 953 kfree(card->qdio.in_q); 954 card->qdio.in_q = NULL; 955 /* inbound buffer pool */ 956 qeth_free_buffer_pool(card); 957 /* free outbound qdio_qs */ 958 if (card->qdio.out_qs) { 959 for (i = 0; i < card->qdio.no_out_queues; ++i) { 960 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) 961 qeth_clear_output_buffer(card->qdio.out_qs[i], 962 &card->qdio.out_qs[i]->bufs[j]); 963 kfree(card->qdio.out_qs[i]); 964 } 965 kfree(card->qdio.out_qs); 966 card->qdio.out_qs = NULL; 967 } 968 } 969 970 static void qeth_clean_channel(struct qeth_channel *channel) 971 { 972 int cnt; 973 974 QETH_DBF_TEXT(SETUP, 2, "freech"); 975 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 976 kfree(channel->iob[cnt].data); 977 } 978 979 static void qeth_get_channel_path_desc(struct qeth_card *card) 980 { 981 struct ccw_device *ccwdev; 982 struct channelPath_dsc { 983 u8 flags; 984 u8 lsn; 985 u8 desc; 986 u8 chpid; 987 u8 swla; 988 u8 zeroes; 989 u8 chla; 990 u8 chpp; 991 } *chp_dsc; 992 993 QETH_DBF_TEXT(SETUP, 2, "chp_desc"); 994 995 ccwdev = card->data.ccwdev; 996 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0); 997 if (chp_dsc != NULL) { 998 /* CHPP field bit 6 == 1 -> single queue */ 999 if ((chp_dsc->chpp & 0x02) == 0x02) { 1000 if ((atomic_read(&card->qdio.state) != 1001 QETH_QDIO_UNINITIALIZED) && 1002 (card->qdio.no_out_queues == 4)) 1003 /* change from 4 to 1 outbound queues */ 1004 qeth_free_qdio_buffers(card); 1005 card->qdio.no_out_queues = 1; 1006 if (card->qdio.default_out_queue != 0) 1007 dev_info(&card->gdev->dev, 1008 "Priority Queueing not supported\n"); 1009 card->qdio.default_out_queue = 0; 1010 } else { 1011 if ((atomic_read(&card->qdio.state) != 1012 QETH_QDIO_UNINITIALIZED) && 1013 (card->qdio.no_out_queues == 1)) { 1014 /* change from 1 to 4 outbound queues */ 1015 qeth_free_qdio_buffers(card); 1016 card->qdio.default_out_queue = 2; 1017 } 1018 card->qdio.no_out_queues = 4; 1019 } 1020 card->info.func_level = 0x4100 + chp_dsc->desc; 1021 kfree(chp_dsc); 1022 } 1023 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); 1024 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); 1025 return; 1026 } 1027 1028 static void qeth_init_qdio_info(struct qeth_card *card) 1029 { 1030 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1031 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1032 /* inbound */ 1033 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1034 if (card->info.type == QETH_CARD_TYPE_IQD) 1035 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT; 1036 else 1037 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1038 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1039 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1040 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1041 } 1042 1043 static void qeth_set_intial_options(struct qeth_card *card) 1044 { 1045 card->options.route4.type = NO_ROUTER; 1046 card->options.route6.type = NO_ROUTER; 1047 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS; 1048 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL; 1049 card->options.fake_broadcast = 0; 1050 card->options.add_hhlen = DEFAULT_ADD_HHLEN; 1051 card->options.performance_stats = 0; 1052 card->options.rx_sg_cb = QETH_RX_SG_CB; 1053 card->options.isolation = ISOLATION_MODE_NONE; 1054 } 1055 1056 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1057 { 1058 unsigned long flags; 1059 int rc = 0; 1060 1061 spin_lock_irqsave(&card->thread_mask_lock, flags); 1062 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x", 1063 (u8) card->thread_start_mask, 1064 (u8) card->thread_allowed_mask, 1065 (u8) card->thread_running_mask); 1066 rc = (card->thread_start_mask & thread); 1067 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1068 return rc; 1069 } 1070 1071 static void qeth_start_kernel_thread(struct work_struct *work) 1072 { 1073 struct qeth_card *card = container_of(work, struct qeth_card, 1074 kernel_thread_starter); 1075 QETH_CARD_TEXT(card , 2, "strthrd"); 1076 1077 if (card->read.state != CH_STATE_UP && 1078 card->write.state != CH_STATE_UP) 1079 return; 1080 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) 1081 kthread_run(card->discipline.recover, (void *) card, 1082 "qeth_recover"); 1083 } 1084 1085 static int qeth_setup_card(struct qeth_card *card) 1086 { 1087 1088 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1089 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1090 1091 card->read.state = CH_STATE_DOWN; 1092 card->write.state = CH_STATE_DOWN; 1093 card->data.state = CH_STATE_DOWN; 1094 card->state = CARD_STATE_DOWN; 1095 card->lan_online = 0; 1096 card->read_or_write_problem = 0; 1097 card->dev = NULL; 1098 spin_lock_init(&card->vlanlock); 1099 spin_lock_init(&card->mclock); 1100 card->vlangrp = NULL; 1101 spin_lock_init(&card->lock); 1102 spin_lock_init(&card->ip_lock); 1103 spin_lock_init(&card->thread_mask_lock); 1104 mutex_init(&card->conf_mutex); 1105 mutex_init(&card->discipline_mutex); 1106 card->thread_start_mask = 0; 1107 card->thread_allowed_mask = 0; 1108 card->thread_running_mask = 0; 1109 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1110 INIT_LIST_HEAD(&card->ip_list); 1111 INIT_LIST_HEAD(card->ip_tbd_list); 1112 INIT_LIST_HEAD(&card->cmd_waiter_list); 1113 init_waitqueue_head(&card->wait_q); 1114 /* initial options */ 1115 qeth_set_intial_options(card); 1116 /* IP address takeover */ 1117 INIT_LIST_HEAD(&card->ipato.entries); 1118 card->ipato.enabled = 0; 1119 card->ipato.invert4 = 0; 1120 card->ipato.invert6 = 0; 1121 /* init QDIO stuff */ 1122 qeth_init_qdio_info(card); 1123 return 0; 1124 } 1125 1126 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) 1127 { 1128 struct qeth_card *card = container_of(slr, struct qeth_card, 1129 qeth_service_level); 1130 if (card->info.mcl_level[0]) 1131 seq_printf(m, "qeth: %s firmware level %s\n", 1132 CARD_BUS_ID(card), card->info.mcl_level); 1133 } 1134 1135 static struct qeth_card *qeth_alloc_card(void) 1136 { 1137 struct qeth_card *card; 1138 1139 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1140 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1141 if (!card) 1142 goto out; 1143 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1144 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL); 1145 if (!card->ip_tbd_list) { 1146 QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); 1147 goto out_card; 1148 } 1149 if (qeth_setup_channel(&card->read)) 1150 goto out_ip; 1151 if (qeth_setup_channel(&card->write)) 1152 goto out_channel; 1153 card->options.layer2 = -1; 1154 card->qeth_service_level.seq_print = qeth_core_sl_print; 1155 register_service_level(&card->qeth_service_level); 1156 return card; 1157 1158 out_channel: 1159 qeth_clean_channel(&card->read); 1160 out_ip: 1161 kfree(card->ip_tbd_list); 1162 out_card: 1163 kfree(card); 1164 out: 1165 return NULL; 1166 } 1167 1168 static int qeth_determine_card_type(struct qeth_card *card) 1169 { 1170 int i = 0; 1171 1172 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1173 1174 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1175 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1176 while (known_devices[i][QETH_DEV_MODEL_IND]) { 1177 if ((CARD_RDEV(card)->id.dev_type == 1178 known_devices[i][QETH_DEV_TYPE_IND]) && 1179 (CARD_RDEV(card)->id.dev_model == 1180 known_devices[i][QETH_DEV_MODEL_IND])) { 1181 card->info.type = known_devices[i][QETH_DEV_MODEL_IND]; 1182 card->qdio.no_out_queues = 1183 known_devices[i][QETH_QUEUE_NO_IND]; 1184 card->info.is_multicast_different = 1185 known_devices[i][QETH_MULTICAST_IND]; 1186 qeth_get_channel_path_desc(card); 1187 return 0; 1188 } 1189 i++; 1190 } 1191 card->info.type = QETH_CARD_TYPE_UNKNOWN; 1192 dev_err(&card->gdev->dev, "The adapter hardware is of an " 1193 "unknown type\n"); 1194 return -ENOENT; 1195 } 1196 1197 static int qeth_clear_channel(struct qeth_channel *channel) 1198 { 1199 unsigned long flags; 1200 struct qeth_card *card; 1201 int rc; 1202 1203 card = CARD_FROM_CDEV(channel->ccwdev); 1204 QETH_CARD_TEXT(card, 3, "clearch"); 1205 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1206 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1207 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1208 1209 if (rc) 1210 return rc; 1211 rc = wait_event_interruptible_timeout(card->wait_q, 1212 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1213 if (rc == -ERESTARTSYS) 1214 return rc; 1215 if (channel->state != CH_STATE_STOPPED) 1216 return -ETIME; 1217 channel->state = CH_STATE_DOWN; 1218 return 0; 1219 } 1220 1221 static int qeth_halt_channel(struct qeth_channel *channel) 1222 { 1223 unsigned long flags; 1224 struct qeth_card *card; 1225 int rc; 1226 1227 card = CARD_FROM_CDEV(channel->ccwdev); 1228 QETH_CARD_TEXT(card, 3, "haltch"); 1229 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1230 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1231 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1232 1233 if (rc) 1234 return rc; 1235 rc = wait_event_interruptible_timeout(card->wait_q, 1236 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1237 if (rc == -ERESTARTSYS) 1238 return rc; 1239 if (channel->state != CH_STATE_HALTED) 1240 return -ETIME; 1241 return 0; 1242 } 1243 1244 static int qeth_halt_channels(struct qeth_card *card) 1245 { 1246 int rc1 = 0, rc2 = 0, rc3 = 0; 1247 1248 QETH_CARD_TEXT(card, 3, "haltchs"); 1249 rc1 = qeth_halt_channel(&card->read); 1250 rc2 = qeth_halt_channel(&card->write); 1251 rc3 = qeth_halt_channel(&card->data); 1252 if (rc1) 1253 return rc1; 1254 if (rc2) 1255 return rc2; 1256 return rc3; 1257 } 1258 1259 static int qeth_clear_channels(struct qeth_card *card) 1260 { 1261 int rc1 = 0, rc2 = 0, rc3 = 0; 1262 1263 QETH_CARD_TEXT(card, 3, "clearchs"); 1264 rc1 = qeth_clear_channel(&card->read); 1265 rc2 = qeth_clear_channel(&card->write); 1266 rc3 = qeth_clear_channel(&card->data); 1267 if (rc1) 1268 return rc1; 1269 if (rc2) 1270 return rc2; 1271 return rc3; 1272 } 1273 1274 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1275 { 1276 int rc = 0; 1277 1278 QETH_CARD_TEXT(card, 3, "clhacrd"); 1279 1280 if (halt) 1281 rc = qeth_halt_channels(card); 1282 if (rc) 1283 return rc; 1284 return qeth_clear_channels(card); 1285 } 1286 1287 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1288 { 1289 int rc = 0; 1290 1291 QETH_CARD_TEXT(card, 3, "qdioclr"); 1292 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1293 QETH_QDIO_CLEANING)) { 1294 case QETH_QDIO_ESTABLISHED: 1295 if (card->info.type == QETH_CARD_TYPE_IQD) 1296 rc = qdio_shutdown(CARD_DDEV(card), 1297 QDIO_FLAG_CLEANUP_USING_HALT); 1298 else 1299 rc = qdio_shutdown(CARD_DDEV(card), 1300 QDIO_FLAG_CLEANUP_USING_CLEAR); 1301 if (rc) 1302 QETH_CARD_TEXT_(card, 3, "1err%d", rc); 1303 qdio_free(CARD_DDEV(card)); 1304 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1305 break; 1306 case QETH_QDIO_CLEANING: 1307 return rc; 1308 default: 1309 break; 1310 } 1311 rc = qeth_clear_halt_card(card, use_halt); 1312 if (rc) 1313 QETH_CARD_TEXT_(card, 3, "2err%d", rc); 1314 card->state = CARD_STATE_DOWN; 1315 return rc; 1316 } 1317 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1318 1319 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1320 int *length) 1321 { 1322 struct ciw *ciw; 1323 char *rcd_buf; 1324 int ret; 1325 struct qeth_channel *channel = &card->data; 1326 unsigned long flags; 1327 1328 /* 1329 * scan for RCD command in extended SenseID data 1330 */ 1331 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1332 if (!ciw || ciw->cmd == 0) 1333 return -EOPNOTSUPP; 1334 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1335 if (!rcd_buf) 1336 return -ENOMEM; 1337 1338 channel->ccw.cmd_code = ciw->cmd; 1339 channel->ccw.cda = (__u32) __pa(rcd_buf); 1340 channel->ccw.count = ciw->count; 1341 channel->ccw.flags = CCW_FLAG_SLI; 1342 channel->state = CH_STATE_RCD; 1343 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1344 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1345 QETH_RCD_PARM, LPM_ANYPATH, 0, 1346 QETH_RCD_TIMEOUT); 1347 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1348 if (!ret) 1349 wait_event(card->wait_q, 1350 (channel->state == CH_STATE_RCD_DONE || 1351 channel->state == CH_STATE_DOWN)); 1352 if (channel->state == CH_STATE_DOWN) 1353 ret = -EIO; 1354 else 1355 channel->state = CH_STATE_DOWN; 1356 if (ret) { 1357 kfree(rcd_buf); 1358 *buffer = NULL; 1359 *length = 0; 1360 } else { 1361 *length = ciw->count; 1362 *buffer = rcd_buf; 1363 } 1364 return ret; 1365 } 1366 1367 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd) 1368 { 1369 QETH_DBF_TEXT(SETUP, 2, "cfgunit"); 1370 card->info.chpid = prcd[30]; 1371 card->info.unit_addr2 = prcd[31]; 1372 card->info.cula = prcd[63]; 1373 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1374 (prcd[0x11] == _ascebc['M'])); 1375 } 1376 1377 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd) 1378 { 1379 QETH_DBF_TEXT(SETUP, 2, "cfgblkt"); 1380 1381 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) { 1382 card->info.blkt.time_total = 250; 1383 card->info.blkt.inter_packet = 5; 1384 card->info.blkt.inter_packet_jumbo = 15; 1385 } else { 1386 card->info.blkt.time_total = 0; 1387 card->info.blkt.inter_packet = 0; 1388 card->info.blkt.inter_packet_jumbo = 0; 1389 } 1390 } 1391 1392 static void qeth_init_tokens(struct qeth_card *card) 1393 { 1394 card->token.issuer_rm_w = 0x00010103UL; 1395 card->token.cm_filter_w = 0x00010108UL; 1396 card->token.cm_connection_w = 0x0001010aUL; 1397 card->token.ulp_filter_w = 0x0001010bUL; 1398 card->token.ulp_connection_w = 0x0001010dUL; 1399 } 1400 1401 static void qeth_init_func_level(struct qeth_card *card) 1402 { 1403 switch (card->info.type) { 1404 case QETH_CARD_TYPE_IQD: 1405 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD; 1406 break; 1407 case QETH_CARD_TYPE_OSD: 1408 case QETH_CARD_TYPE_OSN: 1409 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD; 1410 break; 1411 default: 1412 break; 1413 } 1414 } 1415 1416 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1417 void (*idx_reply_cb)(struct qeth_channel *, 1418 struct qeth_cmd_buffer *)) 1419 { 1420 struct qeth_cmd_buffer *iob; 1421 unsigned long flags; 1422 int rc; 1423 struct qeth_card *card; 1424 1425 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1426 card = CARD_FROM_CDEV(channel->ccwdev); 1427 iob = qeth_get_buffer(channel); 1428 iob->callback = idx_reply_cb; 1429 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1430 channel->ccw.count = QETH_BUFSIZE; 1431 channel->ccw.cda = (__u32) __pa(iob->data); 1432 1433 wait_event(card->wait_q, 1434 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1435 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1436 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1437 rc = ccw_device_start(channel->ccwdev, 1438 &channel->ccw, (addr_t) iob, 0, 0); 1439 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1440 1441 if (rc) { 1442 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1443 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1444 atomic_set(&channel->irq_pending, 0); 1445 wake_up(&card->wait_q); 1446 return rc; 1447 } 1448 rc = wait_event_interruptible_timeout(card->wait_q, 1449 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1450 if (rc == -ERESTARTSYS) 1451 return rc; 1452 if (channel->state != CH_STATE_UP) { 1453 rc = -ETIME; 1454 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1455 qeth_clear_cmd_buffers(channel); 1456 } else 1457 rc = 0; 1458 return rc; 1459 } 1460 1461 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1462 void (*idx_reply_cb)(struct qeth_channel *, 1463 struct qeth_cmd_buffer *)) 1464 { 1465 struct qeth_card *card; 1466 struct qeth_cmd_buffer *iob; 1467 unsigned long flags; 1468 __u16 temp; 1469 __u8 tmp; 1470 int rc; 1471 struct ccw_dev_id temp_devid; 1472 1473 card = CARD_FROM_CDEV(channel->ccwdev); 1474 1475 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1476 1477 iob = qeth_get_buffer(channel); 1478 iob->callback = idx_reply_cb; 1479 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1480 channel->ccw.count = IDX_ACTIVATE_SIZE; 1481 channel->ccw.cda = (__u32) __pa(iob->data); 1482 if (channel == &card->write) { 1483 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1484 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1485 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1486 card->seqno.trans_hdr++; 1487 } else { 1488 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1489 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1490 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1491 } 1492 tmp = ((__u8)card->info.portno) | 0x80; 1493 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1494 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1495 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1496 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1497 &card->info.func_level, sizeof(__u16)); 1498 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1499 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1500 temp = (card->info.cula << 8) + card->info.unit_addr2; 1501 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1502 1503 wait_event(card->wait_q, 1504 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1505 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1506 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1507 rc = ccw_device_start(channel->ccwdev, 1508 &channel->ccw, (addr_t) iob, 0, 0); 1509 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1510 1511 if (rc) { 1512 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1513 rc); 1514 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1515 atomic_set(&channel->irq_pending, 0); 1516 wake_up(&card->wait_q); 1517 return rc; 1518 } 1519 rc = wait_event_interruptible_timeout(card->wait_q, 1520 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1521 if (rc == -ERESTARTSYS) 1522 return rc; 1523 if (channel->state != CH_STATE_ACTIVATING) { 1524 dev_warn(&channel->ccwdev->dev, "The qeth device driver" 1525 " failed to recover an error on the device\n"); 1526 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", 1527 dev_name(&channel->ccwdev->dev)); 1528 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1529 qeth_clear_cmd_buffers(channel); 1530 return -ETIME; 1531 } 1532 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1533 } 1534 1535 static int qeth_peer_func_level(int level) 1536 { 1537 if ((level & 0xff) == 8) 1538 return (level & 0xff) + 0x400; 1539 if (((level >> 8) & 3) == 1) 1540 return (level & 0xff) + 0x200; 1541 return level; 1542 } 1543 1544 static void qeth_idx_write_cb(struct qeth_channel *channel, 1545 struct qeth_cmd_buffer *iob) 1546 { 1547 struct qeth_card *card; 1548 __u16 temp; 1549 1550 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1551 1552 if (channel->state == CH_STATE_DOWN) { 1553 channel->state = CH_STATE_ACTIVATING; 1554 goto out; 1555 } 1556 card = CARD_FROM_CDEV(channel->ccwdev); 1557 1558 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1559 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL) 1560 dev_err(&card->write.ccwdev->dev, 1561 "The adapter is used exclusively by another " 1562 "host\n"); 1563 else 1564 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" 1565 " negative reply\n", 1566 dev_name(&card->write.ccwdev->dev)); 1567 goto out; 1568 } 1569 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1570 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1571 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " 1572 "function level mismatch (sent: 0x%x, received: " 1573 "0x%x)\n", dev_name(&card->write.ccwdev->dev), 1574 card->info.func_level, temp); 1575 goto out; 1576 } 1577 channel->state = CH_STATE_UP; 1578 out: 1579 qeth_release_buffer(channel, iob); 1580 } 1581 1582 static void qeth_idx_read_cb(struct qeth_channel *channel, 1583 struct qeth_cmd_buffer *iob) 1584 { 1585 struct qeth_card *card; 1586 __u16 temp; 1587 1588 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1589 if (channel->state == CH_STATE_DOWN) { 1590 channel->state = CH_STATE_ACTIVATING; 1591 goto out; 1592 } 1593 1594 card = CARD_FROM_CDEV(channel->ccwdev); 1595 if (qeth_check_idx_response(card, iob->data)) 1596 goto out; 1597 1598 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1599 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) { 1600 case QETH_IDX_ACT_ERR_EXCL: 1601 dev_err(&card->write.ccwdev->dev, 1602 "The adapter is used exclusively by another " 1603 "host\n"); 1604 break; 1605 case QETH_IDX_ACT_ERR_AUTH: 1606 case QETH_IDX_ACT_ERR_AUTH_USER: 1607 dev_err(&card->read.ccwdev->dev, 1608 "Setting the device online failed because of " 1609 "insufficient authorization\n"); 1610 break; 1611 default: 1612 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" 1613 " negative reply\n", 1614 dev_name(&card->read.ccwdev->dev)); 1615 } 1616 QETH_CARD_TEXT_(card, 2, "idxread%c", 1617 QETH_IDX_ACT_CAUSE_CODE(iob->data)); 1618 goto out; 1619 } 1620 1621 /** 1622 * * temporary fix for microcode bug 1623 * * to revert it,replace OR by AND 1624 * */ 1625 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) || 1626 (card->info.type == QETH_CARD_TYPE_OSD)) 1627 card->info.portname_required = 1; 1628 1629 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1630 if (temp != qeth_peer_func_level(card->info.func_level)) { 1631 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " 1632 "level mismatch (sent: 0x%x, received: 0x%x)\n", 1633 dev_name(&card->read.ccwdev->dev), 1634 card->info.func_level, temp); 1635 goto out; 1636 } 1637 memcpy(&card->token.issuer_rm_r, 1638 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1639 QETH_MPC_TOKEN_LENGTH); 1640 memcpy(&card->info.mcl_level[0], 1641 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 1642 channel->state = CH_STATE_UP; 1643 out: 1644 qeth_release_buffer(channel, iob); 1645 } 1646 1647 void qeth_prepare_control_data(struct qeth_card *card, int len, 1648 struct qeth_cmd_buffer *iob) 1649 { 1650 qeth_setup_ccw(&card->write, iob->data, len); 1651 iob->callback = qeth_release_buffer; 1652 1653 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1654 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1655 card->seqno.trans_hdr++; 1656 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 1657 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 1658 card->seqno.pdu_hdr++; 1659 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 1660 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 1661 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1662 } 1663 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 1664 1665 int qeth_send_control_data(struct qeth_card *card, int len, 1666 struct qeth_cmd_buffer *iob, 1667 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 1668 unsigned long), 1669 void *reply_param) 1670 { 1671 int rc; 1672 unsigned long flags; 1673 struct qeth_reply *reply = NULL; 1674 unsigned long timeout, event_timeout; 1675 struct qeth_ipa_cmd *cmd; 1676 1677 QETH_CARD_TEXT(card, 2, "sendctl"); 1678 1679 if (card->read_or_write_problem) { 1680 qeth_release_buffer(iob->channel, iob); 1681 return -EIO; 1682 } 1683 reply = qeth_alloc_reply(card); 1684 if (!reply) { 1685 return -ENOMEM; 1686 } 1687 reply->callback = reply_cb; 1688 reply->param = reply_param; 1689 if (card->state == CARD_STATE_DOWN) 1690 reply->seqno = QETH_IDX_COMMAND_SEQNO; 1691 else 1692 reply->seqno = card->seqno.ipa++; 1693 init_waitqueue_head(&reply->wait_q); 1694 spin_lock_irqsave(&card->lock, flags); 1695 list_add_tail(&reply->list, &card->cmd_waiter_list); 1696 spin_unlock_irqrestore(&card->lock, flags); 1697 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1698 1699 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 1700 qeth_prepare_control_data(card, len, iob); 1701 1702 if (IS_IPA(iob->data)) 1703 event_timeout = QETH_IPA_TIMEOUT; 1704 else 1705 event_timeout = QETH_TIMEOUT; 1706 timeout = jiffies + event_timeout; 1707 1708 QETH_CARD_TEXT(card, 6, "noirqpnd"); 1709 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 1710 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 1711 (addr_t) iob, 0, 0); 1712 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 1713 if (rc) { 1714 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " 1715 "ccw_device_start rc = %i\n", 1716 dev_name(&card->write.ccwdev->dev), rc); 1717 QETH_CARD_TEXT_(card, 2, " err%d", rc); 1718 spin_lock_irqsave(&card->lock, flags); 1719 list_del_init(&reply->list); 1720 qeth_put_reply(reply); 1721 spin_unlock_irqrestore(&card->lock, flags); 1722 qeth_release_buffer(iob->channel, iob); 1723 atomic_set(&card->write.irq_pending, 0); 1724 wake_up(&card->wait_q); 1725 return rc; 1726 } 1727 1728 /* we have only one long running ipassist, since we can ensure 1729 process context of this command we can sleep */ 1730 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 1731 if ((cmd->hdr.command == IPA_CMD_SETIP) && 1732 (cmd->hdr.prot_version == QETH_PROT_IPV4)) { 1733 if (!wait_event_timeout(reply->wait_q, 1734 atomic_read(&reply->received), event_timeout)) 1735 goto time_err; 1736 } else { 1737 while (!atomic_read(&reply->received)) { 1738 if (time_after(jiffies, timeout)) 1739 goto time_err; 1740 cpu_relax(); 1741 }; 1742 } 1743 1744 if (reply->rc == -EIO) 1745 goto error; 1746 rc = reply->rc; 1747 qeth_put_reply(reply); 1748 return rc; 1749 1750 time_err: 1751 reply->rc = -ETIME; 1752 spin_lock_irqsave(&reply->card->lock, flags); 1753 list_del_init(&reply->list); 1754 spin_unlock_irqrestore(&reply->card->lock, flags); 1755 atomic_inc(&reply->received); 1756 error: 1757 atomic_set(&card->write.irq_pending, 0); 1758 qeth_release_buffer(iob->channel, iob); 1759 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO; 1760 rc = reply->rc; 1761 qeth_put_reply(reply); 1762 return rc; 1763 } 1764 EXPORT_SYMBOL_GPL(qeth_send_control_data); 1765 1766 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 1767 unsigned long data) 1768 { 1769 struct qeth_cmd_buffer *iob; 1770 1771 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 1772 1773 iob = (struct qeth_cmd_buffer *) data; 1774 memcpy(&card->token.cm_filter_r, 1775 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 1776 QETH_MPC_TOKEN_LENGTH); 1777 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1778 return 0; 1779 } 1780 1781 static int qeth_cm_enable(struct qeth_card *card) 1782 { 1783 int rc; 1784 struct qeth_cmd_buffer *iob; 1785 1786 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 1787 1788 iob = qeth_wait_for_buffer(&card->write); 1789 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 1790 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 1791 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 1792 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 1793 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 1794 1795 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 1796 qeth_cm_enable_cb, NULL); 1797 return rc; 1798 } 1799 1800 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 1801 unsigned long data) 1802 { 1803 1804 struct qeth_cmd_buffer *iob; 1805 1806 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 1807 1808 iob = (struct qeth_cmd_buffer *) data; 1809 memcpy(&card->token.cm_connection_r, 1810 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 1811 QETH_MPC_TOKEN_LENGTH); 1812 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1813 return 0; 1814 } 1815 1816 static int qeth_cm_setup(struct qeth_card *card) 1817 { 1818 int rc; 1819 struct qeth_cmd_buffer *iob; 1820 1821 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 1822 1823 iob = qeth_wait_for_buffer(&card->write); 1824 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 1825 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 1826 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 1827 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 1828 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 1829 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 1830 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 1831 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 1832 qeth_cm_setup_cb, NULL); 1833 return rc; 1834 1835 } 1836 1837 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) 1838 { 1839 switch (card->info.type) { 1840 case QETH_CARD_TYPE_UNKNOWN: 1841 return 1500; 1842 case QETH_CARD_TYPE_IQD: 1843 return card->info.max_mtu; 1844 case QETH_CARD_TYPE_OSD: 1845 switch (card->info.link_type) { 1846 case QETH_LINK_TYPE_HSTR: 1847 case QETH_LINK_TYPE_LANE_TR: 1848 return 2000; 1849 default: 1850 return 1492; 1851 } 1852 case QETH_CARD_TYPE_OSM: 1853 case QETH_CARD_TYPE_OSX: 1854 return 1492; 1855 default: 1856 return 1500; 1857 } 1858 } 1859 1860 static inline int qeth_get_mtu_outof_framesize(int framesize) 1861 { 1862 switch (framesize) { 1863 case 0x4000: 1864 return 8192; 1865 case 0x6000: 1866 return 16384; 1867 case 0xa000: 1868 return 32768; 1869 case 0xffff: 1870 return 57344; 1871 default: 1872 return 0; 1873 } 1874 } 1875 1876 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 1877 { 1878 switch (card->info.type) { 1879 case QETH_CARD_TYPE_OSD: 1880 case QETH_CARD_TYPE_OSM: 1881 case QETH_CARD_TYPE_OSX: 1882 case QETH_CARD_TYPE_IQD: 1883 return ((mtu >= 576) && 1884 (mtu <= card->info.max_mtu)); 1885 case QETH_CARD_TYPE_OSN: 1886 case QETH_CARD_TYPE_UNKNOWN: 1887 default: 1888 return 1; 1889 } 1890 } 1891 1892 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 1893 unsigned long data) 1894 { 1895 1896 __u16 mtu, framesize; 1897 __u16 len; 1898 __u8 link_type; 1899 struct qeth_cmd_buffer *iob; 1900 1901 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 1902 1903 iob = (struct qeth_cmd_buffer *) data; 1904 memcpy(&card->token.ulp_filter_r, 1905 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 1906 QETH_MPC_TOKEN_LENGTH); 1907 if (card->info.type == QETH_CARD_TYPE_IQD) { 1908 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 1909 mtu = qeth_get_mtu_outof_framesize(framesize); 1910 if (!mtu) { 1911 iob->rc = -EINVAL; 1912 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1913 return 0; 1914 } 1915 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) { 1916 /* frame size has changed */ 1917 if (card->dev && 1918 ((card->dev->mtu == card->info.initial_mtu) || 1919 (card->dev->mtu > mtu))) 1920 card->dev->mtu = mtu; 1921 qeth_free_qdio_buffers(card); 1922 } 1923 card->info.initial_mtu = mtu; 1924 card->info.max_mtu = mtu; 1925 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 1926 } else { 1927 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card); 1928 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU( 1929 iob->data); 1930 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1931 } 1932 1933 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 1934 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 1935 memcpy(&link_type, 1936 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 1937 card->info.link_type = link_type; 1938 } else 1939 card->info.link_type = 0; 1940 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type); 1941 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1942 return 0; 1943 } 1944 1945 static int qeth_ulp_enable(struct qeth_card *card) 1946 { 1947 int rc; 1948 char prot_type; 1949 struct qeth_cmd_buffer *iob; 1950 1951 /*FIXME: trace view callbacks*/ 1952 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 1953 1954 iob = qeth_wait_for_buffer(&card->write); 1955 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 1956 1957 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 1958 (__u8) card->info.portno; 1959 if (card->options.layer2) 1960 if (card->info.type == QETH_CARD_TYPE_OSN) 1961 prot_type = QETH_PROT_OSN2; 1962 else 1963 prot_type = QETH_PROT_LAYER2; 1964 else 1965 prot_type = QETH_PROT_TCPIP; 1966 1967 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 1968 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 1969 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 1970 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 1971 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 1972 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data), 1973 card->info.portname, 9); 1974 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 1975 qeth_ulp_enable_cb, NULL); 1976 return rc; 1977 1978 } 1979 1980 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 1981 unsigned long data) 1982 { 1983 struct qeth_cmd_buffer *iob; 1984 int rc = 0; 1985 1986 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 1987 1988 iob = (struct qeth_cmd_buffer *) data; 1989 memcpy(&card->token.ulp_connection_r, 1990 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 1991 QETH_MPC_TOKEN_LENGTH); 1992 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 1993 3)) { 1994 QETH_DBF_TEXT(SETUP, 2, "olmlimit"); 1995 dev_err(&card->gdev->dev, "A connection could not be " 1996 "established because of an OLM limit\n"); 1997 iob->rc = -EMLINK; 1998 } 1999 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2000 return rc; 2001 } 2002 2003 static int qeth_ulp_setup(struct qeth_card *card) 2004 { 2005 int rc; 2006 __u16 temp; 2007 struct qeth_cmd_buffer *iob; 2008 struct ccw_dev_id dev_id; 2009 2010 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 2011 2012 iob = qeth_wait_for_buffer(&card->write); 2013 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 2014 2015 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 2016 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2017 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 2018 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 2019 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 2020 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 2021 2022 ccw_device_get_id(CARD_DDEV(card), &dev_id); 2023 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 2024 temp = (card->info.cula << 8) + card->info.unit_addr2; 2025 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 2026 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 2027 qeth_ulp_setup_cb, NULL); 2028 return rc; 2029 } 2030 2031 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 2032 { 2033 int i, j; 2034 2035 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 2036 2037 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 2038 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 2039 return 0; 2040 2041 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q), 2042 GFP_KERNEL); 2043 if (!card->qdio.in_q) 2044 goto out_nomem; 2045 QETH_DBF_TEXT(SETUP, 2, "inq"); 2046 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *)); 2047 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q)); 2048 /* give inbound qeth_qdio_buffers their qdio_buffers */ 2049 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) 2050 card->qdio.in_q->bufs[i].buffer = 2051 &card->qdio.in_q->qdio_bufs[i]; 2052 /* inbound buffer pool */ 2053 if (qeth_alloc_buffer_pool(card)) 2054 goto out_freeinq; 2055 /* outbound */ 2056 card->qdio.out_qs = 2057 kmalloc(card->qdio.no_out_queues * 2058 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2059 if (!card->qdio.out_qs) 2060 goto out_freepool; 2061 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2062 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q), 2063 GFP_KERNEL); 2064 if (!card->qdio.out_qs[i]) 2065 goto out_freeoutq; 2066 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2067 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2068 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q)); 2069 card->qdio.out_qs[i]->queue_no = i; 2070 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2071 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2072 card->qdio.out_qs[i]->bufs[j].buffer = 2073 &card->qdio.out_qs[i]->qdio_bufs[j]; 2074 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j]. 2075 skb_list); 2076 lockdep_set_class( 2077 &card->qdio.out_qs[i]->bufs[j].skb_list.lock, 2078 &qdio_out_skb_queue_key); 2079 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list); 2080 } 2081 } 2082 return 0; 2083 2084 out_freeoutq: 2085 while (i > 0) 2086 kfree(card->qdio.out_qs[--i]); 2087 kfree(card->qdio.out_qs); 2088 card->qdio.out_qs = NULL; 2089 out_freepool: 2090 qeth_free_buffer_pool(card); 2091 out_freeinq: 2092 kfree(card->qdio.in_q); 2093 card->qdio.in_q = NULL; 2094 out_nomem: 2095 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2096 return -ENOMEM; 2097 } 2098 2099 static void qeth_create_qib_param_field(struct qeth_card *card, 2100 char *param_field) 2101 { 2102 2103 param_field[0] = _ascebc['P']; 2104 param_field[1] = _ascebc['C']; 2105 param_field[2] = _ascebc['I']; 2106 param_field[3] = _ascebc['T']; 2107 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2108 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2109 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2110 } 2111 2112 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2113 char *param_field) 2114 { 2115 param_field[16] = _ascebc['B']; 2116 param_field[17] = _ascebc['L']; 2117 param_field[18] = _ascebc['K']; 2118 param_field[19] = _ascebc['T']; 2119 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2120 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2121 *((unsigned int *) (¶m_field[28])) = 2122 card->info.blkt.inter_packet_jumbo; 2123 } 2124 2125 static int qeth_qdio_activate(struct qeth_card *card) 2126 { 2127 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2128 return qdio_activate(CARD_DDEV(card)); 2129 } 2130 2131 static int qeth_dm_act(struct qeth_card *card) 2132 { 2133 int rc; 2134 struct qeth_cmd_buffer *iob; 2135 2136 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2137 2138 iob = qeth_wait_for_buffer(&card->write); 2139 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2140 2141 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2142 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2143 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2144 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2145 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2146 return rc; 2147 } 2148 2149 static int qeth_mpc_initialize(struct qeth_card *card) 2150 { 2151 int rc; 2152 2153 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2154 2155 rc = qeth_issue_next_read(card); 2156 if (rc) { 2157 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2158 return rc; 2159 } 2160 rc = qeth_cm_enable(card); 2161 if (rc) { 2162 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2163 goto out_qdio; 2164 } 2165 rc = qeth_cm_setup(card); 2166 if (rc) { 2167 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2168 goto out_qdio; 2169 } 2170 rc = qeth_ulp_enable(card); 2171 if (rc) { 2172 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2173 goto out_qdio; 2174 } 2175 rc = qeth_ulp_setup(card); 2176 if (rc) { 2177 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2178 goto out_qdio; 2179 } 2180 rc = qeth_alloc_qdio_buffers(card); 2181 if (rc) { 2182 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2183 goto out_qdio; 2184 } 2185 rc = qeth_qdio_establish(card); 2186 if (rc) { 2187 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2188 qeth_free_qdio_buffers(card); 2189 goto out_qdio; 2190 } 2191 rc = qeth_qdio_activate(card); 2192 if (rc) { 2193 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2194 goto out_qdio; 2195 } 2196 rc = qeth_dm_act(card); 2197 if (rc) { 2198 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2199 goto out_qdio; 2200 } 2201 2202 return 0; 2203 out_qdio: 2204 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2205 return rc; 2206 } 2207 2208 static void qeth_print_status_with_portname(struct qeth_card *card) 2209 { 2210 char dbf_text[15]; 2211 int i; 2212 2213 sprintf(dbf_text, "%s", card->info.portname + 1); 2214 for (i = 0; i < 8; i++) 2215 dbf_text[i] = 2216 (char) _ebcasc[(__u8) dbf_text[i]]; 2217 dbf_text[8] = 0; 2218 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n" 2219 "with link type %s (portname: %s)\n", 2220 qeth_get_cardname(card), 2221 (card->info.mcl_level[0]) ? " (level: " : "", 2222 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2223 (card->info.mcl_level[0]) ? ")" : "", 2224 qeth_get_cardname_short(card), 2225 dbf_text); 2226 2227 } 2228 2229 static void qeth_print_status_no_portname(struct qeth_card *card) 2230 { 2231 if (card->info.portname[0]) 2232 dev_info(&card->gdev->dev, "Device is a%s " 2233 "card%s%s%s\nwith link type %s " 2234 "(no portname needed by interface).\n", 2235 qeth_get_cardname(card), 2236 (card->info.mcl_level[0]) ? " (level: " : "", 2237 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2238 (card->info.mcl_level[0]) ? ")" : "", 2239 qeth_get_cardname_short(card)); 2240 else 2241 dev_info(&card->gdev->dev, "Device is a%s " 2242 "card%s%s%s\nwith link type %s.\n", 2243 qeth_get_cardname(card), 2244 (card->info.mcl_level[0]) ? " (level: " : "", 2245 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2246 (card->info.mcl_level[0]) ? ")" : "", 2247 qeth_get_cardname_short(card)); 2248 } 2249 2250 void qeth_print_status_message(struct qeth_card *card) 2251 { 2252 switch (card->info.type) { 2253 case QETH_CARD_TYPE_OSD: 2254 case QETH_CARD_TYPE_OSM: 2255 case QETH_CARD_TYPE_OSX: 2256 /* VM will use a non-zero first character 2257 * to indicate a HiperSockets like reporting 2258 * of the level OSA sets the first character to zero 2259 * */ 2260 if (!card->info.mcl_level[0]) { 2261 sprintf(card->info.mcl_level, "%02x%02x", 2262 card->info.mcl_level[2], 2263 card->info.mcl_level[3]); 2264 2265 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2266 break; 2267 } 2268 /* fallthrough */ 2269 case QETH_CARD_TYPE_IQD: 2270 if ((card->info.guestlan) || 2271 (card->info.mcl_level[0] & 0x80)) { 2272 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2273 card->info.mcl_level[0]]; 2274 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2275 card->info.mcl_level[1]]; 2276 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2277 card->info.mcl_level[2]]; 2278 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2279 card->info.mcl_level[3]]; 2280 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2281 } 2282 break; 2283 default: 2284 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2285 } 2286 if (card->info.portname_required) 2287 qeth_print_status_with_portname(card); 2288 else 2289 qeth_print_status_no_portname(card); 2290 } 2291 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2292 2293 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2294 { 2295 struct qeth_buffer_pool_entry *entry; 2296 2297 QETH_CARD_TEXT(card, 5, "inwrklst"); 2298 2299 list_for_each_entry(entry, 2300 &card->qdio.init_pool.entry_list, init_list) { 2301 qeth_put_buffer_pool_entry(card, entry); 2302 } 2303 } 2304 2305 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2306 struct qeth_card *card) 2307 { 2308 struct list_head *plh; 2309 struct qeth_buffer_pool_entry *entry; 2310 int i, free; 2311 struct page *page; 2312 2313 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2314 return NULL; 2315 2316 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2317 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2318 free = 1; 2319 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2320 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2321 free = 0; 2322 break; 2323 } 2324 } 2325 if (free) { 2326 list_del_init(&entry->list); 2327 return entry; 2328 } 2329 } 2330 2331 /* no free buffer in pool so take first one and swap pages */ 2332 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2333 struct qeth_buffer_pool_entry, list); 2334 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2335 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2336 page = alloc_page(GFP_ATOMIC); 2337 if (!page) { 2338 return NULL; 2339 } else { 2340 free_page((unsigned long)entry->elements[i]); 2341 entry->elements[i] = page_address(page); 2342 if (card->options.performance_stats) 2343 card->perf_stats.sg_alloc_page_rx++; 2344 } 2345 } 2346 } 2347 list_del_init(&entry->list); 2348 return entry; 2349 } 2350 2351 static int qeth_init_input_buffer(struct qeth_card *card, 2352 struct qeth_qdio_buffer *buf) 2353 { 2354 struct qeth_buffer_pool_entry *pool_entry; 2355 int i; 2356 2357 pool_entry = qeth_find_free_buffer_pool_entry(card); 2358 if (!pool_entry) 2359 return 1; 2360 2361 /* 2362 * since the buffer is accessed only from the input_tasklet 2363 * there shouldn't be a need to synchronize; also, since we use 2364 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2365 * buffers 2366 */ 2367 2368 buf->pool_entry = pool_entry; 2369 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2370 buf->buffer->element[i].length = PAGE_SIZE; 2371 buf->buffer->element[i].addr = pool_entry->elements[i]; 2372 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2373 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY; 2374 else 2375 buf->buffer->element[i].eflags = 0; 2376 buf->buffer->element[i].sflags = 0; 2377 } 2378 return 0; 2379 } 2380 2381 int qeth_init_qdio_queues(struct qeth_card *card) 2382 { 2383 int i, j; 2384 int rc; 2385 2386 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2387 2388 /* inbound queue */ 2389 memset(card->qdio.in_q->qdio_bufs, 0, 2390 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2391 qeth_initialize_working_pool_list(card); 2392 /*give only as many buffers to hardware as we have buffer pool entries*/ 2393 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2394 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2395 card->qdio.in_q->next_buf_to_init = 2396 card->qdio.in_buf_pool.buf_count - 1; 2397 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2398 card->qdio.in_buf_pool.buf_count - 1); 2399 if (rc) { 2400 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2401 return rc; 2402 } 2403 /* outbound queue */ 2404 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2405 memset(card->qdio.out_qs[i]->qdio_bufs, 0, 2406 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2407 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2408 qeth_clear_output_buffer(card->qdio.out_qs[i], 2409 &card->qdio.out_qs[i]->bufs[j]); 2410 } 2411 card->qdio.out_qs[i]->card = card; 2412 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2413 card->qdio.out_qs[i]->do_pack = 0; 2414 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2415 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2416 atomic_set(&card->qdio.out_qs[i]->state, 2417 QETH_OUT_Q_UNLOCKED); 2418 } 2419 return 0; 2420 } 2421 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2422 2423 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2424 { 2425 switch (link_type) { 2426 case QETH_LINK_TYPE_HSTR: 2427 return 2; 2428 default: 2429 return 1; 2430 } 2431 } 2432 2433 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2434 struct qeth_ipa_cmd *cmd, __u8 command, 2435 enum qeth_prot_versions prot) 2436 { 2437 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2438 cmd->hdr.command = command; 2439 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2440 cmd->hdr.seqno = card->seqno.ipa; 2441 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2442 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2443 if (card->options.layer2) 2444 cmd->hdr.prim_version_no = 2; 2445 else 2446 cmd->hdr.prim_version_no = 1; 2447 cmd->hdr.param_count = 1; 2448 cmd->hdr.prot_version = prot; 2449 cmd->hdr.ipa_supported = 0; 2450 cmd->hdr.ipa_enabled = 0; 2451 } 2452 2453 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2454 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2455 { 2456 struct qeth_cmd_buffer *iob; 2457 struct qeth_ipa_cmd *cmd; 2458 2459 iob = qeth_wait_for_buffer(&card->write); 2460 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2461 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2462 2463 return iob; 2464 } 2465 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2466 2467 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2468 char prot_type) 2469 { 2470 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2471 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2472 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2473 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2474 } 2475 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2476 2477 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2478 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2479 unsigned long), 2480 void *reply_param) 2481 { 2482 int rc; 2483 char prot_type; 2484 2485 QETH_CARD_TEXT(card, 4, "sendipa"); 2486 2487 if (card->options.layer2) 2488 if (card->info.type == QETH_CARD_TYPE_OSN) 2489 prot_type = QETH_PROT_OSN2; 2490 else 2491 prot_type = QETH_PROT_LAYER2; 2492 else 2493 prot_type = QETH_PROT_TCPIP; 2494 qeth_prepare_ipa_cmd(card, iob, prot_type); 2495 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2496 iob, reply_cb, reply_param); 2497 if (rc == -ETIME) { 2498 qeth_clear_ipacmd_list(card); 2499 qeth_schedule_recovery(card); 2500 } 2501 return rc; 2502 } 2503 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 2504 2505 int qeth_send_startlan(struct qeth_card *card) 2506 { 2507 int rc; 2508 struct qeth_cmd_buffer *iob; 2509 2510 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 2511 2512 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0); 2513 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 2514 return rc; 2515 } 2516 EXPORT_SYMBOL_GPL(qeth_send_startlan); 2517 2518 int qeth_default_setadapterparms_cb(struct qeth_card *card, 2519 struct qeth_reply *reply, unsigned long data) 2520 { 2521 struct qeth_ipa_cmd *cmd; 2522 2523 QETH_CARD_TEXT(card, 4, "defadpcb"); 2524 2525 cmd = (struct qeth_ipa_cmd *) data; 2526 if (cmd->hdr.return_code == 0) 2527 cmd->hdr.return_code = 2528 cmd->data.setadapterparms.hdr.return_code; 2529 return 0; 2530 } 2531 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb); 2532 2533 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 2534 struct qeth_reply *reply, unsigned long data) 2535 { 2536 struct qeth_ipa_cmd *cmd; 2537 2538 QETH_CARD_TEXT(card, 3, "quyadpcb"); 2539 2540 cmd = (struct qeth_ipa_cmd *) data; 2541 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) { 2542 card->info.link_type = 2543 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 2544 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type); 2545 } 2546 card->options.adp.supported_funcs = 2547 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 2548 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 2549 } 2550 2551 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 2552 __u32 command, __u32 cmdlen) 2553 { 2554 struct qeth_cmd_buffer *iob; 2555 struct qeth_ipa_cmd *cmd; 2556 2557 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 2558 QETH_PROT_IPV4); 2559 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2560 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 2561 cmd->data.setadapterparms.hdr.command_code = command; 2562 cmd->data.setadapterparms.hdr.used_total = 1; 2563 cmd->data.setadapterparms.hdr.seq_no = 1; 2564 2565 return iob; 2566 } 2567 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd); 2568 2569 int qeth_query_setadapterparms(struct qeth_card *card) 2570 { 2571 int rc; 2572 struct qeth_cmd_buffer *iob; 2573 2574 QETH_CARD_TEXT(card, 3, "queryadp"); 2575 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 2576 sizeof(struct qeth_ipacmd_setadpparms)); 2577 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 2578 return rc; 2579 } 2580 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 2581 2582 static int qeth_query_ipassists_cb(struct qeth_card *card, 2583 struct qeth_reply *reply, unsigned long data) 2584 { 2585 struct qeth_ipa_cmd *cmd; 2586 2587 QETH_DBF_TEXT(SETUP, 2, "qipasscb"); 2588 2589 cmd = (struct qeth_ipa_cmd *) data; 2590 if (cmd->hdr.prot_version == QETH_PROT_IPV4) { 2591 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported; 2592 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; 2593 } else { 2594 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported; 2595 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; 2596 } 2597 QETH_DBF_TEXT(SETUP, 2, "suppenbl"); 2598 QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_supported); 2599 QETH_DBF_TEXT_(SETUP, 2, "%x", cmd->hdr.ipa_enabled); 2600 return 0; 2601 } 2602 2603 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot) 2604 { 2605 int rc; 2606 struct qeth_cmd_buffer *iob; 2607 2608 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot); 2609 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot); 2610 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL); 2611 return rc; 2612 } 2613 EXPORT_SYMBOL_GPL(qeth_query_ipassists); 2614 2615 static int qeth_query_setdiagass_cb(struct qeth_card *card, 2616 struct qeth_reply *reply, unsigned long data) 2617 { 2618 struct qeth_ipa_cmd *cmd; 2619 __u16 rc; 2620 2621 cmd = (struct qeth_ipa_cmd *)data; 2622 rc = cmd->hdr.return_code; 2623 if (rc) 2624 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc); 2625 else 2626 card->info.diagass_support = cmd->data.diagass.ext; 2627 return 0; 2628 } 2629 2630 static int qeth_query_setdiagass(struct qeth_card *card) 2631 { 2632 struct qeth_cmd_buffer *iob; 2633 struct qeth_ipa_cmd *cmd; 2634 2635 QETH_DBF_TEXT(SETUP, 2, "qdiagass"); 2636 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 2637 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2638 cmd->data.diagass.subcmd_len = 16; 2639 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY; 2640 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL); 2641 } 2642 2643 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid) 2644 { 2645 unsigned long info = get_zeroed_page(GFP_KERNEL); 2646 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info; 2647 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info; 2648 struct ccw_dev_id ccwid; 2649 int level, rc; 2650 2651 tid->chpid = card->info.chpid; 2652 ccw_device_get_id(CARD_RDEV(card), &ccwid); 2653 tid->ssid = ccwid.ssid; 2654 tid->devno = ccwid.devno; 2655 if (!info) 2656 return; 2657 2658 rc = stsi(NULL, 0, 0, 0); 2659 if (rc == -ENOSYS) 2660 level = rc; 2661 else 2662 level = (((unsigned int) rc) >> 28); 2663 2664 if ((level >= 2) && (stsi(info222, 2, 2, 2) != -ENOSYS)) 2665 tid->lparnr = info222->lpar_number; 2666 2667 if ((level >= 3) && (stsi(info322, 3, 2, 2) != -ENOSYS)) { 2668 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name)); 2669 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname)); 2670 } 2671 free_page(info); 2672 return; 2673 } 2674 2675 static int qeth_hw_trap_cb(struct qeth_card *card, 2676 struct qeth_reply *reply, unsigned long data) 2677 { 2678 struct qeth_ipa_cmd *cmd; 2679 __u16 rc; 2680 2681 cmd = (struct qeth_ipa_cmd *)data; 2682 rc = cmd->hdr.return_code; 2683 if (rc) 2684 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc); 2685 return 0; 2686 } 2687 2688 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action) 2689 { 2690 struct qeth_cmd_buffer *iob; 2691 struct qeth_ipa_cmd *cmd; 2692 2693 QETH_DBF_TEXT(SETUP, 2, "diagtrap"); 2694 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 2695 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2696 cmd->data.diagass.subcmd_len = 80; 2697 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP; 2698 cmd->data.diagass.type = 1; 2699 cmd->data.diagass.action = action; 2700 switch (action) { 2701 case QETH_DIAGS_TRAP_ARM: 2702 cmd->data.diagass.options = 0x0003; 2703 cmd->data.diagass.ext = 0x00010000 + 2704 sizeof(struct qeth_trap_id); 2705 qeth_get_trap_id(card, 2706 (struct qeth_trap_id *)cmd->data.diagass.cdata); 2707 break; 2708 case QETH_DIAGS_TRAP_DISARM: 2709 cmd->data.diagass.options = 0x0001; 2710 break; 2711 case QETH_DIAGS_TRAP_CAPTURE: 2712 break; 2713 } 2714 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL); 2715 } 2716 EXPORT_SYMBOL_GPL(qeth_hw_trap); 2717 2718 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf, 2719 unsigned int qdio_error, const char *dbftext) 2720 { 2721 if (qdio_error) { 2722 QETH_CARD_TEXT(card, 2, dbftext); 2723 QETH_CARD_TEXT_(card, 2, " F15=%02X", 2724 buf->element[15].sflags); 2725 QETH_CARD_TEXT_(card, 2, " F14=%02X", 2726 buf->element[14].sflags); 2727 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); 2728 if ((buf->element[15].sflags) == 0x12) { 2729 card->stats.rx_dropped++; 2730 return 0; 2731 } else 2732 return 1; 2733 } 2734 return 0; 2735 } 2736 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); 2737 2738 void qeth_queue_input_buffer(struct qeth_card *card, int index) 2739 { 2740 struct qeth_qdio_q *queue = card->qdio.in_q; 2741 int count; 2742 int i; 2743 int rc; 2744 int newcount = 0; 2745 2746 count = (index < queue->next_buf_to_init)? 2747 card->qdio.in_buf_pool.buf_count - 2748 (queue->next_buf_to_init - index) : 2749 card->qdio.in_buf_pool.buf_count - 2750 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 2751 /* only requeue at a certain threshold to avoid SIGAs */ 2752 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 2753 for (i = queue->next_buf_to_init; 2754 i < queue->next_buf_to_init + count; ++i) { 2755 if (qeth_init_input_buffer(card, 2756 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 2757 break; 2758 } else { 2759 newcount++; 2760 } 2761 } 2762 2763 if (newcount < count) { 2764 /* we are in memory shortage so we switch back to 2765 traditional skb allocation and drop packages */ 2766 atomic_set(&card->force_alloc_skb, 3); 2767 count = newcount; 2768 } else { 2769 atomic_add_unless(&card->force_alloc_skb, -1, 0); 2770 } 2771 2772 /* 2773 * according to old code it should be avoided to requeue all 2774 * 128 buffers in order to benefit from PCI avoidance. 2775 * this function keeps at least one buffer (the buffer at 2776 * 'index') un-requeued -> this buffer is the first buffer that 2777 * will be requeued the next time 2778 */ 2779 if (card->options.performance_stats) { 2780 card->perf_stats.inbound_do_qdio_cnt++; 2781 card->perf_stats.inbound_do_qdio_start_time = 2782 qeth_get_micros(); 2783 } 2784 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 2785 queue->next_buf_to_init, count); 2786 if (card->options.performance_stats) 2787 card->perf_stats.inbound_do_qdio_time += 2788 qeth_get_micros() - 2789 card->perf_stats.inbound_do_qdio_start_time; 2790 if (rc) { 2791 dev_warn(&card->gdev->dev, 2792 "QDIO reported an error, rc=%i\n", rc); 2793 QETH_CARD_TEXT(card, 2, "qinberr"); 2794 } 2795 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 2796 QDIO_MAX_BUFFERS_PER_Q; 2797 } 2798 } 2799 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); 2800 2801 static int qeth_handle_send_error(struct qeth_card *card, 2802 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 2803 { 2804 int sbalf15 = buffer->buffer->element[15].sflags; 2805 2806 QETH_CARD_TEXT(card, 6, "hdsnderr"); 2807 if (card->info.type == QETH_CARD_TYPE_IQD) { 2808 if (sbalf15 == 0) { 2809 qdio_err = 0; 2810 } else { 2811 qdio_err = 1; 2812 } 2813 } 2814 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr"); 2815 2816 if (!qdio_err) 2817 return QETH_SEND_ERROR_NONE; 2818 2819 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 2820 return QETH_SEND_ERROR_RETRY; 2821 2822 QETH_CARD_TEXT(card, 1, "lnkfail"); 2823 QETH_CARD_TEXT_(card, 1, "%04x %02x", 2824 (u16)qdio_err, (u8)sbalf15); 2825 return QETH_SEND_ERROR_LINK_FAILURE; 2826 } 2827 2828 /* 2829 * Switched to packing state if the number of used buffers on a queue 2830 * reaches a certain limit. 2831 */ 2832 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 2833 { 2834 if (!queue->do_pack) { 2835 if (atomic_read(&queue->used_buffers) 2836 >= QETH_HIGH_WATERMARK_PACK){ 2837 /* switch non-PACKING -> PACKING */ 2838 QETH_CARD_TEXT(queue->card, 6, "np->pack"); 2839 if (queue->card->options.performance_stats) 2840 queue->card->perf_stats.sc_dp_p++; 2841 queue->do_pack = 1; 2842 } 2843 } 2844 } 2845 2846 /* 2847 * Switches from packing to non-packing mode. If there is a packing 2848 * buffer on the queue this buffer will be prepared to be flushed. 2849 * In that case 1 is returned to inform the caller. If no buffer 2850 * has to be flushed, zero is returned. 2851 */ 2852 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 2853 { 2854 struct qeth_qdio_out_buffer *buffer; 2855 int flush_count = 0; 2856 2857 if (queue->do_pack) { 2858 if (atomic_read(&queue->used_buffers) 2859 <= QETH_LOW_WATERMARK_PACK) { 2860 /* switch PACKING -> non-PACKING */ 2861 QETH_CARD_TEXT(queue->card, 6, "pack->np"); 2862 if (queue->card->options.performance_stats) 2863 queue->card->perf_stats.sc_p_dp++; 2864 queue->do_pack = 0; 2865 /* flush packing buffers */ 2866 buffer = &queue->bufs[queue->next_buf_to_fill]; 2867 if ((atomic_read(&buffer->state) == 2868 QETH_QDIO_BUF_EMPTY) && 2869 (buffer->next_element_to_fill > 0)) { 2870 atomic_set(&buffer->state, 2871 QETH_QDIO_BUF_PRIMED); 2872 flush_count++; 2873 queue->next_buf_to_fill = 2874 (queue->next_buf_to_fill + 1) % 2875 QDIO_MAX_BUFFERS_PER_Q; 2876 } 2877 } 2878 } 2879 return flush_count; 2880 } 2881 2882 /* 2883 * Called to flush a packing buffer if no more pci flags are on the queue. 2884 * Checks if there is a packing buffer and prepares it to be flushed. 2885 * In that case returns 1, otherwise zero. 2886 */ 2887 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) 2888 { 2889 struct qeth_qdio_out_buffer *buffer; 2890 2891 buffer = &queue->bufs[queue->next_buf_to_fill]; 2892 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 2893 (buffer->next_element_to_fill > 0)) { 2894 /* it's a packing buffer */ 2895 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 2896 queue->next_buf_to_fill = 2897 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 2898 return 1; 2899 } 2900 return 0; 2901 } 2902 2903 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 2904 int count) 2905 { 2906 struct qeth_qdio_out_buffer *buf; 2907 int rc; 2908 int i; 2909 unsigned int qdio_flags; 2910 2911 for (i = index; i < index + count; ++i) { 2912 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; 2913 buf->buffer->element[buf->next_element_to_fill - 1].eflags |= 2914 SBAL_EFLAGS_LAST_ENTRY; 2915 2916 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 2917 continue; 2918 2919 if (!queue->do_pack) { 2920 if ((atomic_read(&queue->used_buffers) >= 2921 (QETH_HIGH_WATERMARK_PACK - 2922 QETH_WATERMARK_PACK_FUZZ)) && 2923 !atomic_read(&queue->set_pci_flags_count)) { 2924 /* it's likely that we'll go to packing 2925 * mode soon */ 2926 atomic_inc(&queue->set_pci_flags_count); 2927 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 2928 } 2929 } else { 2930 if (!atomic_read(&queue->set_pci_flags_count)) { 2931 /* 2932 * there's no outstanding PCI any more, so we 2933 * have to request a PCI to be sure the the PCI 2934 * will wake at some time in the future then we 2935 * can flush packed buffers that might still be 2936 * hanging around, which can happen if no 2937 * further send was requested by the stack 2938 */ 2939 atomic_inc(&queue->set_pci_flags_count); 2940 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 2941 } 2942 } 2943 } 2944 2945 queue->card->dev->trans_start = jiffies; 2946 if (queue->card->options.performance_stats) { 2947 queue->card->perf_stats.outbound_do_qdio_cnt++; 2948 queue->card->perf_stats.outbound_do_qdio_start_time = 2949 qeth_get_micros(); 2950 } 2951 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 2952 if (atomic_read(&queue->set_pci_flags_count)) 2953 qdio_flags |= QDIO_FLAG_PCI_OUT; 2954 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 2955 queue->queue_no, index, count); 2956 if (queue->card->options.performance_stats) 2957 queue->card->perf_stats.outbound_do_qdio_time += 2958 qeth_get_micros() - 2959 queue->card->perf_stats.outbound_do_qdio_start_time; 2960 atomic_add(count, &queue->used_buffers); 2961 if (rc) { 2962 queue->card->stats.tx_errors += count; 2963 /* ignore temporary SIGA errors without busy condition */ 2964 if (rc == QDIO_ERROR_SIGA_TARGET) 2965 return; 2966 QETH_CARD_TEXT(queue->card, 2, "flushbuf"); 2967 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc); 2968 2969 /* this must not happen under normal circumstances. if it 2970 * happens something is really wrong -> recover */ 2971 qeth_schedule_recovery(queue->card); 2972 return; 2973 } 2974 if (queue->card->options.performance_stats) 2975 queue->card->perf_stats.bufs_sent += count; 2976 } 2977 2978 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 2979 { 2980 int index; 2981 int flush_cnt = 0; 2982 int q_was_packing = 0; 2983 2984 /* 2985 * check if weed have to switch to non-packing mode or if 2986 * we have to get a pci flag out on the queue 2987 */ 2988 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 2989 !atomic_read(&queue->set_pci_flags_count)) { 2990 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 2991 QETH_OUT_Q_UNLOCKED) { 2992 /* 2993 * If we get in here, there was no action in 2994 * do_send_packet. So, we check if there is a 2995 * packing buffer to be flushed here. 2996 */ 2997 netif_stop_queue(queue->card->dev); 2998 index = queue->next_buf_to_fill; 2999 q_was_packing = queue->do_pack; 3000 /* queue->do_pack may change */ 3001 barrier(); 3002 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 3003 if (!flush_cnt && 3004 !atomic_read(&queue->set_pci_flags_count)) 3005 flush_cnt += 3006 qeth_flush_buffers_on_no_pci(queue); 3007 if (queue->card->options.performance_stats && 3008 q_was_packing) 3009 queue->card->perf_stats.bufs_sent_pack += 3010 flush_cnt; 3011 if (flush_cnt) 3012 qeth_flush_buffers(queue, index, flush_cnt); 3013 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3014 } 3015 } 3016 } 3017 3018 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue, 3019 unsigned long card_ptr) 3020 { 3021 struct qeth_card *card = (struct qeth_card *)card_ptr; 3022 3023 if (card->dev && (card->dev->flags & IFF_UP)) 3024 napi_schedule(&card->napi); 3025 } 3026 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll); 3027 3028 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err, 3029 unsigned int queue, int first_element, int count, 3030 unsigned long card_ptr) 3031 { 3032 struct qeth_card *card = (struct qeth_card *)card_ptr; 3033 3034 if (qdio_err) 3035 qeth_schedule_recovery(card); 3036 } 3037 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler); 3038 3039 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 3040 unsigned int qdio_error, int __queue, int first_element, 3041 int count, unsigned long card_ptr) 3042 { 3043 struct qeth_card *card = (struct qeth_card *) card_ptr; 3044 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 3045 struct qeth_qdio_out_buffer *buffer; 3046 int i; 3047 3048 QETH_CARD_TEXT(card, 6, "qdouhdl"); 3049 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) { 3050 QETH_CARD_TEXT(card, 2, "achkcond"); 3051 netif_stop_queue(card->dev); 3052 qeth_schedule_recovery(card); 3053 return; 3054 } 3055 if (card->options.performance_stats) { 3056 card->perf_stats.outbound_handler_cnt++; 3057 card->perf_stats.outbound_handler_start_time = 3058 qeth_get_micros(); 3059 } 3060 for (i = first_element; i < (first_element + count); ++i) { 3061 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; 3062 qeth_handle_send_error(card, buffer, qdio_error); 3063 qeth_clear_output_buffer(queue, buffer); 3064 } 3065 atomic_sub(count, &queue->used_buffers); 3066 /* check if we need to do something on this outbound queue */ 3067 if (card->info.type != QETH_CARD_TYPE_IQD) 3068 qeth_check_outbound_queue(queue); 3069 3070 netif_wake_queue(queue->card->dev); 3071 if (card->options.performance_stats) 3072 card->perf_stats.outbound_handler_time += qeth_get_micros() - 3073 card->perf_stats.outbound_handler_start_time; 3074 } 3075 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 3076 3077 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 3078 int ipv, int cast_type) 3079 { 3080 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD || 3081 card->info.type == QETH_CARD_TYPE_OSX)) 3082 return card->qdio.default_out_queue; 3083 switch (card->qdio.no_out_queues) { 3084 case 4: 3085 if (cast_type && card->info.is_multicast_different) 3086 return card->info.is_multicast_different & 3087 (card->qdio.no_out_queues - 1); 3088 if (card->qdio.do_prio_queueing && (ipv == 4)) { 3089 const u8 tos = ip_hdr(skb)->tos; 3090 3091 if (card->qdio.do_prio_queueing == 3092 QETH_PRIO_Q_ING_TOS) { 3093 if (tos & IP_TOS_NOTIMPORTANT) 3094 return 3; 3095 if (tos & IP_TOS_HIGHRELIABILITY) 3096 return 2; 3097 if (tos & IP_TOS_HIGHTHROUGHPUT) 3098 return 1; 3099 if (tos & IP_TOS_LOWDELAY) 3100 return 0; 3101 } 3102 if (card->qdio.do_prio_queueing == 3103 QETH_PRIO_Q_ING_PREC) 3104 return 3 - (tos >> 6); 3105 } else if (card->qdio.do_prio_queueing && (ipv == 6)) { 3106 /* TODO: IPv6!!! */ 3107 } 3108 return card->qdio.default_out_queue; 3109 case 1: /* fallthrough for single-out-queue 1920-device */ 3110 default: 3111 return card->qdio.default_out_queue; 3112 } 3113 } 3114 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 3115 3116 int qeth_get_elements_no(struct qeth_card *card, void *hdr, 3117 struct sk_buff *skb, int elems) 3118 { 3119 int dlen = skb->len - skb->data_len; 3120 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) - 3121 PFN_DOWN((unsigned long)skb->data); 3122 3123 elements_needed += skb_shinfo(skb)->nr_frags; 3124 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 3125 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 3126 "(Number=%d / Length=%d). Discarded.\n", 3127 (elements_needed+elems), skb->len); 3128 return 0; 3129 } 3130 return elements_needed; 3131 } 3132 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 3133 3134 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len) 3135 { 3136 int hroom, inpage, rest; 3137 3138 if (((unsigned long)skb->data & PAGE_MASK) != 3139 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) { 3140 hroom = skb_headroom(skb); 3141 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE); 3142 rest = len - inpage; 3143 if (rest > hroom) 3144 return 1; 3145 memmove(skb->data - rest, skb->data, skb->len - skb->data_len); 3146 skb->data -= rest; 3147 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest); 3148 } 3149 return 0; 3150 } 3151 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce); 3152 3153 static inline void __qeth_fill_buffer(struct sk_buff *skb, 3154 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill, 3155 int offset) 3156 { 3157 int length = skb->len - skb->data_len; 3158 int length_here; 3159 int element; 3160 char *data; 3161 int first_lap, cnt; 3162 struct skb_frag_struct *frag; 3163 3164 element = *next_element_to_fill; 3165 data = skb->data; 3166 first_lap = (is_tso == 0 ? 1 : 0); 3167 3168 if (offset >= 0) { 3169 data = skb->data + offset; 3170 length -= offset; 3171 first_lap = 0; 3172 } 3173 3174 while (length > 0) { 3175 /* length_here is the remaining amount of data in this page */ 3176 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3177 if (length < length_here) 3178 length_here = length; 3179 3180 buffer->element[element].addr = data; 3181 buffer->element[element].length = length_here; 3182 length -= length_here; 3183 if (!length) { 3184 if (first_lap) 3185 if (skb_shinfo(skb)->nr_frags) 3186 buffer->element[element].eflags = 3187 SBAL_EFLAGS_FIRST_FRAG; 3188 else 3189 buffer->element[element].eflags = 0; 3190 else 3191 buffer->element[element].eflags = 3192 SBAL_EFLAGS_MIDDLE_FRAG; 3193 } else { 3194 if (first_lap) 3195 buffer->element[element].eflags = 3196 SBAL_EFLAGS_FIRST_FRAG; 3197 else 3198 buffer->element[element].eflags = 3199 SBAL_EFLAGS_MIDDLE_FRAG; 3200 } 3201 data += length_here; 3202 element++; 3203 first_lap = 0; 3204 } 3205 3206 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3207 frag = &skb_shinfo(skb)->frags[cnt]; 3208 buffer->element[element].addr = (char *)page_to_phys(frag->page) 3209 + frag->page_offset; 3210 buffer->element[element].length = frag->size; 3211 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG; 3212 element++; 3213 } 3214 3215 if (buffer->element[element - 1].eflags) 3216 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG; 3217 *next_element_to_fill = element; 3218 } 3219 3220 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 3221 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb, 3222 struct qeth_hdr *hdr, int offset, int hd_len) 3223 { 3224 struct qdio_buffer *buffer; 3225 int flush_cnt = 0, hdr_len, large_send = 0; 3226 3227 buffer = buf->buffer; 3228 atomic_inc(&skb->users); 3229 skb_queue_tail(&buf->skb_list, skb); 3230 3231 /*check first on TSO ....*/ 3232 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) { 3233 int element = buf->next_element_to_fill; 3234 3235 hdr_len = sizeof(struct qeth_hdr_tso) + 3236 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len; 3237 /*fill first buffer entry only with header information */ 3238 buffer->element[element].addr = skb->data; 3239 buffer->element[element].length = hdr_len; 3240 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3241 buf->next_element_to_fill++; 3242 skb->data += hdr_len; 3243 skb->len -= hdr_len; 3244 large_send = 1; 3245 } 3246 3247 if (offset >= 0) { 3248 int element = buf->next_element_to_fill; 3249 buffer->element[element].addr = hdr; 3250 buffer->element[element].length = sizeof(struct qeth_hdr) + 3251 hd_len; 3252 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3253 buf->is_header[element] = 1; 3254 buf->next_element_to_fill++; 3255 } 3256 3257 __qeth_fill_buffer(skb, buffer, large_send, 3258 (int *)&buf->next_element_to_fill, offset); 3259 3260 if (!queue->do_pack) { 3261 QETH_CARD_TEXT(queue->card, 6, "fillbfnp"); 3262 /* set state to PRIMED -> will be flushed */ 3263 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3264 flush_cnt = 1; 3265 } else { 3266 QETH_CARD_TEXT(queue->card, 6, "fillbfpa"); 3267 if (queue->card->options.performance_stats) 3268 queue->card->perf_stats.skbs_sent_pack++; 3269 if (buf->next_element_to_fill >= 3270 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 3271 /* 3272 * packed buffer if full -> set state PRIMED 3273 * -> will be flushed 3274 */ 3275 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3276 flush_cnt = 1; 3277 } 3278 } 3279 return flush_cnt; 3280 } 3281 3282 int qeth_do_send_packet_fast(struct qeth_card *card, 3283 struct qeth_qdio_out_q *queue, struct sk_buff *skb, 3284 struct qeth_hdr *hdr, int elements_needed, 3285 int offset, int hd_len) 3286 { 3287 struct qeth_qdio_out_buffer *buffer; 3288 int index; 3289 3290 /* spin until we get the queue ... */ 3291 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3292 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3293 /* ... now we've got the queue */ 3294 index = queue->next_buf_to_fill; 3295 buffer = &queue->bufs[queue->next_buf_to_fill]; 3296 /* 3297 * check if buffer is empty to make sure that we do not 'overtake' 3298 * ourselves and try to fill a buffer that is already primed 3299 */ 3300 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 3301 goto out; 3302 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % 3303 QDIO_MAX_BUFFERS_PER_Q; 3304 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3305 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 3306 qeth_flush_buffers(queue, index, 1); 3307 return 0; 3308 out: 3309 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3310 return -EBUSY; 3311 } 3312 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 3313 3314 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 3315 struct sk_buff *skb, struct qeth_hdr *hdr, 3316 int elements_needed) 3317 { 3318 struct qeth_qdio_out_buffer *buffer; 3319 int start_index; 3320 int flush_count = 0; 3321 int do_pack = 0; 3322 int tmp; 3323 int rc = 0; 3324 3325 /* spin until we get the queue ... */ 3326 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3327 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3328 start_index = queue->next_buf_to_fill; 3329 buffer = &queue->bufs[queue->next_buf_to_fill]; 3330 /* 3331 * check if buffer is empty to make sure that we do not 'overtake' 3332 * ourselves and try to fill a buffer that is already primed 3333 */ 3334 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 3335 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3336 return -EBUSY; 3337 } 3338 /* check if we need to switch packing state of this queue */ 3339 qeth_switch_to_packing_if_needed(queue); 3340 if (queue->do_pack) { 3341 do_pack = 1; 3342 /* does packet fit in current buffer? */ 3343 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 3344 buffer->next_element_to_fill) < elements_needed) { 3345 /* ... no -> set state PRIMED */ 3346 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3347 flush_count++; 3348 queue->next_buf_to_fill = 3349 (queue->next_buf_to_fill + 1) % 3350 QDIO_MAX_BUFFERS_PER_Q; 3351 buffer = &queue->bufs[queue->next_buf_to_fill]; 3352 /* we did a step forward, so check buffer state 3353 * again */ 3354 if (atomic_read(&buffer->state) != 3355 QETH_QDIO_BUF_EMPTY) { 3356 qeth_flush_buffers(queue, start_index, 3357 flush_count); 3358 atomic_set(&queue->state, 3359 QETH_OUT_Q_UNLOCKED); 3360 return -EBUSY; 3361 } 3362 } 3363 } 3364 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0); 3365 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 3366 QDIO_MAX_BUFFERS_PER_Q; 3367 flush_count += tmp; 3368 if (flush_count) 3369 qeth_flush_buffers(queue, start_index, flush_count); 3370 else if (!atomic_read(&queue->set_pci_flags_count)) 3371 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 3372 /* 3373 * queue->state will go from LOCKED -> UNLOCKED or from 3374 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 3375 * (switch packing state or flush buffer to get another pci flag out). 3376 * In that case we will enter this loop 3377 */ 3378 while (atomic_dec_return(&queue->state)) { 3379 flush_count = 0; 3380 start_index = queue->next_buf_to_fill; 3381 /* check if we can go back to non-packing state */ 3382 flush_count += qeth_switch_to_nonpacking_if_needed(queue); 3383 /* 3384 * check if we need to flush a packing buffer to get a pci 3385 * flag out on the queue 3386 */ 3387 if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) 3388 flush_count += qeth_flush_buffers_on_no_pci(queue); 3389 if (flush_count) 3390 qeth_flush_buffers(queue, start_index, flush_count); 3391 } 3392 /* at this point the queue is UNLOCKED again */ 3393 if (queue->card->options.performance_stats && do_pack) 3394 queue->card->perf_stats.bufs_sent_pack += flush_count; 3395 3396 return rc; 3397 } 3398 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 3399 3400 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 3401 struct qeth_reply *reply, unsigned long data) 3402 { 3403 struct qeth_ipa_cmd *cmd; 3404 struct qeth_ipacmd_setadpparms *setparms; 3405 3406 QETH_CARD_TEXT(card, 4, "prmadpcb"); 3407 3408 cmd = (struct qeth_ipa_cmd *) data; 3409 setparms = &(cmd->data.setadapterparms); 3410 3411 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 3412 if (cmd->hdr.return_code) { 3413 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code); 3414 setparms->data.mode = SET_PROMISC_MODE_OFF; 3415 } 3416 card->info.promisc_mode = setparms->data.mode; 3417 return 0; 3418 } 3419 3420 void qeth_setadp_promisc_mode(struct qeth_card *card) 3421 { 3422 enum qeth_ipa_promisc_modes mode; 3423 struct net_device *dev = card->dev; 3424 struct qeth_cmd_buffer *iob; 3425 struct qeth_ipa_cmd *cmd; 3426 3427 QETH_CARD_TEXT(card, 4, "setprom"); 3428 3429 if (((dev->flags & IFF_PROMISC) && 3430 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 3431 (!(dev->flags & IFF_PROMISC) && 3432 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 3433 return; 3434 mode = SET_PROMISC_MODE_OFF; 3435 if (dev->flags & IFF_PROMISC) 3436 mode = SET_PROMISC_MODE_ON; 3437 QETH_CARD_TEXT_(card, 4, "mode:%x", mode); 3438 3439 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 3440 sizeof(struct qeth_ipacmd_setadpparms)); 3441 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 3442 cmd->data.setadapterparms.data.mode = mode; 3443 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 3444 } 3445 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 3446 3447 int qeth_change_mtu(struct net_device *dev, int new_mtu) 3448 { 3449 struct qeth_card *card; 3450 char dbf_text[15]; 3451 3452 card = dev->ml_priv; 3453 3454 QETH_CARD_TEXT(card, 4, "chgmtu"); 3455 sprintf(dbf_text, "%8x", new_mtu); 3456 QETH_CARD_TEXT(card, 4, dbf_text); 3457 3458 if (new_mtu < 64) 3459 return -EINVAL; 3460 if (new_mtu > 65535) 3461 return -EINVAL; 3462 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && 3463 (!qeth_mtu_is_valid(card, new_mtu))) 3464 return -EINVAL; 3465 dev->mtu = new_mtu; 3466 return 0; 3467 } 3468 EXPORT_SYMBOL_GPL(qeth_change_mtu); 3469 3470 struct net_device_stats *qeth_get_stats(struct net_device *dev) 3471 { 3472 struct qeth_card *card; 3473 3474 card = dev->ml_priv; 3475 3476 QETH_CARD_TEXT(card, 5, "getstat"); 3477 3478 return &card->stats; 3479 } 3480 EXPORT_SYMBOL_GPL(qeth_get_stats); 3481 3482 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 3483 struct qeth_reply *reply, unsigned long data) 3484 { 3485 struct qeth_ipa_cmd *cmd; 3486 3487 QETH_CARD_TEXT(card, 4, "chgmaccb"); 3488 3489 cmd = (struct qeth_ipa_cmd *) data; 3490 if (!card->options.layer2 || 3491 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 3492 memcpy(card->dev->dev_addr, 3493 &cmd->data.setadapterparms.data.change_addr.addr, 3494 OSA_ADDR_LEN); 3495 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 3496 } 3497 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 3498 return 0; 3499 } 3500 3501 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 3502 { 3503 int rc; 3504 struct qeth_cmd_buffer *iob; 3505 struct qeth_ipa_cmd *cmd; 3506 3507 QETH_CARD_TEXT(card, 4, "chgmac"); 3508 3509 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 3510 sizeof(struct qeth_ipacmd_setadpparms)); 3511 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3512 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 3513 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 3514 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 3515 card->dev->dev_addr, OSA_ADDR_LEN); 3516 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 3517 NULL); 3518 return rc; 3519 } 3520 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 3521 3522 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card, 3523 struct qeth_reply *reply, unsigned long data) 3524 { 3525 struct qeth_ipa_cmd *cmd; 3526 struct qeth_set_access_ctrl *access_ctrl_req; 3527 3528 QETH_CARD_TEXT(card, 4, "setaccb"); 3529 3530 cmd = (struct qeth_ipa_cmd *) data; 3531 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 3532 QETH_DBF_TEXT_(SETUP, 2, "setaccb"); 3533 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 3534 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", 3535 cmd->data.setadapterparms.hdr.return_code); 3536 switch (cmd->data.setadapterparms.hdr.return_code) { 3537 case SET_ACCESS_CTRL_RC_SUCCESS: 3538 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED: 3539 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED: 3540 { 3541 card->options.isolation = access_ctrl_req->subcmd_code; 3542 if (card->options.isolation == ISOLATION_MODE_NONE) { 3543 dev_info(&card->gdev->dev, 3544 "QDIO data connection isolation is deactivated\n"); 3545 } else { 3546 dev_info(&card->gdev->dev, 3547 "QDIO data connection isolation is activated\n"); 3548 } 3549 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n", 3550 card->gdev->dev.kobj.name, 3551 access_ctrl_req->subcmd_code, 3552 cmd->data.setadapterparms.hdr.return_code); 3553 break; 3554 } 3555 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED: 3556 { 3557 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n", 3558 card->gdev->dev.kobj.name, 3559 access_ctrl_req->subcmd_code, 3560 cmd->data.setadapterparms.hdr.return_code); 3561 dev_err(&card->gdev->dev, "Adapter does not " 3562 "support QDIO data connection isolation\n"); 3563 3564 /* ensure isolation mode is "none" */ 3565 card->options.isolation = ISOLATION_MODE_NONE; 3566 break; 3567 } 3568 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER: 3569 { 3570 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n", 3571 card->gdev->dev.kobj.name, 3572 access_ctrl_req->subcmd_code, 3573 cmd->data.setadapterparms.hdr.return_code); 3574 dev_err(&card->gdev->dev, 3575 "Adapter is dedicated. " 3576 "QDIO data connection isolation not supported\n"); 3577 3578 /* ensure isolation mode is "none" */ 3579 card->options.isolation = ISOLATION_MODE_NONE; 3580 break; 3581 } 3582 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF: 3583 { 3584 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n", 3585 card->gdev->dev.kobj.name, 3586 access_ctrl_req->subcmd_code, 3587 cmd->data.setadapterparms.hdr.return_code); 3588 dev_err(&card->gdev->dev, 3589 "TSO does not permit QDIO data connection isolation\n"); 3590 3591 /* ensure isolation mode is "none" */ 3592 card->options.isolation = ISOLATION_MODE_NONE; 3593 break; 3594 } 3595 default: 3596 { 3597 /* this should never happen */ 3598 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d" 3599 "==UNKNOWN\n", 3600 card->gdev->dev.kobj.name, 3601 access_ctrl_req->subcmd_code, 3602 cmd->data.setadapterparms.hdr.return_code); 3603 3604 /* ensure isolation mode is "none" */ 3605 card->options.isolation = ISOLATION_MODE_NONE; 3606 break; 3607 } 3608 } 3609 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 3610 return 0; 3611 } 3612 3613 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card, 3614 enum qeth_ipa_isolation_modes isolation) 3615 { 3616 int rc; 3617 struct qeth_cmd_buffer *iob; 3618 struct qeth_ipa_cmd *cmd; 3619 struct qeth_set_access_ctrl *access_ctrl_req; 3620 3621 QETH_CARD_TEXT(card, 4, "setacctl"); 3622 3623 QETH_DBF_TEXT_(SETUP, 2, "setacctl"); 3624 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 3625 3626 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL, 3627 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 3628 sizeof(struct qeth_set_access_ctrl)); 3629 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3630 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 3631 access_ctrl_req->subcmd_code = isolation; 3632 3633 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb, 3634 NULL); 3635 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc); 3636 return rc; 3637 } 3638 3639 int qeth_set_access_ctrl_online(struct qeth_card *card) 3640 { 3641 int rc = 0; 3642 3643 QETH_CARD_TEXT(card, 4, "setactlo"); 3644 3645 if ((card->info.type == QETH_CARD_TYPE_OSD || 3646 card->info.type == QETH_CARD_TYPE_OSX) && 3647 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) { 3648 rc = qeth_setadpparms_set_access_ctrl(card, 3649 card->options.isolation); 3650 if (rc) { 3651 QETH_DBF_MESSAGE(3, 3652 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n", 3653 card->gdev->dev.kobj.name, 3654 rc); 3655 } 3656 } else if (card->options.isolation != ISOLATION_MODE_NONE) { 3657 card->options.isolation = ISOLATION_MODE_NONE; 3658 3659 dev_err(&card->gdev->dev, "Adapter does not " 3660 "support QDIO data connection isolation\n"); 3661 rc = -EOPNOTSUPP; 3662 } 3663 return rc; 3664 } 3665 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online); 3666 3667 void qeth_tx_timeout(struct net_device *dev) 3668 { 3669 struct qeth_card *card; 3670 3671 card = dev->ml_priv; 3672 QETH_CARD_TEXT(card, 4, "txtimeo"); 3673 card->stats.tx_errors++; 3674 qeth_schedule_recovery(card); 3675 } 3676 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 3677 3678 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 3679 { 3680 struct qeth_card *card = dev->ml_priv; 3681 int rc = 0; 3682 3683 switch (regnum) { 3684 case MII_BMCR: /* Basic mode control register */ 3685 rc = BMCR_FULLDPLX; 3686 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 3687 (card->info.link_type != QETH_LINK_TYPE_OSN) && 3688 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 3689 rc |= BMCR_SPEED100; 3690 break; 3691 case MII_BMSR: /* Basic mode status register */ 3692 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 3693 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 3694 BMSR_100BASE4; 3695 break; 3696 case MII_PHYSID1: /* PHYS ID 1 */ 3697 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 3698 dev->dev_addr[2]; 3699 rc = (rc >> 5) & 0xFFFF; 3700 break; 3701 case MII_PHYSID2: /* PHYS ID 2 */ 3702 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 3703 break; 3704 case MII_ADVERTISE: /* Advertisement control reg */ 3705 rc = ADVERTISE_ALL; 3706 break; 3707 case MII_LPA: /* Link partner ability reg */ 3708 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 3709 LPA_100BASE4 | LPA_LPACK; 3710 break; 3711 case MII_EXPANSION: /* Expansion register */ 3712 break; 3713 case MII_DCOUNTER: /* disconnect counter */ 3714 break; 3715 case MII_FCSCOUNTER: /* false carrier counter */ 3716 break; 3717 case MII_NWAYTEST: /* N-way auto-neg test register */ 3718 break; 3719 case MII_RERRCOUNTER: /* rx error counter */ 3720 rc = card->stats.rx_errors; 3721 break; 3722 case MII_SREVISION: /* silicon revision */ 3723 break; 3724 case MII_RESV1: /* reserved 1 */ 3725 break; 3726 case MII_LBRERROR: /* loopback, rx, bypass error */ 3727 break; 3728 case MII_PHYADDR: /* physical address */ 3729 break; 3730 case MII_RESV2: /* reserved 2 */ 3731 break; 3732 case MII_TPISTATUS: /* TPI status for 10mbps */ 3733 break; 3734 case MII_NCONFIG: /* network interface config */ 3735 break; 3736 default: 3737 break; 3738 } 3739 return rc; 3740 } 3741 EXPORT_SYMBOL_GPL(qeth_mdio_read); 3742 3743 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 3744 struct qeth_cmd_buffer *iob, int len, 3745 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 3746 unsigned long), 3747 void *reply_param) 3748 { 3749 u16 s1, s2; 3750 3751 QETH_CARD_TEXT(card, 4, "sendsnmp"); 3752 3753 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 3754 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 3755 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 3756 /* adjust PDU length fields in IPA_PDU_HEADER */ 3757 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 3758 s2 = (u32) len; 3759 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 3760 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 3761 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 3762 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 3763 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 3764 reply_cb, reply_param); 3765 } 3766 3767 static int qeth_snmp_command_cb(struct qeth_card *card, 3768 struct qeth_reply *reply, unsigned long sdata) 3769 { 3770 struct qeth_ipa_cmd *cmd; 3771 struct qeth_arp_query_info *qinfo; 3772 struct qeth_snmp_cmd *snmp; 3773 unsigned char *data; 3774 __u16 data_len; 3775 3776 QETH_CARD_TEXT(card, 3, "snpcmdcb"); 3777 3778 cmd = (struct qeth_ipa_cmd *) sdata; 3779 data = (unsigned char *)((char *)cmd - reply->offset); 3780 qinfo = (struct qeth_arp_query_info *) reply->param; 3781 snmp = &cmd->data.setadapterparms.data.snmp; 3782 3783 if (cmd->hdr.return_code) { 3784 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code); 3785 return 0; 3786 } 3787 if (cmd->data.setadapterparms.hdr.return_code) { 3788 cmd->hdr.return_code = 3789 cmd->data.setadapterparms.hdr.return_code; 3790 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code); 3791 return 0; 3792 } 3793 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 3794 if (cmd->data.setadapterparms.hdr.seq_no == 1) 3795 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 3796 else 3797 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 3798 3799 /* check if there is enough room in userspace */ 3800 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 3801 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM); 3802 cmd->hdr.return_code = -ENOMEM; 3803 return 0; 3804 } 3805 QETH_CARD_TEXT_(card, 4, "snore%i", 3806 cmd->data.setadapterparms.hdr.used_total); 3807 QETH_CARD_TEXT_(card, 4, "sseqn%i", 3808 cmd->data.setadapterparms.hdr.seq_no); 3809 /*copy entries to user buffer*/ 3810 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 3811 memcpy(qinfo->udata + qinfo->udata_offset, 3812 (char *)snmp, 3813 data_len + offsetof(struct qeth_snmp_cmd, data)); 3814 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 3815 } else { 3816 memcpy(qinfo->udata + qinfo->udata_offset, 3817 (char *)&snmp->request, data_len); 3818 } 3819 qinfo->udata_offset += data_len; 3820 /* check if all replies received ... */ 3821 QETH_CARD_TEXT_(card, 4, "srtot%i", 3822 cmd->data.setadapterparms.hdr.used_total); 3823 QETH_CARD_TEXT_(card, 4, "srseq%i", 3824 cmd->data.setadapterparms.hdr.seq_no); 3825 if (cmd->data.setadapterparms.hdr.seq_no < 3826 cmd->data.setadapterparms.hdr.used_total) 3827 return 1; 3828 return 0; 3829 } 3830 3831 int qeth_snmp_command(struct qeth_card *card, char __user *udata) 3832 { 3833 struct qeth_cmd_buffer *iob; 3834 struct qeth_ipa_cmd *cmd; 3835 struct qeth_snmp_ureq *ureq; 3836 int req_len; 3837 struct qeth_arp_query_info qinfo = {0, }; 3838 int rc = 0; 3839 3840 QETH_CARD_TEXT(card, 3, "snmpcmd"); 3841 3842 if (card->info.guestlan) 3843 return -EOPNOTSUPP; 3844 3845 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 3846 (!card->options.layer2)) { 3847 return -EOPNOTSUPP; 3848 } 3849 /* skip 4 bytes (data_len struct member) to get req_len */ 3850 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 3851 return -EFAULT; 3852 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr)); 3853 if (IS_ERR(ureq)) { 3854 QETH_CARD_TEXT(card, 2, "snmpnome"); 3855 return PTR_ERR(ureq); 3856 } 3857 qinfo.udata_len = ureq->hdr.data_len; 3858 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 3859 if (!qinfo.udata) { 3860 kfree(ureq); 3861 return -ENOMEM; 3862 } 3863 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 3864 3865 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 3866 QETH_SNMP_SETADP_CMDLENGTH + req_len); 3867 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3868 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 3869 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 3870 qeth_snmp_command_cb, (void *)&qinfo); 3871 if (rc) 3872 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 3873 QETH_CARD_IFNAME(card), rc); 3874 else { 3875 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 3876 rc = -EFAULT; 3877 } 3878 3879 kfree(ureq); 3880 kfree(qinfo.udata); 3881 return rc; 3882 } 3883 EXPORT_SYMBOL_GPL(qeth_snmp_command); 3884 3885 static inline int qeth_get_qdio_q_format(struct qeth_card *card) 3886 { 3887 switch (card->info.type) { 3888 case QETH_CARD_TYPE_IQD: 3889 return 2; 3890 default: 3891 return 0; 3892 } 3893 } 3894 3895 static void qeth_determine_capabilities(struct qeth_card *card) 3896 { 3897 int rc; 3898 int length; 3899 char *prcd; 3900 struct ccw_device *ddev; 3901 int ddev_offline = 0; 3902 3903 QETH_DBF_TEXT(SETUP, 2, "detcapab"); 3904 ddev = CARD_DDEV(card); 3905 if (!ddev->online) { 3906 ddev_offline = 1; 3907 rc = ccw_device_set_online(ddev); 3908 if (rc) { 3909 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 3910 goto out; 3911 } 3912 } 3913 3914 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 3915 if (rc) { 3916 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", 3917 dev_name(&card->gdev->dev), rc); 3918 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 3919 goto out_offline; 3920 } 3921 qeth_configure_unitaddr(card, prcd); 3922 qeth_configure_blkt_default(card, prcd); 3923 kfree(prcd); 3924 3925 rc = qdio_get_ssqd_desc(ddev, &card->ssqd); 3926 if (rc) 3927 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 3928 3929 out_offline: 3930 if (ddev_offline == 1) 3931 ccw_device_set_offline(ddev); 3932 out: 3933 return; 3934 } 3935 3936 static int qeth_qdio_establish(struct qeth_card *card) 3937 { 3938 struct qdio_initialize init_data; 3939 char *qib_param_field; 3940 struct qdio_buffer **in_sbal_ptrs; 3941 struct qdio_buffer **out_sbal_ptrs; 3942 int i, j, k; 3943 int rc = 0; 3944 3945 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 3946 3947 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 3948 GFP_KERNEL); 3949 if (!qib_param_field) 3950 return -ENOMEM; 3951 3952 qeth_create_qib_param_field(card, qib_param_field); 3953 qeth_create_qib_param_field_blkt(card, qib_param_field); 3954 3955 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 3956 GFP_KERNEL); 3957 if (!in_sbal_ptrs) { 3958 kfree(qib_param_field); 3959 return -ENOMEM; 3960 } 3961 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) 3962 in_sbal_ptrs[i] = (struct qdio_buffer *) 3963 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 3964 3965 out_sbal_ptrs = 3966 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 3967 sizeof(void *), GFP_KERNEL); 3968 if (!out_sbal_ptrs) { 3969 kfree(in_sbal_ptrs); 3970 kfree(qib_param_field); 3971 return -ENOMEM; 3972 } 3973 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 3974 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 3975 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 3976 card->qdio.out_qs[i]->bufs[j].buffer); 3977 } 3978 3979 memset(&init_data, 0, sizeof(struct qdio_initialize)); 3980 init_data.cdev = CARD_DDEV(card); 3981 init_data.q_format = qeth_get_qdio_q_format(card); 3982 init_data.qib_param_field_format = 0; 3983 init_data.qib_param_field = qib_param_field; 3984 init_data.no_input_qs = 1; 3985 init_data.no_output_qs = card->qdio.no_out_queues; 3986 init_data.input_handler = card->discipline.input_handler; 3987 init_data.output_handler = card->discipline.output_handler; 3988 init_data.queue_start_poll = card->discipline.start_poll; 3989 init_data.int_parm = (unsigned long) card; 3990 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 3991 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 3992 init_data.scan_threshold = 3993 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32; 3994 3995 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 3996 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 3997 rc = qdio_allocate(&init_data); 3998 if (rc) { 3999 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4000 goto out; 4001 } 4002 rc = qdio_establish(&init_data); 4003 if (rc) { 4004 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4005 qdio_free(CARD_DDEV(card)); 4006 } 4007 } 4008 out: 4009 kfree(out_sbal_ptrs); 4010 kfree(in_sbal_ptrs); 4011 kfree(qib_param_field); 4012 return rc; 4013 } 4014 4015 static void qeth_core_free_card(struct qeth_card *card) 4016 { 4017 4018 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 4019 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 4020 qeth_clean_channel(&card->read); 4021 qeth_clean_channel(&card->write); 4022 if (card->dev) 4023 free_netdev(card->dev); 4024 kfree(card->ip_tbd_list); 4025 qeth_free_qdio_buffers(card); 4026 unregister_service_level(&card->qeth_service_level); 4027 kfree(card); 4028 } 4029 4030 static struct ccw_device_id qeth_ids[] = { 4031 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01), 4032 .driver_info = QETH_CARD_TYPE_OSD}, 4033 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05), 4034 .driver_info = QETH_CARD_TYPE_IQD}, 4035 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06), 4036 .driver_info = QETH_CARD_TYPE_OSN}, 4037 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03), 4038 .driver_info = QETH_CARD_TYPE_OSM}, 4039 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02), 4040 .driver_info = QETH_CARD_TYPE_OSX}, 4041 {}, 4042 }; 4043 MODULE_DEVICE_TABLE(ccw, qeth_ids); 4044 4045 static struct ccw_driver qeth_ccw_driver = { 4046 .driver = { 4047 .owner = THIS_MODULE, 4048 .name = "qeth", 4049 }, 4050 .ids = qeth_ids, 4051 .probe = ccwgroup_probe_ccwdev, 4052 .remove = ccwgroup_remove_ccwdev, 4053 }; 4054 4055 static int qeth_core_driver_group(const char *buf, struct device *root_dev, 4056 unsigned long driver_id) 4057 { 4058 return ccwgroup_create_from_string(root_dev, driver_id, 4059 &qeth_ccw_driver, 3, buf); 4060 } 4061 4062 int qeth_core_hardsetup_card(struct qeth_card *card) 4063 { 4064 int retries = 0; 4065 int rc; 4066 4067 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 4068 atomic_set(&card->force_alloc_skb, 0); 4069 qeth_get_channel_path_desc(card); 4070 retry: 4071 if (retries) 4072 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", 4073 dev_name(&card->gdev->dev)); 4074 ccw_device_set_offline(CARD_DDEV(card)); 4075 ccw_device_set_offline(CARD_WDEV(card)); 4076 ccw_device_set_offline(CARD_RDEV(card)); 4077 rc = ccw_device_set_online(CARD_RDEV(card)); 4078 if (rc) 4079 goto retriable; 4080 rc = ccw_device_set_online(CARD_WDEV(card)); 4081 if (rc) 4082 goto retriable; 4083 rc = ccw_device_set_online(CARD_DDEV(card)); 4084 if (rc) 4085 goto retriable; 4086 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 4087 retriable: 4088 if (rc == -ERESTARTSYS) { 4089 QETH_DBF_TEXT(SETUP, 2, "break1"); 4090 return rc; 4091 } else if (rc) { 4092 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 4093 if (++retries > 3) 4094 goto out; 4095 else 4096 goto retry; 4097 } 4098 qeth_determine_capabilities(card); 4099 qeth_init_tokens(card); 4100 qeth_init_func_level(card); 4101 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 4102 if (rc == -ERESTARTSYS) { 4103 QETH_DBF_TEXT(SETUP, 2, "break2"); 4104 return rc; 4105 } else if (rc) { 4106 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4107 if (--retries < 0) 4108 goto out; 4109 else 4110 goto retry; 4111 } 4112 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 4113 if (rc == -ERESTARTSYS) { 4114 QETH_DBF_TEXT(SETUP, 2, "break3"); 4115 return rc; 4116 } else if (rc) { 4117 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 4118 if (--retries < 0) 4119 goto out; 4120 else 4121 goto retry; 4122 } 4123 card->read_or_write_problem = 0; 4124 rc = qeth_mpc_initialize(card); 4125 if (rc) { 4126 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4127 goto out; 4128 } 4129 4130 card->options.ipa4.supported_funcs = 0; 4131 card->options.adp.supported_funcs = 0; 4132 card->info.diagass_support = 0; 4133 qeth_query_ipassists(card, QETH_PROT_IPV4); 4134 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) 4135 qeth_query_setadapterparms(card); 4136 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) 4137 qeth_query_setdiagass(card); 4138 return 0; 4139 out: 4140 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " 4141 "an error on the device\n"); 4142 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", 4143 dev_name(&card->gdev->dev), rc); 4144 return rc; 4145 } 4146 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 4147 4148 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element, 4149 struct sk_buff **pskb, int offset, int *pfrag, int data_len) 4150 { 4151 struct page *page = virt_to_page(element->addr); 4152 if (*pskb == NULL) { 4153 /* the upper protocol layers assume that there is data in the 4154 * skb itself. Copy a small amount (64 bytes) to make them 4155 * happy. */ 4156 *pskb = dev_alloc_skb(64 + ETH_HLEN); 4157 if (!(*pskb)) 4158 return -ENOMEM; 4159 skb_reserve(*pskb, ETH_HLEN); 4160 if (data_len <= 64) { 4161 memcpy(skb_put(*pskb, data_len), element->addr + offset, 4162 data_len); 4163 } else { 4164 get_page(page); 4165 memcpy(skb_put(*pskb, 64), element->addr + offset, 64); 4166 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64, 4167 data_len - 64); 4168 (*pskb)->data_len += data_len - 64; 4169 (*pskb)->len += data_len - 64; 4170 (*pskb)->truesize += data_len - 64; 4171 (*pfrag)++; 4172 } 4173 } else { 4174 get_page(page); 4175 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); 4176 (*pskb)->data_len += data_len; 4177 (*pskb)->len += data_len; 4178 (*pskb)->truesize += data_len; 4179 (*pfrag)++; 4180 } 4181 return 0; 4182 } 4183 4184 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 4185 struct qdio_buffer *buffer, 4186 struct qdio_buffer_element **__element, int *__offset, 4187 struct qeth_hdr **hdr) 4188 { 4189 struct qdio_buffer_element *element = *__element; 4190 int offset = *__offset; 4191 struct sk_buff *skb = NULL; 4192 int skb_len = 0; 4193 void *data_ptr; 4194 int data_len; 4195 int headroom = 0; 4196 int use_rx_sg = 0; 4197 int frag = 0; 4198 4199 /* qeth_hdr must not cross element boundaries */ 4200 if (element->length < offset + sizeof(struct qeth_hdr)) { 4201 if (qeth_is_last_sbale(element)) 4202 return NULL; 4203 element++; 4204 offset = 0; 4205 if (element->length < sizeof(struct qeth_hdr)) 4206 return NULL; 4207 } 4208 *hdr = element->addr + offset; 4209 4210 offset += sizeof(struct qeth_hdr); 4211 switch ((*hdr)->hdr.l2.id) { 4212 case QETH_HEADER_TYPE_LAYER2: 4213 skb_len = (*hdr)->hdr.l2.pkt_length; 4214 break; 4215 case QETH_HEADER_TYPE_LAYER3: 4216 skb_len = (*hdr)->hdr.l3.length; 4217 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) || 4218 (card->info.link_type == QETH_LINK_TYPE_HSTR)) 4219 headroom = TR_HLEN; 4220 else 4221 headroom = ETH_HLEN; 4222 break; 4223 case QETH_HEADER_TYPE_OSN: 4224 skb_len = (*hdr)->hdr.osn.pdu_length; 4225 headroom = sizeof(struct qeth_hdr); 4226 break; 4227 default: 4228 break; 4229 } 4230 4231 if (!skb_len) 4232 return NULL; 4233 4234 if ((skb_len >= card->options.rx_sg_cb) && 4235 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 4236 (!atomic_read(&card->force_alloc_skb))) { 4237 use_rx_sg = 1; 4238 } else { 4239 skb = dev_alloc_skb(skb_len + headroom); 4240 if (!skb) 4241 goto no_mem; 4242 if (headroom) 4243 skb_reserve(skb, headroom); 4244 } 4245 4246 data_ptr = element->addr + offset; 4247 while (skb_len) { 4248 data_len = min(skb_len, (int)(element->length - offset)); 4249 if (data_len) { 4250 if (use_rx_sg) { 4251 if (qeth_create_skb_frag(element, &skb, offset, 4252 &frag, data_len)) 4253 goto no_mem; 4254 } else { 4255 memcpy(skb_put(skb, data_len), data_ptr, 4256 data_len); 4257 } 4258 } 4259 skb_len -= data_len; 4260 if (skb_len) { 4261 if (qeth_is_last_sbale(element)) { 4262 QETH_CARD_TEXT(card, 4, "unexeob"); 4263 QETH_CARD_HEX(card, 2, buffer, sizeof(void *)); 4264 dev_kfree_skb_any(skb); 4265 card->stats.rx_errors++; 4266 return NULL; 4267 } 4268 element++; 4269 offset = 0; 4270 data_ptr = element->addr; 4271 } else { 4272 offset += data_len; 4273 } 4274 } 4275 *__element = element; 4276 *__offset = offset; 4277 if (use_rx_sg && card->options.performance_stats) { 4278 card->perf_stats.sg_skbs_rx++; 4279 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 4280 } 4281 return skb; 4282 no_mem: 4283 if (net_ratelimit()) { 4284 QETH_CARD_TEXT(card, 2, "noskbmem"); 4285 } 4286 card->stats.rx_dropped++; 4287 return NULL; 4288 } 4289 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 4290 4291 static void qeth_unregister_dbf_views(void) 4292 { 4293 int x; 4294 for (x = 0; x < QETH_DBF_INFOS; x++) { 4295 debug_unregister(qeth_dbf[x].id); 4296 qeth_dbf[x].id = NULL; 4297 } 4298 } 4299 4300 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...) 4301 { 4302 char dbf_txt_buf[32]; 4303 va_list args; 4304 4305 if (level > id->level) 4306 return; 4307 va_start(args, fmt); 4308 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 4309 va_end(args); 4310 debug_text_event(id, level, dbf_txt_buf); 4311 } 4312 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 4313 4314 static int qeth_register_dbf_views(void) 4315 { 4316 int ret; 4317 int x; 4318 4319 for (x = 0; x < QETH_DBF_INFOS; x++) { 4320 /* register the areas */ 4321 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 4322 qeth_dbf[x].pages, 4323 qeth_dbf[x].areas, 4324 qeth_dbf[x].len); 4325 if (qeth_dbf[x].id == NULL) { 4326 qeth_unregister_dbf_views(); 4327 return -ENOMEM; 4328 } 4329 4330 /* register a view */ 4331 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 4332 if (ret) { 4333 qeth_unregister_dbf_views(); 4334 return ret; 4335 } 4336 4337 /* set a passing level */ 4338 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 4339 } 4340 4341 return 0; 4342 } 4343 4344 int qeth_core_load_discipline(struct qeth_card *card, 4345 enum qeth_discipline_id discipline) 4346 { 4347 int rc = 0; 4348 switch (discipline) { 4349 case QETH_DISCIPLINE_LAYER3: 4350 card->discipline.ccwgdriver = try_then_request_module( 4351 symbol_get(qeth_l3_ccwgroup_driver), 4352 "qeth_l3"); 4353 break; 4354 case QETH_DISCIPLINE_LAYER2: 4355 card->discipline.ccwgdriver = try_then_request_module( 4356 symbol_get(qeth_l2_ccwgroup_driver), 4357 "qeth_l2"); 4358 break; 4359 } 4360 if (!card->discipline.ccwgdriver) { 4361 dev_err(&card->gdev->dev, "There is no kernel module to " 4362 "support discipline %d\n", discipline); 4363 rc = -EINVAL; 4364 } 4365 return rc; 4366 } 4367 4368 void qeth_core_free_discipline(struct qeth_card *card) 4369 { 4370 if (card->options.layer2) 4371 symbol_put(qeth_l2_ccwgroup_driver); 4372 else 4373 symbol_put(qeth_l3_ccwgroup_driver); 4374 card->discipline.ccwgdriver = NULL; 4375 } 4376 4377 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 4378 { 4379 struct qeth_card *card; 4380 struct device *dev; 4381 int rc; 4382 unsigned long flags; 4383 char dbf_name[20]; 4384 4385 QETH_DBF_TEXT(SETUP, 2, "probedev"); 4386 4387 dev = &gdev->dev; 4388 if (!get_device(dev)) 4389 return -ENODEV; 4390 4391 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); 4392 4393 card = qeth_alloc_card(); 4394 if (!card) { 4395 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 4396 rc = -ENOMEM; 4397 goto err_dev; 4398 } 4399 4400 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s", 4401 dev_name(&gdev->dev)); 4402 card->debug = debug_register(dbf_name, 2, 1, 8); 4403 if (!card->debug) { 4404 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf"); 4405 rc = -ENOMEM; 4406 goto err_card; 4407 } 4408 debug_register_view(card->debug, &debug_hex_ascii_view); 4409 4410 card->read.ccwdev = gdev->cdev[0]; 4411 card->write.ccwdev = gdev->cdev[1]; 4412 card->data.ccwdev = gdev->cdev[2]; 4413 dev_set_drvdata(&gdev->dev, card); 4414 card->gdev = gdev; 4415 gdev->cdev[0]->handler = qeth_irq; 4416 gdev->cdev[1]->handler = qeth_irq; 4417 gdev->cdev[2]->handler = qeth_irq; 4418 4419 rc = qeth_determine_card_type(card); 4420 if (rc) { 4421 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4422 goto err_dbf; 4423 } 4424 rc = qeth_setup_card(card); 4425 if (rc) { 4426 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 4427 goto err_dbf; 4428 } 4429 4430 if (card->info.type == QETH_CARD_TYPE_OSN) 4431 rc = qeth_core_create_osn_attributes(dev); 4432 else 4433 rc = qeth_core_create_device_attributes(dev); 4434 if (rc) 4435 goto err_dbf; 4436 switch (card->info.type) { 4437 case QETH_CARD_TYPE_OSN: 4438 case QETH_CARD_TYPE_OSM: 4439 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); 4440 if (rc) 4441 goto err_attr; 4442 rc = card->discipline.ccwgdriver->probe(card->gdev); 4443 if (rc) 4444 goto err_disc; 4445 case QETH_CARD_TYPE_OSD: 4446 case QETH_CARD_TYPE_OSX: 4447 default: 4448 break; 4449 } 4450 4451 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 4452 list_add_tail(&card->list, &qeth_core_card_list.list); 4453 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 4454 4455 qeth_determine_capabilities(card); 4456 return 0; 4457 4458 err_disc: 4459 qeth_core_free_discipline(card); 4460 err_attr: 4461 if (card->info.type == QETH_CARD_TYPE_OSN) 4462 qeth_core_remove_osn_attributes(dev); 4463 else 4464 qeth_core_remove_device_attributes(dev); 4465 err_dbf: 4466 debug_unregister(card->debug); 4467 err_card: 4468 qeth_core_free_card(card); 4469 err_dev: 4470 put_device(dev); 4471 return rc; 4472 } 4473 4474 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 4475 { 4476 unsigned long flags; 4477 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4478 4479 QETH_DBF_TEXT(SETUP, 2, "removedv"); 4480 4481 if (card->info.type == QETH_CARD_TYPE_OSN) { 4482 qeth_core_remove_osn_attributes(&gdev->dev); 4483 } else { 4484 qeth_core_remove_device_attributes(&gdev->dev); 4485 } 4486 4487 if (card->discipline.ccwgdriver) { 4488 card->discipline.ccwgdriver->remove(gdev); 4489 qeth_core_free_discipline(card); 4490 } 4491 4492 debug_unregister(card->debug); 4493 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 4494 list_del(&card->list); 4495 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 4496 qeth_core_free_card(card); 4497 dev_set_drvdata(&gdev->dev, NULL); 4498 put_device(&gdev->dev); 4499 return; 4500 } 4501 4502 static int qeth_core_set_online(struct ccwgroup_device *gdev) 4503 { 4504 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4505 int rc = 0; 4506 int def_discipline; 4507 4508 if (!card->discipline.ccwgdriver) { 4509 if (card->info.type == QETH_CARD_TYPE_IQD) 4510 def_discipline = QETH_DISCIPLINE_LAYER3; 4511 else 4512 def_discipline = QETH_DISCIPLINE_LAYER2; 4513 rc = qeth_core_load_discipline(card, def_discipline); 4514 if (rc) 4515 goto err; 4516 rc = card->discipline.ccwgdriver->probe(card->gdev); 4517 if (rc) 4518 goto err; 4519 } 4520 rc = card->discipline.ccwgdriver->set_online(gdev); 4521 err: 4522 return rc; 4523 } 4524 4525 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 4526 { 4527 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4528 return card->discipline.ccwgdriver->set_offline(gdev); 4529 } 4530 4531 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 4532 { 4533 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4534 if (card->discipline.ccwgdriver && 4535 card->discipline.ccwgdriver->shutdown) 4536 card->discipline.ccwgdriver->shutdown(gdev); 4537 } 4538 4539 static int qeth_core_prepare(struct ccwgroup_device *gdev) 4540 { 4541 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4542 if (card->discipline.ccwgdriver && 4543 card->discipline.ccwgdriver->prepare) 4544 return card->discipline.ccwgdriver->prepare(gdev); 4545 return 0; 4546 } 4547 4548 static void qeth_core_complete(struct ccwgroup_device *gdev) 4549 { 4550 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4551 if (card->discipline.ccwgdriver && 4552 card->discipline.ccwgdriver->complete) 4553 card->discipline.ccwgdriver->complete(gdev); 4554 } 4555 4556 static int qeth_core_freeze(struct ccwgroup_device *gdev) 4557 { 4558 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4559 if (card->discipline.ccwgdriver && 4560 card->discipline.ccwgdriver->freeze) 4561 return card->discipline.ccwgdriver->freeze(gdev); 4562 return 0; 4563 } 4564 4565 static int qeth_core_thaw(struct ccwgroup_device *gdev) 4566 { 4567 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4568 if (card->discipline.ccwgdriver && 4569 card->discipline.ccwgdriver->thaw) 4570 return card->discipline.ccwgdriver->thaw(gdev); 4571 return 0; 4572 } 4573 4574 static int qeth_core_restore(struct ccwgroup_device *gdev) 4575 { 4576 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4577 if (card->discipline.ccwgdriver && 4578 card->discipline.ccwgdriver->restore) 4579 return card->discipline.ccwgdriver->restore(gdev); 4580 return 0; 4581 } 4582 4583 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 4584 .driver = { 4585 .owner = THIS_MODULE, 4586 .name = "qeth", 4587 }, 4588 .driver_id = 0xD8C5E3C8, 4589 .probe = qeth_core_probe_device, 4590 .remove = qeth_core_remove_device, 4591 .set_online = qeth_core_set_online, 4592 .set_offline = qeth_core_set_offline, 4593 .shutdown = qeth_core_shutdown, 4594 .prepare = qeth_core_prepare, 4595 .complete = qeth_core_complete, 4596 .freeze = qeth_core_freeze, 4597 .thaw = qeth_core_thaw, 4598 .restore = qeth_core_restore, 4599 }; 4600 4601 static ssize_t 4602 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf, 4603 size_t count) 4604 { 4605 int err; 4606 err = qeth_core_driver_group(buf, qeth_core_root_dev, 4607 qeth_core_ccwgroup_driver.driver_id); 4608 if (err) 4609 return err; 4610 else 4611 return count; 4612 } 4613 4614 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); 4615 4616 static struct { 4617 const char str[ETH_GSTRING_LEN]; 4618 } qeth_ethtool_stats_keys[] = { 4619 /* 0 */{"rx skbs"}, 4620 {"rx buffers"}, 4621 {"tx skbs"}, 4622 {"tx buffers"}, 4623 {"tx skbs no packing"}, 4624 {"tx buffers no packing"}, 4625 {"tx skbs packing"}, 4626 {"tx buffers packing"}, 4627 {"tx sg skbs"}, 4628 {"tx sg frags"}, 4629 /* 10 */{"rx sg skbs"}, 4630 {"rx sg frags"}, 4631 {"rx sg page allocs"}, 4632 {"tx large kbytes"}, 4633 {"tx large count"}, 4634 {"tx pk state ch n->p"}, 4635 {"tx pk state ch p->n"}, 4636 {"tx pk watermark low"}, 4637 {"tx pk watermark high"}, 4638 {"queue 0 buffer usage"}, 4639 /* 20 */{"queue 1 buffer usage"}, 4640 {"queue 2 buffer usage"}, 4641 {"queue 3 buffer usage"}, 4642 {"rx poll time"}, 4643 {"rx poll count"}, 4644 {"rx do_QDIO time"}, 4645 {"rx do_QDIO count"}, 4646 {"tx handler time"}, 4647 {"tx handler count"}, 4648 {"tx time"}, 4649 /* 30 */{"tx count"}, 4650 {"tx do_QDIO time"}, 4651 {"tx do_QDIO count"}, 4652 {"tx csum"}, 4653 {"tx lin"}, 4654 }; 4655 4656 int qeth_core_get_sset_count(struct net_device *dev, int stringset) 4657 { 4658 switch (stringset) { 4659 case ETH_SS_STATS: 4660 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 4661 default: 4662 return -EINVAL; 4663 } 4664 } 4665 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count); 4666 4667 void qeth_core_get_ethtool_stats(struct net_device *dev, 4668 struct ethtool_stats *stats, u64 *data) 4669 { 4670 struct qeth_card *card = dev->ml_priv; 4671 data[0] = card->stats.rx_packets - 4672 card->perf_stats.initial_rx_packets; 4673 data[1] = card->perf_stats.bufs_rec; 4674 data[2] = card->stats.tx_packets - 4675 card->perf_stats.initial_tx_packets; 4676 data[3] = card->perf_stats.bufs_sent; 4677 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 4678 - card->perf_stats.skbs_sent_pack; 4679 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 4680 data[6] = card->perf_stats.skbs_sent_pack; 4681 data[7] = card->perf_stats.bufs_sent_pack; 4682 data[8] = card->perf_stats.sg_skbs_sent; 4683 data[9] = card->perf_stats.sg_frags_sent; 4684 data[10] = card->perf_stats.sg_skbs_rx; 4685 data[11] = card->perf_stats.sg_frags_rx; 4686 data[12] = card->perf_stats.sg_alloc_page_rx; 4687 data[13] = (card->perf_stats.large_send_bytes >> 10); 4688 data[14] = card->perf_stats.large_send_cnt; 4689 data[15] = card->perf_stats.sc_dp_p; 4690 data[16] = card->perf_stats.sc_p_dp; 4691 data[17] = QETH_LOW_WATERMARK_PACK; 4692 data[18] = QETH_HIGH_WATERMARK_PACK; 4693 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 4694 data[20] = (card->qdio.no_out_queues > 1) ? 4695 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 4696 data[21] = (card->qdio.no_out_queues > 2) ? 4697 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 4698 data[22] = (card->qdio.no_out_queues > 3) ? 4699 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 4700 data[23] = card->perf_stats.inbound_time; 4701 data[24] = card->perf_stats.inbound_cnt; 4702 data[25] = card->perf_stats.inbound_do_qdio_time; 4703 data[26] = card->perf_stats.inbound_do_qdio_cnt; 4704 data[27] = card->perf_stats.outbound_handler_time; 4705 data[28] = card->perf_stats.outbound_handler_cnt; 4706 data[29] = card->perf_stats.outbound_time; 4707 data[30] = card->perf_stats.outbound_cnt; 4708 data[31] = card->perf_stats.outbound_do_qdio_time; 4709 data[32] = card->perf_stats.outbound_do_qdio_cnt; 4710 data[33] = card->perf_stats.tx_csum; 4711 data[34] = card->perf_stats.tx_lin; 4712 } 4713 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 4714 4715 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 4716 { 4717 switch (stringset) { 4718 case ETH_SS_STATS: 4719 memcpy(data, &qeth_ethtool_stats_keys, 4720 sizeof(qeth_ethtool_stats_keys)); 4721 break; 4722 default: 4723 WARN_ON(1); 4724 break; 4725 } 4726 } 4727 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 4728 4729 void qeth_core_get_drvinfo(struct net_device *dev, 4730 struct ethtool_drvinfo *info) 4731 { 4732 struct qeth_card *card = dev->ml_priv; 4733 if (card->options.layer2) 4734 strcpy(info->driver, "qeth_l2"); 4735 else 4736 strcpy(info->driver, "qeth_l3"); 4737 4738 strcpy(info->version, "1.0"); 4739 strcpy(info->fw_version, card->info.mcl_level); 4740 sprintf(info->bus_info, "%s/%s/%s", 4741 CARD_RDEV_ID(card), 4742 CARD_WDEV_ID(card), 4743 CARD_DDEV_ID(card)); 4744 } 4745 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 4746 4747 int qeth_core_ethtool_get_settings(struct net_device *netdev, 4748 struct ethtool_cmd *ecmd) 4749 { 4750 struct qeth_card *card = netdev->ml_priv; 4751 enum qeth_link_types link_type; 4752 4753 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 4754 link_type = QETH_LINK_TYPE_10GBIT_ETH; 4755 else 4756 link_type = card->info.link_type; 4757 4758 ecmd->transceiver = XCVR_INTERNAL; 4759 ecmd->supported = SUPPORTED_Autoneg; 4760 ecmd->advertising = ADVERTISED_Autoneg; 4761 ecmd->duplex = DUPLEX_FULL; 4762 ecmd->autoneg = AUTONEG_ENABLE; 4763 4764 switch (link_type) { 4765 case QETH_LINK_TYPE_FAST_ETH: 4766 case QETH_LINK_TYPE_LANE_ETH100: 4767 ecmd->supported |= SUPPORTED_10baseT_Half | 4768 SUPPORTED_10baseT_Full | 4769 SUPPORTED_100baseT_Half | 4770 SUPPORTED_100baseT_Full | 4771 SUPPORTED_TP; 4772 ecmd->advertising |= ADVERTISED_10baseT_Half | 4773 ADVERTISED_10baseT_Full | 4774 ADVERTISED_100baseT_Half | 4775 ADVERTISED_100baseT_Full | 4776 ADVERTISED_TP; 4777 ecmd->speed = SPEED_100; 4778 ecmd->port = PORT_TP; 4779 break; 4780 4781 case QETH_LINK_TYPE_GBIT_ETH: 4782 case QETH_LINK_TYPE_LANE_ETH1000: 4783 ecmd->supported |= SUPPORTED_10baseT_Half | 4784 SUPPORTED_10baseT_Full | 4785 SUPPORTED_100baseT_Half | 4786 SUPPORTED_100baseT_Full | 4787 SUPPORTED_1000baseT_Half | 4788 SUPPORTED_1000baseT_Full | 4789 SUPPORTED_FIBRE; 4790 ecmd->advertising |= ADVERTISED_10baseT_Half | 4791 ADVERTISED_10baseT_Full | 4792 ADVERTISED_100baseT_Half | 4793 ADVERTISED_100baseT_Full | 4794 ADVERTISED_1000baseT_Half | 4795 ADVERTISED_1000baseT_Full | 4796 ADVERTISED_FIBRE; 4797 ecmd->speed = SPEED_1000; 4798 ecmd->port = PORT_FIBRE; 4799 break; 4800 4801 case QETH_LINK_TYPE_10GBIT_ETH: 4802 ecmd->supported |= SUPPORTED_10baseT_Half | 4803 SUPPORTED_10baseT_Full | 4804 SUPPORTED_100baseT_Half | 4805 SUPPORTED_100baseT_Full | 4806 SUPPORTED_1000baseT_Half | 4807 SUPPORTED_1000baseT_Full | 4808 SUPPORTED_10000baseT_Full | 4809 SUPPORTED_FIBRE; 4810 ecmd->advertising |= ADVERTISED_10baseT_Half | 4811 ADVERTISED_10baseT_Full | 4812 ADVERTISED_100baseT_Half | 4813 ADVERTISED_100baseT_Full | 4814 ADVERTISED_1000baseT_Half | 4815 ADVERTISED_1000baseT_Full | 4816 ADVERTISED_10000baseT_Full | 4817 ADVERTISED_FIBRE; 4818 ecmd->speed = SPEED_10000; 4819 ecmd->port = PORT_FIBRE; 4820 break; 4821 4822 default: 4823 ecmd->supported |= SUPPORTED_10baseT_Half | 4824 SUPPORTED_10baseT_Full | 4825 SUPPORTED_TP; 4826 ecmd->advertising |= ADVERTISED_10baseT_Half | 4827 ADVERTISED_10baseT_Full | 4828 ADVERTISED_TP; 4829 ecmd->speed = SPEED_10; 4830 ecmd->port = PORT_TP; 4831 } 4832 4833 return 0; 4834 } 4835 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); 4836 4837 static int __init qeth_core_init(void) 4838 { 4839 int rc; 4840 4841 pr_info("loading core functions\n"); 4842 INIT_LIST_HEAD(&qeth_core_card_list.list); 4843 rwlock_init(&qeth_core_card_list.rwlock); 4844 4845 rc = qeth_register_dbf_views(); 4846 if (rc) 4847 goto out_err; 4848 rc = ccw_driver_register(&qeth_ccw_driver); 4849 if (rc) 4850 goto ccw_err; 4851 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 4852 if (rc) 4853 goto ccwgroup_err; 4854 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver, 4855 &driver_attr_group); 4856 if (rc) 4857 goto driver_err; 4858 qeth_core_root_dev = root_device_register("qeth"); 4859 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0; 4860 if (rc) 4861 goto register_err; 4862 4863 qeth_core_header_cache = kmem_cache_create("qeth_hdr", 4864 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); 4865 if (!qeth_core_header_cache) { 4866 rc = -ENOMEM; 4867 goto slab_err; 4868 } 4869 4870 return 0; 4871 slab_err: 4872 root_device_unregister(qeth_core_root_dev); 4873 register_err: 4874 driver_remove_file(&qeth_core_ccwgroup_driver.driver, 4875 &driver_attr_group); 4876 driver_err: 4877 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 4878 ccwgroup_err: 4879 ccw_driver_unregister(&qeth_ccw_driver); 4880 ccw_err: 4881 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc); 4882 qeth_unregister_dbf_views(); 4883 out_err: 4884 pr_err("Initializing the qeth device driver failed\n"); 4885 return rc; 4886 } 4887 4888 static void __exit qeth_core_exit(void) 4889 { 4890 root_device_unregister(qeth_core_root_dev); 4891 driver_remove_file(&qeth_core_ccwgroup_driver.driver, 4892 &driver_attr_group); 4893 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 4894 ccw_driver_unregister(&qeth_ccw_driver); 4895 kmem_cache_destroy(qeth_core_header_cache); 4896 qeth_unregister_dbf_views(); 4897 pr_info("core functions removed\n"); 4898 } 4899 4900 module_init(qeth_core_init); 4901 module_exit(qeth_core_exit); 4902 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 4903 MODULE_DESCRIPTION("qeth core functions"); 4904 MODULE_LICENSE("GPL"); 4905