1 /* 2 * Copyright IBM Corp. 2007, 2009 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 4 * Frank Pavlic <fpavlic@de.ibm.com>, 5 * Thomas Spatzier <tspat@de.ibm.com>, 6 * Frank Blaschka <frank.blaschka@de.ibm.com> 7 */ 8 9 #define KMSG_COMPONENT "qeth" 10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 11 12 #include <linux/module.h> 13 #include <linux/moduleparam.h> 14 #include <linux/string.h> 15 #include <linux/errno.h> 16 #include <linux/kernel.h> 17 #include <linux/ip.h> 18 #include <linux/tcp.h> 19 #include <linux/mii.h> 20 #include <linux/kthread.h> 21 #include <linux/slab.h> 22 #include <net/iucv/af_iucv.h> 23 #include <net/dsfield.h> 24 25 #include <asm/ebcdic.h> 26 #include <asm/chpid.h> 27 #include <asm/io.h> 28 #include <asm/sysinfo.h> 29 #include <asm/compat.h> 30 31 #include "qeth_core.h" 32 33 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 34 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 35 /* N P A M L V H */ 36 [QETH_DBF_SETUP] = {"qeth_setup", 37 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 38 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3, 39 &debug_sprintf_view, NULL}, 40 [QETH_DBF_CTRL] = {"qeth_control", 41 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 42 }; 43 EXPORT_SYMBOL_GPL(qeth_dbf); 44 45 struct qeth_card_list_struct qeth_core_card_list; 46 EXPORT_SYMBOL_GPL(qeth_core_card_list); 47 struct kmem_cache *qeth_core_header_cache; 48 EXPORT_SYMBOL_GPL(qeth_core_header_cache); 49 static struct kmem_cache *qeth_qdio_outbuf_cache; 50 51 static struct device *qeth_core_root_dev; 52 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY; 53 static struct lock_class_key qdio_out_skb_queue_key; 54 static struct mutex qeth_mod_mutex; 55 56 static void qeth_send_control_data_cb(struct qeth_channel *, 57 struct qeth_cmd_buffer *); 58 static int qeth_issue_next_read(struct qeth_card *); 59 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 60 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 61 static void qeth_free_buffer_pool(struct qeth_card *); 62 static int qeth_qdio_establish(struct qeth_card *); 63 static void qeth_free_qdio_buffers(struct qeth_card *); 64 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue, 65 struct qeth_qdio_out_buffer *buf, 66 enum iucv_tx_notify notification); 67 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf); 68 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 69 struct qeth_qdio_out_buffer *buf, 70 enum qeth_qdio_buffer_states newbufstate); 71 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int); 72 73 struct workqueue_struct *qeth_wq; 74 EXPORT_SYMBOL_GPL(qeth_wq); 75 76 int qeth_card_hw_is_reachable(struct qeth_card *card) 77 { 78 return (card->state == CARD_STATE_SOFTSETUP) || 79 (card->state == CARD_STATE_UP); 80 } 81 EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable); 82 83 static void qeth_close_dev_handler(struct work_struct *work) 84 { 85 struct qeth_card *card; 86 87 card = container_of(work, struct qeth_card, close_dev_work); 88 QETH_CARD_TEXT(card, 2, "cldevhdl"); 89 rtnl_lock(); 90 dev_close(card->dev); 91 rtnl_unlock(); 92 ccwgroup_set_offline(card->gdev); 93 } 94 95 void qeth_close_dev(struct qeth_card *card) 96 { 97 QETH_CARD_TEXT(card, 2, "cldevsubm"); 98 queue_work(qeth_wq, &card->close_dev_work); 99 } 100 EXPORT_SYMBOL_GPL(qeth_close_dev); 101 102 static inline const char *qeth_get_cardname(struct qeth_card *card) 103 { 104 if (card->info.guestlan) { 105 switch (card->info.type) { 106 case QETH_CARD_TYPE_OSD: 107 return " Virtual NIC QDIO"; 108 case QETH_CARD_TYPE_IQD: 109 return " Virtual NIC Hiper"; 110 case QETH_CARD_TYPE_OSM: 111 return " Virtual NIC QDIO - OSM"; 112 case QETH_CARD_TYPE_OSX: 113 return " Virtual NIC QDIO - OSX"; 114 default: 115 return " unknown"; 116 } 117 } else { 118 switch (card->info.type) { 119 case QETH_CARD_TYPE_OSD: 120 return " OSD Express"; 121 case QETH_CARD_TYPE_IQD: 122 return " HiperSockets"; 123 case QETH_CARD_TYPE_OSN: 124 return " OSN QDIO"; 125 case QETH_CARD_TYPE_OSM: 126 return " OSM QDIO"; 127 case QETH_CARD_TYPE_OSX: 128 return " OSX QDIO"; 129 default: 130 return " unknown"; 131 } 132 } 133 return " n/a"; 134 } 135 136 /* max length to be returned: 14 */ 137 const char *qeth_get_cardname_short(struct qeth_card *card) 138 { 139 if (card->info.guestlan) { 140 switch (card->info.type) { 141 case QETH_CARD_TYPE_OSD: 142 return "Virt.NIC QDIO"; 143 case QETH_CARD_TYPE_IQD: 144 return "Virt.NIC Hiper"; 145 case QETH_CARD_TYPE_OSM: 146 return "Virt.NIC OSM"; 147 case QETH_CARD_TYPE_OSX: 148 return "Virt.NIC OSX"; 149 default: 150 return "unknown"; 151 } 152 } else { 153 switch (card->info.type) { 154 case QETH_CARD_TYPE_OSD: 155 switch (card->info.link_type) { 156 case QETH_LINK_TYPE_FAST_ETH: 157 return "OSD_100"; 158 case QETH_LINK_TYPE_HSTR: 159 return "HSTR"; 160 case QETH_LINK_TYPE_GBIT_ETH: 161 return "OSD_1000"; 162 case QETH_LINK_TYPE_10GBIT_ETH: 163 return "OSD_10GIG"; 164 case QETH_LINK_TYPE_LANE_ETH100: 165 return "OSD_FE_LANE"; 166 case QETH_LINK_TYPE_LANE_TR: 167 return "OSD_TR_LANE"; 168 case QETH_LINK_TYPE_LANE_ETH1000: 169 return "OSD_GbE_LANE"; 170 case QETH_LINK_TYPE_LANE: 171 return "OSD_ATM_LANE"; 172 default: 173 return "OSD_Express"; 174 } 175 case QETH_CARD_TYPE_IQD: 176 return "HiperSockets"; 177 case QETH_CARD_TYPE_OSN: 178 return "OSN"; 179 case QETH_CARD_TYPE_OSM: 180 return "OSM_1000"; 181 case QETH_CARD_TYPE_OSX: 182 return "OSX_10GIG"; 183 default: 184 return "unknown"; 185 } 186 } 187 return "n/a"; 188 } 189 190 void qeth_set_recovery_task(struct qeth_card *card) 191 { 192 card->recovery_task = current; 193 } 194 EXPORT_SYMBOL_GPL(qeth_set_recovery_task); 195 196 void qeth_clear_recovery_task(struct qeth_card *card) 197 { 198 card->recovery_task = NULL; 199 } 200 EXPORT_SYMBOL_GPL(qeth_clear_recovery_task); 201 202 static bool qeth_is_recovery_task(const struct qeth_card *card) 203 { 204 return card->recovery_task == current; 205 } 206 207 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 208 int clear_start_mask) 209 { 210 unsigned long flags; 211 212 spin_lock_irqsave(&card->thread_mask_lock, flags); 213 card->thread_allowed_mask = threads; 214 if (clear_start_mask) 215 card->thread_start_mask &= threads; 216 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 217 wake_up(&card->wait_q); 218 } 219 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 220 221 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 222 { 223 unsigned long flags; 224 int rc = 0; 225 226 spin_lock_irqsave(&card->thread_mask_lock, flags); 227 rc = (card->thread_running_mask & threads); 228 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 229 return rc; 230 } 231 EXPORT_SYMBOL_GPL(qeth_threads_running); 232 233 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 234 { 235 if (qeth_is_recovery_task(card)) 236 return 0; 237 return wait_event_interruptible(card->wait_q, 238 qeth_threads_running(card, threads) == 0); 239 } 240 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 241 242 void qeth_clear_working_pool_list(struct qeth_card *card) 243 { 244 struct qeth_buffer_pool_entry *pool_entry, *tmp; 245 246 QETH_CARD_TEXT(card, 5, "clwrklst"); 247 list_for_each_entry_safe(pool_entry, tmp, 248 &card->qdio.in_buf_pool.entry_list, list){ 249 list_del(&pool_entry->list); 250 } 251 } 252 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 253 254 static int qeth_alloc_buffer_pool(struct qeth_card *card) 255 { 256 struct qeth_buffer_pool_entry *pool_entry; 257 void *ptr; 258 int i, j; 259 260 QETH_CARD_TEXT(card, 5, "alocpool"); 261 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 262 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL); 263 if (!pool_entry) { 264 qeth_free_buffer_pool(card); 265 return -ENOMEM; 266 } 267 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 268 ptr = (void *) __get_free_page(GFP_KERNEL); 269 if (!ptr) { 270 while (j > 0) 271 free_page((unsigned long) 272 pool_entry->elements[--j]); 273 kfree(pool_entry); 274 qeth_free_buffer_pool(card); 275 return -ENOMEM; 276 } 277 pool_entry->elements[j] = ptr; 278 } 279 list_add(&pool_entry->init_list, 280 &card->qdio.init_pool.entry_list); 281 } 282 return 0; 283 } 284 285 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 286 { 287 QETH_CARD_TEXT(card, 2, "realcbp"); 288 289 if ((card->state != CARD_STATE_DOWN) && 290 (card->state != CARD_STATE_RECOVER)) 291 return -EPERM; 292 293 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 294 qeth_clear_working_pool_list(card); 295 qeth_free_buffer_pool(card); 296 card->qdio.in_buf_pool.buf_count = bufcnt; 297 card->qdio.init_pool.buf_count = bufcnt; 298 return qeth_alloc_buffer_pool(card); 299 } 300 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool); 301 302 static void qeth_free_qdio_queue(struct qeth_qdio_q *q) 303 { 304 if (!q) 305 return; 306 307 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q); 308 kfree(q); 309 } 310 311 static struct qeth_qdio_q *qeth_alloc_qdio_queue(void) 312 { 313 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL); 314 int i; 315 316 if (!q) 317 return NULL; 318 319 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) { 320 kfree(q); 321 return NULL; 322 } 323 324 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) 325 q->bufs[i].buffer = q->qdio_bufs[i]; 326 327 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *)); 328 return q; 329 } 330 331 static inline int qeth_cq_init(struct qeth_card *card) 332 { 333 int rc; 334 335 if (card->options.cq == QETH_CQ_ENABLED) { 336 QETH_DBF_TEXT(SETUP, 2, "cqinit"); 337 qdio_reset_buffers(card->qdio.c_q->qdio_bufs, 338 QDIO_MAX_BUFFERS_PER_Q); 339 card->qdio.c_q->next_buf_to_init = 127; 340 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 341 card->qdio.no_in_queues - 1, 0, 342 127); 343 if (rc) { 344 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 345 goto out; 346 } 347 } 348 rc = 0; 349 out: 350 return rc; 351 } 352 353 static inline int qeth_alloc_cq(struct qeth_card *card) 354 { 355 int rc; 356 357 if (card->options.cq == QETH_CQ_ENABLED) { 358 int i; 359 struct qdio_outbuf_state *outbuf_states; 360 361 QETH_DBF_TEXT(SETUP, 2, "cqon"); 362 card->qdio.c_q = qeth_alloc_qdio_queue(); 363 if (!card->qdio.c_q) { 364 rc = -1; 365 goto kmsg_out; 366 } 367 card->qdio.no_in_queues = 2; 368 card->qdio.out_bufstates = 369 kzalloc(card->qdio.no_out_queues * 370 QDIO_MAX_BUFFERS_PER_Q * 371 sizeof(struct qdio_outbuf_state), GFP_KERNEL); 372 outbuf_states = card->qdio.out_bufstates; 373 if (outbuf_states == NULL) { 374 rc = -1; 375 goto free_cq_out; 376 } 377 for (i = 0; i < card->qdio.no_out_queues; ++i) { 378 card->qdio.out_qs[i]->bufstates = outbuf_states; 379 outbuf_states += QDIO_MAX_BUFFERS_PER_Q; 380 } 381 } else { 382 QETH_DBF_TEXT(SETUP, 2, "nocq"); 383 card->qdio.c_q = NULL; 384 card->qdio.no_in_queues = 1; 385 } 386 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues); 387 rc = 0; 388 out: 389 return rc; 390 free_cq_out: 391 qeth_free_qdio_queue(card->qdio.c_q); 392 card->qdio.c_q = NULL; 393 kmsg_out: 394 dev_err(&card->gdev->dev, "Failed to create completion queue\n"); 395 goto out; 396 } 397 398 static inline void qeth_free_cq(struct qeth_card *card) 399 { 400 if (card->qdio.c_q) { 401 --card->qdio.no_in_queues; 402 qeth_free_qdio_queue(card->qdio.c_q); 403 card->qdio.c_q = NULL; 404 } 405 kfree(card->qdio.out_bufstates); 406 card->qdio.out_bufstates = NULL; 407 } 408 409 static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15, 410 int delayed) { 411 enum iucv_tx_notify n; 412 413 switch (sbalf15) { 414 case 0: 415 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK; 416 break; 417 case 4: 418 case 16: 419 case 17: 420 case 18: 421 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE : 422 TX_NOTIFY_UNREACHABLE; 423 break; 424 default: 425 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR : 426 TX_NOTIFY_GENERALERROR; 427 break; 428 } 429 430 return n; 431 } 432 433 static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, 434 int bidx, int forced_cleanup) 435 { 436 if (q->card->options.cq != QETH_CQ_ENABLED) 437 return; 438 439 if (q->bufs[bidx]->next_pending != NULL) { 440 struct qeth_qdio_out_buffer *head = q->bufs[bidx]; 441 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending; 442 443 while (c) { 444 if (forced_cleanup || 445 atomic_read(&c->state) == 446 QETH_QDIO_BUF_HANDLED_DELAYED) { 447 struct qeth_qdio_out_buffer *f = c; 448 QETH_CARD_TEXT(f->q->card, 5, "fp"); 449 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f); 450 /* release here to avoid interleaving between 451 outbound tasklet and inbound tasklet 452 regarding notifications and lifecycle */ 453 qeth_release_skbs(c); 454 455 c = f->next_pending; 456 WARN_ON_ONCE(head->next_pending != f); 457 head->next_pending = c; 458 kmem_cache_free(qeth_qdio_outbuf_cache, f); 459 } else { 460 head = c; 461 c = c->next_pending; 462 } 463 464 } 465 } 466 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) == 467 QETH_QDIO_BUF_HANDLED_DELAYED)) { 468 /* for recovery situations */ 469 q->bufs[bidx]->aob = q->bufstates[bidx].aob; 470 qeth_init_qdio_out_buf(q, bidx); 471 QETH_CARD_TEXT(q->card, 2, "clprecov"); 472 } 473 } 474 475 476 static inline void qeth_qdio_handle_aob(struct qeth_card *card, 477 unsigned long phys_aob_addr) { 478 struct qaob *aob; 479 struct qeth_qdio_out_buffer *buffer; 480 enum iucv_tx_notify notification; 481 482 aob = (struct qaob *) phys_to_virt(phys_aob_addr); 483 QETH_CARD_TEXT(card, 5, "haob"); 484 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr); 485 buffer = (struct qeth_qdio_out_buffer *) aob->user1; 486 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1); 487 488 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED, 489 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) { 490 notification = TX_NOTIFY_OK; 491 } else { 492 WARN_ON_ONCE(atomic_read(&buffer->state) != 493 QETH_QDIO_BUF_PENDING); 494 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ); 495 notification = TX_NOTIFY_DELAYED_OK; 496 } 497 498 if (aob->aorc != 0) { 499 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc); 500 notification = qeth_compute_cq_notification(aob->aorc, 1); 501 } 502 qeth_notify_skbs(buffer->q, buffer, notification); 503 504 buffer->aob = NULL; 505 qeth_clear_output_buffer(buffer->q, buffer, 506 QETH_QDIO_BUF_HANDLED_DELAYED); 507 508 /* from here on: do not touch buffer anymore */ 509 qdio_release_aob(aob); 510 } 511 512 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue) 513 { 514 return card->options.cq == QETH_CQ_ENABLED && 515 card->qdio.c_q != NULL && 516 queue != 0 && 517 queue == card->qdio.no_in_queues - 1; 518 } 519 520 521 static int qeth_issue_next_read(struct qeth_card *card) 522 { 523 int rc; 524 struct qeth_cmd_buffer *iob; 525 526 QETH_CARD_TEXT(card, 5, "issnxrd"); 527 if (card->read.state != CH_STATE_UP) 528 return -EIO; 529 iob = qeth_get_buffer(&card->read); 530 if (!iob) { 531 dev_warn(&card->gdev->dev, "The qeth device driver " 532 "failed to recover an error on the device\n"); 533 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " 534 "available\n", dev_name(&card->gdev->dev)); 535 return -ENOMEM; 536 } 537 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 538 QETH_CARD_TEXT(card, 6, "noirqpnd"); 539 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 540 (addr_t) iob, 0, 0); 541 if (rc) { 542 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " 543 "rc=%i\n", dev_name(&card->gdev->dev), rc); 544 atomic_set(&card->read.irq_pending, 0); 545 card->read_or_write_problem = 1; 546 qeth_schedule_recovery(card); 547 wake_up(&card->wait_q); 548 } 549 return rc; 550 } 551 552 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 553 { 554 struct qeth_reply *reply; 555 556 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 557 if (reply) { 558 atomic_set(&reply->refcnt, 1); 559 atomic_set(&reply->received, 0); 560 reply->card = card; 561 } 562 return reply; 563 } 564 565 static void qeth_get_reply(struct qeth_reply *reply) 566 { 567 WARN_ON(atomic_read(&reply->refcnt) <= 0); 568 atomic_inc(&reply->refcnt); 569 } 570 571 static void qeth_put_reply(struct qeth_reply *reply) 572 { 573 WARN_ON(atomic_read(&reply->refcnt) <= 0); 574 if (atomic_dec_and_test(&reply->refcnt)) 575 kfree(reply); 576 } 577 578 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 579 struct qeth_card *card) 580 { 581 char *ipa_name; 582 int com = cmd->hdr.command; 583 ipa_name = qeth_get_ipa_cmd_name(com); 584 if (rc) 585 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned " 586 "x%X \"%s\"\n", 587 ipa_name, com, dev_name(&card->gdev->dev), 588 QETH_CARD_IFNAME(card), rc, 589 qeth_get_ipa_msg(rc)); 590 else 591 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n", 592 ipa_name, com, dev_name(&card->gdev->dev), 593 QETH_CARD_IFNAME(card)); 594 } 595 596 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 597 struct qeth_cmd_buffer *iob) 598 { 599 struct qeth_ipa_cmd *cmd = NULL; 600 601 QETH_CARD_TEXT(card, 5, "chkipad"); 602 if (IS_IPA(iob->data)) { 603 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 604 if (IS_IPA_REPLY(cmd)) { 605 if (cmd->hdr.command != IPA_CMD_SETCCID && 606 cmd->hdr.command != IPA_CMD_DELCCID && 607 cmd->hdr.command != IPA_CMD_MODCCID && 608 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS) 609 qeth_issue_ipa_msg(cmd, 610 cmd->hdr.return_code, card); 611 return cmd; 612 } else { 613 switch (cmd->hdr.command) { 614 case IPA_CMD_STOPLAN: 615 if (cmd->hdr.return_code == 616 IPA_RC_VEPA_TO_VEB_TRANSITION) { 617 dev_err(&card->gdev->dev, 618 "Interface %s is down because the " 619 "adjacent port is no longer in " 620 "reflective relay mode\n", 621 QETH_CARD_IFNAME(card)); 622 qeth_close_dev(card); 623 } else { 624 dev_warn(&card->gdev->dev, 625 "The link for interface %s on CHPID" 626 " 0x%X failed\n", 627 QETH_CARD_IFNAME(card), 628 card->info.chpid); 629 qeth_issue_ipa_msg(cmd, 630 cmd->hdr.return_code, card); 631 } 632 card->lan_online = 0; 633 if (card->dev && netif_carrier_ok(card->dev)) 634 netif_carrier_off(card->dev); 635 return NULL; 636 case IPA_CMD_STARTLAN: 637 dev_info(&card->gdev->dev, 638 "The link for %s on CHPID 0x%X has" 639 " been restored\n", 640 QETH_CARD_IFNAME(card), 641 card->info.chpid); 642 netif_carrier_on(card->dev); 643 card->lan_online = 1; 644 if (card->info.hwtrap) 645 card->info.hwtrap = 2; 646 qeth_schedule_recovery(card); 647 return NULL; 648 case IPA_CMD_SETBRIDGEPORT: 649 case IPA_CMD_ADDRESS_CHANGE_NOTIF: 650 if (card->discipline->control_event_handler 651 (card, cmd)) 652 return cmd; 653 else 654 return NULL; 655 case IPA_CMD_MODCCID: 656 return cmd; 657 case IPA_CMD_REGISTER_LOCAL_ADDR: 658 QETH_CARD_TEXT(card, 3, "irla"); 659 break; 660 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 661 QETH_CARD_TEXT(card, 3, "urla"); 662 break; 663 default: 664 QETH_DBF_MESSAGE(2, "Received data is IPA " 665 "but not a reply!\n"); 666 break; 667 } 668 } 669 } 670 return cmd; 671 } 672 673 void qeth_clear_ipacmd_list(struct qeth_card *card) 674 { 675 struct qeth_reply *reply, *r; 676 unsigned long flags; 677 678 QETH_CARD_TEXT(card, 4, "clipalst"); 679 680 spin_lock_irqsave(&card->lock, flags); 681 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 682 qeth_get_reply(reply); 683 reply->rc = -EIO; 684 atomic_inc(&reply->received); 685 list_del_init(&reply->list); 686 wake_up(&reply->wait_q); 687 qeth_put_reply(reply); 688 } 689 spin_unlock_irqrestore(&card->lock, flags); 690 atomic_set(&card->write.irq_pending, 0); 691 } 692 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 693 694 static int qeth_check_idx_response(struct qeth_card *card, 695 unsigned char *buffer) 696 { 697 if (!buffer) 698 return 0; 699 700 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 701 if ((buffer[2] & 0xc0) == 0xc0) { 702 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " 703 "with cause code 0x%02x%s\n", 704 buffer[4], 705 ((buffer[4] == 0x22) ? 706 " -- try another portname" : "")); 707 QETH_CARD_TEXT(card, 2, "ckidxres"); 708 QETH_CARD_TEXT(card, 2, " idxterm"); 709 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 710 if (buffer[4] == 0xf6) { 711 dev_err(&card->gdev->dev, 712 "The qeth device is not configured " 713 "for the OSI layer required by z/VM\n"); 714 return -EPERM; 715 } 716 return -EIO; 717 } 718 return 0; 719 } 720 721 static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev) 722 { 723 struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *) 724 dev_get_drvdata(&cdev->dev))->dev); 725 return card; 726 } 727 728 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 729 __u32 len) 730 { 731 struct qeth_card *card; 732 733 card = CARD_FROM_CDEV(channel->ccwdev); 734 QETH_CARD_TEXT(card, 4, "setupccw"); 735 if (channel == &card->read) 736 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 737 else 738 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 739 channel->ccw.count = len; 740 channel->ccw.cda = (__u32) __pa(iob); 741 } 742 743 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 744 { 745 __u8 index; 746 747 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff"); 748 index = channel->io_buf_no; 749 do { 750 if (channel->iob[index].state == BUF_STATE_FREE) { 751 channel->iob[index].state = BUF_STATE_LOCKED; 752 channel->io_buf_no = (channel->io_buf_no + 1) % 753 QETH_CMD_BUFFER_NO; 754 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 755 return channel->iob + index; 756 } 757 index = (index + 1) % QETH_CMD_BUFFER_NO; 758 } while (index != channel->io_buf_no); 759 760 return NULL; 761 } 762 763 void qeth_release_buffer(struct qeth_channel *channel, 764 struct qeth_cmd_buffer *iob) 765 { 766 unsigned long flags; 767 768 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff"); 769 spin_lock_irqsave(&channel->iob_lock, flags); 770 memset(iob->data, 0, QETH_BUFSIZE); 771 iob->state = BUF_STATE_FREE; 772 iob->callback = qeth_send_control_data_cb; 773 iob->rc = 0; 774 spin_unlock_irqrestore(&channel->iob_lock, flags); 775 wake_up(&channel->wait_q); 776 } 777 EXPORT_SYMBOL_GPL(qeth_release_buffer); 778 779 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 780 { 781 struct qeth_cmd_buffer *buffer = NULL; 782 unsigned long flags; 783 784 spin_lock_irqsave(&channel->iob_lock, flags); 785 buffer = __qeth_get_buffer(channel); 786 spin_unlock_irqrestore(&channel->iob_lock, flags); 787 return buffer; 788 } 789 790 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 791 { 792 struct qeth_cmd_buffer *buffer; 793 wait_event(channel->wait_q, 794 ((buffer = qeth_get_buffer(channel)) != NULL)); 795 return buffer; 796 } 797 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 798 799 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 800 { 801 int cnt; 802 803 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 804 qeth_release_buffer(channel, &channel->iob[cnt]); 805 channel->buf_no = 0; 806 channel->io_buf_no = 0; 807 } 808 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 809 810 static void qeth_send_control_data_cb(struct qeth_channel *channel, 811 struct qeth_cmd_buffer *iob) 812 { 813 struct qeth_card *card; 814 struct qeth_reply *reply, *r; 815 struct qeth_ipa_cmd *cmd; 816 unsigned long flags; 817 int keep_reply; 818 int rc = 0; 819 820 card = CARD_FROM_CDEV(channel->ccwdev); 821 QETH_CARD_TEXT(card, 4, "sndctlcb"); 822 rc = qeth_check_idx_response(card, iob->data); 823 switch (rc) { 824 case 0: 825 break; 826 case -EIO: 827 qeth_clear_ipacmd_list(card); 828 qeth_schedule_recovery(card); 829 /* fall through */ 830 default: 831 goto out; 832 } 833 834 cmd = qeth_check_ipa_data(card, iob); 835 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 836 goto out; 837 /*in case of OSN : check if cmd is set */ 838 if (card->info.type == QETH_CARD_TYPE_OSN && 839 cmd && 840 cmd->hdr.command != IPA_CMD_STARTLAN && 841 card->osn_info.assist_cb != NULL) { 842 card->osn_info.assist_cb(card->dev, cmd); 843 goto out; 844 } 845 846 spin_lock_irqsave(&card->lock, flags); 847 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 848 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 849 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 850 qeth_get_reply(reply); 851 list_del_init(&reply->list); 852 spin_unlock_irqrestore(&card->lock, flags); 853 keep_reply = 0; 854 if (reply->callback != NULL) { 855 if (cmd) { 856 reply->offset = (__u16)((char *)cmd - 857 (char *)iob->data); 858 keep_reply = reply->callback(card, 859 reply, 860 (unsigned long)cmd); 861 } else 862 keep_reply = reply->callback(card, 863 reply, 864 (unsigned long)iob); 865 } 866 if (cmd) 867 reply->rc = (u16) cmd->hdr.return_code; 868 else if (iob->rc) 869 reply->rc = iob->rc; 870 if (keep_reply) { 871 spin_lock_irqsave(&card->lock, flags); 872 list_add_tail(&reply->list, 873 &card->cmd_waiter_list); 874 spin_unlock_irqrestore(&card->lock, flags); 875 } else { 876 atomic_inc(&reply->received); 877 wake_up(&reply->wait_q); 878 } 879 qeth_put_reply(reply); 880 goto out; 881 } 882 } 883 spin_unlock_irqrestore(&card->lock, flags); 884 out: 885 memcpy(&card->seqno.pdu_hdr_ack, 886 QETH_PDU_HEADER_SEQ_NO(iob->data), 887 QETH_SEQ_NO_LENGTH); 888 qeth_release_buffer(channel, iob); 889 } 890 891 static int qeth_setup_channel(struct qeth_channel *channel) 892 { 893 int cnt; 894 895 QETH_DBF_TEXT(SETUP, 2, "setupch"); 896 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 897 channel->iob[cnt].data = 898 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 899 if (channel->iob[cnt].data == NULL) 900 break; 901 channel->iob[cnt].state = BUF_STATE_FREE; 902 channel->iob[cnt].channel = channel; 903 channel->iob[cnt].callback = qeth_send_control_data_cb; 904 channel->iob[cnt].rc = 0; 905 } 906 if (cnt < QETH_CMD_BUFFER_NO) { 907 while (cnt-- > 0) 908 kfree(channel->iob[cnt].data); 909 return -ENOMEM; 910 } 911 channel->buf_no = 0; 912 channel->io_buf_no = 0; 913 atomic_set(&channel->irq_pending, 0); 914 spin_lock_init(&channel->iob_lock); 915 916 init_waitqueue_head(&channel->wait_q); 917 return 0; 918 } 919 920 static int qeth_set_thread_start_bit(struct qeth_card *card, 921 unsigned long thread) 922 { 923 unsigned long flags; 924 925 spin_lock_irqsave(&card->thread_mask_lock, flags); 926 if (!(card->thread_allowed_mask & thread) || 927 (card->thread_start_mask & thread)) { 928 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 929 return -EPERM; 930 } 931 card->thread_start_mask |= thread; 932 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 933 return 0; 934 } 935 936 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 937 { 938 unsigned long flags; 939 940 spin_lock_irqsave(&card->thread_mask_lock, flags); 941 card->thread_start_mask &= ~thread; 942 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 943 wake_up(&card->wait_q); 944 } 945 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 946 947 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 948 { 949 unsigned long flags; 950 951 spin_lock_irqsave(&card->thread_mask_lock, flags); 952 card->thread_running_mask &= ~thread; 953 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 954 wake_up(&card->wait_q); 955 } 956 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 957 958 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 959 { 960 unsigned long flags; 961 int rc = 0; 962 963 spin_lock_irqsave(&card->thread_mask_lock, flags); 964 if (card->thread_start_mask & thread) { 965 if ((card->thread_allowed_mask & thread) && 966 !(card->thread_running_mask & thread)) { 967 rc = 1; 968 card->thread_start_mask &= ~thread; 969 card->thread_running_mask |= thread; 970 } else 971 rc = -EPERM; 972 } 973 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 974 return rc; 975 } 976 977 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 978 { 979 int rc = 0; 980 981 wait_event(card->wait_q, 982 (rc = __qeth_do_run_thread(card, thread)) >= 0); 983 return rc; 984 } 985 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 986 987 void qeth_schedule_recovery(struct qeth_card *card) 988 { 989 QETH_CARD_TEXT(card, 2, "startrec"); 990 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 991 schedule_work(&card->kernel_thread_starter); 992 } 993 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 994 995 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 996 { 997 int dstat, cstat; 998 char *sense; 999 struct qeth_card *card; 1000 1001 sense = (char *) irb->ecw; 1002 cstat = irb->scsw.cmd.cstat; 1003 dstat = irb->scsw.cmd.dstat; 1004 card = CARD_FROM_CDEV(cdev); 1005 1006 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 1007 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 1008 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 1009 QETH_CARD_TEXT(card, 2, "CGENCHK"); 1010 dev_warn(&cdev->dev, "The qeth device driver " 1011 "failed to recover an error on the device\n"); 1012 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n", 1013 dev_name(&cdev->dev), dstat, cstat); 1014 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 1015 16, 1, irb, 64, 1); 1016 return 1; 1017 } 1018 1019 if (dstat & DEV_STAT_UNIT_CHECK) { 1020 if (sense[SENSE_RESETTING_EVENT_BYTE] & 1021 SENSE_RESETTING_EVENT_FLAG) { 1022 QETH_CARD_TEXT(card, 2, "REVIND"); 1023 return 1; 1024 } 1025 if (sense[SENSE_COMMAND_REJECT_BYTE] & 1026 SENSE_COMMAND_REJECT_FLAG) { 1027 QETH_CARD_TEXT(card, 2, "CMDREJi"); 1028 return 1; 1029 } 1030 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 1031 QETH_CARD_TEXT(card, 2, "AFFE"); 1032 return 1; 1033 } 1034 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 1035 QETH_CARD_TEXT(card, 2, "ZEROSEN"); 1036 return 0; 1037 } 1038 QETH_CARD_TEXT(card, 2, "DGENCHK"); 1039 return 1; 1040 } 1041 return 0; 1042 } 1043 1044 static long __qeth_check_irb_error(struct ccw_device *cdev, 1045 unsigned long intparm, struct irb *irb) 1046 { 1047 struct qeth_card *card; 1048 1049 card = CARD_FROM_CDEV(cdev); 1050 1051 if (!card || !IS_ERR(irb)) 1052 return 0; 1053 1054 switch (PTR_ERR(irb)) { 1055 case -EIO: 1056 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", 1057 dev_name(&cdev->dev)); 1058 QETH_CARD_TEXT(card, 2, "ckirberr"); 1059 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 1060 break; 1061 case -ETIMEDOUT: 1062 dev_warn(&cdev->dev, "A hardware operation timed out" 1063 " on the device\n"); 1064 QETH_CARD_TEXT(card, 2, "ckirberr"); 1065 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT); 1066 if (intparm == QETH_RCD_PARM) { 1067 if (card->data.ccwdev == cdev) { 1068 card->data.state = CH_STATE_DOWN; 1069 wake_up(&card->wait_q); 1070 } 1071 } 1072 break; 1073 default: 1074 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", 1075 dev_name(&cdev->dev), PTR_ERR(irb)); 1076 QETH_CARD_TEXT(card, 2, "ckirberr"); 1077 QETH_CARD_TEXT(card, 2, " rc???"); 1078 } 1079 return PTR_ERR(irb); 1080 } 1081 1082 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 1083 struct irb *irb) 1084 { 1085 int rc; 1086 int cstat, dstat; 1087 struct qeth_cmd_buffer *buffer; 1088 struct qeth_channel *channel; 1089 struct qeth_card *card; 1090 struct qeth_cmd_buffer *iob; 1091 __u8 index; 1092 1093 if (__qeth_check_irb_error(cdev, intparm, irb)) 1094 return; 1095 cstat = irb->scsw.cmd.cstat; 1096 dstat = irb->scsw.cmd.dstat; 1097 1098 card = CARD_FROM_CDEV(cdev); 1099 if (!card) 1100 return; 1101 1102 QETH_CARD_TEXT(card, 5, "irq"); 1103 1104 if (card->read.ccwdev == cdev) { 1105 channel = &card->read; 1106 QETH_CARD_TEXT(card, 5, "read"); 1107 } else if (card->write.ccwdev == cdev) { 1108 channel = &card->write; 1109 QETH_CARD_TEXT(card, 5, "write"); 1110 } else { 1111 channel = &card->data; 1112 QETH_CARD_TEXT(card, 5, "data"); 1113 } 1114 atomic_set(&channel->irq_pending, 0); 1115 1116 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 1117 channel->state = CH_STATE_STOPPED; 1118 1119 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 1120 channel->state = CH_STATE_HALTED; 1121 1122 /*let's wake up immediately on data channel*/ 1123 if ((channel == &card->data) && (intparm != 0) && 1124 (intparm != QETH_RCD_PARM)) 1125 goto out; 1126 1127 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 1128 QETH_CARD_TEXT(card, 6, "clrchpar"); 1129 /* we don't have to handle this further */ 1130 intparm = 0; 1131 } 1132 if (intparm == QETH_HALT_CHANNEL_PARM) { 1133 QETH_CARD_TEXT(card, 6, "hltchpar"); 1134 /* we don't have to handle this further */ 1135 intparm = 0; 1136 } 1137 if ((dstat & DEV_STAT_UNIT_EXCEP) || 1138 (dstat & DEV_STAT_UNIT_CHECK) || 1139 (cstat)) { 1140 if (irb->esw.esw0.erw.cons) { 1141 dev_warn(&channel->ccwdev->dev, 1142 "The qeth device driver failed to recover " 1143 "an error on the device\n"); 1144 QETH_DBF_MESSAGE(2, "%s sense data available. cstat " 1145 "0x%X dstat 0x%X\n", 1146 dev_name(&channel->ccwdev->dev), cstat, dstat); 1147 print_hex_dump(KERN_WARNING, "qeth: irb ", 1148 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 1149 print_hex_dump(KERN_WARNING, "qeth: sense data ", 1150 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 1151 } 1152 if (intparm == QETH_RCD_PARM) { 1153 channel->state = CH_STATE_DOWN; 1154 goto out; 1155 } 1156 rc = qeth_get_problem(cdev, irb); 1157 if (rc) { 1158 qeth_clear_ipacmd_list(card); 1159 qeth_schedule_recovery(card); 1160 goto out; 1161 } 1162 } 1163 1164 if (intparm == QETH_RCD_PARM) { 1165 channel->state = CH_STATE_RCD_DONE; 1166 goto out; 1167 } 1168 if (intparm) { 1169 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 1170 buffer->state = BUF_STATE_PROCESSED; 1171 } 1172 if (channel == &card->data) 1173 return; 1174 if (channel == &card->read && 1175 channel->state == CH_STATE_UP) 1176 qeth_issue_next_read(card); 1177 1178 iob = channel->iob; 1179 index = channel->buf_no; 1180 while (iob[index].state == BUF_STATE_PROCESSED) { 1181 if (iob[index].callback != NULL) 1182 iob[index].callback(channel, iob + index); 1183 1184 index = (index + 1) % QETH_CMD_BUFFER_NO; 1185 } 1186 channel->buf_no = index; 1187 out: 1188 wake_up(&card->wait_q); 1189 return; 1190 } 1191 1192 static void qeth_notify_skbs(struct qeth_qdio_out_q *q, 1193 struct qeth_qdio_out_buffer *buf, 1194 enum iucv_tx_notify notification) 1195 { 1196 struct sk_buff *skb; 1197 1198 if (skb_queue_empty(&buf->skb_list)) 1199 goto out; 1200 skb = skb_peek(&buf->skb_list); 1201 while (skb) { 1202 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification); 1203 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb); 1204 if (skb->protocol == ETH_P_AF_IUCV) { 1205 if (skb->sk) { 1206 struct iucv_sock *iucv = iucv_sk(skb->sk); 1207 iucv->sk_txnotify(skb, notification); 1208 } 1209 } 1210 if (skb_queue_is_last(&buf->skb_list, skb)) 1211 skb = NULL; 1212 else 1213 skb = skb_queue_next(&buf->skb_list, skb); 1214 } 1215 out: 1216 return; 1217 } 1218 1219 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf) 1220 { 1221 struct sk_buff *skb; 1222 struct iucv_sock *iucv; 1223 int notify_general_error = 0; 1224 1225 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING) 1226 notify_general_error = 1; 1227 1228 /* release may never happen from within CQ tasklet scope */ 1229 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ); 1230 1231 skb = skb_dequeue(&buf->skb_list); 1232 while (skb) { 1233 QETH_CARD_TEXT(buf->q->card, 5, "skbr"); 1234 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb); 1235 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) { 1236 if (skb->sk) { 1237 iucv = iucv_sk(skb->sk); 1238 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR); 1239 } 1240 } 1241 atomic_dec(&skb->users); 1242 dev_kfree_skb_any(skb); 1243 skb = skb_dequeue(&buf->skb_list); 1244 } 1245 } 1246 1247 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 1248 struct qeth_qdio_out_buffer *buf, 1249 enum qeth_qdio_buffer_states newbufstate) 1250 { 1251 int i; 1252 1253 /* is PCI flag set on buffer? */ 1254 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ) 1255 atomic_dec(&queue->set_pci_flags_count); 1256 1257 if (newbufstate == QETH_QDIO_BUF_EMPTY) { 1258 qeth_release_skbs(buf); 1259 } 1260 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 1261 if (buf->buffer->element[i].addr && buf->is_header[i]) 1262 kmem_cache_free(qeth_core_header_cache, 1263 buf->buffer->element[i].addr); 1264 buf->is_header[i] = 0; 1265 buf->buffer->element[i].length = 0; 1266 buf->buffer->element[i].addr = NULL; 1267 buf->buffer->element[i].eflags = 0; 1268 buf->buffer->element[i].sflags = 0; 1269 } 1270 buf->buffer->element[15].eflags = 0; 1271 buf->buffer->element[15].sflags = 0; 1272 buf->next_element_to_fill = 0; 1273 atomic_set(&buf->state, newbufstate); 1274 } 1275 1276 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free) 1277 { 1278 int j; 1279 1280 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 1281 if (!q->bufs[j]) 1282 continue; 1283 qeth_cleanup_handled_pending(q, j, 1); 1284 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY); 1285 if (free) { 1286 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]); 1287 q->bufs[j] = NULL; 1288 } 1289 } 1290 } 1291 1292 void qeth_clear_qdio_buffers(struct qeth_card *card) 1293 { 1294 int i; 1295 1296 QETH_CARD_TEXT(card, 2, "clearqdbf"); 1297 /* clear outbound buffers to free skbs */ 1298 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1299 if (card->qdio.out_qs[i]) { 1300 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0); 1301 } 1302 } 1303 } 1304 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 1305 1306 static void qeth_free_buffer_pool(struct qeth_card *card) 1307 { 1308 struct qeth_buffer_pool_entry *pool_entry, *tmp; 1309 int i = 0; 1310 list_for_each_entry_safe(pool_entry, tmp, 1311 &card->qdio.init_pool.entry_list, init_list){ 1312 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 1313 free_page((unsigned long)pool_entry->elements[i]); 1314 list_del(&pool_entry->init_list); 1315 kfree(pool_entry); 1316 } 1317 } 1318 1319 static void qeth_clean_channel(struct qeth_channel *channel) 1320 { 1321 int cnt; 1322 1323 QETH_DBF_TEXT(SETUP, 2, "freech"); 1324 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 1325 kfree(channel->iob[cnt].data); 1326 } 1327 1328 static void qeth_set_single_write_queues(struct qeth_card *card) 1329 { 1330 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1331 (card->qdio.no_out_queues == 4)) 1332 qeth_free_qdio_buffers(card); 1333 1334 card->qdio.no_out_queues = 1; 1335 if (card->qdio.default_out_queue != 0) 1336 dev_info(&card->gdev->dev, "Priority Queueing not supported\n"); 1337 1338 card->qdio.default_out_queue = 0; 1339 } 1340 1341 static void qeth_set_multiple_write_queues(struct qeth_card *card) 1342 { 1343 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1344 (card->qdio.no_out_queues == 1)) { 1345 qeth_free_qdio_buffers(card); 1346 card->qdio.default_out_queue = 2; 1347 } 1348 card->qdio.no_out_queues = 4; 1349 } 1350 1351 static void qeth_update_from_chp_desc(struct qeth_card *card) 1352 { 1353 struct ccw_device *ccwdev; 1354 struct channel_path_desc *chp_dsc; 1355 1356 QETH_DBF_TEXT(SETUP, 2, "chp_desc"); 1357 1358 ccwdev = card->data.ccwdev; 1359 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0); 1360 if (!chp_dsc) 1361 goto out; 1362 1363 card->info.func_level = 0x4100 + chp_dsc->desc; 1364 if (card->info.type == QETH_CARD_TYPE_IQD) 1365 goto out; 1366 1367 /* CHPP field bit 6 == 1 -> single queue */ 1368 if ((chp_dsc->chpp & 0x02) == 0x02) 1369 qeth_set_single_write_queues(card); 1370 else 1371 qeth_set_multiple_write_queues(card); 1372 out: 1373 kfree(chp_dsc); 1374 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); 1375 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); 1376 } 1377 1378 static void qeth_init_qdio_info(struct qeth_card *card) 1379 { 1380 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1381 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1382 /* inbound */ 1383 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1384 if (card->info.type == QETH_CARD_TYPE_IQD) 1385 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT; 1386 else 1387 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1388 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1389 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1390 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1391 } 1392 1393 static void qeth_set_intial_options(struct qeth_card *card) 1394 { 1395 card->options.route4.type = NO_ROUTER; 1396 card->options.route6.type = NO_ROUTER; 1397 card->options.fake_broadcast = 0; 1398 card->options.add_hhlen = DEFAULT_ADD_HHLEN; 1399 card->options.performance_stats = 0; 1400 card->options.rx_sg_cb = QETH_RX_SG_CB; 1401 card->options.isolation = ISOLATION_MODE_NONE; 1402 card->options.cq = QETH_CQ_DISABLED; 1403 } 1404 1405 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1406 { 1407 unsigned long flags; 1408 int rc = 0; 1409 1410 spin_lock_irqsave(&card->thread_mask_lock, flags); 1411 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x", 1412 (u8) card->thread_start_mask, 1413 (u8) card->thread_allowed_mask, 1414 (u8) card->thread_running_mask); 1415 rc = (card->thread_start_mask & thread); 1416 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1417 return rc; 1418 } 1419 1420 static void qeth_start_kernel_thread(struct work_struct *work) 1421 { 1422 struct task_struct *ts; 1423 struct qeth_card *card = container_of(work, struct qeth_card, 1424 kernel_thread_starter); 1425 QETH_CARD_TEXT(card , 2, "strthrd"); 1426 1427 if (card->read.state != CH_STATE_UP && 1428 card->write.state != CH_STATE_UP) 1429 return; 1430 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) { 1431 ts = kthread_run(card->discipline->recover, (void *)card, 1432 "qeth_recover"); 1433 if (IS_ERR(ts)) { 1434 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD); 1435 qeth_clear_thread_running_bit(card, 1436 QETH_RECOVER_THREAD); 1437 } 1438 } 1439 } 1440 1441 static void qeth_buffer_reclaim_work(struct work_struct *); 1442 static int qeth_setup_card(struct qeth_card *card) 1443 { 1444 1445 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1446 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1447 1448 card->read.state = CH_STATE_DOWN; 1449 card->write.state = CH_STATE_DOWN; 1450 card->data.state = CH_STATE_DOWN; 1451 card->state = CARD_STATE_DOWN; 1452 card->lan_online = 0; 1453 card->read_or_write_problem = 0; 1454 card->dev = NULL; 1455 spin_lock_init(&card->vlanlock); 1456 spin_lock_init(&card->mclock); 1457 spin_lock_init(&card->lock); 1458 spin_lock_init(&card->ip_lock); 1459 spin_lock_init(&card->thread_mask_lock); 1460 mutex_init(&card->conf_mutex); 1461 mutex_init(&card->discipline_mutex); 1462 card->thread_start_mask = 0; 1463 card->thread_allowed_mask = 0; 1464 card->thread_running_mask = 0; 1465 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1466 INIT_LIST_HEAD(&card->ip_list); 1467 INIT_LIST_HEAD(card->ip_tbd_list); 1468 INIT_LIST_HEAD(&card->cmd_waiter_list); 1469 init_waitqueue_head(&card->wait_q); 1470 /* initial options */ 1471 qeth_set_intial_options(card); 1472 /* IP address takeover */ 1473 INIT_LIST_HEAD(&card->ipato.entries); 1474 card->ipato.enabled = 0; 1475 card->ipato.invert4 = 0; 1476 card->ipato.invert6 = 0; 1477 /* init QDIO stuff */ 1478 qeth_init_qdio_info(card); 1479 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work); 1480 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler); 1481 return 0; 1482 } 1483 1484 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) 1485 { 1486 struct qeth_card *card = container_of(slr, struct qeth_card, 1487 qeth_service_level); 1488 if (card->info.mcl_level[0]) 1489 seq_printf(m, "qeth: %s firmware level %s\n", 1490 CARD_BUS_ID(card), card->info.mcl_level); 1491 } 1492 1493 static struct qeth_card *qeth_alloc_card(void) 1494 { 1495 struct qeth_card *card; 1496 1497 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1498 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1499 if (!card) 1500 goto out; 1501 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1502 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL); 1503 if (!card->ip_tbd_list) { 1504 QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); 1505 goto out_card; 1506 } 1507 if (qeth_setup_channel(&card->read)) 1508 goto out_ip; 1509 if (qeth_setup_channel(&card->write)) 1510 goto out_channel; 1511 card->options.layer2 = -1; 1512 card->qeth_service_level.seq_print = qeth_core_sl_print; 1513 register_service_level(&card->qeth_service_level); 1514 return card; 1515 1516 out_channel: 1517 qeth_clean_channel(&card->read); 1518 out_ip: 1519 kfree(card->ip_tbd_list); 1520 out_card: 1521 kfree(card); 1522 out: 1523 return NULL; 1524 } 1525 1526 static int qeth_determine_card_type(struct qeth_card *card) 1527 { 1528 int i = 0; 1529 1530 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1531 1532 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1533 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1534 while (known_devices[i][QETH_DEV_MODEL_IND]) { 1535 if ((CARD_RDEV(card)->id.dev_type == 1536 known_devices[i][QETH_DEV_TYPE_IND]) && 1537 (CARD_RDEV(card)->id.dev_model == 1538 known_devices[i][QETH_DEV_MODEL_IND])) { 1539 card->info.type = known_devices[i][QETH_DEV_MODEL_IND]; 1540 card->qdio.no_out_queues = 1541 known_devices[i][QETH_QUEUE_NO_IND]; 1542 card->qdio.no_in_queues = 1; 1543 card->info.is_multicast_different = 1544 known_devices[i][QETH_MULTICAST_IND]; 1545 qeth_update_from_chp_desc(card); 1546 return 0; 1547 } 1548 i++; 1549 } 1550 card->info.type = QETH_CARD_TYPE_UNKNOWN; 1551 dev_err(&card->gdev->dev, "The adapter hardware is of an " 1552 "unknown type\n"); 1553 return -ENOENT; 1554 } 1555 1556 static int qeth_clear_channel(struct qeth_channel *channel) 1557 { 1558 unsigned long flags; 1559 struct qeth_card *card; 1560 int rc; 1561 1562 card = CARD_FROM_CDEV(channel->ccwdev); 1563 QETH_CARD_TEXT(card, 3, "clearch"); 1564 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1565 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1566 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1567 1568 if (rc) 1569 return rc; 1570 rc = wait_event_interruptible_timeout(card->wait_q, 1571 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1572 if (rc == -ERESTARTSYS) 1573 return rc; 1574 if (channel->state != CH_STATE_STOPPED) 1575 return -ETIME; 1576 channel->state = CH_STATE_DOWN; 1577 return 0; 1578 } 1579 1580 static int qeth_halt_channel(struct qeth_channel *channel) 1581 { 1582 unsigned long flags; 1583 struct qeth_card *card; 1584 int rc; 1585 1586 card = CARD_FROM_CDEV(channel->ccwdev); 1587 QETH_CARD_TEXT(card, 3, "haltch"); 1588 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1589 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1590 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1591 1592 if (rc) 1593 return rc; 1594 rc = wait_event_interruptible_timeout(card->wait_q, 1595 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1596 if (rc == -ERESTARTSYS) 1597 return rc; 1598 if (channel->state != CH_STATE_HALTED) 1599 return -ETIME; 1600 return 0; 1601 } 1602 1603 static int qeth_halt_channels(struct qeth_card *card) 1604 { 1605 int rc1 = 0, rc2 = 0, rc3 = 0; 1606 1607 QETH_CARD_TEXT(card, 3, "haltchs"); 1608 rc1 = qeth_halt_channel(&card->read); 1609 rc2 = qeth_halt_channel(&card->write); 1610 rc3 = qeth_halt_channel(&card->data); 1611 if (rc1) 1612 return rc1; 1613 if (rc2) 1614 return rc2; 1615 return rc3; 1616 } 1617 1618 static int qeth_clear_channels(struct qeth_card *card) 1619 { 1620 int rc1 = 0, rc2 = 0, rc3 = 0; 1621 1622 QETH_CARD_TEXT(card, 3, "clearchs"); 1623 rc1 = qeth_clear_channel(&card->read); 1624 rc2 = qeth_clear_channel(&card->write); 1625 rc3 = qeth_clear_channel(&card->data); 1626 if (rc1) 1627 return rc1; 1628 if (rc2) 1629 return rc2; 1630 return rc3; 1631 } 1632 1633 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1634 { 1635 int rc = 0; 1636 1637 QETH_CARD_TEXT(card, 3, "clhacrd"); 1638 1639 if (halt) 1640 rc = qeth_halt_channels(card); 1641 if (rc) 1642 return rc; 1643 return qeth_clear_channels(card); 1644 } 1645 1646 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1647 { 1648 int rc = 0; 1649 1650 QETH_CARD_TEXT(card, 3, "qdioclr"); 1651 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1652 QETH_QDIO_CLEANING)) { 1653 case QETH_QDIO_ESTABLISHED: 1654 if (card->info.type == QETH_CARD_TYPE_IQD) 1655 rc = qdio_shutdown(CARD_DDEV(card), 1656 QDIO_FLAG_CLEANUP_USING_HALT); 1657 else 1658 rc = qdio_shutdown(CARD_DDEV(card), 1659 QDIO_FLAG_CLEANUP_USING_CLEAR); 1660 if (rc) 1661 QETH_CARD_TEXT_(card, 3, "1err%d", rc); 1662 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1663 break; 1664 case QETH_QDIO_CLEANING: 1665 return rc; 1666 default: 1667 break; 1668 } 1669 rc = qeth_clear_halt_card(card, use_halt); 1670 if (rc) 1671 QETH_CARD_TEXT_(card, 3, "2err%d", rc); 1672 card->state = CARD_STATE_DOWN; 1673 return rc; 1674 } 1675 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1676 1677 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1678 int *length) 1679 { 1680 struct ciw *ciw; 1681 char *rcd_buf; 1682 int ret; 1683 struct qeth_channel *channel = &card->data; 1684 unsigned long flags; 1685 1686 /* 1687 * scan for RCD command in extended SenseID data 1688 */ 1689 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1690 if (!ciw || ciw->cmd == 0) 1691 return -EOPNOTSUPP; 1692 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1693 if (!rcd_buf) 1694 return -ENOMEM; 1695 1696 channel->ccw.cmd_code = ciw->cmd; 1697 channel->ccw.cda = (__u32) __pa(rcd_buf); 1698 channel->ccw.count = ciw->count; 1699 channel->ccw.flags = CCW_FLAG_SLI; 1700 channel->state = CH_STATE_RCD; 1701 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1702 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1703 QETH_RCD_PARM, LPM_ANYPATH, 0, 1704 QETH_RCD_TIMEOUT); 1705 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1706 if (!ret) 1707 wait_event(card->wait_q, 1708 (channel->state == CH_STATE_RCD_DONE || 1709 channel->state == CH_STATE_DOWN)); 1710 if (channel->state == CH_STATE_DOWN) 1711 ret = -EIO; 1712 else 1713 channel->state = CH_STATE_DOWN; 1714 if (ret) { 1715 kfree(rcd_buf); 1716 *buffer = NULL; 1717 *length = 0; 1718 } else { 1719 *length = ciw->count; 1720 *buffer = rcd_buf; 1721 } 1722 return ret; 1723 } 1724 1725 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd) 1726 { 1727 QETH_DBF_TEXT(SETUP, 2, "cfgunit"); 1728 card->info.chpid = prcd[30]; 1729 card->info.unit_addr2 = prcd[31]; 1730 card->info.cula = prcd[63]; 1731 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1732 (prcd[0x11] == _ascebc['M'])); 1733 } 1734 1735 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd) 1736 { 1737 QETH_DBF_TEXT(SETUP, 2, "cfgblkt"); 1738 1739 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && 1740 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) { 1741 card->info.blkt.time_total = 0; 1742 card->info.blkt.inter_packet = 0; 1743 card->info.blkt.inter_packet_jumbo = 0; 1744 } else { 1745 card->info.blkt.time_total = 250; 1746 card->info.blkt.inter_packet = 5; 1747 card->info.blkt.inter_packet_jumbo = 15; 1748 } 1749 } 1750 1751 static void qeth_init_tokens(struct qeth_card *card) 1752 { 1753 card->token.issuer_rm_w = 0x00010103UL; 1754 card->token.cm_filter_w = 0x00010108UL; 1755 card->token.cm_connection_w = 0x0001010aUL; 1756 card->token.ulp_filter_w = 0x0001010bUL; 1757 card->token.ulp_connection_w = 0x0001010dUL; 1758 } 1759 1760 static void qeth_init_func_level(struct qeth_card *card) 1761 { 1762 switch (card->info.type) { 1763 case QETH_CARD_TYPE_IQD: 1764 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD; 1765 break; 1766 case QETH_CARD_TYPE_OSD: 1767 case QETH_CARD_TYPE_OSN: 1768 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD; 1769 break; 1770 default: 1771 break; 1772 } 1773 } 1774 1775 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1776 void (*idx_reply_cb)(struct qeth_channel *, 1777 struct qeth_cmd_buffer *)) 1778 { 1779 struct qeth_cmd_buffer *iob; 1780 unsigned long flags; 1781 int rc; 1782 struct qeth_card *card; 1783 1784 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1785 card = CARD_FROM_CDEV(channel->ccwdev); 1786 iob = qeth_get_buffer(channel); 1787 if (!iob) 1788 return -ENOMEM; 1789 iob->callback = idx_reply_cb; 1790 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1791 channel->ccw.count = QETH_BUFSIZE; 1792 channel->ccw.cda = (__u32) __pa(iob->data); 1793 1794 wait_event(card->wait_q, 1795 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1796 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1797 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1798 rc = ccw_device_start(channel->ccwdev, 1799 &channel->ccw, (addr_t) iob, 0, 0); 1800 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1801 1802 if (rc) { 1803 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1804 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1805 atomic_set(&channel->irq_pending, 0); 1806 wake_up(&card->wait_q); 1807 return rc; 1808 } 1809 rc = wait_event_interruptible_timeout(card->wait_q, 1810 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1811 if (rc == -ERESTARTSYS) 1812 return rc; 1813 if (channel->state != CH_STATE_UP) { 1814 rc = -ETIME; 1815 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1816 qeth_clear_cmd_buffers(channel); 1817 } else 1818 rc = 0; 1819 return rc; 1820 } 1821 1822 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1823 void (*idx_reply_cb)(struct qeth_channel *, 1824 struct qeth_cmd_buffer *)) 1825 { 1826 struct qeth_card *card; 1827 struct qeth_cmd_buffer *iob; 1828 unsigned long flags; 1829 __u16 temp; 1830 __u8 tmp; 1831 int rc; 1832 struct ccw_dev_id temp_devid; 1833 1834 card = CARD_FROM_CDEV(channel->ccwdev); 1835 1836 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1837 1838 iob = qeth_get_buffer(channel); 1839 if (!iob) 1840 return -ENOMEM; 1841 iob->callback = idx_reply_cb; 1842 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1843 channel->ccw.count = IDX_ACTIVATE_SIZE; 1844 channel->ccw.cda = (__u32) __pa(iob->data); 1845 if (channel == &card->write) { 1846 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1847 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1848 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1849 card->seqno.trans_hdr++; 1850 } else { 1851 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1852 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1853 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1854 } 1855 tmp = ((__u8)card->info.portno) | 0x80; 1856 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1857 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1858 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1859 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1860 &card->info.func_level, sizeof(__u16)); 1861 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1862 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1863 temp = (card->info.cula << 8) + card->info.unit_addr2; 1864 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1865 1866 wait_event(card->wait_q, 1867 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1868 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1869 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1870 rc = ccw_device_start(channel->ccwdev, 1871 &channel->ccw, (addr_t) iob, 0, 0); 1872 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1873 1874 if (rc) { 1875 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1876 rc); 1877 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1878 atomic_set(&channel->irq_pending, 0); 1879 wake_up(&card->wait_q); 1880 return rc; 1881 } 1882 rc = wait_event_interruptible_timeout(card->wait_q, 1883 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1884 if (rc == -ERESTARTSYS) 1885 return rc; 1886 if (channel->state != CH_STATE_ACTIVATING) { 1887 dev_warn(&channel->ccwdev->dev, "The qeth device driver" 1888 " failed to recover an error on the device\n"); 1889 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", 1890 dev_name(&channel->ccwdev->dev)); 1891 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1892 qeth_clear_cmd_buffers(channel); 1893 return -ETIME; 1894 } 1895 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1896 } 1897 1898 static int qeth_peer_func_level(int level) 1899 { 1900 if ((level & 0xff) == 8) 1901 return (level & 0xff) + 0x400; 1902 if (((level >> 8) & 3) == 1) 1903 return (level & 0xff) + 0x200; 1904 return level; 1905 } 1906 1907 static void qeth_idx_write_cb(struct qeth_channel *channel, 1908 struct qeth_cmd_buffer *iob) 1909 { 1910 struct qeth_card *card; 1911 __u16 temp; 1912 1913 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1914 1915 if (channel->state == CH_STATE_DOWN) { 1916 channel->state = CH_STATE_ACTIVATING; 1917 goto out; 1918 } 1919 card = CARD_FROM_CDEV(channel->ccwdev); 1920 1921 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1922 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL) 1923 dev_err(&card->write.ccwdev->dev, 1924 "The adapter is used exclusively by another " 1925 "host\n"); 1926 else 1927 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" 1928 " negative reply\n", 1929 dev_name(&card->write.ccwdev->dev)); 1930 goto out; 1931 } 1932 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1933 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1934 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " 1935 "function level mismatch (sent: 0x%x, received: " 1936 "0x%x)\n", dev_name(&card->write.ccwdev->dev), 1937 card->info.func_level, temp); 1938 goto out; 1939 } 1940 channel->state = CH_STATE_UP; 1941 out: 1942 qeth_release_buffer(channel, iob); 1943 } 1944 1945 static void qeth_idx_read_cb(struct qeth_channel *channel, 1946 struct qeth_cmd_buffer *iob) 1947 { 1948 struct qeth_card *card; 1949 __u16 temp; 1950 1951 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1952 if (channel->state == CH_STATE_DOWN) { 1953 channel->state = CH_STATE_ACTIVATING; 1954 goto out; 1955 } 1956 1957 card = CARD_FROM_CDEV(channel->ccwdev); 1958 if (qeth_check_idx_response(card, iob->data)) 1959 goto out; 1960 1961 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1962 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) { 1963 case QETH_IDX_ACT_ERR_EXCL: 1964 dev_err(&card->write.ccwdev->dev, 1965 "The adapter is used exclusively by another " 1966 "host\n"); 1967 break; 1968 case QETH_IDX_ACT_ERR_AUTH: 1969 case QETH_IDX_ACT_ERR_AUTH_USER: 1970 dev_err(&card->read.ccwdev->dev, 1971 "Setting the device online failed because of " 1972 "insufficient authorization\n"); 1973 break; 1974 default: 1975 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" 1976 " negative reply\n", 1977 dev_name(&card->read.ccwdev->dev)); 1978 } 1979 QETH_CARD_TEXT_(card, 2, "idxread%c", 1980 QETH_IDX_ACT_CAUSE_CODE(iob->data)); 1981 goto out; 1982 } 1983 1984 /** 1985 * * temporary fix for microcode bug 1986 * * to revert it,replace OR by AND 1987 * */ 1988 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) || 1989 (card->info.type == QETH_CARD_TYPE_OSD)) 1990 card->info.portname_required = 1; 1991 1992 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1993 if (temp != qeth_peer_func_level(card->info.func_level)) { 1994 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " 1995 "level mismatch (sent: 0x%x, received: 0x%x)\n", 1996 dev_name(&card->read.ccwdev->dev), 1997 card->info.func_level, temp); 1998 goto out; 1999 } 2000 memcpy(&card->token.issuer_rm_r, 2001 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 2002 QETH_MPC_TOKEN_LENGTH); 2003 memcpy(&card->info.mcl_level[0], 2004 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 2005 channel->state = CH_STATE_UP; 2006 out: 2007 qeth_release_buffer(channel, iob); 2008 } 2009 2010 void qeth_prepare_control_data(struct qeth_card *card, int len, 2011 struct qeth_cmd_buffer *iob) 2012 { 2013 qeth_setup_ccw(&card->write, iob->data, len); 2014 iob->callback = qeth_release_buffer; 2015 2016 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 2017 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 2018 card->seqno.trans_hdr++; 2019 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 2020 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 2021 card->seqno.pdu_hdr++; 2022 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 2023 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 2024 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 2025 } 2026 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 2027 2028 /** 2029 * qeth_send_control_data() - send control command to the card 2030 * @card: qeth_card structure pointer 2031 * @len: size of the command buffer 2032 * @iob: qeth_cmd_buffer pointer 2033 * @reply_cb: callback function pointer 2034 * @cb_card: pointer to the qeth_card structure 2035 * @cb_reply: pointer to the qeth_reply structure 2036 * @cb_cmd: pointer to the original iob for non-IPA 2037 * commands, or to the qeth_ipa_cmd structure 2038 * for the IPA commands. 2039 * @reply_param: private pointer passed to the callback 2040 * 2041 * Returns the value of the `return_code' field of the response 2042 * block returned from the hardware, or other error indication. 2043 * Value of zero indicates successful execution of the command. 2044 * 2045 * Callback function gets called one or more times, with cb_cmd 2046 * pointing to the response returned by the hardware. Callback 2047 * function must return non-zero if more reply blocks are expected, 2048 * and zero if the last or only reply block is received. Callback 2049 * function can get the value of the reply_param pointer from the 2050 * field 'param' of the structure qeth_reply. 2051 */ 2052 2053 int qeth_send_control_data(struct qeth_card *card, int len, 2054 struct qeth_cmd_buffer *iob, 2055 int (*reply_cb)(struct qeth_card *cb_card, 2056 struct qeth_reply *cb_reply, 2057 unsigned long cb_cmd), 2058 void *reply_param) 2059 { 2060 int rc; 2061 unsigned long flags; 2062 struct qeth_reply *reply = NULL; 2063 unsigned long timeout, event_timeout; 2064 struct qeth_ipa_cmd *cmd; 2065 2066 QETH_CARD_TEXT(card, 2, "sendctl"); 2067 2068 if (card->read_or_write_problem) { 2069 qeth_release_buffer(iob->channel, iob); 2070 return -EIO; 2071 } 2072 reply = qeth_alloc_reply(card); 2073 if (!reply) { 2074 return -ENOMEM; 2075 } 2076 reply->callback = reply_cb; 2077 reply->param = reply_param; 2078 if (card->state == CARD_STATE_DOWN) 2079 reply->seqno = QETH_IDX_COMMAND_SEQNO; 2080 else 2081 reply->seqno = card->seqno.ipa++; 2082 init_waitqueue_head(&reply->wait_q); 2083 spin_lock_irqsave(&card->lock, flags); 2084 list_add_tail(&reply->list, &card->cmd_waiter_list); 2085 spin_unlock_irqrestore(&card->lock, flags); 2086 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 2087 2088 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 2089 qeth_prepare_control_data(card, len, iob); 2090 2091 if (IS_IPA(iob->data)) 2092 event_timeout = QETH_IPA_TIMEOUT; 2093 else 2094 event_timeout = QETH_TIMEOUT; 2095 timeout = jiffies + event_timeout; 2096 2097 QETH_CARD_TEXT(card, 6, "noirqpnd"); 2098 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 2099 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 2100 (addr_t) iob, 0, 0); 2101 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 2102 if (rc) { 2103 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " 2104 "ccw_device_start rc = %i\n", 2105 dev_name(&card->write.ccwdev->dev), rc); 2106 QETH_CARD_TEXT_(card, 2, " err%d", rc); 2107 spin_lock_irqsave(&card->lock, flags); 2108 list_del_init(&reply->list); 2109 qeth_put_reply(reply); 2110 spin_unlock_irqrestore(&card->lock, flags); 2111 qeth_release_buffer(iob->channel, iob); 2112 atomic_set(&card->write.irq_pending, 0); 2113 wake_up(&card->wait_q); 2114 return rc; 2115 } 2116 2117 /* we have only one long running ipassist, since we can ensure 2118 process context of this command we can sleep */ 2119 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2120 if ((cmd->hdr.command == IPA_CMD_SETIP) && 2121 (cmd->hdr.prot_version == QETH_PROT_IPV4)) { 2122 if (!wait_event_timeout(reply->wait_q, 2123 atomic_read(&reply->received), event_timeout)) 2124 goto time_err; 2125 } else { 2126 while (!atomic_read(&reply->received)) { 2127 if (time_after(jiffies, timeout)) 2128 goto time_err; 2129 cpu_relax(); 2130 } 2131 } 2132 2133 if (reply->rc == -EIO) 2134 goto error; 2135 rc = reply->rc; 2136 qeth_put_reply(reply); 2137 return rc; 2138 2139 time_err: 2140 reply->rc = -ETIME; 2141 spin_lock_irqsave(&reply->card->lock, flags); 2142 list_del_init(&reply->list); 2143 spin_unlock_irqrestore(&reply->card->lock, flags); 2144 atomic_inc(&reply->received); 2145 error: 2146 atomic_set(&card->write.irq_pending, 0); 2147 qeth_release_buffer(iob->channel, iob); 2148 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO; 2149 rc = reply->rc; 2150 qeth_put_reply(reply); 2151 return rc; 2152 } 2153 EXPORT_SYMBOL_GPL(qeth_send_control_data); 2154 2155 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2156 unsigned long data) 2157 { 2158 struct qeth_cmd_buffer *iob; 2159 2160 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 2161 2162 iob = (struct qeth_cmd_buffer *) data; 2163 memcpy(&card->token.cm_filter_r, 2164 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 2165 QETH_MPC_TOKEN_LENGTH); 2166 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2167 return 0; 2168 } 2169 2170 static int qeth_cm_enable(struct qeth_card *card) 2171 { 2172 int rc; 2173 struct qeth_cmd_buffer *iob; 2174 2175 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 2176 2177 iob = qeth_wait_for_buffer(&card->write); 2178 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 2179 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 2180 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2181 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 2182 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 2183 2184 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 2185 qeth_cm_enable_cb, NULL); 2186 return rc; 2187 } 2188 2189 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2190 unsigned long data) 2191 { 2192 2193 struct qeth_cmd_buffer *iob; 2194 2195 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 2196 2197 iob = (struct qeth_cmd_buffer *) data; 2198 memcpy(&card->token.cm_connection_r, 2199 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 2200 QETH_MPC_TOKEN_LENGTH); 2201 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2202 return 0; 2203 } 2204 2205 static int qeth_cm_setup(struct qeth_card *card) 2206 { 2207 int rc; 2208 struct qeth_cmd_buffer *iob; 2209 2210 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 2211 2212 iob = qeth_wait_for_buffer(&card->write); 2213 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 2214 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 2215 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2216 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 2217 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 2218 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 2219 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 2220 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 2221 qeth_cm_setup_cb, NULL); 2222 return rc; 2223 2224 } 2225 2226 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) 2227 { 2228 switch (card->info.type) { 2229 case QETH_CARD_TYPE_UNKNOWN: 2230 return 1500; 2231 case QETH_CARD_TYPE_IQD: 2232 return card->info.max_mtu; 2233 case QETH_CARD_TYPE_OSD: 2234 switch (card->info.link_type) { 2235 case QETH_LINK_TYPE_HSTR: 2236 case QETH_LINK_TYPE_LANE_TR: 2237 return 2000; 2238 default: 2239 return card->options.layer2 ? 1500 : 1492; 2240 } 2241 case QETH_CARD_TYPE_OSM: 2242 case QETH_CARD_TYPE_OSX: 2243 return card->options.layer2 ? 1500 : 1492; 2244 default: 2245 return 1500; 2246 } 2247 } 2248 2249 static inline int qeth_get_mtu_outof_framesize(int framesize) 2250 { 2251 switch (framesize) { 2252 case 0x4000: 2253 return 8192; 2254 case 0x6000: 2255 return 16384; 2256 case 0xa000: 2257 return 32768; 2258 case 0xffff: 2259 return 57344; 2260 default: 2261 return 0; 2262 } 2263 } 2264 2265 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 2266 { 2267 switch (card->info.type) { 2268 case QETH_CARD_TYPE_OSD: 2269 case QETH_CARD_TYPE_OSM: 2270 case QETH_CARD_TYPE_OSX: 2271 case QETH_CARD_TYPE_IQD: 2272 return ((mtu >= 576) && 2273 (mtu <= card->info.max_mtu)); 2274 case QETH_CARD_TYPE_OSN: 2275 case QETH_CARD_TYPE_UNKNOWN: 2276 default: 2277 return 1; 2278 } 2279 } 2280 2281 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2282 unsigned long data) 2283 { 2284 2285 __u16 mtu, framesize; 2286 __u16 len; 2287 __u8 link_type; 2288 struct qeth_cmd_buffer *iob; 2289 2290 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 2291 2292 iob = (struct qeth_cmd_buffer *) data; 2293 memcpy(&card->token.ulp_filter_r, 2294 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 2295 QETH_MPC_TOKEN_LENGTH); 2296 if (card->info.type == QETH_CARD_TYPE_IQD) { 2297 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 2298 mtu = qeth_get_mtu_outof_framesize(framesize); 2299 if (!mtu) { 2300 iob->rc = -EINVAL; 2301 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2302 return 0; 2303 } 2304 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) { 2305 /* frame size has changed */ 2306 if (card->dev && 2307 ((card->dev->mtu == card->info.initial_mtu) || 2308 (card->dev->mtu > mtu))) 2309 card->dev->mtu = mtu; 2310 qeth_free_qdio_buffers(card); 2311 } 2312 card->info.initial_mtu = mtu; 2313 card->info.max_mtu = mtu; 2314 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 2315 } else { 2316 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU( 2317 iob->data); 2318 card->info.initial_mtu = min(card->info.max_mtu, 2319 qeth_get_initial_mtu_for_card(card)); 2320 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 2321 } 2322 2323 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 2324 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 2325 memcpy(&link_type, 2326 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 2327 card->info.link_type = link_type; 2328 } else 2329 card->info.link_type = 0; 2330 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type); 2331 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2332 return 0; 2333 } 2334 2335 static int qeth_ulp_enable(struct qeth_card *card) 2336 { 2337 int rc; 2338 char prot_type; 2339 struct qeth_cmd_buffer *iob; 2340 2341 /*FIXME: trace view callbacks*/ 2342 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 2343 2344 iob = qeth_wait_for_buffer(&card->write); 2345 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 2346 2347 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 2348 (__u8) card->info.portno; 2349 if (card->options.layer2) 2350 if (card->info.type == QETH_CARD_TYPE_OSN) 2351 prot_type = QETH_PROT_OSN2; 2352 else 2353 prot_type = QETH_PROT_LAYER2; 2354 else 2355 prot_type = QETH_PROT_TCPIP; 2356 2357 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 2358 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 2359 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2360 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 2361 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 2362 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data), 2363 card->info.portname, 9); 2364 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 2365 qeth_ulp_enable_cb, NULL); 2366 return rc; 2367 2368 } 2369 2370 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2371 unsigned long data) 2372 { 2373 struct qeth_cmd_buffer *iob; 2374 2375 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 2376 2377 iob = (struct qeth_cmd_buffer *) data; 2378 memcpy(&card->token.ulp_connection_r, 2379 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2380 QETH_MPC_TOKEN_LENGTH); 2381 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2382 3)) { 2383 QETH_DBF_TEXT(SETUP, 2, "olmlimit"); 2384 dev_err(&card->gdev->dev, "A connection could not be " 2385 "established because of an OLM limit\n"); 2386 iob->rc = -EMLINK; 2387 } 2388 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2389 return 0; 2390 } 2391 2392 static int qeth_ulp_setup(struct qeth_card *card) 2393 { 2394 int rc; 2395 __u16 temp; 2396 struct qeth_cmd_buffer *iob; 2397 struct ccw_dev_id dev_id; 2398 2399 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 2400 2401 iob = qeth_wait_for_buffer(&card->write); 2402 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 2403 2404 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 2405 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2406 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 2407 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 2408 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 2409 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 2410 2411 ccw_device_get_id(CARD_DDEV(card), &dev_id); 2412 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 2413 temp = (card->info.cula << 8) + card->info.unit_addr2; 2414 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 2415 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 2416 qeth_ulp_setup_cb, NULL); 2417 return rc; 2418 } 2419 2420 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx) 2421 { 2422 int rc; 2423 struct qeth_qdio_out_buffer *newbuf; 2424 2425 rc = 0; 2426 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC); 2427 if (!newbuf) { 2428 rc = -ENOMEM; 2429 goto out; 2430 } 2431 newbuf->buffer = q->qdio_bufs[bidx]; 2432 skb_queue_head_init(&newbuf->skb_list); 2433 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key); 2434 newbuf->q = q; 2435 newbuf->aob = NULL; 2436 newbuf->next_pending = q->bufs[bidx]; 2437 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY); 2438 q->bufs[bidx] = newbuf; 2439 if (q->bufstates) { 2440 q->bufstates[bidx].user = newbuf; 2441 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx); 2442 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf); 2443 QETH_CARD_TEXT_(q->card, 2, "%lx", 2444 (long) newbuf->next_pending); 2445 } 2446 out: 2447 return rc; 2448 } 2449 2450 static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q) 2451 { 2452 if (!q) 2453 return; 2454 2455 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q); 2456 kfree(q); 2457 } 2458 2459 static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void) 2460 { 2461 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL); 2462 2463 if (!q) 2464 return NULL; 2465 2466 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) { 2467 kfree(q); 2468 return NULL; 2469 } 2470 return q; 2471 } 2472 2473 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 2474 { 2475 int i, j; 2476 2477 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 2478 2479 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 2480 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 2481 return 0; 2482 2483 QETH_DBF_TEXT(SETUP, 2, "inq"); 2484 card->qdio.in_q = qeth_alloc_qdio_queue(); 2485 if (!card->qdio.in_q) 2486 goto out_nomem; 2487 2488 /* inbound buffer pool */ 2489 if (qeth_alloc_buffer_pool(card)) 2490 goto out_freeinq; 2491 2492 /* outbound */ 2493 card->qdio.out_qs = 2494 kzalloc(card->qdio.no_out_queues * 2495 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2496 if (!card->qdio.out_qs) 2497 goto out_freepool; 2498 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2499 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf(); 2500 if (!card->qdio.out_qs[i]) 2501 goto out_freeoutq; 2502 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2503 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2504 card->qdio.out_qs[i]->queue_no = i; 2505 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2506 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2507 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL); 2508 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j)) 2509 goto out_freeoutqbufs; 2510 } 2511 } 2512 2513 /* completion */ 2514 if (qeth_alloc_cq(card)) 2515 goto out_freeoutq; 2516 2517 return 0; 2518 2519 out_freeoutqbufs: 2520 while (j > 0) { 2521 --j; 2522 kmem_cache_free(qeth_qdio_outbuf_cache, 2523 card->qdio.out_qs[i]->bufs[j]); 2524 card->qdio.out_qs[i]->bufs[j] = NULL; 2525 } 2526 out_freeoutq: 2527 while (i > 0) { 2528 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]); 2529 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 2530 } 2531 kfree(card->qdio.out_qs); 2532 card->qdio.out_qs = NULL; 2533 out_freepool: 2534 qeth_free_buffer_pool(card); 2535 out_freeinq: 2536 qeth_free_qdio_queue(card->qdio.in_q); 2537 card->qdio.in_q = NULL; 2538 out_nomem: 2539 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2540 return -ENOMEM; 2541 } 2542 2543 static void qeth_free_qdio_buffers(struct qeth_card *card) 2544 { 2545 int i, j; 2546 2547 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 2548 QETH_QDIO_UNINITIALIZED) 2549 return; 2550 2551 qeth_free_cq(card); 2552 cancel_delayed_work_sync(&card->buffer_reclaim_work); 2553 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2554 if (card->qdio.in_q->bufs[j].rx_skb) 2555 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb); 2556 } 2557 qeth_free_qdio_queue(card->qdio.in_q); 2558 card->qdio.in_q = NULL; 2559 /* inbound buffer pool */ 2560 qeth_free_buffer_pool(card); 2561 /* free outbound qdio_qs */ 2562 if (card->qdio.out_qs) { 2563 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2564 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 2565 qeth_free_qdio_out_buf(card->qdio.out_qs[i]); 2566 } 2567 kfree(card->qdio.out_qs); 2568 card->qdio.out_qs = NULL; 2569 } 2570 } 2571 2572 static void qeth_create_qib_param_field(struct qeth_card *card, 2573 char *param_field) 2574 { 2575 2576 param_field[0] = _ascebc['P']; 2577 param_field[1] = _ascebc['C']; 2578 param_field[2] = _ascebc['I']; 2579 param_field[3] = _ascebc['T']; 2580 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2581 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2582 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2583 } 2584 2585 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2586 char *param_field) 2587 { 2588 param_field[16] = _ascebc['B']; 2589 param_field[17] = _ascebc['L']; 2590 param_field[18] = _ascebc['K']; 2591 param_field[19] = _ascebc['T']; 2592 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2593 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2594 *((unsigned int *) (¶m_field[28])) = 2595 card->info.blkt.inter_packet_jumbo; 2596 } 2597 2598 static int qeth_qdio_activate(struct qeth_card *card) 2599 { 2600 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2601 return qdio_activate(CARD_DDEV(card)); 2602 } 2603 2604 static int qeth_dm_act(struct qeth_card *card) 2605 { 2606 int rc; 2607 struct qeth_cmd_buffer *iob; 2608 2609 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2610 2611 iob = qeth_wait_for_buffer(&card->write); 2612 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2613 2614 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2615 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2616 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2617 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2618 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2619 return rc; 2620 } 2621 2622 static int qeth_mpc_initialize(struct qeth_card *card) 2623 { 2624 int rc; 2625 2626 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2627 2628 rc = qeth_issue_next_read(card); 2629 if (rc) { 2630 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2631 return rc; 2632 } 2633 rc = qeth_cm_enable(card); 2634 if (rc) { 2635 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2636 goto out_qdio; 2637 } 2638 rc = qeth_cm_setup(card); 2639 if (rc) { 2640 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2641 goto out_qdio; 2642 } 2643 rc = qeth_ulp_enable(card); 2644 if (rc) { 2645 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2646 goto out_qdio; 2647 } 2648 rc = qeth_ulp_setup(card); 2649 if (rc) { 2650 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2651 goto out_qdio; 2652 } 2653 rc = qeth_alloc_qdio_buffers(card); 2654 if (rc) { 2655 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2656 goto out_qdio; 2657 } 2658 rc = qeth_qdio_establish(card); 2659 if (rc) { 2660 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2661 qeth_free_qdio_buffers(card); 2662 goto out_qdio; 2663 } 2664 rc = qeth_qdio_activate(card); 2665 if (rc) { 2666 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2667 goto out_qdio; 2668 } 2669 rc = qeth_dm_act(card); 2670 if (rc) { 2671 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2672 goto out_qdio; 2673 } 2674 2675 return 0; 2676 out_qdio: 2677 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2678 qdio_free(CARD_DDEV(card)); 2679 return rc; 2680 } 2681 2682 static void qeth_print_status_with_portname(struct qeth_card *card) 2683 { 2684 char dbf_text[15]; 2685 int i; 2686 2687 sprintf(dbf_text, "%s", card->info.portname + 1); 2688 for (i = 0; i < 8; i++) 2689 dbf_text[i] = 2690 (char) _ebcasc[(__u8) dbf_text[i]]; 2691 dbf_text[8] = 0; 2692 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n" 2693 "with link type %s (portname: %s)\n", 2694 qeth_get_cardname(card), 2695 (card->info.mcl_level[0]) ? " (level: " : "", 2696 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2697 (card->info.mcl_level[0]) ? ")" : "", 2698 qeth_get_cardname_short(card), 2699 dbf_text); 2700 2701 } 2702 2703 static void qeth_print_status_no_portname(struct qeth_card *card) 2704 { 2705 if (card->info.portname[0]) 2706 dev_info(&card->gdev->dev, "Device is a%s " 2707 "card%s%s%s\nwith link type %s " 2708 "(no portname needed by interface).\n", 2709 qeth_get_cardname(card), 2710 (card->info.mcl_level[0]) ? " (level: " : "", 2711 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2712 (card->info.mcl_level[0]) ? ")" : "", 2713 qeth_get_cardname_short(card)); 2714 else 2715 dev_info(&card->gdev->dev, "Device is a%s " 2716 "card%s%s%s\nwith link type %s.\n", 2717 qeth_get_cardname(card), 2718 (card->info.mcl_level[0]) ? " (level: " : "", 2719 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2720 (card->info.mcl_level[0]) ? ")" : "", 2721 qeth_get_cardname_short(card)); 2722 } 2723 2724 void qeth_print_status_message(struct qeth_card *card) 2725 { 2726 switch (card->info.type) { 2727 case QETH_CARD_TYPE_OSD: 2728 case QETH_CARD_TYPE_OSM: 2729 case QETH_CARD_TYPE_OSX: 2730 /* VM will use a non-zero first character 2731 * to indicate a HiperSockets like reporting 2732 * of the level OSA sets the first character to zero 2733 * */ 2734 if (!card->info.mcl_level[0]) { 2735 sprintf(card->info.mcl_level, "%02x%02x", 2736 card->info.mcl_level[2], 2737 card->info.mcl_level[3]); 2738 2739 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2740 break; 2741 } 2742 /* fallthrough */ 2743 case QETH_CARD_TYPE_IQD: 2744 if ((card->info.guestlan) || 2745 (card->info.mcl_level[0] & 0x80)) { 2746 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2747 card->info.mcl_level[0]]; 2748 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2749 card->info.mcl_level[1]]; 2750 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2751 card->info.mcl_level[2]]; 2752 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2753 card->info.mcl_level[3]]; 2754 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2755 } 2756 break; 2757 default: 2758 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2759 } 2760 if (card->info.portname_required) 2761 qeth_print_status_with_portname(card); 2762 else 2763 qeth_print_status_no_portname(card); 2764 } 2765 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2766 2767 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2768 { 2769 struct qeth_buffer_pool_entry *entry; 2770 2771 QETH_CARD_TEXT(card, 5, "inwrklst"); 2772 2773 list_for_each_entry(entry, 2774 &card->qdio.init_pool.entry_list, init_list) { 2775 qeth_put_buffer_pool_entry(card, entry); 2776 } 2777 } 2778 2779 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2780 struct qeth_card *card) 2781 { 2782 struct list_head *plh; 2783 struct qeth_buffer_pool_entry *entry; 2784 int i, free; 2785 struct page *page; 2786 2787 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2788 return NULL; 2789 2790 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2791 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2792 free = 1; 2793 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2794 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2795 free = 0; 2796 break; 2797 } 2798 } 2799 if (free) { 2800 list_del_init(&entry->list); 2801 return entry; 2802 } 2803 } 2804 2805 /* no free buffer in pool so take first one and swap pages */ 2806 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2807 struct qeth_buffer_pool_entry, list); 2808 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2809 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2810 page = alloc_page(GFP_ATOMIC); 2811 if (!page) { 2812 return NULL; 2813 } else { 2814 free_page((unsigned long)entry->elements[i]); 2815 entry->elements[i] = page_address(page); 2816 if (card->options.performance_stats) 2817 card->perf_stats.sg_alloc_page_rx++; 2818 } 2819 } 2820 } 2821 list_del_init(&entry->list); 2822 return entry; 2823 } 2824 2825 static int qeth_init_input_buffer(struct qeth_card *card, 2826 struct qeth_qdio_buffer *buf) 2827 { 2828 struct qeth_buffer_pool_entry *pool_entry; 2829 int i; 2830 2831 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) { 2832 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 2833 if (!buf->rx_skb) 2834 return 1; 2835 } 2836 2837 pool_entry = qeth_find_free_buffer_pool_entry(card); 2838 if (!pool_entry) 2839 return 1; 2840 2841 /* 2842 * since the buffer is accessed only from the input_tasklet 2843 * there shouldn't be a need to synchronize; also, since we use 2844 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2845 * buffers 2846 */ 2847 2848 buf->pool_entry = pool_entry; 2849 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2850 buf->buffer->element[i].length = PAGE_SIZE; 2851 buf->buffer->element[i].addr = pool_entry->elements[i]; 2852 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2853 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY; 2854 else 2855 buf->buffer->element[i].eflags = 0; 2856 buf->buffer->element[i].sflags = 0; 2857 } 2858 return 0; 2859 } 2860 2861 int qeth_init_qdio_queues(struct qeth_card *card) 2862 { 2863 int i, j; 2864 int rc; 2865 2866 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2867 2868 /* inbound queue */ 2869 qdio_reset_buffers(card->qdio.in_q->qdio_bufs, 2870 QDIO_MAX_BUFFERS_PER_Q); 2871 qeth_initialize_working_pool_list(card); 2872 /*give only as many buffers to hardware as we have buffer pool entries*/ 2873 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2874 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2875 card->qdio.in_q->next_buf_to_init = 2876 card->qdio.in_buf_pool.buf_count - 1; 2877 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2878 card->qdio.in_buf_pool.buf_count - 1); 2879 if (rc) { 2880 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2881 return rc; 2882 } 2883 2884 /* completion */ 2885 rc = qeth_cq_init(card); 2886 if (rc) { 2887 return rc; 2888 } 2889 2890 /* outbound queue */ 2891 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2892 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs, 2893 QDIO_MAX_BUFFERS_PER_Q); 2894 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2895 qeth_clear_output_buffer(card->qdio.out_qs[i], 2896 card->qdio.out_qs[i]->bufs[j], 2897 QETH_QDIO_BUF_EMPTY); 2898 } 2899 card->qdio.out_qs[i]->card = card; 2900 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2901 card->qdio.out_qs[i]->do_pack = 0; 2902 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2903 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2904 atomic_set(&card->qdio.out_qs[i]->state, 2905 QETH_OUT_Q_UNLOCKED); 2906 } 2907 return 0; 2908 } 2909 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2910 2911 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2912 { 2913 switch (link_type) { 2914 case QETH_LINK_TYPE_HSTR: 2915 return 2; 2916 default: 2917 return 1; 2918 } 2919 } 2920 2921 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2922 struct qeth_ipa_cmd *cmd, __u8 command, 2923 enum qeth_prot_versions prot) 2924 { 2925 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2926 cmd->hdr.command = command; 2927 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2928 cmd->hdr.seqno = card->seqno.ipa; 2929 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2930 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2931 if (card->options.layer2) 2932 cmd->hdr.prim_version_no = 2; 2933 else 2934 cmd->hdr.prim_version_no = 1; 2935 cmd->hdr.param_count = 1; 2936 cmd->hdr.prot_version = prot; 2937 cmd->hdr.ipa_supported = 0; 2938 cmd->hdr.ipa_enabled = 0; 2939 } 2940 2941 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2942 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2943 { 2944 struct qeth_cmd_buffer *iob; 2945 struct qeth_ipa_cmd *cmd; 2946 2947 iob = qeth_get_buffer(&card->write); 2948 if (iob) { 2949 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2950 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2951 } else { 2952 dev_warn(&card->gdev->dev, 2953 "The qeth driver ran out of channel command buffers\n"); 2954 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers", 2955 dev_name(&card->gdev->dev)); 2956 } 2957 2958 return iob; 2959 } 2960 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2961 2962 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2963 char prot_type) 2964 { 2965 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2966 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2967 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2968 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2969 } 2970 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2971 2972 /** 2973 * qeth_send_ipa_cmd() - send an IPA command 2974 * 2975 * See qeth_send_control_data() for explanation of the arguments. 2976 */ 2977 2978 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2979 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2980 unsigned long), 2981 void *reply_param) 2982 { 2983 int rc; 2984 char prot_type; 2985 2986 QETH_CARD_TEXT(card, 4, "sendipa"); 2987 2988 if (card->options.layer2) 2989 if (card->info.type == QETH_CARD_TYPE_OSN) 2990 prot_type = QETH_PROT_OSN2; 2991 else 2992 prot_type = QETH_PROT_LAYER2; 2993 else 2994 prot_type = QETH_PROT_TCPIP; 2995 qeth_prepare_ipa_cmd(card, iob, prot_type); 2996 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2997 iob, reply_cb, reply_param); 2998 if (rc == -ETIME) { 2999 qeth_clear_ipacmd_list(card); 3000 qeth_schedule_recovery(card); 3001 } 3002 return rc; 3003 } 3004 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 3005 3006 int qeth_send_startlan(struct qeth_card *card) 3007 { 3008 int rc; 3009 struct qeth_cmd_buffer *iob; 3010 3011 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 3012 3013 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0); 3014 if (!iob) 3015 return -ENOMEM; 3016 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 3017 return rc; 3018 } 3019 EXPORT_SYMBOL_GPL(qeth_send_startlan); 3020 3021 static int qeth_default_setadapterparms_cb(struct qeth_card *card, 3022 struct qeth_reply *reply, unsigned long data) 3023 { 3024 struct qeth_ipa_cmd *cmd; 3025 3026 QETH_CARD_TEXT(card, 4, "defadpcb"); 3027 3028 cmd = (struct qeth_ipa_cmd *) data; 3029 if (cmd->hdr.return_code == 0) 3030 cmd->hdr.return_code = 3031 cmd->data.setadapterparms.hdr.return_code; 3032 return 0; 3033 } 3034 3035 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 3036 struct qeth_reply *reply, unsigned long data) 3037 { 3038 struct qeth_ipa_cmd *cmd; 3039 3040 QETH_CARD_TEXT(card, 3, "quyadpcb"); 3041 3042 cmd = (struct qeth_ipa_cmd *) data; 3043 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) { 3044 card->info.link_type = 3045 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 3046 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type); 3047 } 3048 card->options.adp.supported_funcs = 3049 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 3050 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 3051 } 3052 3053 static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 3054 __u32 command, __u32 cmdlen) 3055 { 3056 struct qeth_cmd_buffer *iob; 3057 struct qeth_ipa_cmd *cmd; 3058 3059 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 3060 QETH_PROT_IPV4); 3061 if (iob) { 3062 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3063 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 3064 cmd->data.setadapterparms.hdr.command_code = command; 3065 cmd->data.setadapterparms.hdr.used_total = 1; 3066 cmd->data.setadapterparms.hdr.seq_no = 1; 3067 } 3068 3069 return iob; 3070 } 3071 3072 int qeth_query_setadapterparms(struct qeth_card *card) 3073 { 3074 int rc; 3075 struct qeth_cmd_buffer *iob; 3076 3077 QETH_CARD_TEXT(card, 3, "queryadp"); 3078 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 3079 sizeof(struct qeth_ipacmd_setadpparms)); 3080 if (!iob) 3081 return -ENOMEM; 3082 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 3083 return rc; 3084 } 3085 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 3086 3087 static int qeth_query_ipassists_cb(struct qeth_card *card, 3088 struct qeth_reply *reply, unsigned long data) 3089 { 3090 struct qeth_ipa_cmd *cmd; 3091 3092 QETH_DBF_TEXT(SETUP, 2, "qipasscb"); 3093 3094 cmd = (struct qeth_ipa_cmd *) data; 3095 3096 switch (cmd->hdr.return_code) { 3097 case IPA_RC_NOTSUPP: 3098 case IPA_RC_L2_UNSUPPORTED_CMD: 3099 QETH_DBF_TEXT(SETUP, 2, "ipaunsup"); 3100 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS; 3101 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS; 3102 return -0; 3103 default: 3104 if (cmd->hdr.return_code) { 3105 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled " 3106 "rc=%d\n", 3107 dev_name(&card->gdev->dev), 3108 cmd->hdr.return_code); 3109 return 0; 3110 } 3111 } 3112 3113 if (cmd->hdr.prot_version == QETH_PROT_IPV4) { 3114 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported; 3115 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; 3116 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) { 3117 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported; 3118 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; 3119 } else 3120 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected" 3121 "\n", dev_name(&card->gdev->dev)); 3122 return 0; 3123 } 3124 3125 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot) 3126 { 3127 int rc; 3128 struct qeth_cmd_buffer *iob; 3129 3130 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot); 3131 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot); 3132 if (!iob) 3133 return -ENOMEM; 3134 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL); 3135 return rc; 3136 } 3137 EXPORT_SYMBOL_GPL(qeth_query_ipassists); 3138 3139 static int qeth_query_switch_attributes_cb(struct qeth_card *card, 3140 struct qeth_reply *reply, unsigned long data) 3141 { 3142 struct qeth_ipa_cmd *cmd; 3143 struct qeth_switch_info *sw_info; 3144 struct qeth_query_switch_attributes *attrs; 3145 3146 QETH_CARD_TEXT(card, 2, "qswiatcb"); 3147 cmd = (struct qeth_ipa_cmd *) data; 3148 sw_info = (struct qeth_switch_info *)reply->param; 3149 if (cmd->data.setadapterparms.hdr.return_code == 0) { 3150 attrs = &cmd->data.setadapterparms.data.query_switch_attributes; 3151 sw_info->capabilities = attrs->capabilities; 3152 sw_info->settings = attrs->settings; 3153 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities, 3154 sw_info->settings); 3155 } 3156 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 3157 3158 return 0; 3159 } 3160 3161 int qeth_query_switch_attributes(struct qeth_card *card, 3162 struct qeth_switch_info *sw_info) 3163 { 3164 struct qeth_cmd_buffer *iob; 3165 3166 QETH_CARD_TEXT(card, 2, "qswiattr"); 3167 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES)) 3168 return -EOPNOTSUPP; 3169 if (!netif_carrier_ok(card->dev)) 3170 return -ENOMEDIUM; 3171 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES, 3172 sizeof(struct qeth_ipacmd_setadpparms_hdr)); 3173 if (!iob) 3174 return -ENOMEM; 3175 return qeth_send_ipa_cmd(card, iob, 3176 qeth_query_switch_attributes_cb, sw_info); 3177 } 3178 EXPORT_SYMBOL_GPL(qeth_query_switch_attributes); 3179 3180 static int qeth_query_setdiagass_cb(struct qeth_card *card, 3181 struct qeth_reply *reply, unsigned long data) 3182 { 3183 struct qeth_ipa_cmd *cmd; 3184 __u16 rc; 3185 3186 cmd = (struct qeth_ipa_cmd *)data; 3187 rc = cmd->hdr.return_code; 3188 if (rc) 3189 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc); 3190 else 3191 card->info.diagass_support = cmd->data.diagass.ext; 3192 return 0; 3193 } 3194 3195 static int qeth_query_setdiagass(struct qeth_card *card) 3196 { 3197 struct qeth_cmd_buffer *iob; 3198 struct qeth_ipa_cmd *cmd; 3199 3200 QETH_DBF_TEXT(SETUP, 2, "qdiagass"); 3201 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3202 if (!iob) 3203 return -ENOMEM; 3204 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3205 cmd->data.diagass.subcmd_len = 16; 3206 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY; 3207 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL); 3208 } 3209 3210 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid) 3211 { 3212 unsigned long info = get_zeroed_page(GFP_KERNEL); 3213 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info; 3214 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info; 3215 struct ccw_dev_id ccwid; 3216 int level; 3217 3218 tid->chpid = card->info.chpid; 3219 ccw_device_get_id(CARD_RDEV(card), &ccwid); 3220 tid->ssid = ccwid.ssid; 3221 tid->devno = ccwid.devno; 3222 if (!info) 3223 return; 3224 level = stsi(NULL, 0, 0, 0); 3225 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0)) 3226 tid->lparnr = info222->lpar_number; 3227 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) { 3228 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name)); 3229 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname)); 3230 } 3231 free_page(info); 3232 return; 3233 } 3234 3235 static int qeth_hw_trap_cb(struct qeth_card *card, 3236 struct qeth_reply *reply, unsigned long data) 3237 { 3238 struct qeth_ipa_cmd *cmd; 3239 __u16 rc; 3240 3241 cmd = (struct qeth_ipa_cmd *)data; 3242 rc = cmd->hdr.return_code; 3243 if (rc) 3244 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc); 3245 return 0; 3246 } 3247 3248 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action) 3249 { 3250 struct qeth_cmd_buffer *iob; 3251 struct qeth_ipa_cmd *cmd; 3252 3253 QETH_DBF_TEXT(SETUP, 2, "diagtrap"); 3254 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3255 if (!iob) 3256 return -ENOMEM; 3257 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3258 cmd->data.diagass.subcmd_len = 80; 3259 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP; 3260 cmd->data.diagass.type = 1; 3261 cmd->data.diagass.action = action; 3262 switch (action) { 3263 case QETH_DIAGS_TRAP_ARM: 3264 cmd->data.diagass.options = 0x0003; 3265 cmd->data.diagass.ext = 0x00010000 + 3266 sizeof(struct qeth_trap_id); 3267 qeth_get_trap_id(card, 3268 (struct qeth_trap_id *)cmd->data.diagass.cdata); 3269 break; 3270 case QETH_DIAGS_TRAP_DISARM: 3271 cmd->data.diagass.options = 0x0001; 3272 break; 3273 case QETH_DIAGS_TRAP_CAPTURE: 3274 break; 3275 } 3276 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL); 3277 } 3278 EXPORT_SYMBOL_GPL(qeth_hw_trap); 3279 3280 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf, 3281 unsigned int qdio_error, const char *dbftext) 3282 { 3283 if (qdio_error) { 3284 QETH_CARD_TEXT(card, 2, dbftext); 3285 QETH_CARD_TEXT_(card, 2, " F15=%02X", 3286 buf->element[15].sflags); 3287 QETH_CARD_TEXT_(card, 2, " F14=%02X", 3288 buf->element[14].sflags); 3289 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); 3290 if ((buf->element[15].sflags) == 0x12) { 3291 card->stats.rx_dropped++; 3292 return 0; 3293 } else 3294 return 1; 3295 } 3296 return 0; 3297 } 3298 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); 3299 3300 static void qeth_buffer_reclaim_work(struct work_struct *work) 3301 { 3302 struct qeth_card *card = container_of(work, struct qeth_card, 3303 buffer_reclaim_work.work); 3304 3305 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index); 3306 qeth_queue_input_buffer(card, card->reclaim_index); 3307 } 3308 3309 void qeth_queue_input_buffer(struct qeth_card *card, int index) 3310 { 3311 struct qeth_qdio_q *queue = card->qdio.in_q; 3312 struct list_head *lh; 3313 int count; 3314 int i; 3315 int rc; 3316 int newcount = 0; 3317 3318 count = (index < queue->next_buf_to_init)? 3319 card->qdio.in_buf_pool.buf_count - 3320 (queue->next_buf_to_init - index) : 3321 card->qdio.in_buf_pool.buf_count - 3322 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 3323 /* only requeue at a certain threshold to avoid SIGAs */ 3324 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 3325 for (i = queue->next_buf_to_init; 3326 i < queue->next_buf_to_init + count; ++i) { 3327 if (qeth_init_input_buffer(card, 3328 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 3329 break; 3330 } else { 3331 newcount++; 3332 } 3333 } 3334 3335 if (newcount < count) { 3336 /* we are in memory shortage so we switch back to 3337 traditional skb allocation and drop packages */ 3338 atomic_set(&card->force_alloc_skb, 3); 3339 count = newcount; 3340 } else { 3341 atomic_add_unless(&card->force_alloc_skb, -1, 0); 3342 } 3343 3344 if (!count) { 3345 i = 0; 3346 list_for_each(lh, &card->qdio.in_buf_pool.entry_list) 3347 i++; 3348 if (i == card->qdio.in_buf_pool.buf_count) { 3349 QETH_CARD_TEXT(card, 2, "qsarbw"); 3350 card->reclaim_index = index; 3351 schedule_delayed_work( 3352 &card->buffer_reclaim_work, 3353 QETH_RECLAIM_WORK_TIME); 3354 } 3355 return; 3356 } 3357 3358 /* 3359 * according to old code it should be avoided to requeue all 3360 * 128 buffers in order to benefit from PCI avoidance. 3361 * this function keeps at least one buffer (the buffer at 3362 * 'index') un-requeued -> this buffer is the first buffer that 3363 * will be requeued the next time 3364 */ 3365 if (card->options.performance_stats) { 3366 card->perf_stats.inbound_do_qdio_cnt++; 3367 card->perf_stats.inbound_do_qdio_start_time = 3368 qeth_get_micros(); 3369 } 3370 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 3371 queue->next_buf_to_init, count); 3372 if (card->options.performance_stats) 3373 card->perf_stats.inbound_do_qdio_time += 3374 qeth_get_micros() - 3375 card->perf_stats.inbound_do_qdio_start_time; 3376 if (rc) { 3377 QETH_CARD_TEXT(card, 2, "qinberr"); 3378 } 3379 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 3380 QDIO_MAX_BUFFERS_PER_Q; 3381 } 3382 } 3383 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); 3384 3385 static int qeth_handle_send_error(struct qeth_card *card, 3386 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 3387 { 3388 int sbalf15 = buffer->buffer->element[15].sflags; 3389 3390 QETH_CARD_TEXT(card, 6, "hdsnderr"); 3391 if (card->info.type == QETH_CARD_TYPE_IQD) { 3392 if (sbalf15 == 0) { 3393 qdio_err = 0; 3394 } else { 3395 qdio_err = 1; 3396 } 3397 } 3398 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr"); 3399 3400 if (!qdio_err) 3401 return QETH_SEND_ERROR_NONE; 3402 3403 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 3404 return QETH_SEND_ERROR_RETRY; 3405 3406 QETH_CARD_TEXT(card, 1, "lnkfail"); 3407 QETH_CARD_TEXT_(card, 1, "%04x %02x", 3408 (u16)qdio_err, (u8)sbalf15); 3409 return QETH_SEND_ERROR_LINK_FAILURE; 3410 } 3411 3412 /* 3413 * Switched to packing state if the number of used buffers on a queue 3414 * reaches a certain limit. 3415 */ 3416 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 3417 { 3418 if (!queue->do_pack) { 3419 if (atomic_read(&queue->used_buffers) 3420 >= QETH_HIGH_WATERMARK_PACK){ 3421 /* switch non-PACKING -> PACKING */ 3422 QETH_CARD_TEXT(queue->card, 6, "np->pack"); 3423 if (queue->card->options.performance_stats) 3424 queue->card->perf_stats.sc_dp_p++; 3425 queue->do_pack = 1; 3426 } 3427 } 3428 } 3429 3430 /* 3431 * Switches from packing to non-packing mode. If there is a packing 3432 * buffer on the queue this buffer will be prepared to be flushed. 3433 * In that case 1 is returned to inform the caller. If no buffer 3434 * has to be flushed, zero is returned. 3435 */ 3436 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 3437 { 3438 struct qeth_qdio_out_buffer *buffer; 3439 int flush_count = 0; 3440 3441 if (queue->do_pack) { 3442 if (atomic_read(&queue->used_buffers) 3443 <= QETH_LOW_WATERMARK_PACK) { 3444 /* switch PACKING -> non-PACKING */ 3445 QETH_CARD_TEXT(queue->card, 6, "pack->np"); 3446 if (queue->card->options.performance_stats) 3447 queue->card->perf_stats.sc_p_dp++; 3448 queue->do_pack = 0; 3449 /* flush packing buffers */ 3450 buffer = queue->bufs[queue->next_buf_to_fill]; 3451 if ((atomic_read(&buffer->state) == 3452 QETH_QDIO_BUF_EMPTY) && 3453 (buffer->next_element_to_fill > 0)) { 3454 atomic_set(&buffer->state, 3455 QETH_QDIO_BUF_PRIMED); 3456 flush_count++; 3457 queue->next_buf_to_fill = 3458 (queue->next_buf_to_fill + 1) % 3459 QDIO_MAX_BUFFERS_PER_Q; 3460 } 3461 } 3462 } 3463 return flush_count; 3464 } 3465 3466 3467 /* 3468 * Called to flush a packing buffer if no more pci flags are on the queue. 3469 * Checks if there is a packing buffer and prepares it to be flushed. 3470 * In that case returns 1, otherwise zero. 3471 */ 3472 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) 3473 { 3474 struct qeth_qdio_out_buffer *buffer; 3475 3476 buffer = queue->bufs[queue->next_buf_to_fill]; 3477 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 3478 (buffer->next_element_to_fill > 0)) { 3479 /* it's a packing buffer */ 3480 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3481 queue->next_buf_to_fill = 3482 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 3483 return 1; 3484 } 3485 return 0; 3486 } 3487 3488 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 3489 int count) 3490 { 3491 struct qeth_qdio_out_buffer *buf; 3492 int rc; 3493 int i; 3494 unsigned int qdio_flags; 3495 3496 for (i = index; i < index + count; ++i) { 3497 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3498 buf = queue->bufs[bidx]; 3499 buf->buffer->element[buf->next_element_to_fill - 1].eflags |= 3500 SBAL_EFLAGS_LAST_ENTRY; 3501 3502 if (queue->bufstates) 3503 queue->bufstates[bidx].user = buf; 3504 3505 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 3506 continue; 3507 3508 if (!queue->do_pack) { 3509 if ((atomic_read(&queue->used_buffers) >= 3510 (QETH_HIGH_WATERMARK_PACK - 3511 QETH_WATERMARK_PACK_FUZZ)) && 3512 !atomic_read(&queue->set_pci_flags_count)) { 3513 /* it's likely that we'll go to packing 3514 * mode soon */ 3515 atomic_inc(&queue->set_pci_flags_count); 3516 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3517 } 3518 } else { 3519 if (!atomic_read(&queue->set_pci_flags_count)) { 3520 /* 3521 * there's no outstanding PCI any more, so we 3522 * have to request a PCI to be sure the the PCI 3523 * will wake at some time in the future then we 3524 * can flush packed buffers that might still be 3525 * hanging around, which can happen if no 3526 * further send was requested by the stack 3527 */ 3528 atomic_inc(&queue->set_pci_flags_count); 3529 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3530 } 3531 } 3532 } 3533 3534 queue->card->dev->trans_start = jiffies; 3535 if (queue->card->options.performance_stats) { 3536 queue->card->perf_stats.outbound_do_qdio_cnt++; 3537 queue->card->perf_stats.outbound_do_qdio_start_time = 3538 qeth_get_micros(); 3539 } 3540 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 3541 if (atomic_read(&queue->set_pci_flags_count)) 3542 qdio_flags |= QDIO_FLAG_PCI_OUT; 3543 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 3544 queue->queue_no, index, count); 3545 if (queue->card->options.performance_stats) 3546 queue->card->perf_stats.outbound_do_qdio_time += 3547 qeth_get_micros() - 3548 queue->card->perf_stats.outbound_do_qdio_start_time; 3549 atomic_add(count, &queue->used_buffers); 3550 if (rc) { 3551 queue->card->stats.tx_errors += count; 3552 /* ignore temporary SIGA errors without busy condition */ 3553 if (rc == -ENOBUFS) 3554 return; 3555 QETH_CARD_TEXT(queue->card, 2, "flushbuf"); 3556 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no); 3557 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index); 3558 QETH_CARD_TEXT_(queue->card, 2, " c%d", count); 3559 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc); 3560 3561 /* this must not happen under normal circumstances. if it 3562 * happens something is really wrong -> recover */ 3563 qeth_schedule_recovery(queue->card); 3564 return; 3565 } 3566 if (queue->card->options.performance_stats) 3567 queue->card->perf_stats.bufs_sent += count; 3568 } 3569 3570 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 3571 { 3572 int index; 3573 int flush_cnt = 0; 3574 int q_was_packing = 0; 3575 3576 /* 3577 * check if weed have to switch to non-packing mode or if 3578 * we have to get a pci flag out on the queue 3579 */ 3580 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 3581 !atomic_read(&queue->set_pci_flags_count)) { 3582 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 3583 QETH_OUT_Q_UNLOCKED) { 3584 /* 3585 * If we get in here, there was no action in 3586 * do_send_packet. So, we check if there is a 3587 * packing buffer to be flushed here. 3588 */ 3589 netif_stop_queue(queue->card->dev); 3590 index = queue->next_buf_to_fill; 3591 q_was_packing = queue->do_pack; 3592 /* queue->do_pack may change */ 3593 barrier(); 3594 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 3595 if (!flush_cnt && 3596 !atomic_read(&queue->set_pci_flags_count)) 3597 flush_cnt += 3598 qeth_flush_buffers_on_no_pci(queue); 3599 if (queue->card->options.performance_stats && 3600 q_was_packing) 3601 queue->card->perf_stats.bufs_sent_pack += 3602 flush_cnt; 3603 if (flush_cnt) 3604 qeth_flush_buffers(queue, index, flush_cnt); 3605 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3606 } 3607 } 3608 } 3609 3610 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue, 3611 unsigned long card_ptr) 3612 { 3613 struct qeth_card *card = (struct qeth_card *)card_ptr; 3614 3615 if (card->dev && (card->dev->flags & IFF_UP)) 3616 napi_schedule(&card->napi); 3617 } 3618 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll); 3619 3620 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq) 3621 { 3622 int rc; 3623 3624 if (card->options.cq == QETH_CQ_NOTAVAILABLE) { 3625 rc = -1; 3626 goto out; 3627 } else { 3628 if (card->options.cq == cq) { 3629 rc = 0; 3630 goto out; 3631 } 3632 3633 if (card->state != CARD_STATE_DOWN && 3634 card->state != CARD_STATE_RECOVER) { 3635 rc = -1; 3636 goto out; 3637 } 3638 3639 qeth_free_qdio_buffers(card); 3640 card->options.cq = cq; 3641 rc = 0; 3642 } 3643 out: 3644 return rc; 3645 3646 } 3647 EXPORT_SYMBOL_GPL(qeth_configure_cq); 3648 3649 3650 static void qeth_qdio_cq_handler(struct qeth_card *card, 3651 unsigned int qdio_err, 3652 unsigned int queue, int first_element, int count) { 3653 struct qeth_qdio_q *cq = card->qdio.c_q; 3654 int i; 3655 int rc; 3656 3657 if (!qeth_is_cq(card, queue)) 3658 goto out; 3659 3660 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element); 3661 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count); 3662 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err); 3663 3664 if (qdio_err) { 3665 netif_stop_queue(card->dev); 3666 qeth_schedule_recovery(card); 3667 goto out; 3668 } 3669 3670 if (card->options.performance_stats) { 3671 card->perf_stats.cq_cnt++; 3672 card->perf_stats.cq_start_time = qeth_get_micros(); 3673 } 3674 3675 for (i = first_element; i < first_element + count; ++i) { 3676 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3677 struct qdio_buffer *buffer = cq->qdio_bufs[bidx]; 3678 int e; 3679 3680 e = 0; 3681 while (buffer->element[e].addr) { 3682 unsigned long phys_aob_addr; 3683 3684 phys_aob_addr = (unsigned long) buffer->element[e].addr; 3685 qeth_qdio_handle_aob(card, phys_aob_addr); 3686 buffer->element[e].addr = NULL; 3687 buffer->element[e].eflags = 0; 3688 buffer->element[e].sflags = 0; 3689 buffer->element[e].length = 0; 3690 3691 ++e; 3692 } 3693 3694 buffer->element[15].eflags = 0; 3695 buffer->element[15].sflags = 0; 3696 } 3697 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue, 3698 card->qdio.c_q->next_buf_to_init, 3699 count); 3700 if (rc) { 3701 dev_warn(&card->gdev->dev, 3702 "QDIO reported an error, rc=%i\n", rc); 3703 QETH_CARD_TEXT(card, 2, "qcqherr"); 3704 } 3705 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init 3706 + count) % QDIO_MAX_BUFFERS_PER_Q; 3707 3708 netif_wake_queue(card->dev); 3709 3710 if (card->options.performance_stats) { 3711 int delta_t = qeth_get_micros(); 3712 delta_t -= card->perf_stats.cq_start_time; 3713 card->perf_stats.cq_time += delta_t; 3714 } 3715 out: 3716 return; 3717 } 3718 3719 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err, 3720 unsigned int queue, int first_elem, int count, 3721 unsigned long card_ptr) 3722 { 3723 struct qeth_card *card = (struct qeth_card *)card_ptr; 3724 3725 QETH_CARD_TEXT_(card, 2, "qihq%d", queue); 3726 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err); 3727 3728 if (qeth_is_cq(card, queue)) 3729 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count); 3730 else if (qdio_err) 3731 qeth_schedule_recovery(card); 3732 3733 3734 } 3735 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler); 3736 3737 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 3738 unsigned int qdio_error, int __queue, int first_element, 3739 int count, unsigned long card_ptr) 3740 { 3741 struct qeth_card *card = (struct qeth_card *) card_ptr; 3742 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 3743 struct qeth_qdio_out_buffer *buffer; 3744 int i; 3745 3746 QETH_CARD_TEXT(card, 6, "qdouhdl"); 3747 if (qdio_error & QDIO_ERROR_FATAL) { 3748 QETH_CARD_TEXT(card, 2, "achkcond"); 3749 netif_stop_queue(card->dev); 3750 qeth_schedule_recovery(card); 3751 return; 3752 } 3753 if (card->options.performance_stats) { 3754 card->perf_stats.outbound_handler_cnt++; 3755 card->perf_stats.outbound_handler_start_time = 3756 qeth_get_micros(); 3757 } 3758 for (i = first_element; i < (first_element + count); ++i) { 3759 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3760 buffer = queue->bufs[bidx]; 3761 qeth_handle_send_error(card, buffer, qdio_error); 3762 3763 if (queue->bufstates && 3764 (queue->bufstates[bidx].flags & 3765 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) { 3766 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED); 3767 3768 if (atomic_cmpxchg(&buffer->state, 3769 QETH_QDIO_BUF_PRIMED, 3770 QETH_QDIO_BUF_PENDING) == 3771 QETH_QDIO_BUF_PRIMED) { 3772 qeth_notify_skbs(queue, buffer, 3773 TX_NOTIFY_PENDING); 3774 } 3775 buffer->aob = queue->bufstates[bidx].aob; 3776 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx); 3777 QETH_CARD_TEXT(queue->card, 5, "aob"); 3778 QETH_CARD_TEXT_(queue->card, 5, "%lx", 3779 virt_to_phys(buffer->aob)); 3780 if (qeth_init_qdio_out_buf(queue, bidx)) { 3781 QETH_CARD_TEXT(card, 2, "outofbuf"); 3782 qeth_schedule_recovery(card); 3783 } 3784 } else { 3785 if (card->options.cq == QETH_CQ_ENABLED) { 3786 enum iucv_tx_notify n; 3787 3788 n = qeth_compute_cq_notification( 3789 buffer->buffer->element[15].sflags, 0); 3790 qeth_notify_skbs(queue, buffer, n); 3791 } 3792 3793 qeth_clear_output_buffer(queue, buffer, 3794 QETH_QDIO_BUF_EMPTY); 3795 } 3796 qeth_cleanup_handled_pending(queue, bidx, 0); 3797 } 3798 atomic_sub(count, &queue->used_buffers); 3799 /* check if we need to do something on this outbound queue */ 3800 if (card->info.type != QETH_CARD_TYPE_IQD) 3801 qeth_check_outbound_queue(queue); 3802 3803 netif_wake_queue(queue->card->dev); 3804 if (card->options.performance_stats) 3805 card->perf_stats.outbound_handler_time += qeth_get_micros() - 3806 card->perf_stats.outbound_handler_start_time; 3807 } 3808 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 3809 3810 /** 3811 * Note: Function assumes that we have 4 outbound queues. 3812 */ 3813 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 3814 int ipv, int cast_type) 3815 { 3816 __be16 *tci; 3817 u8 tos; 3818 3819 if (cast_type && card->info.is_multicast_different) 3820 return card->info.is_multicast_different & 3821 (card->qdio.no_out_queues - 1); 3822 3823 switch (card->qdio.do_prio_queueing) { 3824 case QETH_PRIO_Q_ING_TOS: 3825 case QETH_PRIO_Q_ING_PREC: 3826 switch (ipv) { 3827 case 4: 3828 tos = ipv4_get_dsfield(ip_hdr(skb)); 3829 break; 3830 case 6: 3831 tos = ipv6_get_dsfield(ipv6_hdr(skb)); 3832 break; 3833 default: 3834 return card->qdio.default_out_queue; 3835 } 3836 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC) 3837 return ~tos >> 6 & 3; 3838 if (tos & IPTOS_MINCOST) 3839 return 3; 3840 if (tos & IPTOS_RELIABILITY) 3841 return 2; 3842 if (tos & IPTOS_THROUGHPUT) 3843 return 1; 3844 if (tos & IPTOS_LOWDELAY) 3845 return 0; 3846 break; 3847 case QETH_PRIO_Q_ING_SKB: 3848 if (skb->priority > 5) 3849 return 0; 3850 return ~skb->priority >> 1 & 3; 3851 case QETH_PRIO_Q_ING_VLAN: 3852 tci = &((struct ethhdr *)skb->data)->h_proto; 3853 if (*tci == ETH_P_8021Q) 3854 return ~*(tci + 1) >> (VLAN_PRIO_SHIFT + 1) & 3; 3855 break; 3856 default: 3857 break; 3858 } 3859 return card->qdio.default_out_queue; 3860 } 3861 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 3862 3863 int qeth_get_elements_for_frags(struct sk_buff *skb) 3864 { 3865 int cnt, length, e, elements = 0; 3866 struct skb_frag_struct *frag; 3867 char *data; 3868 3869 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3870 frag = &skb_shinfo(skb)->frags[cnt]; 3871 data = (char *)page_to_phys(skb_frag_page(frag)) + 3872 frag->page_offset; 3873 length = frag->size; 3874 e = PFN_UP((unsigned long)data + length - 1) - 3875 PFN_DOWN((unsigned long)data); 3876 elements += e; 3877 } 3878 return elements; 3879 } 3880 EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags); 3881 3882 int qeth_get_elements_no(struct qeth_card *card, 3883 struct sk_buff *skb, int elems) 3884 { 3885 int dlen = skb->len - skb->data_len; 3886 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) - 3887 PFN_DOWN((unsigned long)skb->data); 3888 3889 elements_needed += qeth_get_elements_for_frags(skb); 3890 3891 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 3892 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 3893 "(Number=%d / Length=%d). Discarded.\n", 3894 (elements_needed+elems), skb->len); 3895 return 0; 3896 } 3897 return elements_needed; 3898 } 3899 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 3900 3901 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len) 3902 { 3903 int hroom, inpage, rest; 3904 3905 if (((unsigned long)skb->data & PAGE_MASK) != 3906 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) { 3907 hroom = skb_headroom(skb); 3908 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE); 3909 rest = len - inpage; 3910 if (rest > hroom) 3911 return 1; 3912 memmove(skb->data - rest, skb->data, skb->len - skb->data_len); 3913 skb->data -= rest; 3914 skb->tail -= rest; 3915 *hdr = (struct qeth_hdr *)skb->data; 3916 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest); 3917 } 3918 return 0; 3919 } 3920 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce); 3921 3922 static inline void __qeth_fill_buffer(struct sk_buff *skb, 3923 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill, 3924 int offset) 3925 { 3926 int length = skb->len - skb->data_len; 3927 int length_here; 3928 int element; 3929 char *data; 3930 int first_lap, cnt; 3931 struct skb_frag_struct *frag; 3932 3933 element = *next_element_to_fill; 3934 data = skb->data; 3935 first_lap = (is_tso == 0 ? 1 : 0); 3936 3937 if (offset >= 0) { 3938 data = skb->data + offset; 3939 length -= offset; 3940 first_lap = 0; 3941 } 3942 3943 while (length > 0) { 3944 /* length_here is the remaining amount of data in this page */ 3945 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3946 if (length < length_here) 3947 length_here = length; 3948 3949 buffer->element[element].addr = data; 3950 buffer->element[element].length = length_here; 3951 length -= length_here; 3952 if (!length) { 3953 if (first_lap) 3954 if (skb_shinfo(skb)->nr_frags) 3955 buffer->element[element].eflags = 3956 SBAL_EFLAGS_FIRST_FRAG; 3957 else 3958 buffer->element[element].eflags = 0; 3959 else 3960 buffer->element[element].eflags = 3961 SBAL_EFLAGS_MIDDLE_FRAG; 3962 } else { 3963 if (first_lap) 3964 buffer->element[element].eflags = 3965 SBAL_EFLAGS_FIRST_FRAG; 3966 else 3967 buffer->element[element].eflags = 3968 SBAL_EFLAGS_MIDDLE_FRAG; 3969 } 3970 data += length_here; 3971 element++; 3972 first_lap = 0; 3973 } 3974 3975 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3976 frag = &skb_shinfo(skb)->frags[cnt]; 3977 data = (char *)page_to_phys(skb_frag_page(frag)) + 3978 frag->page_offset; 3979 length = frag->size; 3980 while (length > 0) { 3981 length_here = PAGE_SIZE - 3982 ((unsigned long) data % PAGE_SIZE); 3983 if (length < length_here) 3984 length_here = length; 3985 3986 buffer->element[element].addr = data; 3987 buffer->element[element].length = length_here; 3988 buffer->element[element].eflags = 3989 SBAL_EFLAGS_MIDDLE_FRAG; 3990 length -= length_here; 3991 data += length_here; 3992 element++; 3993 } 3994 } 3995 3996 if (buffer->element[element - 1].eflags) 3997 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG; 3998 *next_element_to_fill = element; 3999 } 4000 4001 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 4002 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb, 4003 struct qeth_hdr *hdr, int offset, int hd_len) 4004 { 4005 struct qdio_buffer *buffer; 4006 int flush_cnt = 0, hdr_len, large_send = 0; 4007 4008 buffer = buf->buffer; 4009 atomic_inc(&skb->users); 4010 skb_queue_tail(&buf->skb_list, skb); 4011 4012 /*check first on TSO ....*/ 4013 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) { 4014 int element = buf->next_element_to_fill; 4015 4016 hdr_len = sizeof(struct qeth_hdr_tso) + 4017 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len; 4018 /*fill first buffer entry only with header information */ 4019 buffer->element[element].addr = skb->data; 4020 buffer->element[element].length = hdr_len; 4021 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 4022 buf->next_element_to_fill++; 4023 skb->data += hdr_len; 4024 skb->len -= hdr_len; 4025 large_send = 1; 4026 } 4027 4028 if (offset >= 0) { 4029 int element = buf->next_element_to_fill; 4030 buffer->element[element].addr = hdr; 4031 buffer->element[element].length = sizeof(struct qeth_hdr) + 4032 hd_len; 4033 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 4034 buf->is_header[element] = 1; 4035 buf->next_element_to_fill++; 4036 } 4037 4038 __qeth_fill_buffer(skb, buffer, large_send, 4039 (int *)&buf->next_element_to_fill, offset); 4040 4041 if (!queue->do_pack) { 4042 QETH_CARD_TEXT(queue->card, 6, "fillbfnp"); 4043 /* set state to PRIMED -> will be flushed */ 4044 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 4045 flush_cnt = 1; 4046 } else { 4047 QETH_CARD_TEXT(queue->card, 6, "fillbfpa"); 4048 if (queue->card->options.performance_stats) 4049 queue->card->perf_stats.skbs_sent_pack++; 4050 if (buf->next_element_to_fill >= 4051 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 4052 /* 4053 * packed buffer if full -> set state PRIMED 4054 * -> will be flushed 4055 */ 4056 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 4057 flush_cnt = 1; 4058 } 4059 } 4060 return flush_cnt; 4061 } 4062 4063 int qeth_do_send_packet_fast(struct qeth_card *card, 4064 struct qeth_qdio_out_q *queue, struct sk_buff *skb, 4065 struct qeth_hdr *hdr, int elements_needed, 4066 int offset, int hd_len) 4067 { 4068 struct qeth_qdio_out_buffer *buffer; 4069 int index; 4070 4071 /* spin until we get the queue ... */ 4072 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 4073 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 4074 /* ... now we've got the queue */ 4075 index = queue->next_buf_to_fill; 4076 buffer = queue->bufs[queue->next_buf_to_fill]; 4077 /* 4078 * check if buffer is empty to make sure that we do not 'overtake' 4079 * ourselves and try to fill a buffer that is already primed 4080 */ 4081 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 4082 goto out; 4083 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % 4084 QDIO_MAX_BUFFERS_PER_Q; 4085 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 4086 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 4087 qeth_flush_buffers(queue, index, 1); 4088 return 0; 4089 out: 4090 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 4091 return -EBUSY; 4092 } 4093 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 4094 4095 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 4096 struct sk_buff *skb, struct qeth_hdr *hdr, 4097 int elements_needed) 4098 { 4099 struct qeth_qdio_out_buffer *buffer; 4100 int start_index; 4101 int flush_count = 0; 4102 int do_pack = 0; 4103 int tmp; 4104 int rc = 0; 4105 4106 /* spin until we get the queue ... */ 4107 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 4108 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 4109 start_index = queue->next_buf_to_fill; 4110 buffer = queue->bufs[queue->next_buf_to_fill]; 4111 /* 4112 * check if buffer is empty to make sure that we do not 'overtake' 4113 * ourselves and try to fill a buffer that is already primed 4114 */ 4115 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 4116 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 4117 return -EBUSY; 4118 } 4119 /* check if we need to switch packing state of this queue */ 4120 qeth_switch_to_packing_if_needed(queue); 4121 if (queue->do_pack) { 4122 do_pack = 1; 4123 /* does packet fit in current buffer? */ 4124 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 4125 buffer->next_element_to_fill) < elements_needed) { 4126 /* ... no -> set state PRIMED */ 4127 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 4128 flush_count++; 4129 queue->next_buf_to_fill = 4130 (queue->next_buf_to_fill + 1) % 4131 QDIO_MAX_BUFFERS_PER_Q; 4132 buffer = queue->bufs[queue->next_buf_to_fill]; 4133 /* we did a step forward, so check buffer state 4134 * again */ 4135 if (atomic_read(&buffer->state) != 4136 QETH_QDIO_BUF_EMPTY) { 4137 qeth_flush_buffers(queue, start_index, 4138 flush_count); 4139 atomic_set(&queue->state, 4140 QETH_OUT_Q_UNLOCKED); 4141 return -EBUSY; 4142 } 4143 } 4144 } 4145 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0); 4146 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 4147 QDIO_MAX_BUFFERS_PER_Q; 4148 flush_count += tmp; 4149 if (flush_count) 4150 qeth_flush_buffers(queue, start_index, flush_count); 4151 else if (!atomic_read(&queue->set_pci_flags_count)) 4152 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 4153 /* 4154 * queue->state will go from LOCKED -> UNLOCKED or from 4155 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 4156 * (switch packing state or flush buffer to get another pci flag out). 4157 * In that case we will enter this loop 4158 */ 4159 while (atomic_dec_return(&queue->state)) { 4160 flush_count = 0; 4161 start_index = queue->next_buf_to_fill; 4162 /* check if we can go back to non-packing state */ 4163 flush_count += qeth_switch_to_nonpacking_if_needed(queue); 4164 /* 4165 * check if we need to flush a packing buffer to get a pci 4166 * flag out on the queue 4167 */ 4168 if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) 4169 flush_count += qeth_flush_buffers_on_no_pci(queue); 4170 if (flush_count) 4171 qeth_flush_buffers(queue, start_index, flush_count); 4172 } 4173 /* at this point the queue is UNLOCKED again */ 4174 if (queue->card->options.performance_stats && do_pack) 4175 queue->card->perf_stats.bufs_sent_pack += flush_count; 4176 4177 return rc; 4178 } 4179 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 4180 4181 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 4182 struct qeth_reply *reply, unsigned long data) 4183 { 4184 struct qeth_ipa_cmd *cmd; 4185 struct qeth_ipacmd_setadpparms *setparms; 4186 4187 QETH_CARD_TEXT(card, 4, "prmadpcb"); 4188 4189 cmd = (struct qeth_ipa_cmd *) data; 4190 setparms = &(cmd->data.setadapterparms); 4191 4192 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 4193 if (cmd->hdr.return_code) { 4194 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code); 4195 setparms->data.mode = SET_PROMISC_MODE_OFF; 4196 } 4197 card->info.promisc_mode = setparms->data.mode; 4198 return 0; 4199 } 4200 4201 void qeth_setadp_promisc_mode(struct qeth_card *card) 4202 { 4203 enum qeth_ipa_promisc_modes mode; 4204 struct net_device *dev = card->dev; 4205 struct qeth_cmd_buffer *iob; 4206 struct qeth_ipa_cmd *cmd; 4207 4208 QETH_CARD_TEXT(card, 4, "setprom"); 4209 4210 if (((dev->flags & IFF_PROMISC) && 4211 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 4212 (!(dev->flags & IFF_PROMISC) && 4213 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 4214 return; 4215 mode = SET_PROMISC_MODE_OFF; 4216 if (dev->flags & IFF_PROMISC) 4217 mode = SET_PROMISC_MODE_ON; 4218 QETH_CARD_TEXT_(card, 4, "mode:%x", mode); 4219 4220 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 4221 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8); 4222 if (!iob) 4223 return; 4224 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 4225 cmd->data.setadapterparms.data.mode = mode; 4226 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 4227 } 4228 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 4229 4230 int qeth_change_mtu(struct net_device *dev, int new_mtu) 4231 { 4232 struct qeth_card *card; 4233 char dbf_text[15]; 4234 4235 card = dev->ml_priv; 4236 4237 QETH_CARD_TEXT(card, 4, "chgmtu"); 4238 sprintf(dbf_text, "%8x", new_mtu); 4239 QETH_CARD_TEXT(card, 4, dbf_text); 4240 4241 if (new_mtu < 64) 4242 return -EINVAL; 4243 if (new_mtu > 65535) 4244 return -EINVAL; 4245 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && 4246 (!qeth_mtu_is_valid(card, new_mtu))) 4247 return -EINVAL; 4248 dev->mtu = new_mtu; 4249 return 0; 4250 } 4251 EXPORT_SYMBOL_GPL(qeth_change_mtu); 4252 4253 struct net_device_stats *qeth_get_stats(struct net_device *dev) 4254 { 4255 struct qeth_card *card; 4256 4257 card = dev->ml_priv; 4258 4259 QETH_CARD_TEXT(card, 5, "getstat"); 4260 4261 return &card->stats; 4262 } 4263 EXPORT_SYMBOL_GPL(qeth_get_stats); 4264 4265 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 4266 struct qeth_reply *reply, unsigned long data) 4267 { 4268 struct qeth_ipa_cmd *cmd; 4269 4270 QETH_CARD_TEXT(card, 4, "chgmaccb"); 4271 4272 cmd = (struct qeth_ipa_cmd *) data; 4273 if (!card->options.layer2 || 4274 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 4275 memcpy(card->dev->dev_addr, 4276 &cmd->data.setadapterparms.data.change_addr.addr, 4277 OSA_ADDR_LEN); 4278 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 4279 } 4280 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4281 return 0; 4282 } 4283 4284 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 4285 { 4286 int rc; 4287 struct qeth_cmd_buffer *iob; 4288 struct qeth_ipa_cmd *cmd; 4289 4290 QETH_CARD_TEXT(card, 4, "chgmac"); 4291 4292 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 4293 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4294 sizeof(struct qeth_change_addr)); 4295 if (!iob) 4296 return -ENOMEM; 4297 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4298 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 4299 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 4300 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 4301 card->dev->dev_addr, OSA_ADDR_LEN); 4302 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 4303 NULL); 4304 return rc; 4305 } 4306 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 4307 4308 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card, 4309 struct qeth_reply *reply, unsigned long data) 4310 { 4311 struct qeth_ipa_cmd *cmd; 4312 struct qeth_set_access_ctrl *access_ctrl_req; 4313 int fallback = *(int *)reply->param; 4314 4315 QETH_CARD_TEXT(card, 4, "setaccb"); 4316 4317 cmd = (struct qeth_ipa_cmd *) data; 4318 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4319 QETH_DBF_TEXT_(SETUP, 2, "setaccb"); 4320 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4321 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", 4322 cmd->data.setadapterparms.hdr.return_code); 4323 if (cmd->data.setadapterparms.hdr.return_code != 4324 SET_ACCESS_CTRL_RC_SUCCESS) 4325 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n", 4326 card->gdev->dev.kobj.name, 4327 access_ctrl_req->subcmd_code, 4328 cmd->data.setadapterparms.hdr.return_code); 4329 switch (cmd->data.setadapterparms.hdr.return_code) { 4330 case SET_ACCESS_CTRL_RC_SUCCESS: 4331 if (card->options.isolation == ISOLATION_MODE_NONE) { 4332 dev_info(&card->gdev->dev, 4333 "QDIO data connection isolation is deactivated\n"); 4334 } else { 4335 dev_info(&card->gdev->dev, 4336 "QDIO data connection isolation is activated\n"); 4337 } 4338 break; 4339 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED: 4340 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already " 4341 "deactivated\n", dev_name(&card->gdev->dev)); 4342 if (fallback) 4343 card->options.isolation = card->options.prev_isolation; 4344 break; 4345 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED: 4346 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already" 4347 " activated\n", dev_name(&card->gdev->dev)); 4348 if (fallback) 4349 card->options.isolation = card->options.prev_isolation; 4350 break; 4351 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED: 4352 dev_err(&card->gdev->dev, "Adapter does not " 4353 "support QDIO data connection isolation\n"); 4354 break; 4355 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER: 4356 dev_err(&card->gdev->dev, 4357 "Adapter is dedicated. " 4358 "QDIO data connection isolation not supported\n"); 4359 if (fallback) 4360 card->options.isolation = card->options.prev_isolation; 4361 break; 4362 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF: 4363 dev_err(&card->gdev->dev, 4364 "TSO does not permit QDIO data connection isolation\n"); 4365 if (fallback) 4366 card->options.isolation = card->options.prev_isolation; 4367 break; 4368 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED: 4369 dev_err(&card->gdev->dev, "The adjacent switch port does not " 4370 "support reflective relay mode\n"); 4371 if (fallback) 4372 card->options.isolation = card->options.prev_isolation; 4373 break; 4374 case SET_ACCESS_CTRL_RC_REFLREL_FAILED: 4375 dev_err(&card->gdev->dev, "The reflective relay mode cannot be " 4376 "enabled at the adjacent switch port"); 4377 if (fallback) 4378 card->options.isolation = card->options.prev_isolation; 4379 break; 4380 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED: 4381 dev_warn(&card->gdev->dev, "Turning off reflective relay mode " 4382 "at the adjacent switch failed\n"); 4383 break; 4384 default: 4385 /* this should never happen */ 4386 if (fallback) 4387 card->options.isolation = card->options.prev_isolation; 4388 break; 4389 } 4390 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4391 return 0; 4392 } 4393 4394 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card, 4395 enum qeth_ipa_isolation_modes isolation, int fallback) 4396 { 4397 int rc; 4398 struct qeth_cmd_buffer *iob; 4399 struct qeth_ipa_cmd *cmd; 4400 struct qeth_set_access_ctrl *access_ctrl_req; 4401 4402 QETH_CARD_TEXT(card, 4, "setacctl"); 4403 4404 QETH_DBF_TEXT_(SETUP, 2, "setacctl"); 4405 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4406 4407 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL, 4408 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4409 sizeof(struct qeth_set_access_ctrl)); 4410 if (!iob) 4411 return -ENOMEM; 4412 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4413 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4414 access_ctrl_req->subcmd_code = isolation; 4415 4416 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb, 4417 &fallback); 4418 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc); 4419 return rc; 4420 } 4421 4422 int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback) 4423 { 4424 int rc = 0; 4425 4426 QETH_CARD_TEXT(card, 4, "setactlo"); 4427 4428 if ((card->info.type == QETH_CARD_TYPE_OSD || 4429 card->info.type == QETH_CARD_TYPE_OSX) && 4430 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) { 4431 rc = qeth_setadpparms_set_access_ctrl(card, 4432 card->options.isolation, fallback); 4433 if (rc) { 4434 QETH_DBF_MESSAGE(3, 4435 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n", 4436 card->gdev->dev.kobj.name, 4437 rc); 4438 rc = -EOPNOTSUPP; 4439 } 4440 } else if (card->options.isolation != ISOLATION_MODE_NONE) { 4441 card->options.isolation = ISOLATION_MODE_NONE; 4442 4443 dev_err(&card->gdev->dev, "Adapter does not " 4444 "support QDIO data connection isolation\n"); 4445 rc = -EOPNOTSUPP; 4446 } 4447 return rc; 4448 } 4449 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online); 4450 4451 void qeth_tx_timeout(struct net_device *dev) 4452 { 4453 struct qeth_card *card; 4454 4455 card = dev->ml_priv; 4456 QETH_CARD_TEXT(card, 4, "txtimeo"); 4457 card->stats.tx_errors++; 4458 qeth_schedule_recovery(card); 4459 } 4460 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 4461 4462 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 4463 { 4464 struct qeth_card *card = dev->ml_priv; 4465 int rc = 0; 4466 4467 switch (regnum) { 4468 case MII_BMCR: /* Basic mode control register */ 4469 rc = BMCR_FULLDPLX; 4470 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 4471 (card->info.link_type != QETH_LINK_TYPE_OSN) && 4472 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 4473 rc |= BMCR_SPEED100; 4474 break; 4475 case MII_BMSR: /* Basic mode status register */ 4476 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 4477 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 4478 BMSR_100BASE4; 4479 break; 4480 case MII_PHYSID1: /* PHYS ID 1 */ 4481 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 4482 dev->dev_addr[2]; 4483 rc = (rc >> 5) & 0xFFFF; 4484 break; 4485 case MII_PHYSID2: /* PHYS ID 2 */ 4486 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 4487 break; 4488 case MII_ADVERTISE: /* Advertisement control reg */ 4489 rc = ADVERTISE_ALL; 4490 break; 4491 case MII_LPA: /* Link partner ability reg */ 4492 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 4493 LPA_100BASE4 | LPA_LPACK; 4494 break; 4495 case MII_EXPANSION: /* Expansion register */ 4496 break; 4497 case MII_DCOUNTER: /* disconnect counter */ 4498 break; 4499 case MII_FCSCOUNTER: /* false carrier counter */ 4500 break; 4501 case MII_NWAYTEST: /* N-way auto-neg test register */ 4502 break; 4503 case MII_RERRCOUNTER: /* rx error counter */ 4504 rc = card->stats.rx_errors; 4505 break; 4506 case MII_SREVISION: /* silicon revision */ 4507 break; 4508 case MII_RESV1: /* reserved 1 */ 4509 break; 4510 case MII_LBRERROR: /* loopback, rx, bypass error */ 4511 break; 4512 case MII_PHYADDR: /* physical address */ 4513 break; 4514 case MII_RESV2: /* reserved 2 */ 4515 break; 4516 case MII_TPISTATUS: /* TPI status for 10mbps */ 4517 break; 4518 case MII_NCONFIG: /* network interface config */ 4519 break; 4520 default: 4521 break; 4522 } 4523 return rc; 4524 } 4525 EXPORT_SYMBOL_GPL(qeth_mdio_read); 4526 4527 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 4528 struct qeth_cmd_buffer *iob, int len, 4529 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 4530 unsigned long), 4531 void *reply_param) 4532 { 4533 u16 s1, s2; 4534 4535 QETH_CARD_TEXT(card, 4, "sendsnmp"); 4536 4537 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 4538 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 4539 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 4540 /* adjust PDU length fields in IPA_PDU_HEADER */ 4541 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 4542 s2 = (u32) len; 4543 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 4544 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 4545 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 4546 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 4547 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 4548 reply_cb, reply_param); 4549 } 4550 4551 static int qeth_snmp_command_cb(struct qeth_card *card, 4552 struct qeth_reply *reply, unsigned long sdata) 4553 { 4554 struct qeth_ipa_cmd *cmd; 4555 struct qeth_arp_query_info *qinfo; 4556 struct qeth_snmp_cmd *snmp; 4557 unsigned char *data; 4558 __u16 data_len; 4559 4560 QETH_CARD_TEXT(card, 3, "snpcmdcb"); 4561 4562 cmd = (struct qeth_ipa_cmd *) sdata; 4563 data = (unsigned char *)((char *)cmd - reply->offset); 4564 qinfo = (struct qeth_arp_query_info *) reply->param; 4565 snmp = &cmd->data.setadapterparms.data.snmp; 4566 4567 if (cmd->hdr.return_code) { 4568 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code); 4569 return 0; 4570 } 4571 if (cmd->data.setadapterparms.hdr.return_code) { 4572 cmd->hdr.return_code = 4573 cmd->data.setadapterparms.hdr.return_code; 4574 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code); 4575 return 0; 4576 } 4577 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 4578 if (cmd->data.setadapterparms.hdr.seq_no == 1) 4579 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 4580 else 4581 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 4582 4583 /* check if there is enough room in userspace */ 4584 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 4585 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM); 4586 cmd->hdr.return_code = IPA_RC_ENOMEM; 4587 return 0; 4588 } 4589 QETH_CARD_TEXT_(card, 4, "snore%i", 4590 cmd->data.setadapterparms.hdr.used_total); 4591 QETH_CARD_TEXT_(card, 4, "sseqn%i", 4592 cmd->data.setadapterparms.hdr.seq_no); 4593 /*copy entries to user buffer*/ 4594 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 4595 memcpy(qinfo->udata + qinfo->udata_offset, 4596 (char *)snmp, 4597 data_len + offsetof(struct qeth_snmp_cmd, data)); 4598 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 4599 } else { 4600 memcpy(qinfo->udata + qinfo->udata_offset, 4601 (char *)&snmp->request, data_len); 4602 } 4603 qinfo->udata_offset += data_len; 4604 /* check if all replies received ... */ 4605 QETH_CARD_TEXT_(card, 4, "srtot%i", 4606 cmd->data.setadapterparms.hdr.used_total); 4607 QETH_CARD_TEXT_(card, 4, "srseq%i", 4608 cmd->data.setadapterparms.hdr.seq_no); 4609 if (cmd->data.setadapterparms.hdr.seq_no < 4610 cmd->data.setadapterparms.hdr.used_total) 4611 return 1; 4612 return 0; 4613 } 4614 4615 int qeth_snmp_command(struct qeth_card *card, char __user *udata) 4616 { 4617 struct qeth_cmd_buffer *iob; 4618 struct qeth_ipa_cmd *cmd; 4619 struct qeth_snmp_ureq *ureq; 4620 unsigned int req_len; 4621 struct qeth_arp_query_info qinfo = {0, }; 4622 int rc = 0; 4623 4624 QETH_CARD_TEXT(card, 3, "snmpcmd"); 4625 4626 if (card->info.guestlan) 4627 return -EOPNOTSUPP; 4628 4629 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 4630 (!card->options.layer2)) { 4631 return -EOPNOTSUPP; 4632 } 4633 /* skip 4 bytes (data_len struct member) to get req_len */ 4634 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 4635 return -EFAULT; 4636 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE - 4637 sizeof(struct qeth_ipacmd_hdr) - 4638 sizeof(struct qeth_ipacmd_setadpparms_hdr))) 4639 return -EINVAL; 4640 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr)); 4641 if (IS_ERR(ureq)) { 4642 QETH_CARD_TEXT(card, 2, "snmpnome"); 4643 return PTR_ERR(ureq); 4644 } 4645 qinfo.udata_len = ureq->hdr.data_len; 4646 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 4647 if (!qinfo.udata) { 4648 kfree(ureq); 4649 return -ENOMEM; 4650 } 4651 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 4652 4653 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 4654 QETH_SNMP_SETADP_CMDLENGTH + req_len); 4655 if (!iob) { 4656 rc = -ENOMEM; 4657 goto out; 4658 } 4659 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4660 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 4661 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 4662 qeth_snmp_command_cb, (void *)&qinfo); 4663 if (rc) 4664 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 4665 QETH_CARD_IFNAME(card), rc); 4666 else { 4667 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 4668 rc = -EFAULT; 4669 } 4670 out: 4671 kfree(ureq); 4672 kfree(qinfo.udata); 4673 return rc; 4674 } 4675 EXPORT_SYMBOL_GPL(qeth_snmp_command); 4676 4677 static int qeth_setadpparms_query_oat_cb(struct qeth_card *card, 4678 struct qeth_reply *reply, unsigned long data) 4679 { 4680 struct qeth_ipa_cmd *cmd; 4681 struct qeth_qoat_priv *priv; 4682 char *resdata; 4683 int resdatalen; 4684 4685 QETH_CARD_TEXT(card, 3, "qoatcb"); 4686 4687 cmd = (struct qeth_ipa_cmd *)data; 4688 priv = (struct qeth_qoat_priv *)reply->param; 4689 resdatalen = cmd->data.setadapterparms.hdr.cmdlength; 4690 resdata = (char *)data + 28; 4691 4692 if (resdatalen > (priv->buffer_len - priv->response_len)) { 4693 cmd->hdr.return_code = IPA_RC_FFFF; 4694 return 0; 4695 } 4696 4697 memcpy((priv->buffer + priv->response_len), resdata, 4698 resdatalen); 4699 priv->response_len += resdatalen; 4700 4701 if (cmd->data.setadapterparms.hdr.seq_no < 4702 cmd->data.setadapterparms.hdr.used_total) 4703 return 1; 4704 return 0; 4705 } 4706 4707 int qeth_query_oat_command(struct qeth_card *card, char __user *udata) 4708 { 4709 int rc = 0; 4710 struct qeth_cmd_buffer *iob; 4711 struct qeth_ipa_cmd *cmd; 4712 struct qeth_query_oat *oat_req; 4713 struct qeth_query_oat_data oat_data; 4714 struct qeth_qoat_priv priv; 4715 void __user *tmp; 4716 4717 QETH_CARD_TEXT(card, 3, "qoatcmd"); 4718 4719 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) { 4720 rc = -EOPNOTSUPP; 4721 goto out; 4722 } 4723 4724 if (copy_from_user(&oat_data, udata, 4725 sizeof(struct qeth_query_oat_data))) { 4726 rc = -EFAULT; 4727 goto out; 4728 } 4729 4730 priv.buffer_len = oat_data.buffer_len; 4731 priv.response_len = 0; 4732 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL); 4733 if (!priv.buffer) { 4734 rc = -ENOMEM; 4735 goto out; 4736 } 4737 4738 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT, 4739 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4740 sizeof(struct qeth_query_oat)); 4741 if (!iob) { 4742 rc = -ENOMEM; 4743 goto out_free; 4744 } 4745 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4746 oat_req = &cmd->data.setadapterparms.data.query_oat; 4747 oat_req->subcmd_code = oat_data.command; 4748 4749 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb, 4750 &priv); 4751 if (!rc) { 4752 if (is_compat_task()) 4753 tmp = compat_ptr(oat_data.ptr); 4754 else 4755 tmp = (void __user *)(unsigned long)oat_data.ptr; 4756 4757 if (copy_to_user(tmp, priv.buffer, 4758 priv.response_len)) { 4759 rc = -EFAULT; 4760 goto out_free; 4761 } 4762 4763 oat_data.response_len = priv.response_len; 4764 4765 if (copy_to_user(udata, &oat_data, 4766 sizeof(struct qeth_query_oat_data))) 4767 rc = -EFAULT; 4768 } else 4769 if (rc == IPA_RC_FFFF) 4770 rc = -EFAULT; 4771 4772 out_free: 4773 kfree(priv.buffer); 4774 out: 4775 return rc; 4776 } 4777 EXPORT_SYMBOL_GPL(qeth_query_oat_command); 4778 4779 static int qeth_query_card_info_cb(struct qeth_card *card, 4780 struct qeth_reply *reply, unsigned long data) 4781 { 4782 struct qeth_ipa_cmd *cmd; 4783 struct qeth_query_card_info *card_info; 4784 struct carrier_info *carrier_info; 4785 4786 QETH_CARD_TEXT(card, 2, "qcrdincb"); 4787 carrier_info = (struct carrier_info *)reply->param; 4788 cmd = (struct qeth_ipa_cmd *)data; 4789 card_info = &cmd->data.setadapterparms.data.card_info; 4790 if (cmd->data.setadapterparms.hdr.return_code == 0) { 4791 carrier_info->card_type = card_info->card_type; 4792 carrier_info->port_mode = card_info->port_mode; 4793 carrier_info->port_speed = card_info->port_speed; 4794 } 4795 4796 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4797 return 0; 4798 } 4799 4800 static int qeth_query_card_info(struct qeth_card *card, 4801 struct carrier_info *carrier_info) 4802 { 4803 struct qeth_cmd_buffer *iob; 4804 4805 QETH_CARD_TEXT(card, 2, "qcrdinfo"); 4806 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO)) 4807 return -EOPNOTSUPP; 4808 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO, 4809 sizeof(struct qeth_ipacmd_setadpparms_hdr)); 4810 if (!iob) 4811 return -ENOMEM; 4812 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb, 4813 (void *)carrier_info); 4814 } 4815 4816 static inline int qeth_get_qdio_q_format(struct qeth_card *card) 4817 { 4818 switch (card->info.type) { 4819 case QETH_CARD_TYPE_IQD: 4820 return 2; 4821 default: 4822 return 0; 4823 } 4824 } 4825 4826 static void qeth_determine_capabilities(struct qeth_card *card) 4827 { 4828 int rc; 4829 int length; 4830 char *prcd; 4831 struct ccw_device *ddev; 4832 int ddev_offline = 0; 4833 4834 QETH_DBF_TEXT(SETUP, 2, "detcapab"); 4835 ddev = CARD_DDEV(card); 4836 if (!ddev->online) { 4837 ddev_offline = 1; 4838 rc = ccw_device_set_online(ddev); 4839 if (rc) { 4840 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4841 goto out; 4842 } 4843 } 4844 4845 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 4846 if (rc) { 4847 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", 4848 dev_name(&card->gdev->dev), rc); 4849 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4850 goto out_offline; 4851 } 4852 qeth_configure_unitaddr(card, prcd); 4853 if (ddev_offline) 4854 qeth_configure_blkt_default(card, prcd); 4855 kfree(prcd); 4856 4857 rc = qdio_get_ssqd_desc(ddev, &card->ssqd); 4858 if (rc) 4859 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 4860 4861 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt); 4862 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1); 4863 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3); 4864 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt); 4865 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) || 4866 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) || 4867 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) { 4868 dev_info(&card->gdev->dev, 4869 "Completion Queueing supported\n"); 4870 } else { 4871 card->options.cq = QETH_CQ_NOTAVAILABLE; 4872 } 4873 4874 4875 out_offline: 4876 if (ddev_offline == 1) 4877 ccw_device_set_offline(ddev); 4878 out: 4879 return; 4880 } 4881 4882 static inline void qeth_qdio_establish_cq(struct qeth_card *card, 4883 struct qdio_buffer **in_sbal_ptrs, 4884 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) { 4885 int i; 4886 4887 if (card->options.cq == QETH_CQ_ENABLED) { 4888 int offset = QDIO_MAX_BUFFERS_PER_Q * 4889 (card->qdio.no_in_queues - 1); 4890 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1); 4891 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4892 in_sbal_ptrs[offset + i] = (struct qdio_buffer *) 4893 virt_to_phys(card->qdio.c_q->bufs[i].buffer); 4894 } 4895 4896 queue_start_poll[card->qdio.no_in_queues - 1] = NULL; 4897 } 4898 } 4899 4900 static int qeth_qdio_establish(struct qeth_card *card) 4901 { 4902 struct qdio_initialize init_data; 4903 char *qib_param_field; 4904 struct qdio_buffer **in_sbal_ptrs; 4905 void (**queue_start_poll) (struct ccw_device *, int, unsigned long); 4906 struct qdio_buffer **out_sbal_ptrs; 4907 int i, j, k; 4908 int rc = 0; 4909 4910 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 4911 4912 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 4913 GFP_KERNEL); 4914 if (!qib_param_field) { 4915 rc = -ENOMEM; 4916 goto out_free_nothing; 4917 } 4918 4919 qeth_create_qib_param_field(card, qib_param_field); 4920 qeth_create_qib_param_field_blkt(card, qib_param_field); 4921 4922 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues * 4923 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 4924 GFP_KERNEL); 4925 if (!in_sbal_ptrs) { 4926 rc = -ENOMEM; 4927 goto out_free_qib_param; 4928 } 4929 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4930 in_sbal_ptrs[i] = (struct qdio_buffer *) 4931 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 4932 } 4933 4934 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues, 4935 GFP_KERNEL); 4936 if (!queue_start_poll) { 4937 rc = -ENOMEM; 4938 goto out_free_in_sbals; 4939 } 4940 for (i = 0; i < card->qdio.no_in_queues; ++i) 4941 queue_start_poll[i] = card->discipline->start_poll; 4942 4943 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll); 4944 4945 out_sbal_ptrs = 4946 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 4947 sizeof(void *), GFP_KERNEL); 4948 if (!out_sbal_ptrs) { 4949 rc = -ENOMEM; 4950 goto out_free_queue_start_poll; 4951 } 4952 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 4953 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 4954 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 4955 card->qdio.out_qs[i]->bufs[j]->buffer); 4956 } 4957 4958 memset(&init_data, 0, sizeof(struct qdio_initialize)); 4959 init_data.cdev = CARD_DDEV(card); 4960 init_data.q_format = qeth_get_qdio_q_format(card); 4961 init_data.qib_param_field_format = 0; 4962 init_data.qib_param_field = qib_param_field; 4963 init_data.no_input_qs = card->qdio.no_in_queues; 4964 init_data.no_output_qs = card->qdio.no_out_queues; 4965 init_data.input_handler = card->discipline->input_handler; 4966 init_data.output_handler = card->discipline->output_handler; 4967 init_data.queue_start_poll_array = queue_start_poll; 4968 init_data.int_parm = (unsigned long) card; 4969 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 4970 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 4971 init_data.output_sbal_state_array = card->qdio.out_bufstates; 4972 init_data.scan_threshold = 4973 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32; 4974 4975 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 4976 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 4977 rc = qdio_allocate(&init_data); 4978 if (rc) { 4979 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4980 goto out; 4981 } 4982 rc = qdio_establish(&init_data); 4983 if (rc) { 4984 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4985 qdio_free(CARD_DDEV(card)); 4986 } 4987 } 4988 4989 switch (card->options.cq) { 4990 case QETH_CQ_ENABLED: 4991 dev_info(&card->gdev->dev, "Completion Queue support enabled"); 4992 break; 4993 case QETH_CQ_DISABLED: 4994 dev_info(&card->gdev->dev, "Completion Queue support disabled"); 4995 break; 4996 default: 4997 break; 4998 } 4999 out: 5000 kfree(out_sbal_ptrs); 5001 out_free_queue_start_poll: 5002 kfree(queue_start_poll); 5003 out_free_in_sbals: 5004 kfree(in_sbal_ptrs); 5005 out_free_qib_param: 5006 kfree(qib_param_field); 5007 out_free_nothing: 5008 return rc; 5009 } 5010 5011 static void qeth_core_free_card(struct qeth_card *card) 5012 { 5013 5014 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 5015 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 5016 qeth_clean_channel(&card->read); 5017 qeth_clean_channel(&card->write); 5018 if (card->dev) 5019 free_netdev(card->dev); 5020 kfree(card->ip_tbd_list); 5021 qeth_free_qdio_buffers(card); 5022 unregister_service_level(&card->qeth_service_level); 5023 kfree(card); 5024 } 5025 5026 void qeth_trace_features(struct qeth_card *card) 5027 { 5028 QETH_CARD_TEXT(card, 2, "features"); 5029 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs); 5030 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs); 5031 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs); 5032 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs); 5033 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs); 5034 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs); 5035 QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support); 5036 } 5037 EXPORT_SYMBOL_GPL(qeth_trace_features); 5038 5039 static struct ccw_device_id qeth_ids[] = { 5040 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01), 5041 .driver_info = QETH_CARD_TYPE_OSD}, 5042 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05), 5043 .driver_info = QETH_CARD_TYPE_IQD}, 5044 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06), 5045 .driver_info = QETH_CARD_TYPE_OSN}, 5046 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03), 5047 .driver_info = QETH_CARD_TYPE_OSM}, 5048 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02), 5049 .driver_info = QETH_CARD_TYPE_OSX}, 5050 {}, 5051 }; 5052 MODULE_DEVICE_TABLE(ccw, qeth_ids); 5053 5054 static struct ccw_driver qeth_ccw_driver = { 5055 .driver = { 5056 .owner = THIS_MODULE, 5057 .name = "qeth", 5058 }, 5059 .ids = qeth_ids, 5060 .probe = ccwgroup_probe_ccwdev, 5061 .remove = ccwgroup_remove_ccwdev, 5062 }; 5063 5064 int qeth_core_hardsetup_card(struct qeth_card *card) 5065 { 5066 int retries = 3; 5067 int rc; 5068 5069 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 5070 atomic_set(&card->force_alloc_skb, 0); 5071 qeth_update_from_chp_desc(card); 5072 retry: 5073 if (retries < 3) 5074 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", 5075 dev_name(&card->gdev->dev)); 5076 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 5077 ccw_device_set_offline(CARD_DDEV(card)); 5078 ccw_device_set_offline(CARD_WDEV(card)); 5079 ccw_device_set_offline(CARD_RDEV(card)); 5080 qdio_free(CARD_DDEV(card)); 5081 rc = ccw_device_set_online(CARD_RDEV(card)); 5082 if (rc) 5083 goto retriable; 5084 rc = ccw_device_set_online(CARD_WDEV(card)); 5085 if (rc) 5086 goto retriable; 5087 rc = ccw_device_set_online(CARD_DDEV(card)); 5088 if (rc) 5089 goto retriable; 5090 retriable: 5091 if (rc == -ERESTARTSYS) { 5092 QETH_DBF_TEXT(SETUP, 2, "break1"); 5093 return rc; 5094 } else if (rc) { 5095 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 5096 if (--retries < 0) 5097 goto out; 5098 else 5099 goto retry; 5100 } 5101 qeth_determine_capabilities(card); 5102 qeth_init_tokens(card); 5103 qeth_init_func_level(card); 5104 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 5105 if (rc == -ERESTARTSYS) { 5106 QETH_DBF_TEXT(SETUP, 2, "break2"); 5107 return rc; 5108 } else if (rc) { 5109 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 5110 if (--retries < 0) 5111 goto out; 5112 else 5113 goto retry; 5114 } 5115 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 5116 if (rc == -ERESTARTSYS) { 5117 QETH_DBF_TEXT(SETUP, 2, "break3"); 5118 return rc; 5119 } else if (rc) { 5120 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 5121 if (--retries < 0) 5122 goto out; 5123 else 5124 goto retry; 5125 } 5126 card->read_or_write_problem = 0; 5127 rc = qeth_mpc_initialize(card); 5128 if (rc) { 5129 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 5130 goto out; 5131 } 5132 5133 card->options.ipa4.supported_funcs = 0; 5134 card->options.adp.supported_funcs = 0; 5135 card->options.sbp.supported_funcs = 0; 5136 card->info.diagass_support = 0; 5137 rc = qeth_query_ipassists(card, QETH_PROT_IPV4); 5138 if (rc == -ENOMEM) 5139 goto out; 5140 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) { 5141 rc = qeth_query_setadapterparms(card); 5142 if (rc < 0) { 5143 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 5144 goto out; 5145 } 5146 } 5147 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) { 5148 rc = qeth_query_setdiagass(card); 5149 if (rc < 0) { 5150 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 5151 goto out; 5152 } 5153 } 5154 return 0; 5155 out: 5156 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " 5157 "an error on the device\n"); 5158 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", 5159 dev_name(&card->gdev->dev), rc); 5160 return rc; 5161 } 5162 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 5163 5164 static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer, 5165 struct qdio_buffer_element *element, 5166 struct sk_buff **pskb, int offset, int *pfrag, int data_len) 5167 { 5168 struct page *page = virt_to_page(element->addr); 5169 if (*pskb == NULL) { 5170 if (qethbuffer->rx_skb) { 5171 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */ 5172 *pskb = qethbuffer->rx_skb; 5173 qethbuffer->rx_skb = NULL; 5174 } else { 5175 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 5176 if (!(*pskb)) 5177 return -ENOMEM; 5178 } 5179 5180 skb_reserve(*pskb, ETH_HLEN); 5181 if (data_len <= QETH_RX_PULL_LEN) { 5182 memcpy(skb_put(*pskb, data_len), element->addr + offset, 5183 data_len); 5184 } else { 5185 get_page(page); 5186 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN), 5187 element->addr + offset, QETH_RX_PULL_LEN); 5188 skb_fill_page_desc(*pskb, *pfrag, page, 5189 offset + QETH_RX_PULL_LEN, 5190 data_len - QETH_RX_PULL_LEN); 5191 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN; 5192 (*pskb)->len += data_len - QETH_RX_PULL_LEN; 5193 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN; 5194 (*pfrag)++; 5195 } 5196 } else { 5197 get_page(page); 5198 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); 5199 (*pskb)->data_len += data_len; 5200 (*pskb)->len += data_len; 5201 (*pskb)->truesize += data_len; 5202 (*pfrag)++; 5203 } 5204 5205 5206 return 0; 5207 } 5208 5209 static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale) 5210 { 5211 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY); 5212 } 5213 5214 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 5215 struct qeth_qdio_buffer *qethbuffer, 5216 struct qdio_buffer_element **__element, int *__offset, 5217 struct qeth_hdr **hdr) 5218 { 5219 struct qdio_buffer_element *element = *__element; 5220 struct qdio_buffer *buffer = qethbuffer->buffer; 5221 int offset = *__offset; 5222 struct sk_buff *skb = NULL; 5223 int skb_len = 0; 5224 void *data_ptr; 5225 int data_len; 5226 int headroom = 0; 5227 int use_rx_sg = 0; 5228 int frag = 0; 5229 5230 /* qeth_hdr must not cross element boundaries */ 5231 if (element->length < offset + sizeof(struct qeth_hdr)) { 5232 if (qeth_is_last_sbale(element)) 5233 return NULL; 5234 element++; 5235 offset = 0; 5236 if (element->length < sizeof(struct qeth_hdr)) 5237 return NULL; 5238 } 5239 *hdr = element->addr + offset; 5240 5241 offset += sizeof(struct qeth_hdr); 5242 switch ((*hdr)->hdr.l2.id) { 5243 case QETH_HEADER_TYPE_LAYER2: 5244 skb_len = (*hdr)->hdr.l2.pkt_length; 5245 break; 5246 case QETH_HEADER_TYPE_LAYER3: 5247 skb_len = (*hdr)->hdr.l3.length; 5248 headroom = ETH_HLEN; 5249 break; 5250 case QETH_HEADER_TYPE_OSN: 5251 skb_len = (*hdr)->hdr.osn.pdu_length; 5252 headroom = sizeof(struct qeth_hdr); 5253 break; 5254 default: 5255 break; 5256 } 5257 5258 if (!skb_len) 5259 return NULL; 5260 5261 if (((skb_len >= card->options.rx_sg_cb) && 5262 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 5263 (!atomic_read(&card->force_alloc_skb))) || 5264 (card->options.cq == QETH_CQ_ENABLED)) { 5265 use_rx_sg = 1; 5266 } else { 5267 skb = dev_alloc_skb(skb_len + headroom); 5268 if (!skb) 5269 goto no_mem; 5270 if (headroom) 5271 skb_reserve(skb, headroom); 5272 } 5273 5274 data_ptr = element->addr + offset; 5275 while (skb_len) { 5276 data_len = min(skb_len, (int)(element->length - offset)); 5277 if (data_len) { 5278 if (use_rx_sg) { 5279 if (qeth_create_skb_frag(qethbuffer, element, 5280 &skb, offset, &frag, data_len)) 5281 goto no_mem; 5282 } else { 5283 memcpy(skb_put(skb, data_len), data_ptr, 5284 data_len); 5285 } 5286 } 5287 skb_len -= data_len; 5288 if (skb_len) { 5289 if (qeth_is_last_sbale(element)) { 5290 QETH_CARD_TEXT(card, 4, "unexeob"); 5291 QETH_CARD_HEX(card, 2, buffer, sizeof(void *)); 5292 dev_kfree_skb_any(skb); 5293 card->stats.rx_errors++; 5294 return NULL; 5295 } 5296 element++; 5297 offset = 0; 5298 data_ptr = element->addr; 5299 } else { 5300 offset += data_len; 5301 } 5302 } 5303 *__element = element; 5304 *__offset = offset; 5305 if (use_rx_sg && card->options.performance_stats) { 5306 card->perf_stats.sg_skbs_rx++; 5307 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 5308 } 5309 return skb; 5310 no_mem: 5311 if (net_ratelimit()) { 5312 QETH_CARD_TEXT(card, 2, "noskbmem"); 5313 } 5314 card->stats.rx_dropped++; 5315 return NULL; 5316 } 5317 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 5318 5319 static void qeth_unregister_dbf_views(void) 5320 { 5321 int x; 5322 for (x = 0; x < QETH_DBF_INFOS; x++) { 5323 debug_unregister(qeth_dbf[x].id); 5324 qeth_dbf[x].id = NULL; 5325 } 5326 } 5327 5328 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...) 5329 { 5330 char dbf_txt_buf[32]; 5331 va_list args; 5332 5333 if (!debug_level_enabled(id, level)) 5334 return; 5335 va_start(args, fmt); 5336 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 5337 va_end(args); 5338 debug_text_event(id, level, dbf_txt_buf); 5339 } 5340 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 5341 5342 static int qeth_register_dbf_views(void) 5343 { 5344 int ret; 5345 int x; 5346 5347 for (x = 0; x < QETH_DBF_INFOS; x++) { 5348 /* register the areas */ 5349 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 5350 qeth_dbf[x].pages, 5351 qeth_dbf[x].areas, 5352 qeth_dbf[x].len); 5353 if (qeth_dbf[x].id == NULL) { 5354 qeth_unregister_dbf_views(); 5355 return -ENOMEM; 5356 } 5357 5358 /* register a view */ 5359 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 5360 if (ret) { 5361 qeth_unregister_dbf_views(); 5362 return ret; 5363 } 5364 5365 /* set a passing level */ 5366 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 5367 } 5368 5369 return 0; 5370 } 5371 5372 int qeth_core_load_discipline(struct qeth_card *card, 5373 enum qeth_discipline_id discipline) 5374 { 5375 int rc = 0; 5376 mutex_lock(&qeth_mod_mutex); 5377 switch (discipline) { 5378 case QETH_DISCIPLINE_LAYER3: 5379 card->discipline = try_then_request_module( 5380 symbol_get(qeth_l3_discipline), "qeth_l3"); 5381 break; 5382 case QETH_DISCIPLINE_LAYER2: 5383 card->discipline = try_then_request_module( 5384 symbol_get(qeth_l2_discipline), "qeth_l2"); 5385 break; 5386 } 5387 if (!card->discipline) { 5388 dev_err(&card->gdev->dev, "There is no kernel module to " 5389 "support discipline %d\n", discipline); 5390 rc = -EINVAL; 5391 } 5392 mutex_unlock(&qeth_mod_mutex); 5393 return rc; 5394 } 5395 5396 void qeth_core_free_discipline(struct qeth_card *card) 5397 { 5398 if (card->options.layer2) 5399 symbol_put(qeth_l2_discipline); 5400 else 5401 symbol_put(qeth_l3_discipline); 5402 card->discipline = NULL; 5403 } 5404 5405 static const struct device_type qeth_generic_devtype = { 5406 .name = "qeth_generic", 5407 .groups = qeth_generic_attr_groups, 5408 }; 5409 static const struct device_type qeth_osn_devtype = { 5410 .name = "qeth_osn", 5411 .groups = qeth_osn_attr_groups, 5412 }; 5413 5414 #define DBF_NAME_LEN 20 5415 5416 struct qeth_dbf_entry { 5417 char dbf_name[DBF_NAME_LEN]; 5418 debug_info_t *dbf_info; 5419 struct list_head dbf_list; 5420 }; 5421 5422 static LIST_HEAD(qeth_dbf_list); 5423 static DEFINE_MUTEX(qeth_dbf_list_mutex); 5424 5425 static debug_info_t *qeth_get_dbf_entry(char *name) 5426 { 5427 struct qeth_dbf_entry *entry; 5428 debug_info_t *rc = NULL; 5429 5430 mutex_lock(&qeth_dbf_list_mutex); 5431 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) { 5432 if (strcmp(entry->dbf_name, name) == 0) { 5433 rc = entry->dbf_info; 5434 break; 5435 } 5436 } 5437 mutex_unlock(&qeth_dbf_list_mutex); 5438 return rc; 5439 } 5440 5441 static int qeth_add_dbf_entry(struct qeth_card *card, char *name) 5442 { 5443 struct qeth_dbf_entry *new_entry; 5444 5445 card->debug = debug_register(name, 2, 1, 8); 5446 if (!card->debug) { 5447 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf"); 5448 goto err; 5449 } 5450 if (debug_register_view(card->debug, &debug_hex_ascii_view)) 5451 goto err_dbg; 5452 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL); 5453 if (!new_entry) 5454 goto err_dbg; 5455 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN); 5456 new_entry->dbf_info = card->debug; 5457 mutex_lock(&qeth_dbf_list_mutex); 5458 list_add(&new_entry->dbf_list, &qeth_dbf_list); 5459 mutex_unlock(&qeth_dbf_list_mutex); 5460 5461 return 0; 5462 5463 err_dbg: 5464 debug_unregister(card->debug); 5465 err: 5466 return -ENOMEM; 5467 } 5468 5469 static void qeth_clear_dbf_list(void) 5470 { 5471 struct qeth_dbf_entry *entry, *tmp; 5472 5473 mutex_lock(&qeth_dbf_list_mutex); 5474 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) { 5475 list_del(&entry->dbf_list); 5476 debug_unregister(entry->dbf_info); 5477 kfree(entry); 5478 } 5479 mutex_unlock(&qeth_dbf_list_mutex); 5480 } 5481 5482 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 5483 { 5484 struct qeth_card *card; 5485 struct device *dev; 5486 int rc; 5487 unsigned long flags; 5488 char dbf_name[DBF_NAME_LEN]; 5489 5490 QETH_DBF_TEXT(SETUP, 2, "probedev"); 5491 5492 dev = &gdev->dev; 5493 if (!get_device(dev)) 5494 return -ENODEV; 5495 5496 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); 5497 5498 card = qeth_alloc_card(); 5499 if (!card) { 5500 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 5501 rc = -ENOMEM; 5502 goto err_dev; 5503 } 5504 5505 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s", 5506 dev_name(&gdev->dev)); 5507 card->debug = qeth_get_dbf_entry(dbf_name); 5508 if (!card->debug) { 5509 rc = qeth_add_dbf_entry(card, dbf_name); 5510 if (rc) 5511 goto err_card; 5512 } 5513 5514 card->read.ccwdev = gdev->cdev[0]; 5515 card->write.ccwdev = gdev->cdev[1]; 5516 card->data.ccwdev = gdev->cdev[2]; 5517 dev_set_drvdata(&gdev->dev, card); 5518 card->gdev = gdev; 5519 gdev->cdev[0]->handler = qeth_irq; 5520 gdev->cdev[1]->handler = qeth_irq; 5521 gdev->cdev[2]->handler = qeth_irq; 5522 5523 rc = qeth_determine_card_type(card); 5524 if (rc) { 5525 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 5526 goto err_card; 5527 } 5528 rc = qeth_setup_card(card); 5529 if (rc) { 5530 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 5531 goto err_card; 5532 } 5533 5534 if (card->info.type == QETH_CARD_TYPE_OSN) 5535 gdev->dev.type = &qeth_osn_devtype; 5536 else 5537 gdev->dev.type = &qeth_generic_devtype; 5538 5539 switch (card->info.type) { 5540 case QETH_CARD_TYPE_OSN: 5541 case QETH_CARD_TYPE_OSM: 5542 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); 5543 if (rc) 5544 goto err_card; 5545 rc = card->discipline->setup(card->gdev); 5546 if (rc) 5547 goto err_disc; 5548 case QETH_CARD_TYPE_OSD: 5549 case QETH_CARD_TYPE_OSX: 5550 default: 5551 break; 5552 } 5553 5554 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5555 list_add_tail(&card->list, &qeth_core_card_list.list); 5556 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5557 5558 qeth_determine_capabilities(card); 5559 return 0; 5560 5561 err_disc: 5562 qeth_core_free_discipline(card); 5563 err_card: 5564 qeth_core_free_card(card); 5565 err_dev: 5566 put_device(dev); 5567 return rc; 5568 } 5569 5570 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 5571 { 5572 unsigned long flags; 5573 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5574 5575 QETH_DBF_TEXT(SETUP, 2, "removedv"); 5576 5577 if (card->discipline) { 5578 card->discipline->remove(gdev); 5579 qeth_core_free_discipline(card); 5580 } 5581 5582 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5583 list_del(&card->list); 5584 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5585 qeth_core_free_card(card); 5586 dev_set_drvdata(&gdev->dev, NULL); 5587 put_device(&gdev->dev); 5588 return; 5589 } 5590 5591 static int qeth_core_set_online(struct ccwgroup_device *gdev) 5592 { 5593 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5594 int rc = 0; 5595 int def_discipline; 5596 5597 if (!card->discipline) { 5598 if (card->info.type == QETH_CARD_TYPE_IQD) 5599 def_discipline = QETH_DISCIPLINE_LAYER3; 5600 else 5601 def_discipline = QETH_DISCIPLINE_LAYER2; 5602 rc = qeth_core_load_discipline(card, def_discipline); 5603 if (rc) 5604 goto err; 5605 rc = card->discipline->setup(card->gdev); 5606 if (rc) 5607 goto err; 5608 } 5609 rc = card->discipline->set_online(gdev); 5610 err: 5611 return rc; 5612 } 5613 5614 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 5615 { 5616 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5617 return card->discipline->set_offline(gdev); 5618 } 5619 5620 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 5621 { 5622 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5623 if (card->discipline && card->discipline->shutdown) 5624 card->discipline->shutdown(gdev); 5625 } 5626 5627 static int qeth_core_prepare(struct ccwgroup_device *gdev) 5628 { 5629 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5630 if (card->discipline && card->discipline->prepare) 5631 return card->discipline->prepare(gdev); 5632 return 0; 5633 } 5634 5635 static void qeth_core_complete(struct ccwgroup_device *gdev) 5636 { 5637 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5638 if (card->discipline && card->discipline->complete) 5639 card->discipline->complete(gdev); 5640 } 5641 5642 static int qeth_core_freeze(struct ccwgroup_device *gdev) 5643 { 5644 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5645 if (card->discipline && card->discipline->freeze) 5646 return card->discipline->freeze(gdev); 5647 return 0; 5648 } 5649 5650 static int qeth_core_thaw(struct ccwgroup_device *gdev) 5651 { 5652 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5653 if (card->discipline && card->discipline->thaw) 5654 return card->discipline->thaw(gdev); 5655 return 0; 5656 } 5657 5658 static int qeth_core_restore(struct ccwgroup_device *gdev) 5659 { 5660 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5661 if (card->discipline && card->discipline->restore) 5662 return card->discipline->restore(gdev); 5663 return 0; 5664 } 5665 5666 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 5667 .driver = { 5668 .owner = THIS_MODULE, 5669 .name = "qeth", 5670 }, 5671 .setup = qeth_core_probe_device, 5672 .remove = qeth_core_remove_device, 5673 .set_online = qeth_core_set_online, 5674 .set_offline = qeth_core_set_offline, 5675 .shutdown = qeth_core_shutdown, 5676 .prepare = qeth_core_prepare, 5677 .complete = qeth_core_complete, 5678 .freeze = qeth_core_freeze, 5679 .thaw = qeth_core_thaw, 5680 .restore = qeth_core_restore, 5681 }; 5682 5683 static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv, 5684 const char *buf, size_t count) 5685 { 5686 int err; 5687 5688 err = ccwgroup_create_dev(qeth_core_root_dev, 5689 &qeth_core_ccwgroup_driver, 3, buf); 5690 5691 return err ? err : count; 5692 } 5693 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); 5694 5695 static struct attribute *qeth_drv_attrs[] = { 5696 &driver_attr_group.attr, 5697 NULL, 5698 }; 5699 static struct attribute_group qeth_drv_attr_group = { 5700 .attrs = qeth_drv_attrs, 5701 }; 5702 static const struct attribute_group *qeth_drv_attr_groups[] = { 5703 &qeth_drv_attr_group, 5704 NULL, 5705 }; 5706 5707 static struct { 5708 const char str[ETH_GSTRING_LEN]; 5709 } qeth_ethtool_stats_keys[] = { 5710 /* 0 */{"rx skbs"}, 5711 {"rx buffers"}, 5712 {"tx skbs"}, 5713 {"tx buffers"}, 5714 {"tx skbs no packing"}, 5715 {"tx buffers no packing"}, 5716 {"tx skbs packing"}, 5717 {"tx buffers packing"}, 5718 {"tx sg skbs"}, 5719 {"tx sg frags"}, 5720 /* 10 */{"rx sg skbs"}, 5721 {"rx sg frags"}, 5722 {"rx sg page allocs"}, 5723 {"tx large kbytes"}, 5724 {"tx large count"}, 5725 {"tx pk state ch n->p"}, 5726 {"tx pk state ch p->n"}, 5727 {"tx pk watermark low"}, 5728 {"tx pk watermark high"}, 5729 {"queue 0 buffer usage"}, 5730 /* 20 */{"queue 1 buffer usage"}, 5731 {"queue 2 buffer usage"}, 5732 {"queue 3 buffer usage"}, 5733 {"rx poll time"}, 5734 {"rx poll count"}, 5735 {"rx do_QDIO time"}, 5736 {"rx do_QDIO count"}, 5737 {"tx handler time"}, 5738 {"tx handler count"}, 5739 {"tx time"}, 5740 /* 30 */{"tx count"}, 5741 {"tx do_QDIO time"}, 5742 {"tx do_QDIO count"}, 5743 {"tx csum"}, 5744 {"tx lin"}, 5745 {"cq handler count"}, 5746 {"cq handler time"} 5747 }; 5748 5749 int qeth_core_get_sset_count(struct net_device *dev, int stringset) 5750 { 5751 switch (stringset) { 5752 case ETH_SS_STATS: 5753 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 5754 default: 5755 return -EINVAL; 5756 } 5757 } 5758 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count); 5759 5760 void qeth_core_get_ethtool_stats(struct net_device *dev, 5761 struct ethtool_stats *stats, u64 *data) 5762 { 5763 struct qeth_card *card = dev->ml_priv; 5764 data[0] = card->stats.rx_packets - 5765 card->perf_stats.initial_rx_packets; 5766 data[1] = card->perf_stats.bufs_rec; 5767 data[2] = card->stats.tx_packets - 5768 card->perf_stats.initial_tx_packets; 5769 data[3] = card->perf_stats.bufs_sent; 5770 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 5771 - card->perf_stats.skbs_sent_pack; 5772 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 5773 data[6] = card->perf_stats.skbs_sent_pack; 5774 data[7] = card->perf_stats.bufs_sent_pack; 5775 data[8] = card->perf_stats.sg_skbs_sent; 5776 data[9] = card->perf_stats.sg_frags_sent; 5777 data[10] = card->perf_stats.sg_skbs_rx; 5778 data[11] = card->perf_stats.sg_frags_rx; 5779 data[12] = card->perf_stats.sg_alloc_page_rx; 5780 data[13] = (card->perf_stats.large_send_bytes >> 10); 5781 data[14] = card->perf_stats.large_send_cnt; 5782 data[15] = card->perf_stats.sc_dp_p; 5783 data[16] = card->perf_stats.sc_p_dp; 5784 data[17] = QETH_LOW_WATERMARK_PACK; 5785 data[18] = QETH_HIGH_WATERMARK_PACK; 5786 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 5787 data[20] = (card->qdio.no_out_queues > 1) ? 5788 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 5789 data[21] = (card->qdio.no_out_queues > 2) ? 5790 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 5791 data[22] = (card->qdio.no_out_queues > 3) ? 5792 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 5793 data[23] = card->perf_stats.inbound_time; 5794 data[24] = card->perf_stats.inbound_cnt; 5795 data[25] = card->perf_stats.inbound_do_qdio_time; 5796 data[26] = card->perf_stats.inbound_do_qdio_cnt; 5797 data[27] = card->perf_stats.outbound_handler_time; 5798 data[28] = card->perf_stats.outbound_handler_cnt; 5799 data[29] = card->perf_stats.outbound_time; 5800 data[30] = card->perf_stats.outbound_cnt; 5801 data[31] = card->perf_stats.outbound_do_qdio_time; 5802 data[32] = card->perf_stats.outbound_do_qdio_cnt; 5803 data[33] = card->perf_stats.tx_csum; 5804 data[34] = card->perf_stats.tx_lin; 5805 data[35] = card->perf_stats.cq_cnt; 5806 data[36] = card->perf_stats.cq_time; 5807 } 5808 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 5809 5810 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 5811 { 5812 switch (stringset) { 5813 case ETH_SS_STATS: 5814 memcpy(data, &qeth_ethtool_stats_keys, 5815 sizeof(qeth_ethtool_stats_keys)); 5816 break; 5817 default: 5818 WARN_ON(1); 5819 break; 5820 } 5821 } 5822 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 5823 5824 void qeth_core_get_drvinfo(struct net_device *dev, 5825 struct ethtool_drvinfo *info) 5826 { 5827 struct qeth_card *card = dev->ml_priv; 5828 5829 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3", 5830 sizeof(info->driver)); 5831 strlcpy(info->version, "1.0", sizeof(info->version)); 5832 strlcpy(info->fw_version, card->info.mcl_level, 5833 sizeof(info->fw_version)); 5834 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s", 5835 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card)); 5836 } 5837 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 5838 5839 /* Helper function to fill 'advertizing' and 'supported' which are the same. */ 5840 /* Autoneg and full-duplex are supported and advertized uncondionally. */ 5841 /* Always advertize and support all speeds up to specified, and only one */ 5842 /* specified port type. */ 5843 static void qeth_set_ecmd_adv_sup(struct ethtool_cmd *ecmd, 5844 int maxspeed, int porttype) 5845 { 5846 int port_sup, port_adv, spd_sup, spd_adv; 5847 5848 switch (porttype) { 5849 case PORT_TP: 5850 port_sup = SUPPORTED_TP; 5851 port_adv = ADVERTISED_TP; 5852 break; 5853 case PORT_FIBRE: 5854 port_sup = SUPPORTED_FIBRE; 5855 port_adv = ADVERTISED_FIBRE; 5856 break; 5857 default: 5858 port_sup = SUPPORTED_TP; 5859 port_adv = ADVERTISED_TP; 5860 WARN_ON_ONCE(1); 5861 } 5862 5863 /* "Fallthrough" case'es ordered from high to low result in setting */ 5864 /* flags cumulatively, starting from the specified speed and down to */ 5865 /* the lowest possible. */ 5866 spd_sup = 0; 5867 spd_adv = 0; 5868 switch (maxspeed) { 5869 case SPEED_10000: 5870 spd_sup |= SUPPORTED_10000baseT_Full; 5871 spd_adv |= ADVERTISED_10000baseT_Full; 5872 case SPEED_1000: 5873 spd_sup |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full; 5874 spd_adv |= ADVERTISED_1000baseT_Half | 5875 ADVERTISED_1000baseT_Full; 5876 case SPEED_100: 5877 spd_sup |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full; 5878 spd_adv |= ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full; 5879 case SPEED_10: 5880 spd_sup |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full; 5881 spd_adv |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full; 5882 break; 5883 default: 5884 spd_sup = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full; 5885 spd_adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full; 5886 WARN_ON_ONCE(1); 5887 } 5888 ecmd->advertising = ADVERTISED_Autoneg | port_adv | spd_adv; 5889 ecmd->supported = SUPPORTED_Autoneg | port_sup | spd_sup; 5890 } 5891 5892 int qeth_core_ethtool_get_settings(struct net_device *netdev, 5893 struct ethtool_cmd *ecmd) 5894 { 5895 struct qeth_card *card = netdev->ml_priv; 5896 enum qeth_link_types link_type; 5897 struct carrier_info carrier_info; 5898 int rc; 5899 u32 speed; 5900 5901 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 5902 link_type = QETH_LINK_TYPE_10GBIT_ETH; 5903 else 5904 link_type = card->info.link_type; 5905 5906 ecmd->transceiver = XCVR_INTERNAL; 5907 ecmd->duplex = DUPLEX_FULL; 5908 ecmd->autoneg = AUTONEG_ENABLE; 5909 5910 switch (link_type) { 5911 case QETH_LINK_TYPE_FAST_ETH: 5912 case QETH_LINK_TYPE_LANE_ETH100: 5913 qeth_set_ecmd_adv_sup(ecmd, SPEED_100, PORT_TP); 5914 speed = SPEED_100; 5915 ecmd->port = PORT_TP; 5916 break; 5917 5918 case QETH_LINK_TYPE_GBIT_ETH: 5919 case QETH_LINK_TYPE_LANE_ETH1000: 5920 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE); 5921 speed = SPEED_1000; 5922 ecmd->port = PORT_FIBRE; 5923 break; 5924 5925 case QETH_LINK_TYPE_10GBIT_ETH: 5926 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE); 5927 speed = SPEED_10000; 5928 ecmd->port = PORT_FIBRE; 5929 break; 5930 5931 default: 5932 qeth_set_ecmd_adv_sup(ecmd, SPEED_10, PORT_TP); 5933 speed = SPEED_10; 5934 ecmd->port = PORT_TP; 5935 } 5936 ethtool_cmd_speed_set(ecmd, speed); 5937 5938 /* Check if we can obtain more accurate information. */ 5939 /* If QUERY_CARD_INFO command is not supported or fails, */ 5940 /* just return the heuristics that was filled above. */ 5941 if (!qeth_card_hw_is_reachable(card)) 5942 return -ENODEV; 5943 rc = qeth_query_card_info(card, &carrier_info); 5944 if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */ 5945 return 0; 5946 if (rc) /* report error from the hardware operation */ 5947 return rc; 5948 /* on success, fill in the information got from the hardware */ 5949 5950 netdev_dbg(netdev, 5951 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n", 5952 carrier_info.card_type, 5953 carrier_info.port_mode, 5954 carrier_info.port_speed); 5955 5956 /* Update attributes for which we've obtained more authoritative */ 5957 /* information, leave the rest the way they where filled above. */ 5958 switch (carrier_info.card_type) { 5959 case CARD_INFO_TYPE_1G_COPPER_A: 5960 case CARD_INFO_TYPE_1G_COPPER_B: 5961 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_TP); 5962 ecmd->port = PORT_TP; 5963 break; 5964 case CARD_INFO_TYPE_1G_FIBRE_A: 5965 case CARD_INFO_TYPE_1G_FIBRE_B: 5966 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE); 5967 ecmd->port = PORT_FIBRE; 5968 break; 5969 case CARD_INFO_TYPE_10G_FIBRE_A: 5970 case CARD_INFO_TYPE_10G_FIBRE_B: 5971 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE); 5972 ecmd->port = PORT_FIBRE; 5973 break; 5974 } 5975 5976 switch (carrier_info.port_mode) { 5977 case CARD_INFO_PORTM_FULLDUPLEX: 5978 ecmd->duplex = DUPLEX_FULL; 5979 break; 5980 case CARD_INFO_PORTM_HALFDUPLEX: 5981 ecmd->duplex = DUPLEX_HALF; 5982 break; 5983 } 5984 5985 switch (carrier_info.port_speed) { 5986 case CARD_INFO_PORTS_10M: 5987 speed = SPEED_10; 5988 break; 5989 case CARD_INFO_PORTS_100M: 5990 speed = SPEED_100; 5991 break; 5992 case CARD_INFO_PORTS_1G: 5993 speed = SPEED_1000; 5994 break; 5995 case CARD_INFO_PORTS_10G: 5996 speed = SPEED_10000; 5997 break; 5998 } 5999 ethtool_cmd_speed_set(ecmd, speed); 6000 6001 return 0; 6002 } 6003 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); 6004 6005 static int __init qeth_core_init(void) 6006 { 6007 int rc; 6008 6009 pr_info("loading core functions\n"); 6010 INIT_LIST_HEAD(&qeth_core_card_list.list); 6011 INIT_LIST_HEAD(&qeth_dbf_list); 6012 rwlock_init(&qeth_core_card_list.rwlock); 6013 mutex_init(&qeth_mod_mutex); 6014 6015 qeth_wq = create_singlethread_workqueue("qeth_wq"); 6016 6017 rc = qeth_register_dbf_views(); 6018 if (rc) 6019 goto out_err; 6020 qeth_core_root_dev = root_device_register("qeth"); 6021 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev); 6022 if (rc) 6023 goto register_err; 6024 qeth_core_header_cache = kmem_cache_create("qeth_hdr", 6025 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); 6026 if (!qeth_core_header_cache) { 6027 rc = -ENOMEM; 6028 goto slab_err; 6029 } 6030 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf", 6031 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL); 6032 if (!qeth_qdio_outbuf_cache) { 6033 rc = -ENOMEM; 6034 goto cqslab_err; 6035 } 6036 rc = ccw_driver_register(&qeth_ccw_driver); 6037 if (rc) 6038 goto ccw_err; 6039 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups; 6040 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 6041 if (rc) 6042 goto ccwgroup_err; 6043 6044 return 0; 6045 6046 ccwgroup_err: 6047 ccw_driver_unregister(&qeth_ccw_driver); 6048 ccw_err: 6049 kmem_cache_destroy(qeth_qdio_outbuf_cache); 6050 cqslab_err: 6051 kmem_cache_destroy(qeth_core_header_cache); 6052 slab_err: 6053 root_device_unregister(qeth_core_root_dev); 6054 register_err: 6055 qeth_unregister_dbf_views(); 6056 out_err: 6057 pr_err("Initializing the qeth device driver failed\n"); 6058 return rc; 6059 } 6060 6061 static void __exit qeth_core_exit(void) 6062 { 6063 qeth_clear_dbf_list(); 6064 destroy_workqueue(qeth_wq); 6065 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 6066 ccw_driver_unregister(&qeth_ccw_driver); 6067 kmem_cache_destroy(qeth_qdio_outbuf_cache); 6068 kmem_cache_destroy(qeth_core_header_cache); 6069 root_device_unregister(qeth_core_root_dev); 6070 qeth_unregister_dbf_views(); 6071 pr_info("core functions removed\n"); 6072 } 6073 6074 module_init(qeth_core_init); 6075 module_exit(qeth_core_exit); 6076 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 6077 MODULE_DESCRIPTION("qeth core functions"); 6078 MODULE_LICENSE("GPL"); 6079