1 /* 2 * driver/s390/cio/qdio_setup.c 3 * 4 * qdio queue initialization 5 * 6 * Copyright (C) IBM Corp. 2008 7 * Author(s): Jan Glauber <jang@linux.vnet.ibm.com> 8 */ 9 #include <linux/kernel.h> 10 #include <linux/slab.h> 11 #include <asm/qdio.h> 12 13 #include "cio.h" 14 #include "css.h" 15 #include "device.h" 16 #include "ioasm.h" 17 #include "chsc.h" 18 #include "qdio.h" 19 #include "qdio_debug.h" 20 21 static struct kmem_cache *qdio_q_cache; 22 23 /* 24 * qebsm is only available under 64bit but the adapter sets the feature 25 * flag anyway, so we manually override it. 26 */ 27 static inline int qebsm_possible(void) 28 { 29 #ifdef CONFIG_64BIT 30 return css_general_characteristics.qebsm; 31 #endif 32 return 0; 33 } 34 35 /* 36 * qib_param_field: pointer to 128 bytes or NULL, if no param field 37 * nr_input_qs: pointer to nr_queues*128 words of data or NULL 38 */ 39 static void set_impl_params(struct qdio_irq *irq_ptr, 40 unsigned int qib_param_field_format, 41 unsigned char *qib_param_field, 42 unsigned long *input_slib_elements, 43 unsigned long *output_slib_elements) 44 { 45 struct qdio_q *q; 46 int i, j; 47 48 if (!irq_ptr) 49 return; 50 51 irq_ptr->qib.pfmt = qib_param_field_format; 52 if (qib_param_field) 53 memcpy(irq_ptr->qib.parm, qib_param_field, 54 QDIO_MAX_BUFFERS_PER_Q); 55 56 if (!input_slib_elements) 57 goto output; 58 59 for_each_input_queue(irq_ptr, q, i) { 60 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) 61 q->slib->slibe[j].parms = 62 input_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j]; 63 } 64 output: 65 if (!output_slib_elements) 66 return; 67 68 for_each_output_queue(irq_ptr, q, i) { 69 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) 70 q->slib->slibe[j].parms = 71 output_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j]; 72 } 73 } 74 75 static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues) 76 { 77 struct qdio_q *q; 78 int i; 79 80 for (i = 0; i < nr_queues; i++) { 81 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL); 82 if (!q) 83 return -ENOMEM; 84 85 q->slib = (struct slib *) __get_free_page(GFP_KERNEL); 86 if (!q->slib) { 87 kmem_cache_free(qdio_q_cache, q); 88 return -ENOMEM; 89 } 90 irq_ptr_qs[i] = q; 91 } 92 return 0; 93 } 94 95 int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs, int nr_output_qs) 96 { 97 int rc; 98 99 rc = __qdio_allocate_qs(irq_ptr->input_qs, nr_input_qs); 100 if (rc) 101 return rc; 102 rc = __qdio_allocate_qs(irq_ptr->output_qs, nr_output_qs); 103 return rc; 104 } 105 106 static void setup_queues_misc(struct qdio_q *q, struct qdio_irq *irq_ptr, 107 qdio_handler_t *handler, int i) 108 { 109 struct slib *slib = q->slib; 110 111 /* queue must be cleared for qdio_establish */ 112 memset(q, 0, sizeof(*q)); 113 memset(slib, 0, PAGE_SIZE); 114 q->slib = slib; 115 q->irq_ptr = irq_ptr; 116 q->mask = 1 << (31 - i); 117 q->nr = i; 118 q->handler = handler; 119 } 120 121 static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr, 122 void **sbals_array, int i) 123 { 124 struct qdio_q *prev; 125 int j; 126 127 DBF_HEX(&q, sizeof(void *)); 128 q->sl = (struct sl *)((char *)q->slib + PAGE_SIZE / 2); 129 130 /* fill in sbal */ 131 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) { 132 q->sbal[j] = *sbals_array++; 133 BUG_ON((unsigned long)q->sbal[j] & 0xff); 134 } 135 136 /* fill in slib */ 137 if (i > 0) { 138 prev = (q->is_input_q) ? irq_ptr->input_qs[i - 1] 139 : irq_ptr->output_qs[i - 1]; 140 prev->slib->nsliba = (unsigned long)q->slib; 141 } 142 143 q->slib->sla = (unsigned long)q->sl; 144 q->slib->slsba = (unsigned long)&q->slsb.val[0]; 145 146 /* fill in sl */ 147 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) 148 q->sl->element[j].sbal = (unsigned long)q->sbal[j]; 149 } 150 151 static void setup_queues(struct qdio_irq *irq_ptr, 152 struct qdio_initialize *qdio_init) 153 { 154 struct qdio_q *q; 155 void **input_sbal_array = qdio_init->input_sbal_addr_array; 156 void **output_sbal_array = qdio_init->output_sbal_addr_array; 157 int i; 158 159 for_each_input_queue(irq_ptr, q, i) { 160 DBF_EVENT("in-q:%1d", i); 161 setup_queues_misc(q, irq_ptr, qdio_init->input_handler, i); 162 163 q->is_input_q = 1; 164 q->u.in.queue_start_poll = qdio_init->queue_start_poll; 165 setup_storage_lists(q, irq_ptr, input_sbal_array, i); 166 input_sbal_array += QDIO_MAX_BUFFERS_PER_Q; 167 168 if (is_thinint_irq(irq_ptr)) 169 tasklet_init(&q->tasklet, tiqdio_inbound_processing, 170 (unsigned long) q); 171 else 172 tasklet_init(&q->tasklet, qdio_inbound_processing, 173 (unsigned long) q); 174 } 175 176 for_each_output_queue(irq_ptr, q, i) { 177 DBF_EVENT("outq:%1d", i); 178 setup_queues_misc(q, irq_ptr, qdio_init->output_handler, i); 179 180 q->is_input_q = 0; 181 setup_storage_lists(q, irq_ptr, output_sbal_array, i); 182 output_sbal_array += QDIO_MAX_BUFFERS_PER_Q; 183 184 tasklet_init(&q->tasklet, qdio_outbound_processing, 185 (unsigned long) q); 186 setup_timer(&q->u.out.timer, (void(*)(unsigned long)) 187 &qdio_outbound_timer, (unsigned long)q); 188 } 189 } 190 191 static void process_ac_flags(struct qdio_irq *irq_ptr, unsigned char qdioac) 192 { 193 if (qdioac & AC1_SIGA_INPUT_NEEDED) 194 irq_ptr->siga_flag.input = 1; 195 if (qdioac & AC1_SIGA_OUTPUT_NEEDED) 196 irq_ptr->siga_flag.output = 1; 197 if (qdioac & AC1_SIGA_SYNC_NEEDED) 198 irq_ptr->siga_flag.sync = 1; 199 if (qdioac & AC1_AUTOMATIC_SYNC_ON_THININT) 200 irq_ptr->siga_flag.no_sync_ti = 1; 201 if (qdioac & AC1_AUTOMATIC_SYNC_ON_OUT_PCI) 202 irq_ptr->siga_flag.no_sync_out_pci = 1; 203 204 if (irq_ptr->siga_flag.no_sync_out_pci && 205 irq_ptr->siga_flag.no_sync_ti) 206 irq_ptr->siga_flag.no_sync_out_ti = 1; 207 } 208 209 static void check_and_setup_qebsm(struct qdio_irq *irq_ptr, 210 unsigned char qdioac, unsigned long token) 211 { 212 if (!(irq_ptr->qib.rflags & QIB_RFLAGS_ENABLE_QEBSM)) 213 goto no_qebsm; 214 if (!(qdioac & AC1_SC_QEBSM_AVAILABLE) || 215 (!(qdioac & AC1_SC_QEBSM_ENABLED))) 216 goto no_qebsm; 217 218 irq_ptr->sch_token = token; 219 220 DBF_EVENT("V=V:1"); 221 DBF_EVENT("%8lx", irq_ptr->sch_token); 222 return; 223 224 no_qebsm: 225 irq_ptr->sch_token = 0; 226 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM; 227 DBF_EVENT("noV=V"); 228 } 229 230 /* 231 * If there is a qdio_irq we use the chsc_page and store the information 232 * in the qdio_irq, otherwise we copy it to the specified structure. 233 */ 234 int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr, 235 struct subchannel_id *schid, 236 struct qdio_ssqd_desc *data) 237 { 238 struct chsc_ssqd_area *ssqd; 239 int rc; 240 241 DBF_EVENT("getssqd:%4x", schid->sch_no); 242 if (irq_ptr != NULL) 243 ssqd = (struct chsc_ssqd_area *)irq_ptr->chsc_page; 244 else 245 ssqd = (struct chsc_ssqd_area *)__get_free_page(GFP_KERNEL); 246 memset(ssqd, 0, PAGE_SIZE); 247 248 ssqd->request = (struct chsc_header) { 249 .length = 0x0010, 250 .code = 0x0024, 251 }; 252 ssqd->first_sch = schid->sch_no; 253 ssqd->last_sch = schid->sch_no; 254 ssqd->ssid = schid->ssid; 255 256 if (chsc(ssqd)) 257 return -EIO; 258 rc = chsc_error_from_response(ssqd->response.code); 259 if (rc) 260 return rc; 261 262 if (!(ssqd->qdio_ssqd.flags & CHSC_FLAG_QDIO_CAPABILITY) || 263 !(ssqd->qdio_ssqd.flags & CHSC_FLAG_VALIDITY) || 264 (ssqd->qdio_ssqd.sch != schid->sch_no)) 265 return -EINVAL; 266 267 if (irq_ptr != NULL) 268 memcpy(&irq_ptr->ssqd_desc, &ssqd->qdio_ssqd, 269 sizeof(struct qdio_ssqd_desc)); 270 else { 271 memcpy(data, &ssqd->qdio_ssqd, 272 sizeof(struct qdio_ssqd_desc)); 273 free_page((unsigned long)ssqd); 274 } 275 return 0; 276 } 277 278 void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr) 279 { 280 unsigned char qdioac; 281 int rc; 282 283 rc = qdio_setup_get_ssqd(irq_ptr, &irq_ptr->schid, NULL); 284 if (rc) { 285 DBF_ERROR("%4x ssqd ERR", irq_ptr->schid.sch_no); 286 DBF_ERROR("rc:%x", rc); 287 /* all flags set, worst case */ 288 qdioac = AC1_SIGA_INPUT_NEEDED | AC1_SIGA_OUTPUT_NEEDED | 289 AC1_SIGA_SYNC_NEEDED; 290 } else 291 qdioac = irq_ptr->ssqd_desc.qdioac1; 292 293 check_and_setup_qebsm(irq_ptr, qdioac, irq_ptr->ssqd_desc.sch_token); 294 process_ac_flags(irq_ptr, qdioac); 295 DBF_EVENT("qdioac:%4x", qdioac); 296 } 297 298 void qdio_release_memory(struct qdio_irq *irq_ptr) 299 { 300 struct qdio_q *q; 301 int i; 302 303 /* 304 * Must check queue array manually since irq_ptr->nr_input_queues / 305 * irq_ptr->nr_input_queues may not yet be set. 306 */ 307 for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) { 308 q = irq_ptr->input_qs[i]; 309 if (q) { 310 free_page((unsigned long) q->slib); 311 kmem_cache_free(qdio_q_cache, q); 312 } 313 } 314 for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) { 315 q = irq_ptr->output_qs[i]; 316 if (q) { 317 free_page((unsigned long) q->slib); 318 kmem_cache_free(qdio_q_cache, q); 319 } 320 } 321 free_page((unsigned long) irq_ptr->qdr); 322 free_page(irq_ptr->chsc_page); 323 free_page((unsigned long) irq_ptr); 324 } 325 326 static void __qdio_allocate_fill_qdr(struct qdio_irq *irq_ptr, 327 struct qdio_q **irq_ptr_qs, 328 int i, int nr) 329 { 330 irq_ptr->qdr->qdf0[i + nr].sliba = 331 (unsigned long)irq_ptr_qs[i]->slib; 332 333 irq_ptr->qdr->qdf0[i + nr].sla = 334 (unsigned long)irq_ptr_qs[i]->sl; 335 336 irq_ptr->qdr->qdf0[i + nr].slsba = 337 (unsigned long)&irq_ptr_qs[i]->slsb.val[0]; 338 339 irq_ptr->qdr->qdf0[i + nr].akey = PAGE_DEFAULT_KEY >> 4; 340 irq_ptr->qdr->qdf0[i + nr].bkey = PAGE_DEFAULT_KEY >> 4; 341 irq_ptr->qdr->qdf0[i + nr].ckey = PAGE_DEFAULT_KEY >> 4; 342 irq_ptr->qdr->qdf0[i + nr].dkey = PAGE_DEFAULT_KEY >> 4; 343 } 344 345 static void setup_qdr(struct qdio_irq *irq_ptr, 346 struct qdio_initialize *qdio_init) 347 { 348 int i; 349 350 irq_ptr->qdr->qfmt = qdio_init->q_format; 351 irq_ptr->qdr->iqdcnt = qdio_init->no_input_qs; 352 irq_ptr->qdr->oqdcnt = qdio_init->no_output_qs; 353 irq_ptr->qdr->iqdsz = sizeof(struct qdesfmt0) / 4; /* size in words */ 354 irq_ptr->qdr->oqdsz = sizeof(struct qdesfmt0) / 4; 355 irq_ptr->qdr->qiba = (unsigned long)&irq_ptr->qib; 356 irq_ptr->qdr->qkey = PAGE_DEFAULT_KEY >> 4; 357 358 for (i = 0; i < qdio_init->no_input_qs; i++) 359 __qdio_allocate_fill_qdr(irq_ptr, irq_ptr->input_qs, i, 0); 360 361 for (i = 0; i < qdio_init->no_output_qs; i++) 362 __qdio_allocate_fill_qdr(irq_ptr, irq_ptr->output_qs, i, 363 qdio_init->no_input_qs); 364 } 365 366 static void setup_qib(struct qdio_irq *irq_ptr, 367 struct qdio_initialize *init_data) 368 { 369 if (qebsm_possible()) 370 irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM; 371 372 irq_ptr->qib.rflags |= init_data->qib_rflags; 373 374 irq_ptr->qib.qfmt = init_data->q_format; 375 if (init_data->no_input_qs) 376 irq_ptr->qib.isliba = 377 (unsigned long)(irq_ptr->input_qs[0]->slib); 378 if (init_data->no_output_qs) 379 irq_ptr->qib.osliba = 380 (unsigned long)(irq_ptr->output_qs[0]->slib); 381 memcpy(irq_ptr->qib.ebcnam, init_data->adapter_name, 8); 382 } 383 384 int qdio_setup_irq(struct qdio_initialize *init_data) 385 { 386 struct ciw *ciw; 387 struct qdio_irq *irq_ptr = init_data->cdev->private->qdio_data; 388 int rc; 389 390 memset(&irq_ptr->qib, 0, sizeof(irq_ptr->qib)); 391 memset(&irq_ptr->siga_flag, 0, sizeof(irq_ptr->siga_flag)); 392 memset(&irq_ptr->ccw, 0, sizeof(irq_ptr->ccw)); 393 memset(&irq_ptr->ssqd_desc, 0, sizeof(irq_ptr->ssqd_desc)); 394 memset(&irq_ptr->perf_stat, 0, sizeof(irq_ptr->perf_stat)); 395 396 irq_ptr->debugfs_dev = irq_ptr->debugfs_perf = NULL; 397 irq_ptr->sch_token = irq_ptr->state = irq_ptr->perf_stat_enabled = 0; 398 399 /* wipes qib.ac, required by ar7063 */ 400 memset(irq_ptr->qdr, 0, sizeof(struct qdr)); 401 402 irq_ptr->int_parm = init_data->int_parm; 403 irq_ptr->nr_input_qs = init_data->no_input_qs; 404 irq_ptr->nr_output_qs = init_data->no_output_qs; 405 406 irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev); 407 irq_ptr->cdev = init_data->cdev; 408 setup_queues(irq_ptr, init_data); 409 410 setup_qib(irq_ptr, init_data); 411 qdio_setup_thinint(irq_ptr); 412 set_impl_params(irq_ptr, init_data->qib_param_field_format, 413 init_data->qib_param_field, 414 init_data->input_slib_elements, 415 init_data->output_slib_elements); 416 417 /* fill input and output descriptors */ 418 setup_qdr(irq_ptr, init_data); 419 420 /* qdr, qib, sls, slsbs, slibs, sbales are filled now */ 421 422 /* get qdio commands */ 423 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE); 424 if (!ciw) { 425 DBF_ERROR("%4x NO EQ", irq_ptr->schid.sch_no); 426 rc = -EINVAL; 427 goto out_err; 428 } 429 irq_ptr->equeue = *ciw; 430 431 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE); 432 if (!ciw) { 433 DBF_ERROR("%4x NO AQ", irq_ptr->schid.sch_no); 434 rc = -EINVAL; 435 goto out_err; 436 } 437 irq_ptr->aqueue = *ciw; 438 439 /* set new interrupt handler */ 440 irq_ptr->orig_handler = init_data->cdev->handler; 441 init_data->cdev->handler = qdio_int_handler; 442 return 0; 443 out_err: 444 qdio_release_memory(irq_ptr); 445 return rc; 446 } 447 448 void qdio_print_subchannel_info(struct qdio_irq *irq_ptr, 449 struct ccw_device *cdev) 450 { 451 char s[80]; 452 453 snprintf(s, 80, "qdio: %s %s on SC %x using " 454 "AI:%d QEBSM:%d PCI:%d TDD:%d SIGA:%s%s%s%s%s%s\n", 455 dev_name(&cdev->dev), 456 (irq_ptr->qib.qfmt == QDIO_QETH_QFMT) ? "OSA" : 457 ((irq_ptr->qib.qfmt == QDIO_ZFCP_QFMT) ? "ZFCP" : "HS"), 458 irq_ptr->schid.sch_no, 459 is_thinint_irq(irq_ptr), 460 (irq_ptr->sch_token) ? 1 : 0, 461 (irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED) ? 1 : 0, 462 css_general_characteristics.aif_tdd, 463 (irq_ptr->siga_flag.input) ? "R" : " ", 464 (irq_ptr->siga_flag.output) ? "W" : " ", 465 (irq_ptr->siga_flag.sync) ? "S" : " ", 466 (!irq_ptr->siga_flag.no_sync_ti) ? "A" : " ", 467 (!irq_ptr->siga_flag.no_sync_out_ti) ? "O" : " ", 468 (!irq_ptr->siga_flag.no_sync_out_pci) ? "P" : " "); 469 printk(KERN_INFO "%s", s); 470 } 471 472 int __init qdio_setup_init(void) 473 { 474 qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q), 475 256, 0, NULL); 476 if (!qdio_q_cache) 477 return -ENOMEM; 478 479 /* Check for OSA/FCP thin interrupts (bit 67). */ 480 DBF_EVENT("thinint:%1d", 481 (css_general_characteristics.aif_osa) ? 1 : 0); 482 483 /* Check for QEBSM support in general (bit 58). */ 484 DBF_EVENT("cssQEBSM:%1d", (qebsm_possible()) ? 1 : 0); 485 return 0; 486 } 487 488 void qdio_setup_exit(void) 489 { 490 kmem_cache_destroy(qdio_q_cache); 491 } 492