xref: /openbmc/linux/drivers/s390/cio/qdio_setup.c (revision 54cbac81)
1 /*
2  * qdio queue initialization
3  *
4  * Copyright IBM Corp. 2008
5  * Author(s): Jan Glauber <jang@linux.vnet.ibm.com>
6  */
7 #include <linux/kernel.h>
8 #include <linux/slab.h>
9 #include <linux/export.h>
10 #include <asm/qdio.h>
11 
12 #include "cio.h"
13 #include "css.h"
14 #include "device.h"
15 #include "ioasm.h"
16 #include "chsc.h"
17 #include "qdio.h"
18 #include "qdio_debug.h"
19 
20 static struct kmem_cache *qdio_q_cache;
21 static struct kmem_cache *qdio_aob_cache;
22 
23 struct qaob *qdio_allocate_aob(void)
24 {
25 	return kmem_cache_zalloc(qdio_aob_cache, GFP_ATOMIC);
26 }
27 EXPORT_SYMBOL_GPL(qdio_allocate_aob);
28 
29 void qdio_release_aob(struct qaob *aob)
30 {
31 	kmem_cache_free(qdio_aob_cache, aob);
32 }
33 EXPORT_SYMBOL_GPL(qdio_release_aob);
34 
35 /*
36  * qebsm is only available under 64bit but the adapter sets the feature
37  * flag anyway, so we manually override it.
38  */
39 static inline int qebsm_possible(void)
40 {
41 #ifdef CONFIG_64BIT
42 	return css_general_characteristics.qebsm;
43 #endif
44 	return 0;
45 }
46 
47 /*
48  * qib_param_field: pointer to 128 bytes or NULL, if no param field
49  * nr_input_qs: pointer to nr_queues*128 words of data or NULL
50  */
51 static void set_impl_params(struct qdio_irq *irq_ptr,
52 			    unsigned int qib_param_field_format,
53 			    unsigned char *qib_param_field,
54 			    unsigned long *input_slib_elements,
55 			    unsigned long *output_slib_elements)
56 {
57 	struct qdio_q *q;
58 	int i, j;
59 
60 	if (!irq_ptr)
61 		return;
62 
63 	irq_ptr->qib.pfmt = qib_param_field_format;
64 	if (qib_param_field)
65 		memcpy(irq_ptr->qib.parm, qib_param_field,
66 		       QDIO_MAX_BUFFERS_PER_Q);
67 
68 	if (!input_slib_elements)
69 		goto output;
70 
71 	for_each_input_queue(irq_ptr, q, i) {
72 		for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
73 			q->slib->slibe[j].parms =
74 				input_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j];
75 	}
76 output:
77 	if (!output_slib_elements)
78 		return;
79 
80 	for_each_output_queue(irq_ptr, q, i) {
81 		for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
82 			q->slib->slibe[j].parms =
83 				output_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j];
84 	}
85 }
86 
87 static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues)
88 {
89 	struct qdio_q *q;
90 	int i;
91 
92 	for (i = 0; i < nr_queues; i++) {
93 		q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
94 		if (!q)
95 			return -ENOMEM;
96 
97 		q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
98 		if (!q->slib) {
99 			kmem_cache_free(qdio_q_cache, q);
100 			return -ENOMEM;
101 		}
102 		irq_ptr_qs[i] = q;
103 	}
104 	return 0;
105 }
106 
107 int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs, int nr_output_qs)
108 {
109 	int rc;
110 
111 	rc = __qdio_allocate_qs(irq_ptr->input_qs, nr_input_qs);
112 	if (rc)
113 		return rc;
114 	rc = __qdio_allocate_qs(irq_ptr->output_qs, nr_output_qs);
115 	return rc;
116 }
117 
118 static void setup_queues_misc(struct qdio_q *q, struct qdio_irq *irq_ptr,
119 			      qdio_handler_t *handler, int i)
120 {
121 	struct slib *slib = q->slib;
122 
123 	/* queue must be cleared for qdio_establish */
124 	memset(q, 0, sizeof(*q));
125 	memset(slib, 0, PAGE_SIZE);
126 	q->slib = slib;
127 	q->irq_ptr = irq_ptr;
128 	q->mask = 1 << (31 - i);
129 	q->nr = i;
130 	q->handler = handler;
131 }
132 
133 static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr,
134 				void **sbals_array, int i)
135 {
136 	struct qdio_q *prev;
137 	int j;
138 
139 	DBF_HEX(&q, sizeof(void *));
140 	q->sl = (struct sl *)((char *)q->slib + PAGE_SIZE / 2);
141 
142 	/* fill in sbal */
143 	for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
144 		q->sbal[j] = *sbals_array++;
145 
146 	/* fill in slib */
147 	if (i > 0) {
148 		prev = (q->is_input_q) ? irq_ptr->input_qs[i - 1]
149 			: irq_ptr->output_qs[i - 1];
150 		prev->slib->nsliba = (unsigned long)q->slib;
151 	}
152 
153 	q->slib->sla = (unsigned long)q->sl;
154 	q->slib->slsba = (unsigned long)&q->slsb.val[0];
155 
156 	/* fill in sl */
157 	for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
158 		q->sl->element[j].sbal = (unsigned long)q->sbal[j];
159 }
160 
161 static void setup_queues(struct qdio_irq *irq_ptr,
162 			 struct qdio_initialize *qdio_init)
163 {
164 	struct qdio_q *q;
165 	void **input_sbal_array = qdio_init->input_sbal_addr_array;
166 	void **output_sbal_array = qdio_init->output_sbal_addr_array;
167 	struct qdio_outbuf_state *output_sbal_state_array =
168 				  qdio_init->output_sbal_state_array;
169 	int i;
170 
171 	for_each_input_queue(irq_ptr, q, i) {
172 		DBF_EVENT("inq:%1d", i);
173 		setup_queues_misc(q, irq_ptr, qdio_init->input_handler, i);
174 
175 		q->is_input_q = 1;
176 		q->u.in.queue_start_poll = qdio_init->queue_start_poll_array ?
177 				qdio_init->queue_start_poll_array[i] : NULL;
178 
179 		setup_storage_lists(q, irq_ptr, input_sbal_array, i);
180 		input_sbal_array += QDIO_MAX_BUFFERS_PER_Q;
181 
182 		if (is_thinint_irq(irq_ptr)) {
183 			tasklet_init(&q->tasklet, tiqdio_inbound_processing,
184 				     (unsigned long) q);
185 		} else {
186 			tasklet_init(&q->tasklet, qdio_inbound_processing,
187 				     (unsigned long) q);
188 		}
189 	}
190 
191 	for_each_output_queue(irq_ptr, q, i) {
192 		DBF_EVENT("outq:%1d", i);
193 		setup_queues_misc(q, irq_ptr, qdio_init->output_handler, i);
194 
195 		q->u.out.sbal_state = output_sbal_state_array;
196 		output_sbal_state_array += QDIO_MAX_BUFFERS_PER_Q;
197 
198 		q->is_input_q = 0;
199 		q->u.out.scan_threshold = qdio_init->scan_threshold;
200 		setup_storage_lists(q, irq_ptr, output_sbal_array, i);
201 		output_sbal_array += QDIO_MAX_BUFFERS_PER_Q;
202 
203 		tasklet_init(&q->tasklet, qdio_outbound_processing,
204 			     (unsigned long) q);
205 		setup_timer(&q->u.out.timer, (void(*)(unsigned long))
206 			    &qdio_outbound_timer, (unsigned long)q);
207 	}
208 }
209 
210 static void process_ac_flags(struct qdio_irq *irq_ptr, unsigned char qdioac)
211 {
212 	if (qdioac & AC1_SIGA_INPUT_NEEDED)
213 		irq_ptr->siga_flag.input = 1;
214 	if (qdioac & AC1_SIGA_OUTPUT_NEEDED)
215 		irq_ptr->siga_flag.output = 1;
216 	if (qdioac & AC1_SIGA_SYNC_NEEDED)
217 		irq_ptr->siga_flag.sync = 1;
218 	if (!(qdioac & AC1_AUTOMATIC_SYNC_ON_THININT))
219 		irq_ptr->siga_flag.sync_after_ai = 1;
220 	if (!(qdioac & AC1_AUTOMATIC_SYNC_ON_OUT_PCI))
221 		irq_ptr->siga_flag.sync_out_after_pci = 1;
222 }
223 
224 static void check_and_setup_qebsm(struct qdio_irq *irq_ptr,
225 				  unsigned char qdioac, unsigned long token)
226 {
227 	if (!(irq_ptr->qib.rflags & QIB_RFLAGS_ENABLE_QEBSM))
228 		goto no_qebsm;
229 	if (!(qdioac & AC1_SC_QEBSM_AVAILABLE) ||
230 	    (!(qdioac & AC1_SC_QEBSM_ENABLED)))
231 		goto no_qebsm;
232 
233 	irq_ptr->sch_token = token;
234 
235 	DBF_EVENT("V=V:1");
236 	DBF_EVENT("%8lx", irq_ptr->sch_token);
237 	return;
238 
239 no_qebsm:
240 	irq_ptr->sch_token = 0;
241 	irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
242 	DBF_EVENT("noV=V");
243 }
244 
245 /*
246  * If there is a qdio_irq we use the chsc_page and store the information
247  * in the qdio_irq, otherwise we copy it to the specified structure.
248  */
249 int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
250 			struct subchannel_id *schid,
251 			struct qdio_ssqd_desc *data)
252 {
253 	struct chsc_ssqd_area *ssqd;
254 	int rc;
255 
256 	DBF_EVENT("getssqd:%4x", schid->sch_no);
257 	if (irq_ptr != NULL)
258 		ssqd = (struct chsc_ssqd_area *)irq_ptr->chsc_page;
259 	else
260 		ssqd = (struct chsc_ssqd_area *)__get_free_page(GFP_KERNEL);
261 	memset(ssqd, 0, PAGE_SIZE);
262 
263 	ssqd->request = (struct chsc_header) {
264 		.length = 0x0010,
265 		.code	= 0x0024,
266 	};
267 	ssqd->first_sch = schid->sch_no;
268 	ssqd->last_sch = schid->sch_no;
269 	ssqd->ssid = schid->ssid;
270 
271 	if (chsc(ssqd))
272 		return -EIO;
273 	rc = chsc_error_from_response(ssqd->response.code);
274 	if (rc)
275 		return rc;
276 
277 	if (!(ssqd->qdio_ssqd.flags & CHSC_FLAG_QDIO_CAPABILITY) ||
278 	    !(ssqd->qdio_ssqd.flags & CHSC_FLAG_VALIDITY) ||
279 	    (ssqd->qdio_ssqd.sch != schid->sch_no))
280 		return -EINVAL;
281 
282 	if (irq_ptr != NULL)
283 		memcpy(&irq_ptr->ssqd_desc, &ssqd->qdio_ssqd,
284 		       sizeof(struct qdio_ssqd_desc));
285 	else {
286 		memcpy(data, &ssqd->qdio_ssqd,
287 		       sizeof(struct qdio_ssqd_desc));
288 		free_page((unsigned long)ssqd);
289 	}
290 	return 0;
291 }
292 
293 void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr)
294 {
295 	unsigned char qdioac;
296 	int rc;
297 
298 	rc = qdio_setup_get_ssqd(irq_ptr, &irq_ptr->schid, NULL);
299 	if (rc) {
300 		DBF_ERROR("%4x ssqd ERR", irq_ptr->schid.sch_no);
301 		DBF_ERROR("rc:%x", rc);
302 		/* all flags set, worst case */
303 		qdioac = AC1_SIGA_INPUT_NEEDED | AC1_SIGA_OUTPUT_NEEDED |
304 			 AC1_SIGA_SYNC_NEEDED;
305 	} else
306 		qdioac = irq_ptr->ssqd_desc.qdioac1;
307 
308 	check_and_setup_qebsm(irq_ptr, qdioac, irq_ptr->ssqd_desc.sch_token);
309 	process_ac_flags(irq_ptr, qdioac);
310 	DBF_EVENT("ac 1:%2x 2:%4x", qdioac, irq_ptr->ssqd_desc.qdioac2);
311 	DBF_EVENT("3:%4x qib:%4x", irq_ptr->ssqd_desc.qdioac3, irq_ptr->qib.ac);
312 }
313 
314 void qdio_release_memory(struct qdio_irq *irq_ptr)
315 {
316 	struct qdio_q *q;
317 	int i;
318 
319 	/*
320 	 * Must check queue array manually since irq_ptr->nr_input_queues /
321 	 * irq_ptr->nr_input_queues may not yet be set.
322 	 */
323 	for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
324 		q = irq_ptr->input_qs[i];
325 		if (q) {
326 			free_page((unsigned long) q->slib);
327 			kmem_cache_free(qdio_q_cache, q);
328 		}
329 	}
330 	for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
331 		q = irq_ptr->output_qs[i];
332 		if (q) {
333 			if (q->u.out.use_cq) {
334 				int n;
335 
336 				for (n = 0; n < QDIO_MAX_BUFFERS_PER_Q; ++n) {
337 					struct qaob *aob = q->u.out.aobs[n];
338 					if (aob) {
339 						qdio_release_aob(aob);
340 						q->u.out.aobs[n] = NULL;
341 					}
342 				}
343 
344 				qdio_disable_async_operation(&q->u.out);
345 			}
346 			free_page((unsigned long) q->slib);
347 			kmem_cache_free(qdio_q_cache, q);
348 		}
349 	}
350 	free_page((unsigned long) irq_ptr->qdr);
351 	free_page(irq_ptr->chsc_page);
352 	free_page((unsigned long) irq_ptr);
353 }
354 
355 static void __qdio_allocate_fill_qdr(struct qdio_irq *irq_ptr,
356 				     struct qdio_q **irq_ptr_qs,
357 				     int i, int nr)
358 {
359 	irq_ptr->qdr->qdf0[i + nr].sliba =
360 		(unsigned long)irq_ptr_qs[i]->slib;
361 
362 	irq_ptr->qdr->qdf0[i + nr].sla =
363 		(unsigned long)irq_ptr_qs[i]->sl;
364 
365 	irq_ptr->qdr->qdf0[i + nr].slsba =
366 		(unsigned long)&irq_ptr_qs[i]->slsb.val[0];
367 
368 	irq_ptr->qdr->qdf0[i + nr].akey = PAGE_DEFAULT_KEY >> 4;
369 	irq_ptr->qdr->qdf0[i + nr].bkey = PAGE_DEFAULT_KEY >> 4;
370 	irq_ptr->qdr->qdf0[i + nr].ckey = PAGE_DEFAULT_KEY >> 4;
371 	irq_ptr->qdr->qdf0[i + nr].dkey = PAGE_DEFAULT_KEY >> 4;
372 }
373 
374 static void setup_qdr(struct qdio_irq *irq_ptr,
375 		      struct qdio_initialize *qdio_init)
376 {
377 	int i;
378 
379 	irq_ptr->qdr->qfmt = qdio_init->q_format;
380 	irq_ptr->qdr->ac = qdio_init->qdr_ac;
381 	irq_ptr->qdr->iqdcnt = qdio_init->no_input_qs;
382 	irq_ptr->qdr->oqdcnt = qdio_init->no_output_qs;
383 	irq_ptr->qdr->iqdsz = sizeof(struct qdesfmt0) / 4; /* size in words */
384 	irq_ptr->qdr->oqdsz = sizeof(struct qdesfmt0) / 4;
385 	irq_ptr->qdr->qiba = (unsigned long)&irq_ptr->qib;
386 	irq_ptr->qdr->qkey = PAGE_DEFAULT_KEY >> 4;
387 
388 	for (i = 0; i < qdio_init->no_input_qs; i++)
389 		__qdio_allocate_fill_qdr(irq_ptr, irq_ptr->input_qs, i, 0);
390 
391 	for (i = 0; i < qdio_init->no_output_qs; i++)
392 		__qdio_allocate_fill_qdr(irq_ptr, irq_ptr->output_qs, i,
393 					 qdio_init->no_input_qs);
394 }
395 
396 static void setup_qib(struct qdio_irq *irq_ptr,
397 		      struct qdio_initialize *init_data)
398 {
399 	if (qebsm_possible())
400 		irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM;
401 
402 	irq_ptr->qib.rflags |= init_data->qib_rflags;
403 
404 	irq_ptr->qib.qfmt = init_data->q_format;
405 	if (init_data->no_input_qs)
406 		irq_ptr->qib.isliba =
407 			(unsigned long)(irq_ptr->input_qs[0]->slib);
408 	if (init_data->no_output_qs)
409 		irq_ptr->qib.osliba =
410 			(unsigned long)(irq_ptr->output_qs[0]->slib);
411 	memcpy(irq_ptr->qib.ebcnam, init_data->adapter_name, 8);
412 }
413 
414 int qdio_setup_irq(struct qdio_initialize *init_data)
415 {
416 	struct ciw *ciw;
417 	struct qdio_irq *irq_ptr = init_data->cdev->private->qdio_data;
418 	int rc;
419 
420 	memset(&irq_ptr->qib, 0, sizeof(irq_ptr->qib));
421 	memset(&irq_ptr->siga_flag, 0, sizeof(irq_ptr->siga_flag));
422 	memset(&irq_ptr->ccw, 0, sizeof(irq_ptr->ccw));
423 	memset(&irq_ptr->ssqd_desc, 0, sizeof(irq_ptr->ssqd_desc));
424 	memset(&irq_ptr->perf_stat, 0, sizeof(irq_ptr->perf_stat));
425 
426 	irq_ptr->debugfs_dev = irq_ptr->debugfs_perf = NULL;
427 	irq_ptr->sch_token = irq_ptr->state = irq_ptr->perf_stat_enabled = 0;
428 
429 	/* wipes qib.ac, required by ar7063 */
430 	memset(irq_ptr->qdr, 0, sizeof(struct qdr));
431 
432 	irq_ptr->int_parm = init_data->int_parm;
433 	irq_ptr->nr_input_qs = init_data->no_input_qs;
434 	irq_ptr->nr_output_qs = init_data->no_output_qs;
435 	irq_ptr->cdev = init_data->cdev;
436 	ccw_device_get_schid(irq_ptr->cdev, &irq_ptr->schid);
437 	setup_queues(irq_ptr, init_data);
438 
439 	setup_qib(irq_ptr, init_data);
440 	qdio_setup_thinint(irq_ptr);
441 	set_impl_params(irq_ptr, init_data->qib_param_field_format,
442 			init_data->qib_param_field,
443 			init_data->input_slib_elements,
444 			init_data->output_slib_elements);
445 
446 	/* fill input and output descriptors */
447 	setup_qdr(irq_ptr, init_data);
448 
449 	/* qdr, qib, sls, slsbs, slibs, sbales are filled now */
450 
451 	/* get qdio commands */
452 	ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
453 	if (!ciw) {
454 		DBF_ERROR("%4x NO EQ", irq_ptr->schid.sch_no);
455 		rc = -EINVAL;
456 		goto out_err;
457 	}
458 	irq_ptr->equeue = *ciw;
459 
460 	ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
461 	if (!ciw) {
462 		DBF_ERROR("%4x NO AQ", irq_ptr->schid.sch_no);
463 		rc = -EINVAL;
464 		goto out_err;
465 	}
466 	irq_ptr->aqueue = *ciw;
467 
468 	/* set new interrupt handler */
469 	irq_ptr->orig_handler = init_data->cdev->handler;
470 	init_data->cdev->handler = qdio_int_handler;
471 	return 0;
472 out_err:
473 	qdio_release_memory(irq_ptr);
474 	return rc;
475 }
476 
477 void qdio_print_subchannel_info(struct qdio_irq *irq_ptr,
478 				struct ccw_device *cdev)
479 {
480 	char s[80];
481 
482 	snprintf(s, 80, "qdio: %s %s on SC %x using "
483 		 "AI:%d QEBSM:%d PRI:%d TDD:%d SIGA:%s%s%s%s%s\n",
484 		 dev_name(&cdev->dev),
485 		 (irq_ptr->qib.qfmt == QDIO_QETH_QFMT) ? "OSA" :
486 			((irq_ptr->qib.qfmt == QDIO_ZFCP_QFMT) ? "ZFCP" : "HS"),
487 		 irq_ptr->schid.sch_no,
488 		 is_thinint_irq(irq_ptr),
489 		 (irq_ptr->sch_token) ? 1 : 0,
490 		 (irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED) ? 1 : 0,
491 		 css_general_characteristics.aif_tdd,
492 		 (irq_ptr->siga_flag.input) ? "R" : " ",
493 		 (irq_ptr->siga_flag.output) ? "W" : " ",
494 		 (irq_ptr->siga_flag.sync) ? "S" : " ",
495 		 (irq_ptr->siga_flag.sync_after_ai) ? "A" : " ",
496 		 (irq_ptr->siga_flag.sync_out_after_pci) ? "P" : " ");
497 	printk(KERN_INFO "%s", s);
498 }
499 
500 int qdio_enable_async_operation(struct qdio_output_q *outq)
501 {
502 	outq->aobs = kzalloc(sizeof(struct qaob *) * QDIO_MAX_BUFFERS_PER_Q,
503 			     GFP_ATOMIC);
504 	if (!outq->aobs) {
505 		outq->use_cq = 0;
506 		return -ENOMEM;
507 	}
508 	outq->use_cq = 1;
509 	return 0;
510 }
511 
512 void qdio_disable_async_operation(struct qdio_output_q *q)
513 {
514 	kfree(q->aobs);
515 	q->aobs = NULL;
516 	q->use_cq = 0;
517 }
518 
519 int __init qdio_setup_init(void)
520 {
521 	int rc;
522 
523 	qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q),
524 					 256, 0, NULL);
525 	if (!qdio_q_cache)
526 		return -ENOMEM;
527 
528 	qdio_aob_cache = kmem_cache_create("qdio_aob",
529 					sizeof(struct qaob),
530 					sizeof(struct qaob),
531 					0,
532 					NULL);
533 	if (!qdio_aob_cache) {
534 		rc = -ENOMEM;
535 		goto free_qdio_q_cache;
536 	}
537 
538 	/* Check for OSA/FCP thin interrupts (bit 67). */
539 	DBF_EVENT("thinint:%1d",
540 		  (css_general_characteristics.aif_osa) ? 1 : 0);
541 
542 	/* Check for QEBSM support in general (bit 58). */
543 	DBF_EVENT("cssQEBSM:%1d", (qebsm_possible()) ? 1 : 0);
544 	rc = 0;
545 out:
546 	return rc;
547 free_qdio_q_cache:
548 	kmem_cache_destroy(qdio_q_cache);
549 	goto out;
550 }
551 
552 void qdio_setup_exit(void)
553 {
554 	kmem_cache_destroy(qdio_aob_cache);
555 	kmem_cache_destroy(qdio_q_cache);
556 }
557