1 /* 2 * driver/s390/cio/qdio_setup.c 3 * 4 * qdio queue initialization 5 * 6 * Copyright (C) IBM Corp. 2008 7 * Author(s): Jan Glauber <jang@linux.vnet.ibm.com> 8 */ 9 #include <linux/kernel.h> 10 #include <linux/slab.h> 11 #include <linux/export.h> 12 #include <asm/qdio.h> 13 14 #include "cio.h" 15 #include "css.h" 16 #include "device.h" 17 #include "ioasm.h" 18 #include "chsc.h" 19 #include "qdio.h" 20 #include "qdio_debug.h" 21 22 static struct kmem_cache *qdio_q_cache; 23 static struct kmem_cache *qdio_aob_cache; 24 25 struct qaob *qdio_allocate_aob() 26 { 27 struct qaob *aob; 28 29 aob = kmem_cache_zalloc(qdio_aob_cache, GFP_ATOMIC); 30 return aob; 31 } 32 EXPORT_SYMBOL_GPL(qdio_allocate_aob); 33 34 void qdio_release_aob(struct qaob *aob) 35 { 36 kmem_cache_free(qdio_aob_cache, aob); 37 } 38 EXPORT_SYMBOL_GPL(qdio_release_aob); 39 40 /* 41 * qebsm is only available under 64bit but the adapter sets the feature 42 * flag anyway, so we manually override it. 43 */ 44 static inline int qebsm_possible(void) 45 { 46 #ifdef CONFIG_64BIT 47 return css_general_characteristics.qebsm; 48 #endif 49 return 0; 50 } 51 52 /* 53 * qib_param_field: pointer to 128 bytes or NULL, if no param field 54 * nr_input_qs: pointer to nr_queues*128 words of data or NULL 55 */ 56 static void set_impl_params(struct qdio_irq *irq_ptr, 57 unsigned int qib_param_field_format, 58 unsigned char *qib_param_field, 59 unsigned long *input_slib_elements, 60 unsigned long *output_slib_elements) 61 { 62 struct qdio_q *q; 63 int i, j; 64 65 if (!irq_ptr) 66 return; 67 68 irq_ptr->qib.pfmt = qib_param_field_format; 69 if (qib_param_field) 70 memcpy(irq_ptr->qib.parm, qib_param_field, 71 QDIO_MAX_BUFFERS_PER_Q); 72 73 if (!input_slib_elements) 74 goto output; 75 76 for_each_input_queue(irq_ptr, q, i) { 77 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) 78 q->slib->slibe[j].parms = 79 input_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j]; 80 } 81 output: 82 if (!output_slib_elements) 83 return; 84 85 for_each_output_queue(irq_ptr, q, i) { 86 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) 87 q->slib->slibe[j].parms = 88 output_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j]; 89 } 90 } 91 92 static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues) 93 { 94 struct qdio_q *q; 95 int i; 96 97 for (i = 0; i < nr_queues; i++) { 98 q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL); 99 if (!q) 100 return -ENOMEM; 101 102 q->slib = (struct slib *) __get_free_page(GFP_KERNEL); 103 if (!q->slib) { 104 kmem_cache_free(qdio_q_cache, q); 105 return -ENOMEM; 106 } 107 irq_ptr_qs[i] = q; 108 } 109 return 0; 110 } 111 112 int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs, int nr_output_qs) 113 { 114 int rc; 115 116 rc = __qdio_allocate_qs(irq_ptr->input_qs, nr_input_qs); 117 if (rc) 118 return rc; 119 rc = __qdio_allocate_qs(irq_ptr->output_qs, nr_output_qs); 120 return rc; 121 } 122 123 static void setup_queues_misc(struct qdio_q *q, struct qdio_irq *irq_ptr, 124 qdio_handler_t *handler, int i) 125 { 126 struct slib *slib = q->slib; 127 128 /* queue must be cleared for qdio_establish */ 129 memset(q, 0, sizeof(*q)); 130 memset(slib, 0, PAGE_SIZE); 131 q->slib = slib; 132 q->irq_ptr = irq_ptr; 133 q->mask = 1 << (31 - i); 134 q->nr = i; 135 q->handler = handler; 136 } 137 138 static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr, 139 void **sbals_array, int i) 140 { 141 struct qdio_q *prev; 142 int j; 143 144 DBF_HEX(&q, sizeof(void *)); 145 q->sl = (struct sl *)((char *)q->slib + PAGE_SIZE / 2); 146 147 /* fill in sbal */ 148 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) { 149 q->sbal[j] = *sbals_array++; 150 BUG_ON((unsigned long)q->sbal[j] & 0xff); 151 } 152 153 /* fill in slib */ 154 if (i > 0) { 155 prev = (q->is_input_q) ? irq_ptr->input_qs[i - 1] 156 : irq_ptr->output_qs[i - 1]; 157 prev->slib->nsliba = (unsigned long)q->slib; 158 } 159 160 q->slib->sla = (unsigned long)q->sl; 161 q->slib->slsba = (unsigned long)&q->slsb.val[0]; 162 163 /* fill in sl */ 164 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) 165 q->sl->element[j].sbal = (unsigned long)q->sbal[j]; 166 } 167 168 static void setup_queues(struct qdio_irq *irq_ptr, 169 struct qdio_initialize *qdio_init) 170 { 171 struct qdio_q *q; 172 void **input_sbal_array = qdio_init->input_sbal_addr_array; 173 void **output_sbal_array = qdio_init->output_sbal_addr_array; 174 struct qdio_outbuf_state *output_sbal_state_array = 175 qdio_init->output_sbal_state_array; 176 int i; 177 178 for_each_input_queue(irq_ptr, q, i) { 179 DBF_EVENT("inq:%1d", i); 180 setup_queues_misc(q, irq_ptr, qdio_init->input_handler, i); 181 182 q->is_input_q = 1; 183 q->u.in.queue_start_poll = qdio_init->queue_start_poll[i]; 184 185 setup_storage_lists(q, irq_ptr, input_sbal_array, i); 186 input_sbal_array += QDIO_MAX_BUFFERS_PER_Q; 187 188 if (is_thinint_irq(irq_ptr)) { 189 tasklet_init(&q->tasklet, tiqdio_inbound_processing, 190 (unsigned long) q); 191 } else { 192 tasklet_init(&q->tasklet, qdio_inbound_processing, 193 (unsigned long) q); 194 } 195 } 196 197 for_each_output_queue(irq_ptr, q, i) { 198 DBF_EVENT("outq:%1d", i); 199 setup_queues_misc(q, irq_ptr, qdio_init->output_handler, i); 200 201 q->u.out.sbal_state = output_sbal_state_array; 202 output_sbal_state_array += QDIO_MAX_BUFFERS_PER_Q; 203 204 q->is_input_q = 0; 205 q->u.out.scan_threshold = qdio_init->scan_threshold; 206 setup_storage_lists(q, irq_ptr, output_sbal_array, i); 207 output_sbal_array += QDIO_MAX_BUFFERS_PER_Q; 208 209 tasklet_init(&q->tasklet, qdio_outbound_processing, 210 (unsigned long) q); 211 setup_timer(&q->u.out.timer, (void(*)(unsigned long)) 212 &qdio_outbound_timer, (unsigned long)q); 213 } 214 } 215 216 static void process_ac_flags(struct qdio_irq *irq_ptr, unsigned char qdioac) 217 { 218 if (qdioac & AC1_SIGA_INPUT_NEEDED) 219 irq_ptr->siga_flag.input = 1; 220 if (qdioac & AC1_SIGA_OUTPUT_NEEDED) 221 irq_ptr->siga_flag.output = 1; 222 if (qdioac & AC1_SIGA_SYNC_NEEDED) 223 irq_ptr->siga_flag.sync = 1; 224 if (!(qdioac & AC1_AUTOMATIC_SYNC_ON_THININT)) 225 irq_ptr->siga_flag.sync_after_ai = 1; 226 if (!(qdioac & AC1_AUTOMATIC_SYNC_ON_OUT_PCI)) 227 irq_ptr->siga_flag.sync_out_after_pci = 1; 228 } 229 230 static void check_and_setup_qebsm(struct qdio_irq *irq_ptr, 231 unsigned char qdioac, unsigned long token) 232 { 233 if (!(irq_ptr->qib.rflags & QIB_RFLAGS_ENABLE_QEBSM)) 234 goto no_qebsm; 235 if (!(qdioac & AC1_SC_QEBSM_AVAILABLE) || 236 (!(qdioac & AC1_SC_QEBSM_ENABLED))) 237 goto no_qebsm; 238 239 irq_ptr->sch_token = token; 240 241 DBF_EVENT("V=V:1"); 242 DBF_EVENT("%8lx", irq_ptr->sch_token); 243 return; 244 245 no_qebsm: 246 irq_ptr->sch_token = 0; 247 irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM; 248 DBF_EVENT("noV=V"); 249 } 250 251 /* 252 * If there is a qdio_irq we use the chsc_page and store the information 253 * in the qdio_irq, otherwise we copy it to the specified structure. 254 */ 255 int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr, 256 struct subchannel_id *schid, 257 struct qdio_ssqd_desc *data) 258 { 259 struct chsc_ssqd_area *ssqd; 260 int rc; 261 262 DBF_EVENT("getssqd:%4x", schid->sch_no); 263 if (irq_ptr != NULL) 264 ssqd = (struct chsc_ssqd_area *)irq_ptr->chsc_page; 265 else 266 ssqd = (struct chsc_ssqd_area *)__get_free_page(GFP_KERNEL); 267 memset(ssqd, 0, PAGE_SIZE); 268 269 ssqd->request = (struct chsc_header) { 270 .length = 0x0010, 271 .code = 0x0024, 272 }; 273 ssqd->first_sch = schid->sch_no; 274 ssqd->last_sch = schid->sch_no; 275 ssqd->ssid = schid->ssid; 276 277 if (chsc(ssqd)) 278 return -EIO; 279 rc = chsc_error_from_response(ssqd->response.code); 280 if (rc) 281 return rc; 282 283 if (!(ssqd->qdio_ssqd.flags & CHSC_FLAG_QDIO_CAPABILITY) || 284 !(ssqd->qdio_ssqd.flags & CHSC_FLAG_VALIDITY) || 285 (ssqd->qdio_ssqd.sch != schid->sch_no)) 286 return -EINVAL; 287 288 if (irq_ptr != NULL) 289 memcpy(&irq_ptr->ssqd_desc, &ssqd->qdio_ssqd, 290 sizeof(struct qdio_ssqd_desc)); 291 else { 292 memcpy(data, &ssqd->qdio_ssqd, 293 sizeof(struct qdio_ssqd_desc)); 294 free_page((unsigned long)ssqd); 295 } 296 return 0; 297 } 298 299 void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr) 300 { 301 unsigned char qdioac; 302 int rc; 303 304 rc = qdio_setup_get_ssqd(irq_ptr, &irq_ptr->schid, NULL); 305 if (rc) { 306 DBF_ERROR("%4x ssqd ERR", irq_ptr->schid.sch_no); 307 DBF_ERROR("rc:%x", rc); 308 /* all flags set, worst case */ 309 qdioac = AC1_SIGA_INPUT_NEEDED | AC1_SIGA_OUTPUT_NEEDED | 310 AC1_SIGA_SYNC_NEEDED; 311 } else 312 qdioac = irq_ptr->ssqd_desc.qdioac1; 313 314 check_and_setup_qebsm(irq_ptr, qdioac, irq_ptr->ssqd_desc.sch_token); 315 process_ac_flags(irq_ptr, qdioac); 316 DBF_EVENT("qdioac:%4x", qdioac); 317 } 318 319 void qdio_release_memory(struct qdio_irq *irq_ptr) 320 { 321 struct qdio_q *q; 322 int i; 323 324 /* 325 * Must check queue array manually since irq_ptr->nr_input_queues / 326 * irq_ptr->nr_input_queues may not yet be set. 327 */ 328 for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) { 329 q = irq_ptr->input_qs[i]; 330 if (q) { 331 free_page((unsigned long) q->slib); 332 kmem_cache_free(qdio_q_cache, q); 333 } 334 } 335 for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) { 336 q = irq_ptr->output_qs[i]; 337 if (q) { 338 if (q->u.out.use_cq) { 339 int n; 340 341 for (n = 0; n < QDIO_MAX_BUFFERS_PER_Q; ++n) { 342 struct qaob *aob = q->u.out.aobs[n]; 343 if (aob) { 344 qdio_release_aob(aob); 345 q->u.out.aobs[n] = NULL; 346 } 347 } 348 349 qdio_disable_async_operation(&q->u.out); 350 } 351 free_page((unsigned long) q->slib); 352 kmem_cache_free(qdio_q_cache, q); 353 } 354 } 355 free_page((unsigned long) irq_ptr->qdr); 356 free_page(irq_ptr->chsc_page); 357 free_page((unsigned long) irq_ptr); 358 } 359 360 static void __qdio_allocate_fill_qdr(struct qdio_irq *irq_ptr, 361 struct qdio_q **irq_ptr_qs, 362 int i, int nr) 363 { 364 irq_ptr->qdr->qdf0[i + nr].sliba = 365 (unsigned long)irq_ptr_qs[i]->slib; 366 367 irq_ptr->qdr->qdf0[i + nr].sla = 368 (unsigned long)irq_ptr_qs[i]->sl; 369 370 irq_ptr->qdr->qdf0[i + nr].slsba = 371 (unsigned long)&irq_ptr_qs[i]->slsb.val[0]; 372 373 irq_ptr->qdr->qdf0[i + nr].akey = PAGE_DEFAULT_KEY >> 4; 374 irq_ptr->qdr->qdf0[i + nr].bkey = PAGE_DEFAULT_KEY >> 4; 375 irq_ptr->qdr->qdf0[i + nr].ckey = PAGE_DEFAULT_KEY >> 4; 376 irq_ptr->qdr->qdf0[i + nr].dkey = PAGE_DEFAULT_KEY >> 4; 377 } 378 379 static void setup_qdr(struct qdio_irq *irq_ptr, 380 struct qdio_initialize *qdio_init) 381 { 382 int i; 383 384 irq_ptr->qdr->qfmt = qdio_init->q_format; 385 irq_ptr->qdr->ac = qdio_init->qdr_ac; 386 irq_ptr->qdr->iqdcnt = qdio_init->no_input_qs; 387 irq_ptr->qdr->oqdcnt = qdio_init->no_output_qs; 388 irq_ptr->qdr->iqdsz = sizeof(struct qdesfmt0) / 4; /* size in words */ 389 irq_ptr->qdr->oqdsz = sizeof(struct qdesfmt0) / 4; 390 irq_ptr->qdr->qiba = (unsigned long)&irq_ptr->qib; 391 irq_ptr->qdr->qkey = PAGE_DEFAULT_KEY >> 4; 392 393 for (i = 0; i < qdio_init->no_input_qs; i++) 394 __qdio_allocate_fill_qdr(irq_ptr, irq_ptr->input_qs, i, 0); 395 396 for (i = 0; i < qdio_init->no_output_qs; i++) 397 __qdio_allocate_fill_qdr(irq_ptr, irq_ptr->output_qs, i, 398 qdio_init->no_input_qs); 399 } 400 401 static void setup_qib(struct qdio_irq *irq_ptr, 402 struct qdio_initialize *init_data) 403 { 404 if (qebsm_possible()) 405 irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM; 406 407 irq_ptr->qib.rflags |= init_data->qib_rflags; 408 409 irq_ptr->qib.qfmt = init_data->q_format; 410 if (init_data->no_input_qs) 411 irq_ptr->qib.isliba = 412 (unsigned long)(irq_ptr->input_qs[0]->slib); 413 if (init_data->no_output_qs) 414 irq_ptr->qib.osliba = 415 (unsigned long)(irq_ptr->output_qs[0]->slib); 416 memcpy(irq_ptr->qib.ebcnam, init_data->adapter_name, 8); 417 } 418 419 int qdio_setup_irq(struct qdio_initialize *init_data) 420 { 421 struct ciw *ciw; 422 struct qdio_irq *irq_ptr = init_data->cdev->private->qdio_data; 423 int rc; 424 425 memset(&irq_ptr->qib, 0, sizeof(irq_ptr->qib)); 426 memset(&irq_ptr->siga_flag, 0, sizeof(irq_ptr->siga_flag)); 427 memset(&irq_ptr->ccw, 0, sizeof(irq_ptr->ccw)); 428 memset(&irq_ptr->ssqd_desc, 0, sizeof(irq_ptr->ssqd_desc)); 429 memset(&irq_ptr->perf_stat, 0, sizeof(irq_ptr->perf_stat)); 430 431 irq_ptr->debugfs_dev = irq_ptr->debugfs_perf = NULL; 432 irq_ptr->sch_token = irq_ptr->state = irq_ptr->perf_stat_enabled = 0; 433 434 /* wipes qib.ac, required by ar7063 */ 435 memset(irq_ptr->qdr, 0, sizeof(struct qdr)); 436 437 irq_ptr->int_parm = init_data->int_parm; 438 irq_ptr->nr_input_qs = init_data->no_input_qs; 439 irq_ptr->nr_output_qs = init_data->no_output_qs; 440 441 irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev); 442 irq_ptr->cdev = init_data->cdev; 443 setup_queues(irq_ptr, init_data); 444 445 setup_qib(irq_ptr, init_data); 446 qdio_setup_thinint(irq_ptr); 447 set_impl_params(irq_ptr, init_data->qib_param_field_format, 448 init_data->qib_param_field, 449 init_data->input_slib_elements, 450 init_data->output_slib_elements); 451 452 /* fill input and output descriptors */ 453 setup_qdr(irq_ptr, init_data); 454 455 /* qdr, qib, sls, slsbs, slibs, sbales are filled now */ 456 457 /* get qdio commands */ 458 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE); 459 if (!ciw) { 460 DBF_ERROR("%4x NO EQ", irq_ptr->schid.sch_no); 461 rc = -EINVAL; 462 goto out_err; 463 } 464 irq_ptr->equeue = *ciw; 465 466 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE); 467 if (!ciw) { 468 DBF_ERROR("%4x NO AQ", irq_ptr->schid.sch_no); 469 rc = -EINVAL; 470 goto out_err; 471 } 472 irq_ptr->aqueue = *ciw; 473 474 /* set new interrupt handler */ 475 irq_ptr->orig_handler = init_data->cdev->handler; 476 init_data->cdev->handler = qdio_int_handler; 477 return 0; 478 out_err: 479 qdio_release_memory(irq_ptr); 480 return rc; 481 } 482 483 void qdio_print_subchannel_info(struct qdio_irq *irq_ptr, 484 struct ccw_device *cdev) 485 { 486 char s[80]; 487 488 snprintf(s, 80, "qdio: %s %s on SC %x using " 489 "AI:%d QEBSM:%d PCI:%d TDD:%d SIGA:%s%s%s%s%s\n", 490 dev_name(&cdev->dev), 491 (irq_ptr->qib.qfmt == QDIO_QETH_QFMT) ? "OSA" : 492 ((irq_ptr->qib.qfmt == QDIO_ZFCP_QFMT) ? "ZFCP" : "HS"), 493 irq_ptr->schid.sch_no, 494 is_thinint_irq(irq_ptr), 495 (irq_ptr->sch_token) ? 1 : 0, 496 (irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED) ? 1 : 0, 497 css_general_characteristics.aif_tdd, 498 (irq_ptr->siga_flag.input) ? "R" : " ", 499 (irq_ptr->siga_flag.output) ? "W" : " ", 500 (irq_ptr->siga_flag.sync) ? "S" : " ", 501 (irq_ptr->siga_flag.sync_after_ai) ? "A" : " ", 502 (irq_ptr->siga_flag.sync_out_after_pci) ? "P" : " "); 503 printk(KERN_INFO "%s", s); 504 } 505 506 int qdio_enable_async_operation(struct qdio_output_q *outq) 507 { 508 outq->aobs = kzalloc(sizeof(struct qaob *) * QDIO_MAX_BUFFERS_PER_Q, 509 GFP_ATOMIC); 510 if (!outq->aobs) { 511 outq->use_cq = 0; 512 return -ENOMEM; 513 } 514 outq->use_cq = 1; 515 return 0; 516 } 517 518 void qdio_disable_async_operation(struct qdio_output_q *q) 519 { 520 kfree(q->aobs); 521 q->aobs = NULL; 522 q->use_cq = 0; 523 } 524 525 int __init qdio_setup_init(void) 526 { 527 int rc; 528 529 qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q), 530 256, 0, NULL); 531 if (!qdio_q_cache) 532 return -ENOMEM; 533 534 qdio_aob_cache = kmem_cache_create("qdio_aob", 535 sizeof(struct qaob), 536 sizeof(struct qaob), 537 0, 538 NULL); 539 if (!qdio_aob_cache) { 540 rc = -ENOMEM; 541 goto free_qdio_q_cache; 542 } 543 544 /* Check for OSA/FCP thin interrupts (bit 67). */ 545 DBF_EVENT("thinint:%1d", 546 (css_general_characteristics.aif_osa) ? 1 : 0); 547 548 /* Check for QEBSM support in general (bit 58). */ 549 DBF_EVENT("cssQEBSM:%1d", (qebsm_possible()) ? 1 : 0); 550 rc = 0; 551 out: 552 return rc; 553 free_qdio_q_cache: 554 kmem_cache_destroy(qdio_q_cache); 555 goto out; 556 } 557 558 void qdio_setup_exit(void) 559 { 560 kmem_cache_destroy(qdio_aob_cache); 561 kmem_cache_destroy(qdio_q_cache); 562 } 563