1 /* 2 * linux/drivers/s390/cio/qdio_main.c 3 * 4 * Linux for s390 qdio support, buffer handling, qdio API and module support. 5 * 6 * Copyright 2000,2008 IBM Corp. 7 * Author(s): Utz Bacher <utz.bacher@de.ibm.com> 8 * Jan Glauber <jang@linux.vnet.ibm.com> 9 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com> 10 */ 11 #include <linux/module.h> 12 #include <linux/init.h> 13 #include <linux/kernel.h> 14 #include <linux/timer.h> 15 #include <linux/delay.h> 16 #include <asm/atomic.h> 17 #include <asm/debug.h> 18 #include <asm/qdio.h> 19 20 #include "cio.h" 21 #include "css.h" 22 #include "device.h" 23 #include "qdio.h" 24 #include "qdio_debug.h" 25 #include "qdio_perf.h" 26 27 MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\ 28 "Jan Glauber <jang@linux.vnet.ibm.com>"); 29 MODULE_DESCRIPTION("QDIO base support"); 30 MODULE_LICENSE("GPL"); 31 32 static inline int do_siga_sync(struct subchannel_id schid, 33 unsigned int out_mask, unsigned int in_mask) 34 { 35 register unsigned long __fc asm ("0") = 2; 36 register struct subchannel_id __schid asm ("1") = schid; 37 register unsigned long out asm ("2") = out_mask; 38 register unsigned long in asm ("3") = in_mask; 39 int cc; 40 41 asm volatile( 42 " siga 0\n" 43 " ipm %0\n" 44 " srl %0,28\n" 45 : "=d" (cc) 46 : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc"); 47 return cc; 48 } 49 50 static inline int do_siga_input(struct subchannel_id schid, unsigned int mask) 51 { 52 register unsigned long __fc asm ("0") = 1; 53 register struct subchannel_id __schid asm ("1") = schid; 54 register unsigned long __mask asm ("2") = mask; 55 int cc; 56 57 asm volatile( 58 " siga 0\n" 59 " ipm %0\n" 60 " srl %0,28\n" 61 : "=d" (cc) 62 : "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory"); 63 return cc; 64 } 65 66 /** 67 * do_siga_output - perform SIGA-w/wt function 68 * @schid: subchannel id or in case of QEBSM the subchannel token 69 * @mask: which output queues to process 70 * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer 71 * @fc: function code to perform 72 * 73 * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION. 74 * Note: For IQDC unicast queues only the highest priority queue is processed. 75 */ 76 static inline int do_siga_output(unsigned long schid, unsigned long mask, 77 unsigned int *bb, unsigned int fc) 78 { 79 register unsigned long __fc asm("0") = fc; 80 register unsigned long __schid asm("1") = schid; 81 register unsigned long __mask asm("2") = mask; 82 int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION; 83 84 asm volatile( 85 " siga 0\n" 86 "0: ipm %0\n" 87 " srl %0,28\n" 88 "1:\n" 89 EX_TABLE(0b, 1b) 90 : "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask) 91 : : "cc", "memory"); 92 *bb = ((unsigned int) __fc) >> 31; 93 return cc; 94 } 95 96 static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq) 97 { 98 /* all done or next buffer state different */ 99 if (ccq == 0 || ccq == 32) 100 return 0; 101 /* not all buffers processed */ 102 if (ccq == 96 || ccq == 97) 103 return 1; 104 /* notify devices immediately */ 105 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq); 106 return -EIO; 107 } 108 109 /** 110 * qdio_do_eqbs - extract buffer states for QEBSM 111 * @q: queue to manipulate 112 * @state: state of the extracted buffers 113 * @start: buffer number to start at 114 * @count: count of buffers to examine 115 * @auto_ack: automatically acknowledge buffers 116 * 117 * Returns the number of successfully extracted equal buffer states. 118 * Stops processing if a state is different from the last buffers state. 119 */ 120 static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state, 121 int start, int count, int auto_ack) 122 { 123 unsigned int ccq = 0; 124 int tmp_count = count, tmp_start = start; 125 int nr = q->nr; 126 int rc; 127 128 BUG_ON(!q->irq_ptr->sch_token); 129 qdio_perf_stat_inc(&perf_stats.debug_eqbs_all); 130 131 if (!q->is_input_q) 132 nr += q->irq_ptr->nr_input_qs; 133 again: 134 ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count, 135 auto_ack); 136 rc = qdio_check_ccq(q, ccq); 137 138 /* At least one buffer was processed, return and extract the remaining 139 * buffers later. 140 */ 141 if ((ccq == 96) && (count != tmp_count)) { 142 qdio_perf_stat_inc(&perf_stats.debug_eqbs_incomplete); 143 return (count - tmp_count); 144 } 145 146 if (rc == 1) { 147 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq); 148 goto again; 149 } 150 151 if (rc < 0) { 152 DBF_ERROR("%4x EQBS ERROR", SCH_NO(q)); 153 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr); 154 q->handler(q->irq_ptr->cdev, 155 QDIO_ERROR_ACTIVATE_CHECK_CONDITION, 156 0, -1, -1, q->irq_ptr->int_parm); 157 return 0; 158 } 159 return count - tmp_count; 160 } 161 162 /** 163 * qdio_do_sqbs - set buffer states for QEBSM 164 * @q: queue to manipulate 165 * @state: new state of the buffers 166 * @start: first buffer number to change 167 * @count: how many buffers to change 168 * 169 * Returns the number of successfully changed buffers. 170 * Does retrying until the specified count of buffer states is set or an 171 * error occurs. 172 */ 173 static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start, 174 int count) 175 { 176 unsigned int ccq = 0; 177 int tmp_count = count, tmp_start = start; 178 int nr = q->nr; 179 int rc; 180 181 if (!count) 182 return 0; 183 184 BUG_ON(!q->irq_ptr->sch_token); 185 qdio_perf_stat_inc(&perf_stats.debug_sqbs_all); 186 187 if (!q->is_input_q) 188 nr += q->irq_ptr->nr_input_qs; 189 again: 190 ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count); 191 rc = qdio_check_ccq(q, ccq); 192 if (rc == 1) { 193 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq); 194 qdio_perf_stat_inc(&perf_stats.debug_sqbs_incomplete); 195 goto again; 196 } 197 if (rc < 0) { 198 DBF_ERROR("%4x SQBS ERROR", SCH_NO(q)); 199 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr); 200 q->handler(q->irq_ptr->cdev, 201 QDIO_ERROR_ACTIVATE_CHECK_CONDITION, 202 0, -1, -1, q->irq_ptr->int_parm); 203 return 0; 204 } 205 WARN_ON(tmp_count); 206 return count - tmp_count; 207 } 208 209 /* returns number of examined buffers and their common state in *state */ 210 static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr, 211 unsigned char *state, unsigned int count, 212 int auto_ack) 213 { 214 unsigned char __state = 0; 215 int i; 216 217 BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK); 218 BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q); 219 220 if (is_qebsm(q)) 221 return qdio_do_eqbs(q, state, bufnr, count, auto_ack); 222 223 for (i = 0; i < count; i++) { 224 if (!__state) 225 __state = q->slsb.val[bufnr]; 226 else if (q->slsb.val[bufnr] != __state) 227 break; 228 bufnr = next_buf(bufnr); 229 } 230 *state = __state; 231 return i; 232 } 233 234 inline int get_buf_state(struct qdio_q *q, unsigned int bufnr, 235 unsigned char *state, int auto_ack) 236 { 237 return get_buf_states(q, bufnr, state, 1, auto_ack); 238 } 239 240 /* wrap-around safe setting of slsb states, returns number of changed buffers */ 241 static inline int set_buf_states(struct qdio_q *q, int bufnr, 242 unsigned char state, int count) 243 { 244 int i; 245 246 BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK); 247 BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q); 248 249 if (is_qebsm(q)) 250 return qdio_do_sqbs(q, state, bufnr, count); 251 252 for (i = 0; i < count; i++) { 253 xchg(&q->slsb.val[bufnr], state); 254 bufnr = next_buf(bufnr); 255 } 256 return count; 257 } 258 259 static inline int set_buf_state(struct qdio_q *q, int bufnr, 260 unsigned char state) 261 { 262 return set_buf_states(q, bufnr, state, 1); 263 } 264 265 /* set slsb states to initial state */ 266 void qdio_init_buf_states(struct qdio_irq *irq_ptr) 267 { 268 struct qdio_q *q; 269 int i; 270 271 for_each_input_queue(irq_ptr, q, i) 272 set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT, 273 QDIO_MAX_BUFFERS_PER_Q); 274 for_each_output_queue(irq_ptr, q, i) 275 set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT, 276 QDIO_MAX_BUFFERS_PER_Q); 277 } 278 279 static int qdio_siga_sync(struct qdio_q *q, unsigned int output, 280 unsigned int input) 281 { 282 int cc; 283 284 if (!need_siga_sync(q)) 285 return 0; 286 287 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr); 288 qdio_perf_stat_inc(&perf_stats.siga_sync); 289 290 cc = do_siga_sync(q->irq_ptr->schid, output, input); 291 if (cc) 292 DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc); 293 return cc; 294 } 295 296 inline int qdio_siga_sync_q(struct qdio_q *q) 297 { 298 if (q->is_input_q) 299 return qdio_siga_sync(q, 0, q->mask); 300 else 301 return qdio_siga_sync(q, q->mask, 0); 302 } 303 304 static inline int qdio_siga_sync_out(struct qdio_q *q) 305 { 306 return qdio_siga_sync(q, ~0U, 0); 307 } 308 309 static inline int qdio_siga_sync_all(struct qdio_q *q) 310 { 311 return qdio_siga_sync(q, ~0U, ~0U); 312 } 313 314 static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit) 315 { 316 unsigned long schid; 317 unsigned int fc = 0; 318 u64 start_time = 0; 319 int cc; 320 321 if (q->u.out.use_enh_siga) 322 fc = 3; 323 324 if (is_qebsm(q)) { 325 schid = q->irq_ptr->sch_token; 326 fc |= 0x80; 327 } 328 else 329 schid = *((u32 *)&q->irq_ptr->schid); 330 331 again: 332 cc = do_siga_output(schid, q->mask, busy_bit, fc); 333 334 /* hipersocket busy condition */ 335 if (*busy_bit) { 336 WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2); 337 338 if (!start_time) { 339 start_time = get_usecs(); 340 goto again; 341 } 342 if ((get_usecs() - start_time) < QDIO_BUSY_BIT_PATIENCE) 343 goto again; 344 } 345 return cc; 346 } 347 348 static inline int qdio_siga_input(struct qdio_q *q) 349 { 350 int cc; 351 352 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr); 353 qdio_perf_stat_inc(&perf_stats.siga_in); 354 355 cc = do_siga_input(q->irq_ptr->schid, q->mask); 356 if (cc) 357 DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc); 358 return cc; 359 } 360 361 /* called from thinint inbound handler */ 362 void qdio_sync_after_thinint(struct qdio_q *q) 363 { 364 if (pci_out_supported(q)) { 365 if (need_siga_sync_thinint(q)) 366 qdio_siga_sync_all(q); 367 else if (need_siga_sync_out_thinint(q)) 368 qdio_siga_sync_out(q); 369 } else 370 qdio_siga_sync_q(q); 371 } 372 373 inline void qdio_stop_polling(struct qdio_q *q) 374 { 375 if (!q->u.in.polling) 376 return; 377 378 q->u.in.polling = 0; 379 qdio_perf_stat_inc(&perf_stats.debug_stop_polling); 380 381 /* show the card that we are not polling anymore */ 382 if (is_qebsm(q)) { 383 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT, 384 q->u.in.ack_count); 385 q->u.in.ack_count = 0; 386 } else 387 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT); 388 } 389 390 static void announce_buffer_error(struct qdio_q *q, int count) 391 { 392 q->qdio_error |= QDIO_ERROR_SLSB_STATE; 393 394 /* special handling for no target buffer empty */ 395 if ((!q->is_input_q && 396 (q->sbal[q->first_to_check]->element[15].flags & 0xff) == 0x10)) { 397 qdio_perf_stat_inc(&perf_stats.outbound_target_full); 398 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%3d", 399 q->first_to_check); 400 return; 401 } 402 403 DBF_ERROR("%4x BUF ERROR", SCH_NO(q)); 404 DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr); 405 DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count); 406 DBF_ERROR("F14:%2x F15:%2x", 407 q->sbal[q->first_to_check]->element[14].flags & 0xff, 408 q->sbal[q->first_to_check]->element[15].flags & 0xff); 409 } 410 411 static inline void inbound_primed(struct qdio_q *q, int count) 412 { 413 int new; 414 415 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %3d", count); 416 417 /* for QEBSM the ACK was already set by EQBS */ 418 if (is_qebsm(q)) { 419 if (!q->u.in.polling) { 420 q->u.in.polling = 1; 421 q->u.in.ack_count = count; 422 q->u.in.ack_start = q->first_to_check; 423 return; 424 } 425 426 /* delete the previous ACK's */ 427 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT, 428 q->u.in.ack_count); 429 q->u.in.ack_count = count; 430 q->u.in.ack_start = q->first_to_check; 431 return; 432 } 433 434 /* 435 * ACK the newest buffer. The ACK will be removed in qdio_stop_polling 436 * or by the next inbound run. 437 */ 438 new = add_buf(q->first_to_check, count - 1); 439 if (q->u.in.polling) { 440 /* reset the previous ACK but first set the new one */ 441 set_buf_state(q, new, SLSB_P_INPUT_ACK); 442 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT); 443 } else { 444 q->u.in.polling = 1; 445 set_buf_state(q, new, SLSB_P_INPUT_ACK); 446 } 447 448 q->u.in.ack_start = new; 449 count--; 450 if (!count) 451 return; 452 453 /* 454 * Need to change all PRIMED buffers to NOT_INIT, otherwise 455 * we're loosing initiative in the thinint code. 456 */ 457 set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, 458 count); 459 } 460 461 static int get_inbound_buffer_frontier(struct qdio_q *q) 462 { 463 int count, stop; 464 unsigned char state; 465 466 /* 467 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved 468 * would return 0. 469 */ 470 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK); 471 stop = add_buf(q->first_to_check, count); 472 473 /* 474 * No siga sync here, as a PCI or we after a thin interrupt 475 * will sync the queues. 476 */ 477 478 /* need to set count to 1 for non-qebsm */ 479 if (!is_qebsm(q)) 480 count = 1; 481 482 check_next: 483 if (q->first_to_check == stop) 484 goto out; 485 486 count = get_buf_states(q, q->first_to_check, &state, count, 1); 487 if (!count) 488 goto out; 489 490 switch (state) { 491 case SLSB_P_INPUT_PRIMED: 492 inbound_primed(q, count); 493 /* 494 * No siga-sync needed for non-qebsm here, as the inbound queue 495 * will be synced on the next siga-r, resp. 496 * tiqdio_is_inbound_q_done will do the siga-sync. 497 */ 498 q->first_to_check = add_buf(q->first_to_check, count); 499 atomic_sub(count, &q->nr_buf_used); 500 goto check_next; 501 case SLSB_P_INPUT_ERROR: 502 announce_buffer_error(q, count); 503 /* process the buffer, the upper layer will take care of it */ 504 q->first_to_check = add_buf(q->first_to_check, count); 505 atomic_sub(count, &q->nr_buf_used); 506 break; 507 case SLSB_CU_INPUT_EMPTY: 508 case SLSB_P_INPUT_NOT_INIT: 509 case SLSB_P_INPUT_ACK: 510 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop"); 511 break; 512 default: 513 BUG(); 514 } 515 out: 516 return q->first_to_check; 517 } 518 519 int qdio_inbound_q_moved(struct qdio_q *q) 520 { 521 int bufnr; 522 523 bufnr = get_inbound_buffer_frontier(q); 524 525 if ((bufnr != q->last_move) || q->qdio_error) { 526 q->last_move = bufnr; 527 if (!need_siga_sync(q) && !pci_out_supported(q)) 528 q->u.in.timestamp = get_usecs(); 529 530 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in moved"); 531 return 1; 532 } else 533 return 0; 534 } 535 536 static int qdio_inbound_q_done(struct qdio_q *q) 537 { 538 unsigned char state = 0; 539 540 if (!atomic_read(&q->nr_buf_used)) 541 return 1; 542 543 /* 544 * We need that one for synchronization with the adapter, as it 545 * does a kind of PCI avoidance. 546 */ 547 qdio_siga_sync_q(q); 548 549 get_buf_state(q, q->first_to_check, &state, 0); 550 if (state == SLSB_P_INPUT_PRIMED) 551 /* we got something to do */ 552 return 0; 553 554 /* on VM, we don't poll, so the q is always done here */ 555 if (need_siga_sync(q) || pci_out_supported(q)) 556 return 1; 557 558 /* 559 * At this point we know, that inbound first_to_check 560 * has (probably) not moved (see qdio_inbound_processing). 561 */ 562 if (get_usecs() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) { 563 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%3d", 564 q->first_to_check); 565 return 1; 566 } else { 567 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in notd:%3d", 568 q->first_to_check); 569 return 0; 570 } 571 } 572 573 void qdio_kick_handler(struct qdio_q *q) 574 { 575 int start = q->first_to_kick; 576 int end = q->first_to_check; 577 int count; 578 579 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)) 580 return; 581 582 count = sub_buf(end, start); 583 584 if (q->is_input_q) { 585 qdio_perf_stat_inc(&perf_stats.inbound_handler); 586 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%3d c:%3d", start, count); 587 } else { 588 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: nr:%1d", q->nr); 589 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "s:%3d c:%3d", start, count); 590 } 591 592 q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count, 593 q->irq_ptr->int_parm); 594 595 /* for the next time */ 596 q->first_to_kick = end; 597 q->qdio_error = 0; 598 } 599 600 static void __qdio_inbound_processing(struct qdio_q *q) 601 { 602 qdio_perf_stat_inc(&perf_stats.tasklet_inbound); 603 again: 604 if (!qdio_inbound_q_moved(q)) 605 return; 606 607 qdio_kick_handler(q); 608 609 if (!qdio_inbound_q_done(q)) 610 /* means poll time is not yet over */ 611 goto again; 612 613 qdio_stop_polling(q); 614 /* 615 * We need to check again to not lose initiative after 616 * resetting the ACK state. 617 */ 618 if (!qdio_inbound_q_done(q)) 619 goto again; 620 } 621 622 /* inbound tasklet */ 623 void qdio_inbound_processing(unsigned long data) 624 { 625 struct qdio_q *q = (struct qdio_q *)data; 626 __qdio_inbound_processing(q); 627 } 628 629 static int get_outbound_buffer_frontier(struct qdio_q *q) 630 { 631 int count, stop; 632 unsigned char state; 633 634 if (((queue_type(q) != QDIO_IQDIO_QFMT) && !pci_out_supported(q)) || 635 (queue_type(q) == QDIO_IQDIO_QFMT && multicast_outbound(q))) 636 qdio_siga_sync_q(q); 637 638 /* 639 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved 640 * would return 0. 641 */ 642 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK); 643 stop = add_buf(q->first_to_check, count); 644 645 /* need to set count to 1 for non-qebsm */ 646 if (!is_qebsm(q)) 647 count = 1; 648 649 check_next: 650 if (q->first_to_check == stop) 651 return q->first_to_check; 652 653 count = get_buf_states(q, q->first_to_check, &state, count, 0); 654 if (!count) 655 return q->first_to_check; 656 657 switch (state) { 658 case SLSB_P_OUTPUT_EMPTY: 659 /* the adapter got it */ 660 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out empty:%1d %3d", q->nr, count); 661 662 atomic_sub(count, &q->nr_buf_used); 663 q->first_to_check = add_buf(q->first_to_check, count); 664 /* 665 * We fetch all buffer states at once. get_buf_states may 666 * return count < stop. For QEBSM we do not loop. 667 */ 668 if (is_qebsm(q)) 669 break; 670 goto check_next; 671 case SLSB_P_OUTPUT_ERROR: 672 announce_buffer_error(q, count); 673 /* process the buffer, the upper layer will take care of it */ 674 q->first_to_check = add_buf(q->first_to_check, count); 675 atomic_sub(count, &q->nr_buf_used); 676 break; 677 case SLSB_CU_OUTPUT_PRIMED: 678 /* the adapter has not fetched the output yet */ 679 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d", q->nr); 680 break; 681 case SLSB_P_OUTPUT_NOT_INIT: 682 case SLSB_P_OUTPUT_HALTED: 683 break; 684 default: 685 BUG(); 686 } 687 return q->first_to_check; 688 } 689 690 /* all buffers processed? */ 691 static inline int qdio_outbound_q_done(struct qdio_q *q) 692 { 693 return atomic_read(&q->nr_buf_used) == 0; 694 } 695 696 static inline int qdio_outbound_q_moved(struct qdio_q *q) 697 { 698 int bufnr; 699 700 bufnr = get_outbound_buffer_frontier(q); 701 702 if ((bufnr != q->last_move) || q->qdio_error) { 703 q->last_move = bufnr; 704 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr); 705 return 1; 706 } else 707 return 0; 708 } 709 710 static int qdio_kick_outbound_q(struct qdio_q *q) 711 { 712 unsigned int busy_bit; 713 int cc; 714 715 if (!need_siga_out(q)) 716 return 0; 717 718 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr); 719 qdio_perf_stat_inc(&perf_stats.siga_out); 720 721 cc = qdio_siga_output(q, &busy_bit); 722 switch (cc) { 723 case 0: 724 break; 725 case 2: 726 if (busy_bit) { 727 DBF_ERROR("%4x cc2 REP:%1d", SCH_NO(q), q->nr); 728 cc |= QDIO_ERROR_SIGA_BUSY; 729 } else 730 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr); 731 break; 732 case 1: 733 case 3: 734 DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc); 735 break; 736 } 737 return cc; 738 } 739 740 static void __qdio_outbound_processing(struct qdio_q *q) 741 { 742 qdio_perf_stat_inc(&perf_stats.tasklet_outbound); 743 BUG_ON(atomic_read(&q->nr_buf_used) < 0); 744 745 if (qdio_outbound_q_moved(q)) 746 qdio_kick_handler(q); 747 748 if (queue_type(q) == QDIO_ZFCP_QFMT) 749 if (!pci_out_supported(q) && !qdio_outbound_q_done(q)) 750 goto sched; 751 752 /* bail out for HiperSockets unicast queues */ 753 if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q)) 754 return; 755 756 if ((queue_type(q) == QDIO_IQDIO_QFMT) && 757 (atomic_read(&q->nr_buf_used)) > QDIO_IQDIO_POLL_LVL) 758 goto sched; 759 760 if (q->u.out.pci_out_enabled) 761 return; 762 763 /* 764 * Now we know that queue type is either qeth without pci enabled 765 * or HiperSockets multicast. Make sure buffer switch from PRIMED to 766 * EMPTY is noticed and outbound_handler is called after some time. 767 */ 768 if (qdio_outbound_q_done(q)) 769 del_timer(&q->u.out.timer); 770 else { 771 if (!timer_pending(&q->u.out.timer)) { 772 mod_timer(&q->u.out.timer, jiffies + 10 * HZ); 773 qdio_perf_stat_inc(&perf_stats.debug_tl_out_timer); 774 } 775 } 776 return; 777 778 sched: 779 if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED)) 780 return; 781 tasklet_schedule(&q->tasklet); 782 } 783 784 /* outbound tasklet */ 785 void qdio_outbound_processing(unsigned long data) 786 { 787 struct qdio_q *q = (struct qdio_q *)data; 788 __qdio_outbound_processing(q); 789 } 790 791 void qdio_outbound_timer(unsigned long data) 792 { 793 struct qdio_q *q = (struct qdio_q *)data; 794 795 if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED)) 796 return; 797 tasklet_schedule(&q->tasklet); 798 } 799 800 /* called from thinint inbound tasklet */ 801 void qdio_check_outbound_after_thinint(struct qdio_q *q) 802 { 803 struct qdio_q *out; 804 int i; 805 806 if (!pci_out_supported(q)) 807 return; 808 809 for_each_output_queue(q->irq_ptr, out, i) 810 if (!qdio_outbound_q_done(out)) 811 tasklet_schedule(&out->tasklet); 812 } 813 814 static inline void qdio_set_state(struct qdio_irq *irq_ptr, 815 enum qdio_irq_states state) 816 { 817 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state); 818 819 irq_ptr->state = state; 820 mb(); 821 } 822 823 static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb) 824 { 825 if (irb->esw.esw0.erw.cons) { 826 DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no); 827 DBF_ERROR_HEX(irb, 64); 828 DBF_ERROR_HEX(irb->ecw, 64); 829 } 830 } 831 832 /* PCI interrupt handler */ 833 static void qdio_int_handler_pci(struct qdio_irq *irq_ptr) 834 { 835 int i; 836 struct qdio_q *q; 837 838 if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED)) 839 return; 840 841 qdio_perf_stat_inc(&perf_stats.pci_int); 842 843 for_each_input_queue(irq_ptr, q, i) 844 tasklet_schedule(&q->tasklet); 845 846 if (!(irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED)) 847 return; 848 849 for_each_output_queue(irq_ptr, q, i) { 850 if (qdio_outbound_q_done(q)) 851 continue; 852 853 if (!siga_syncs_out_pci(q)) 854 qdio_siga_sync_q(q); 855 856 tasklet_schedule(&q->tasklet); 857 } 858 } 859 860 static void qdio_handle_activate_check(struct ccw_device *cdev, 861 unsigned long intparm, int cstat, int dstat) 862 { 863 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 864 struct qdio_q *q; 865 866 DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no); 867 DBF_ERROR("intp :%lx", intparm); 868 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat); 869 870 if (irq_ptr->nr_input_qs) { 871 q = irq_ptr->input_qs[0]; 872 } else if (irq_ptr->nr_output_qs) { 873 q = irq_ptr->output_qs[0]; 874 } else { 875 dump_stack(); 876 goto no_handler; 877 } 878 q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION, 879 0, -1, -1, irq_ptr->int_parm); 880 no_handler: 881 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED); 882 } 883 884 static void qdio_call_shutdown(struct work_struct *work) 885 { 886 struct ccw_device_private *priv; 887 struct ccw_device *cdev; 888 889 priv = container_of(work, struct ccw_device_private, kick_work); 890 cdev = priv->cdev; 891 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); 892 put_device(&cdev->dev); 893 } 894 895 static void qdio_int_error(struct ccw_device *cdev) 896 { 897 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 898 899 switch (irq_ptr->state) { 900 case QDIO_IRQ_STATE_INACTIVE: 901 case QDIO_IRQ_STATE_CLEANUP: 902 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR); 903 break; 904 case QDIO_IRQ_STATE_ESTABLISHED: 905 case QDIO_IRQ_STATE_ACTIVE: 906 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED); 907 if (get_device(&cdev->dev)) { 908 /* Can't call shutdown from interrupt context. */ 909 PREPARE_WORK(&cdev->private->kick_work, 910 qdio_call_shutdown); 911 queue_work(ccw_device_work, &cdev->private->kick_work); 912 } 913 break; 914 default: 915 WARN_ON(1); 916 } 917 wake_up(&cdev->private->wait_q); 918 } 919 920 static int qdio_establish_check_errors(struct ccw_device *cdev, int cstat, 921 int dstat) 922 { 923 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 924 925 if (cstat || (dstat & ~(DEV_STAT_CHN_END | DEV_STAT_DEV_END))) { 926 DBF_ERROR("EQ:ck con"); 927 goto error; 928 } 929 930 if (!(dstat & DEV_STAT_DEV_END)) { 931 DBF_ERROR("EQ:no dev"); 932 goto error; 933 } 934 935 if (dstat & ~(DEV_STAT_CHN_END | DEV_STAT_DEV_END)) { 936 DBF_ERROR("EQ: bad io"); 937 goto error; 938 } 939 return 0; 940 error: 941 DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no); 942 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat); 943 944 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR); 945 return 1; 946 } 947 948 static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat, 949 int dstat) 950 { 951 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 952 953 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq"); 954 if (!qdio_establish_check_errors(cdev, cstat, dstat)) 955 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED); 956 } 957 958 /* qdio interrupt handler */ 959 void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm, 960 struct irb *irb) 961 { 962 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 963 int cstat, dstat; 964 965 qdio_perf_stat_inc(&perf_stats.qdio_int); 966 967 if (!intparm || !irq_ptr) { 968 DBF_ERROR("qint:%4x", cdev->private->schid.sch_no); 969 return; 970 } 971 972 if (IS_ERR(irb)) { 973 switch (PTR_ERR(irb)) { 974 case -EIO: 975 DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no); 976 return; 977 case -ETIMEDOUT: 978 DBF_ERROR("%4x IO timeout", irq_ptr->schid.sch_no); 979 qdio_int_error(cdev); 980 return; 981 default: 982 WARN_ON(1); 983 return; 984 } 985 } 986 qdio_irq_check_sense(irq_ptr, irb); 987 988 cstat = irb->scsw.cmd.cstat; 989 dstat = irb->scsw.cmd.dstat; 990 991 switch (irq_ptr->state) { 992 case QDIO_IRQ_STATE_INACTIVE: 993 qdio_establish_handle_irq(cdev, cstat, dstat); 994 break; 995 996 case QDIO_IRQ_STATE_CLEANUP: 997 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); 998 break; 999 1000 case QDIO_IRQ_STATE_ESTABLISHED: 1001 case QDIO_IRQ_STATE_ACTIVE: 1002 if (cstat & SCHN_STAT_PCI) { 1003 qdio_int_handler_pci(irq_ptr); 1004 /* no state change so no need to wake up wait_q */ 1005 return; 1006 } 1007 if ((cstat & ~SCHN_STAT_PCI) || dstat) { 1008 qdio_handle_activate_check(cdev, intparm, cstat, 1009 dstat); 1010 break; 1011 } 1012 default: 1013 WARN_ON(1); 1014 } 1015 wake_up(&cdev->private->wait_q); 1016 } 1017 1018 /** 1019 * qdio_get_ssqd_desc - get qdio subchannel description 1020 * @cdev: ccw device to get description for 1021 * @data: where to store the ssqd 1022 * 1023 * Returns 0 or an error code. The results of the chsc are stored in the 1024 * specified structure. 1025 */ 1026 int qdio_get_ssqd_desc(struct ccw_device *cdev, 1027 struct qdio_ssqd_desc *data) 1028 { 1029 1030 if (!cdev || !cdev->private) 1031 return -EINVAL; 1032 1033 DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no); 1034 return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data); 1035 } 1036 EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc); 1037 1038 /** 1039 * qdio_cleanup - shutdown queues and free data structures 1040 * @cdev: associated ccw device 1041 * @how: use halt or clear to shutdown 1042 * 1043 * This function calls qdio_shutdown() for @cdev with method @how. 1044 * and qdio_free(). The qdio_free() return value is ignored since 1045 * !irq_ptr is already checked. 1046 */ 1047 int qdio_cleanup(struct ccw_device *cdev, int how) 1048 { 1049 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1050 int rc; 1051 1052 if (!irq_ptr) 1053 return -ENODEV; 1054 1055 rc = qdio_shutdown(cdev, how); 1056 1057 qdio_free(cdev); 1058 return rc; 1059 } 1060 EXPORT_SYMBOL_GPL(qdio_cleanup); 1061 1062 static void qdio_shutdown_queues(struct ccw_device *cdev) 1063 { 1064 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1065 struct qdio_q *q; 1066 int i; 1067 1068 for_each_input_queue(irq_ptr, q, i) 1069 tasklet_kill(&q->tasklet); 1070 1071 for_each_output_queue(irq_ptr, q, i) { 1072 del_timer(&q->u.out.timer); 1073 tasklet_kill(&q->tasklet); 1074 } 1075 } 1076 1077 /** 1078 * qdio_shutdown - shut down a qdio subchannel 1079 * @cdev: associated ccw device 1080 * @how: use halt or clear to shutdown 1081 */ 1082 int qdio_shutdown(struct ccw_device *cdev, int how) 1083 { 1084 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1085 int rc; 1086 unsigned long flags; 1087 1088 if (!irq_ptr) 1089 return -ENODEV; 1090 1091 BUG_ON(irqs_disabled()); 1092 DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no); 1093 1094 mutex_lock(&irq_ptr->setup_mutex); 1095 /* 1096 * Subchannel was already shot down. We cannot prevent being called 1097 * twice since cio may trigger a shutdown asynchronously. 1098 */ 1099 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) { 1100 mutex_unlock(&irq_ptr->setup_mutex); 1101 return 0; 1102 } 1103 1104 /* 1105 * Indicate that the device is going down. Scheduling the queue 1106 * tasklets is forbidden from here on. 1107 */ 1108 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED); 1109 1110 tiqdio_remove_input_queues(irq_ptr); 1111 qdio_shutdown_queues(cdev); 1112 qdio_shutdown_debug_entries(irq_ptr, cdev); 1113 1114 /* cleanup subchannel */ 1115 spin_lock_irqsave(get_ccwdev_lock(cdev), flags); 1116 1117 if (how & QDIO_FLAG_CLEANUP_USING_CLEAR) 1118 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP); 1119 else 1120 /* default behaviour is halt */ 1121 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP); 1122 if (rc) { 1123 DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no); 1124 DBF_ERROR("rc:%4d", rc); 1125 goto no_cleanup; 1126 } 1127 1128 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP); 1129 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags); 1130 wait_event_interruptible_timeout(cdev->private->wait_q, 1131 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE || 1132 irq_ptr->state == QDIO_IRQ_STATE_ERR, 1133 10 * HZ); 1134 spin_lock_irqsave(get_ccwdev_lock(cdev), flags); 1135 1136 no_cleanup: 1137 qdio_shutdown_thinint(irq_ptr); 1138 1139 /* restore interrupt handler */ 1140 if ((void *)cdev->handler == (void *)qdio_int_handler) 1141 cdev->handler = irq_ptr->orig_handler; 1142 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags); 1143 1144 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); 1145 mutex_unlock(&irq_ptr->setup_mutex); 1146 if (rc) 1147 return rc; 1148 return 0; 1149 } 1150 EXPORT_SYMBOL_GPL(qdio_shutdown); 1151 1152 /** 1153 * qdio_free - free data structures for a qdio subchannel 1154 * @cdev: associated ccw device 1155 */ 1156 int qdio_free(struct ccw_device *cdev) 1157 { 1158 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1159 1160 if (!irq_ptr) 1161 return -ENODEV; 1162 1163 DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no); 1164 mutex_lock(&irq_ptr->setup_mutex); 1165 1166 if (irq_ptr->debug_area != NULL) { 1167 debug_unregister(irq_ptr->debug_area); 1168 irq_ptr->debug_area = NULL; 1169 } 1170 cdev->private->qdio_data = NULL; 1171 mutex_unlock(&irq_ptr->setup_mutex); 1172 1173 qdio_release_memory(irq_ptr); 1174 return 0; 1175 } 1176 EXPORT_SYMBOL_GPL(qdio_free); 1177 1178 /** 1179 * qdio_initialize - allocate and establish queues for a qdio subchannel 1180 * @init_data: initialization data 1181 * 1182 * This function first allocates queues via qdio_allocate() and on success 1183 * establishes them via qdio_establish(). 1184 */ 1185 int qdio_initialize(struct qdio_initialize *init_data) 1186 { 1187 int rc; 1188 1189 rc = qdio_allocate(init_data); 1190 if (rc) 1191 return rc; 1192 1193 rc = qdio_establish(init_data); 1194 if (rc) 1195 qdio_free(init_data->cdev); 1196 return rc; 1197 } 1198 EXPORT_SYMBOL_GPL(qdio_initialize); 1199 1200 /** 1201 * qdio_allocate - allocate qdio queues and associated data 1202 * @init_data: initialization data 1203 */ 1204 int qdio_allocate(struct qdio_initialize *init_data) 1205 { 1206 struct qdio_irq *irq_ptr; 1207 1208 DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no); 1209 1210 if ((init_data->no_input_qs && !init_data->input_handler) || 1211 (init_data->no_output_qs && !init_data->output_handler)) 1212 return -EINVAL; 1213 1214 if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) || 1215 (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ)) 1216 return -EINVAL; 1217 1218 if ((!init_data->input_sbal_addr_array) || 1219 (!init_data->output_sbal_addr_array)) 1220 return -EINVAL; 1221 1222 /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */ 1223 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA); 1224 if (!irq_ptr) 1225 goto out_err; 1226 1227 mutex_init(&irq_ptr->setup_mutex); 1228 qdio_allocate_dbf(init_data, irq_ptr); 1229 1230 /* 1231 * Allocate a page for the chsc calls in qdio_establish. 1232 * Must be pre-allocated since a zfcp recovery will call 1233 * qdio_establish. In case of low memory and swap on a zfcp disk 1234 * we may not be able to allocate memory otherwise. 1235 */ 1236 irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL); 1237 if (!irq_ptr->chsc_page) 1238 goto out_rel; 1239 1240 /* qdr is used in ccw1.cda which is u32 */ 1241 irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA); 1242 if (!irq_ptr->qdr) 1243 goto out_rel; 1244 WARN_ON((unsigned long)irq_ptr->qdr & 0xfff); 1245 1246 if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs, 1247 init_data->no_output_qs)) 1248 goto out_rel; 1249 1250 init_data->cdev->private->qdio_data = irq_ptr; 1251 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); 1252 return 0; 1253 out_rel: 1254 qdio_release_memory(irq_ptr); 1255 out_err: 1256 return -ENOMEM; 1257 } 1258 EXPORT_SYMBOL_GPL(qdio_allocate); 1259 1260 /** 1261 * qdio_establish - establish queues on a qdio subchannel 1262 * @init_data: initialization data 1263 */ 1264 int qdio_establish(struct qdio_initialize *init_data) 1265 { 1266 struct qdio_irq *irq_ptr; 1267 struct ccw_device *cdev = init_data->cdev; 1268 unsigned long saveflags; 1269 int rc; 1270 1271 DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no); 1272 1273 irq_ptr = cdev->private->qdio_data; 1274 if (!irq_ptr) 1275 return -ENODEV; 1276 1277 if (cdev->private->state != DEV_STATE_ONLINE) 1278 return -EINVAL; 1279 1280 mutex_lock(&irq_ptr->setup_mutex); 1281 qdio_setup_irq(init_data); 1282 1283 rc = qdio_establish_thinint(irq_ptr); 1284 if (rc) { 1285 mutex_unlock(&irq_ptr->setup_mutex); 1286 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); 1287 return rc; 1288 } 1289 1290 /* establish q */ 1291 irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd; 1292 irq_ptr->ccw.flags = CCW_FLAG_SLI; 1293 irq_ptr->ccw.count = irq_ptr->equeue.count; 1294 irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr); 1295 1296 spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags); 1297 ccw_device_set_options_mask(cdev, 0); 1298 1299 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0); 1300 if (rc) { 1301 DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no); 1302 DBF_ERROR("rc:%4x", rc); 1303 } 1304 spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags); 1305 1306 if (rc) { 1307 mutex_unlock(&irq_ptr->setup_mutex); 1308 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); 1309 return rc; 1310 } 1311 1312 wait_event_interruptible_timeout(cdev->private->wait_q, 1313 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED || 1314 irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ); 1315 1316 if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) { 1317 mutex_unlock(&irq_ptr->setup_mutex); 1318 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); 1319 return -EIO; 1320 } 1321 1322 qdio_setup_ssqd_info(irq_ptr); 1323 DBF_EVENT("qDmmwc:%2x", irq_ptr->ssqd_desc.mmwc); 1324 DBF_EVENT("qib ac:%4x", irq_ptr->qib.ac); 1325 1326 /* qebsm is now setup if available, initialize buffer states */ 1327 qdio_init_buf_states(irq_ptr); 1328 1329 mutex_unlock(&irq_ptr->setup_mutex); 1330 qdio_print_subchannel_info(irq_ptr, cdev); 1331 qdio_setup_debug_entries(irq_ptr, cdev); 1332 return 0; 1333 } 1334 EXPORT_SYMBOL_GPL(qdio_establish); 1335 1336 /** 1337 * qdio_activate - activate queues on a qdio subchannel 1338 * @cdev: associated cdev 1339 */ 1340 int qdio_activate(struct ccw_device *cdev) 1341 { 1342 struct qdio_irq *irq_ptr; 1343 int rc; 1344 unsigned long saveflags; 1345 1346 DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no); 1347 1348 irq_ptr = cdev->private->qdio_data; 1349 if (!irq_ptr) 1350 return -ENODEV; 1351 1352 if (cdev->private->state != DEV_STATE_ONLINE) 1353 return -EINVAL; 1354 1355 mutex_lock(&irq_ptr->setup_mutex); 1356 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) { 1357 rc = -EBUSY; 1358 goto out; 1359 } 1360 1361 irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd; 1362 irq_ptr->ccw.flags = CCW_FLAG_SLI; 1363 irq_ptr->ccw.count = irq_ptr->aqueue.count; 1364 irq_ptr->ccw.cda = 0; 1365 1366 spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags); 1367 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL); 1368 1369 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE, 1370 0, DOIO_DENY_PREFETCH); 1371 if (rc) { 1372 DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no); 1373 DBF_ERROR("rc:%4x", rc); 1374 } 1375 spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags); 1376 1377 if (rc) 1378 goto out; 1379 1380 if (is_thinint_irq(irq_ptr)) 1381 tiqdio_add_input_queues(irq_ptr); 1382 1383 /* wait for subchannel to become active */ 1384 msleep(5); 1385 1386 switch (irq_ptr->state) { 1387 case QDIO_IRQ_STATE_STOPPED: 1388 case QDIO_IRQ_STATE_ERR: 1389 rc = -EIO; 1390 break; 1391 default: 1392 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE); 1393 rc = 0; 1394 } 1395 out: 1396 mutex_unlock(&irq_ptr->setup_mutex); 1397 return rc; 1398 } 1399 EXPORT_SYMBOL_GPL(qdio_activate); 1400 1401 static inline int buf_in_between(int bufnr, int start, int count) 1402 { 1403 int end = add_buf(start, count); 1404 1405 if (end > start) { 1406 if (bufnr >= start && bufnr < end) 1407 return 1; 1408 else 1409 return 0; 1410 } 1411 1412 /* wrap-around case */ 1413 if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) || 1414 (bufnr < end)) 1415 return 1; 1416 else 1417 return 0; 1418 } 1419 1420 /** 1421 * handle_inbound - reset processed input buffers 1422 * @q: queue containing the buffers 1423 * @callflags: flags 1424 * @bufnr: first buffer to process 1425 * @count: how many buffers are emptied 1426 */ 1427 static int handle_inbound(struct qdio_q *q, unsigned int callflags, 1428 int bufnr, int count) 1429 { 1430 int used, diff; 1431 1432 if (!q->u.in.polling) 1433 goto set; 1434 1435 /* protect against stop polling setting an ACK for an emptied slsb */ 1436 if (count == QDIO_MAX_BUFFERS_PER_Q) { 1437 /* overwriting everything, just delete polling status */ 1438 q->u.in.polling = 0; 1439 q->u.in.ack_count = 0; 1440 goto set; 1441 } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) { 1442 if (is_qebsm(q)) { 1443 /* partial overwrite, just update ack_start */ 1444 diff = add_buf(bufnr, count); 1445 diff = sub_buf(diff, q->u.in.ack_start); 1446 q->u.in.ack_count -= diff; 1447 if (q->u.in.ack_count <= 0) { 1448 q->u.in.polling = 0; 1449 q->u.in.ack_count = 0; 1450 goto set; 1451 } 1452 q->u.in.ack_start = add_buf(q->u.in.ack_start, diff); 1453 } 1454 else 1455 /* the only ACK will be deleted, so stop polling */ 1456 q->u.in.polling = 0; 1457 } 1458 1459 set: 1460 count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count); 1461 1462 used = atomic_add_return(count, &q->nr_buf_used) - count; 1463 BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q); 1464 1465 /* no need to signal as long as the adapter had free buffers */ 1466 if (used) 1467 return 0; 1468 1469 if (need_siga_in(q)) 1470 return qdio_siga_input(q); 1471 return 0; 1472 } 1473 1474 /** 1475 * handle_outbound - process filled outbound buffers 1476 * @q: queue containing the buffers 1477 * @callflags: flags 1478 * @bufnr: first buffer to process 1479 * @count: how many buffers are filled 1480 */ 1481 static int handle_outbound(struct qdio_q *q, unsigned int callflags, 1482 int bufnr, int count) 1483 { 1484 unsigned char state; 1485 int used, rc = 0; 1486 1487 qdio_perf_stat_inc(&perf_stats.outbound_handler); 1488 1489 count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count); 1490 used = atomic_add_return(count, &q->nr_buf_used); 1491 BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q); 1492 1493 if (callflags & QDIO_FLAG_PCI_OUT) 1494 q->u.out.pci_out_enabled = 1; 1495 else 1496 q->u.out.pci_out_enabled = 0; 1497 1498 if (queue_type(q) == QDIO_IQDIO_QFMT) { 1499 if (multicast_outbound(q)) 1500 rc = qdio_kick_outbound_q(q); 1501 else 1502 if ((q->irq_ptr->ssqd_desc.mmwc > 1) && 1503 (count > 1) && 1504 (count <= q->irq_ptr->ssqd_desc.mmwc)) { 1505 /* exploit enhanced SIGA */ 1506 q->u.out.use_enh_siga = 1; 1507 rc = qdio_kick_outbound_q(q); 1508 } else { 1509 /* 1510 * One siga-w per buffer required for unicast 1511 * HiperSockets. 1512 */ 1513 q->u.out.use_enh_siga = 0; 1514 while (count--) { 1515 rc = qdio_kick_outbound_q(q); 1516 if (rc) 1517 goto out; 1518 } 1519 } 1520 goto out; 1521 } 1522 1523 if (need_siga_sync(q)) { 1524 qdio_siga_sync_q(q); 1525 goto out; 1526 } 1527 1528 /* try to fast requeue buffers */ 1529 get_buf_state(q, prev_buf(bufnr), &state, 0); 1530 if (state != SLSB_CU_OUTPUT_PRIMED) 1531 rc = qdio_kick_outbound_q(q); 1532 else { 1533 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "fast-req"); 1534 qdio_perf_stat_inc(&perf_stats.fast_requeue); 1535 } 1536 out: 1537 tasklet_schedule(&q->tasklet); 1538 return rc; 1539 } 1540 1541 /** 1542 * do_QDIO - process input or output buffers 1543 * @cdev: associated ccw_device for the qdio subchannel 1544 * @callflags: input or output and special flags from the program 1545 * @q_nr: queue number 1546 * @bufnr: buffer number 1547 * @count: how many buffers to process 1548 */ 1549 int do_QDIO(struct ccw_device *cdev, unsigned int callflags, 1550 int q_nr, int bufnr, int count) 1551 { 1552 struct qdio_irq *irq_ptr; 1553 1554 if ((bufnr > QDIO_MAX_BUFFERS_PER_Q) || 1555 (count > QDIO_MAX_BUFFERS_PER_Q) || 1556 (q_nr > QDIO_MAX_QUEUES_PER_IRQ)) 1557 return -EINVAL; 1558 1559 if (!count) 1560 return 0; 1561 1562 irq_ptr = cdev->private->qdio_data; 1563 if (!irq_ptr) 1564 return -ENODEV; 1565 1566 if (callflags & QDIO_FLAG_SYNC_INPUT) 1567 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "doQDIO input"); 1568 else 1569 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "doQDIO output"); 1570 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "q:%1d flag:%4x", q_nr, callflags); 1571 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "buf:%2d cnt:%3d", bufnr, count); 1572 1573 if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE) 1574 return -EBUSY; 1575 1576 if (callflags & QDIO_FLAG_SYNC_INPUT) 1577 return handle_inbound(irq_ptr->input_qs[q_nr], 1578 callflags, bufnr, count); 1579 else if (callflags & QDIO_FLAG_SYNC_OUTPUT) 1580 return handle_outbound(irq_ptr->output_qs[q_nr], 1581 callflags, bufnr, count); 1582 return -EINVAL; 1583 } 1584 EXPORT_SYMBOL_GPL(do_QDIO); 1585 1586 static int __init init_QDIO(void) 1587 { 1588 int rc; 1589 1590 rc = qdio_setup_init(); 1591 if (rc) 1592 return rc; 1593 rc = tiqdio_allocate_memory(); 1594 if (rc) 1595 goto out_cache; 1596 rc = qdio_debug_init(); 1597 if (rc) 1598 goto out_ti; 1599 rc = qdio_setup_perf_stats(); 1600 if (rc) 1601 goto out_debug; 1602 rc = tiqdio_register_thinints(); 1603 if (rc) 1604 goto out_perf; 1605 return 0; 1606 1607 out_perf: 1608 qdio_remove_perf_stats(); 1609 out_debug: 1610 qdio_debug_exit(); 1611 out_ti: 1612 tiqdio_free_memory(); 1613 out_cache: 1614 qdio_setup_exit(); 1615 return rc; 1616 } 1617 1618 static void __exit exit_QDIO(void) 1619 { 1620 tiqdio_unregister_thinints(); 1621 tiqdio_free_memory(); 1622 qdio_remove_perf_stats(); 1623 qdio_debug_exit(); 1624 qdio_setup_exit(); 1625 } 1626 1627 module_init(init_QDIO); 1628 module_exit(exit_QDIO); 1629