xref: /openbmc/linux/drivers/s390/cio/qdio_main.c (revision 812f77b749a8ae11f58dacf0d3ed65e7ede47458)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Linux for s390 qdio support, buffer handling, qdio API and module support.
4  *
5  * Copyright IBM Corp. 2000, 2008
6  * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
7  *	      Jan Glauber <jang@linux.vnet.ibm.com>
8  * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
9  */
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/kernel.h>
13 #include <linux/timer.h>
14 #include <linux/delay.h>
15 #include <linux/gfp.h>
16 #include <linux/io.h>
17 #include <linux/atomic.h>
18 #include <asm/debug.h>
19 #include <asm/qdio.h>
20 #include <asm/ipl.h>
21 
22 #include "cio.h"
23 #include "css.h"
24 #include "device.h"
25 #include "qdio.h"
26 #include "qdio_debug.h"
27 
28 MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
29 	"Jan Glauber <jang@linux.vnet.ibm.com>");
30 MODULE_DESCRIPTION("QDIO base support");
31 MODULE_LICENSE("GPL");
32 
33 static inline int do_siga_sync(unsigned long schid,
34 			       unsigned int out_mask, unsigned int in_mask,
35 			       unsigned int fc)
36 {
37 	register unsigned long __fc asm ("0") = fc;
38 	register unsigned long __schid asm ("1") = schid;
39 	register unsigned long out asm ("2") = out_mask;
40 	register unsigned long in asm ("3") = in_mask;
41 	int cc;
42 
43 	asm volatile(
44 		"	siga	0\n"
45 		"	ipm	%0\n"
46 		"	srl	%0,28\n"
47 		: "=d" (cc)
48 		: "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
49 	return cc;
50 }
51 
52 static inline int do_siga_input(unsigned long schid, unsigned int mask,
53 				unsigned int fc)
54 {
55 	register unsigned long __fc asm ("0") = fc;
56 	register unsigned long __schid asm ("1") = schid;
57 	register unsigned long __mask asm ("2") = mask;
58 	int cc;
59 
60 	asm volatile(
61 		"	siga	0\n"
62 		"	ipm	%0\n"
63 		"	srl	%0,28\n"
64 		: "=d" (cc)
65 		: "d" (__fc), "d" (__schid), "d" (__mask) : "cc");
66 	return cc;
67 }
68 
69 /**
70  * do_siga_output - perform SIGA-w/wt function
71  * @schid: subchannel id or in case of QEBSM the subchannel token
72  * @mask: which output queues to process
73  * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
74  * @fc: function code to perform
75  *
76  * Returns condition code.
77  * Note: For IQDC unicast queues only the highest priority queue is processed.
78  */
79 static inline int do_siga_output(unsigned long schid, unsigned long mask,
80 				 unsigned int *bb, unsigned int fc,
81 				 unsigned long aob)
82 {
83 	register unsigned long __fc asm("0") = fc;
84 	register unsigned long __schid asm("1") = schid;
85 	register unsigned long __mask asm("2") = mask;
86 	register unsigned long __aob asm("3") = aob;
87 	int cc;
88 
89 	asm volatile(
90 		"	siga	0\n"
91 		"	ipm	%0\n"
92 		"	srl	%0,28\n"
93 		: "=d" (cc), "+d" (__fc), "+d" (__aob)
94 		: "d" (__schid), "d" (__mask)
95 		: "cc");
96 	*bb = __fc >> 31;
97 	return cc;
98 }
99 
100 static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
101 {
102 	/* all done or next buffer state different */
103 	if (ccq == 0 || ccq == 32)
104 		return 0;
105 	/* no buffer processed */
106 	if (ccq == 97)
107 		return 1;
108 	/* not all buffers processed */
109 	if (ccq == 96)
110 		return 2;
111 	/* notify devices immediately */
112 	DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
113 	return -EIO;
114 }
115 
116 /**
117  * qdio_do_eqbs - extract buffer states for QEBSM
118  * @q: queue to manipulate
119  * @state: state of the extracted buffers
120  * @start: buffer number to start at
121  * @count: count of buffers to examine
122  * @auto_ack: automatically acknowledge buffers
123  *
124  * Returns the number of successfully extracted equal buffer states.
125  * Stops processing if a state is different from the last buffers state.
126  */
127 static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
128 			int start, int count, int auto_ack)
129 {
130 	int rc, tmp_count = count, tmp_start = start, nr = q->nr, retried = 0;
131 	unsigned int ccq = 0;
132 
133 	qperf_inc(q, eqbs);
134 
135 	if (!q->is_input_q)
136 		nr += q->irq_ptr->nr_input_qs;
137 again:
138 	ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
139 		      auto_ack);
140 	rc = qdio_check_ccq(q, ccq);
141 	if (!rc)
142 		return count - tmp_count;
143 
144 	if (rc == 1) {
145 		DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
146 		goto again;
147 	}
148 
149 	if (rc == 2) {
150 		qperf_inc(q, eqbs_partial);
151 		DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS part:%02x",
152 			tmp_count);
153 		/*
154 		 * Retry once, if that fails bail out and process the
155 		 * extracted buffers before trying again.
156 		 */
157 		if (!retried++)
158 			goto again;
159 		else
160 			return count - tmp_count;
161 	}
162 
163 	DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
164 	DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
165 	q->handler(q->irq_ptr->cdev, QDIO_ERROR_GET_BUF_STATE,
166 		   q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
167 	return 0;
168 }
169 
170 /**
171  * qdio_do_sqbs - set buffer states for QEBSM
172  * @q: queue to manipulate
173  * @state: new state of the buffers
174  * @start: first buffer number to change
175  * @count: how many buffers to change
176  *
177  * Returns the number of successfully changed buffers.
178  * Does retrying until the specified count of buffer states is set or an
179  * error occurs.
180  */
181 static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
182 			int count)
183 {
184 	unsigned int ccq = 0;
185 	int tmp_count = count, tmp_start = start;
186 	int nr = q->nr;
187 	int rc;
188 
189 	if (!count)
190 		return 0;
191 	qperf_inc(q, sqbs);
192 
193 	if (!q->is_input_q)
194 		nr += q->irq_ptr->nr_input_qs;
195 again:
196 	ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
197 	rc = qdio_check_ccq(q, ccq);
198 	if (!rc) {
199 		WARN_ON_ONCE(tmp_count);
200 		return count - tmp_count;
201 	}
202 
203 	if (rc == 1 || rc == 2) {
204 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
205 		qperf_inc(q, sqbs_partial);
206 		goto again;
207 	}
208 
209 	DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
210 	DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
211 	q->handler(q->irq_ptr->cdev, QDIO_ERROR_SET_BUF_STATE,
212 		   q->nr, q->first_to_kick, count, q->irq_ptr->int_parm);
213 	return 0;
214 }
215 
216 /* returns number of examined buffers and their common state in *state */
217 static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
218 				 unsigned char *state, unsigned int count,
219 				 int auto_ack, int merge_pending)
220 {
221 	unsigned char __state = 0;
222 	int i;
223 
224 	if (is_qebsm(q))
225 		return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
226 
227 	for (i = 0; i < count; i++) {
228 		if (!__state) {
229 			__state = q->slsb.val[bufnr];
230 			if (merge_pending && __state == SLSB_P_OUTPUT_PENDING)
231 				__state = SLSB_P_OUTPUT_EMPTY;
232 		} else if (merge_pending) {
233 			if ((q->slsb.val[bufnr] & __state) != __state)
234 				break;
235 		} else if (q->slsb.val[bufnr] != __state)
236 			break;
237 		bufnr = next_buf(bufnr);
238 	}
239 	*state = __state;
240 	return i;
241 }
242 
243 static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
244 				unsigned char *state, int auto_ack)
245 {
246 	return get_buf_states(q, bufnr, state, 1, auto_ack, 0);
247 }
248 
249 /* wrap-around safe setting of slsb states, returns number of changed buffers */
250 static inline int set_buf_states(struct qdio_q *q, int bufnr,
251 				 unsigned char state, int count)
252 {
253 	int i;
254 
255 	if (is_qebsm(q))
256 		return qdio_do_sqbs(q, state, bufnr, count);
257 
258 	for (i = 0; i < count; i++) {
259 		xchg(&q->slsb.val[bufnr], state);
260 		bufnr = next_buf(bufnr);
261 	}
262 	return count;
263 }
264 
265 static inline int set_buf_state(struct qdio_q *q, int bufnr,
266 				unsigned char state)
267 {
268 	return set_buf_states(q, bufnr, state, 1);
269 }
270 
271 /* set slsb states to initial state */
272 static void qdio_init_buf_states(struct qdio_irq *irq_ptr)
273 {
274 	struct qdio_q *q;
275 	int i;
276 
277 	for_each_input_queue(irq_ptr, q, i)
278 		set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
279 			       QDIO_MAX_BUFFERS_PER_Q);
280 	for_each_output_queue(irq_ptr, q, i)
281 		set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
282 			       QDIO_MAX_BUFFERS_PER_Q);
283 }
284 
285 static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
286 			  unsigned int input)
287 {
288 	unsigned long schid = *((u32 *) &q->irq_ptr->schid);
289 	unsigned int fc = QDIO_SIGA_SYNC;
290 	int cc;
291 
292 	DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
293 	qperf_inc(q, siga_sync);
294 
295 	if (is_qebsm(q)) {
296 		schid = q->irq_ptr->sch_token;
297 		fc |= QDIO_SIGA_QEBSM_FLAG;
298 	}
299 
300 	cc = do_siga_sync(schid, output, input, fc);
301 	if (unlikely(cc))
302 		DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
303 	return (cc) ? -EIO : 0;
304 }
305 
306 static inline int qdio_siga_sync_q(struct qdio_q *q)
307 {
308 	if (q->is_input_q)
309 		return qdio_siga_sync(q, 0, q->mask);
310 	else
311 		return qdio_siga_sync(q, q->mask, 0);
312 }
313 
314 static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit,
315 	unsigned long aob)
316 {
317 	unsigned long schid = *((u32 *) &q->irq_ptr->schid);
318 	unsigned int fc = QDIO_SIGA_WRITE;
319 	u64 start_time = 0;
320 	int retries = 0, cc;
321 	unsigned long laob = 0;
322 
323 	WARN_ON_ONCE(aob && ((queue_type(q) != QDIO_IQDIO_QFMT) ||
324 			     !q->u.out.use_cq));
325 	if (q->u.out.use_cq && aob != 0) {
326 		fc = QDIO_SIGA_WRITEQ;
327 		laob = aob;
328 	}
329 
330 	if (is_qebsm(q)) {
331 		schid = q->irq_ptr->sch_token;
332 		fc |= QDIO_SIGA_QEBSM_FLAG;
333 	}
334 again:
335 	cc = do_siga_output(schid, q->mask, busy_bit, fc, laob);
336 
337 	/* hipersocket busy condition */
338 	if (unlikely(*busy_bit)) {
339 		retries++;
340 
341 		if (!start_time) {
342 			start_time = get_tod_clock_fast();
343 			goto again;
344 		}
345 		if (get_tod_clock_fast() - start_time < QDIO_BUSY_BIT_PATIENCE)
346 			goto again;
347 	}
348 	if (retries) {
349 		DBF_DEV_EVENT(DBF_WARN, q->irq_ptr,
350 			      "%4x cc2 BB1:%1d", SCH_NO(q), q->nr);
351 		DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries);
352 	}
353 	return cc;
354 }
355 
356 static inline int qdio_siga_input(struct qdio_q *q)
357 {
358 	unsigned long schid = *((u32 *) &q->irq_ptr->schid);
359 	unsigned int fc = QDIO_SIGA_READ;
360 	int cc;
361 
362 	DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
363 	qperf_inc(q, siga_read);
364 
365 	if (is_qebsm(q)) {
366 		schid = q->irq_ptr->sch_token;
367 		fc |= QDIO_SIGA_QEBSM_FLAG;
368 	}
369 
370 	cc = do_siga_input(schid, q->mask, fc);
371 	if (unlikely(cc))
372 		DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
373 	return (cc) ? -EIO : 0;
374 }
375 
376 #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0)
377 #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U)
378 
379 static inline void qdio_sync_queues(struct qdio_q *q)
380 {
381 	/* PCI capable outbound queues will also be scanned so sync them too */
382 	if (pci_out_supported(q))
383 		qdio_siga_sync_all(q);
384 	else
385 		qdio_siga_sync_q(q);
386 }
387 
388 int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
389 			unsigned char *state)
390 {
391 	if (need_siga_sync(q))
392 		qdio_siga_sync_q(q);
393 	return get_buf_states(q, bufnr, state, 1, 0, 0);
394 }
395 
396 static inline void qdio_stop_polling(struct qdio_q *q)
397 {
398 	if (!q->u.in.polling)
399 		return;
400 
401 	q->u.in.polling = 0;
402 	qperf_inc(q, stop_polling);
403 
404 	/* show the card that we are not polling anymore */
405 	if (is_qebsm(q)) {
406 		set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
407 			       q->u.in.ack_count);
408 		q->u.in.ack_count = 0;
409 	} else
410 		set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
411 }
412 
413 static inline void account_sbals(struct qdio_q *q, unsigned int count)
414 {
415 	int pos;
416 
417 	q->q_stats.nr_sbal_total += count;
418 	if (count == QDIO_MAX_BUFFERS_MASK) {
419 		q->q_stats.nr_sbals[7]++;
420 		return;
421 	}
422 	pos = ilog2(count);
423 	q->q_stats.nr_sbals[pos]++;
424 }
425 
426 static void process_buffer_error(struct qdio_q *q, int count)
427 {
428 	unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT :
429 					SLSB_P_OUTPUT_NOT_INIT;
430 
431 	q->qdio_error = QDIO_ERROR_SLSB_STATE;
432 
433 	/* special handling for no target buffer empty */
434 	if ((!q->is_input_q &&
435 	    (q->sbal[q->first_to_check]->element[15].sflags) == 0x10)) {
436 		qperf_inc(q, target_full);
437 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x",
438 			      q->first_to_check);
439 		goto set;
440 	}
441 
442 	DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
443 	DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
444 	DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
445 	DBF_ERROR("F14:%2x F15:%2x",
446 		  q->sbal[q->first_to_check]->element[14].sflags,
447 		  q->sbal[q->first_to_check]->element[15].sflags);
448 
449 set:
450 	/*
451 	 * Interrupts may be avoided as long as the error is present
452 	 * so change the buffer state immediately to avoid starvation.
453 	 */
454 	set_buf_states(q, q->first_to_check, state, count);
455 }
456 
457 static inline void inbound_primed(struct qdio_q *q, int count)
458 {
459 	int new;
460 
461 	DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim:%1d %02x", q->nr, count);
462 
463 	/* for QEBSM the ACK was already set by EQBS */
464 	if (is_qebsm(q)) {
465 		if (!q->u.in.polling) {
466 			q->u.in.polling = 1;
467 			q->u.in.ack_count = count;
468 			q->u.in.ack_start = q->first_to_check;
469 			return;
470 		}
471 
472 		/* delete the previous ACK's */
473 		set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
474 			       q->u.in.ack_count);
475 		q->u.in.ack_count = count;
476 		q->u.in.ack_start = q->first_to_check;
477 		return;
478 	}
479 
480 	/*
481 	 * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
482 	 * or by the next inbound run.
483 	 */
484 	new = add_buf(q->first_to_check, count - 1);
485 	if (q->u.in.polling) {
486 		/* reset the previous ACK but first set the new one */
487 		set_buf_state(q, new, SLSB_P_INPUT_ACK);
488 		set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
489 	} else {
490 		q->u.in.polling = 1;
491 		set_buf_state(q, new, SLSB_P_INPUT_ACK);
492 	}
493 
494 	q->u.in.ack_start = new;
495 	count--;
496 	if (!count)
497 		return;
498 	/* need to change ALL buffers to get more interrupts */
499 	set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count);
500 }
501 
502 static int get_inbound_buffer_frontier(struct qdio_q *q)
503 {
504 	int count, stop;
505 	unsigned char state = 0;
506 
507 	q->timestamp = get_tod_clock_fast();
508 
509 	/*
510 	 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
511 	 * would return 0.
512 	 */
513 	count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
514 	stop = add_buf(q->first_to_check, count);
515 
516 	if (q->first_to_check == stop)
517 		goto out;
518 
519 	/*
520 	 * No siga sync here, as a PCI or we after a thin interrupt
521 	 * already sync'ed the queues.
522 	 */
523 	count = get_buf_states(q, q->first_to_check, &state, count, 1, 0);
524 	if (!count)
525 		goto out;
526 
527 	switch (state) {
528 	case SLSB_P_INPUT_PRIMED:
529 		inbound_primed(q, count);
530 		q->first_to_check = add_buf(q->first_to_check, count);
531 		if (atomic_sub_return(count, &q->nr_buf_used) == 0)
532 			qperf_inc(q, inbound_queue_full);
533 		if (q->irq_ptr->perf_stat_enabled)
534 			account_sbals(q, count);
535 		break;
536 	case SLSB_P_INPUT_ERROR:
537 		process_buffer_error(q, count);
538 		q->first_to_check = add_buf(q->first_to_check, count);
539 		atomic_sub(count, &q->nr_buf_used);
540 		if (q->irq_ptr->perf_stat_enabled)
541 			account_sbals_error(q, count);
542 		break;
543 	case SLSB_CU_INPUT_EMPTY:
544 	case SLSB_P_INPUT_NOT_INIT:
545 	case SLSB_P_INPUT_ACK:
546 		if (q->irq_ptr->perf_stat_enabled)
547 			q->q_stats.nr_sbal_nop++;
548 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop:%1d %#02x",
549 			q->nr, q->first_to_check);
550 		break;
551 	default:
552 		WARN_ON_ONCE(1);
553 	}
554 out:
555 	return q->first_to_check;
556 }
557 
558 static int qdio_inbound_q_moved(struct qdio_q *q)
559 {
560 	int bufnr;
561 
562 	bufnr = get_inbound_buffer_frontier(q);
563 
564 	if (bufnr != q->last_move) {
565 		q->last_move = bufnr;
566 		if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR)
567 			q->u.in.timestamp = get_tod_clock();
568 		return 1;
569 	} else
570 		return 0;
571 }
572 
573 static inline int qdio_inbound_q_done(struct qdio_q *q)
574 {
575 	unsigned char state = 0;
576 
577 	if (!atomic_read(&q->nr_buf_used))
578 		return 1;
579 
580 	if (need_siga_sync(q))
581 		qdio_siga_sync_q(q);
582 	get_buf_state(q, q->first_to_check, &state, 0);
583 
584 	if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR)
585 		/* more work coming */
586 		return 0;
587 
588 	if (is_thinint_irq(q->irq_ptr))
589 		return 1;
590 
591 	/* don't poll under z/VM */
592 	if (MACHINE_IS_VM)
593 		return 1;
594 
595 	/*
596 	 * At this point we know, that inbound first_to_check
597 	 * has (probably) not moved (see qdio_inbound_processing).
598 	 */
599 	if (get_tod_clock_fast() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
600 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x",
601 			      q->first_to_check);
602 		return 1;
603 	} else
604 		return 0;
605 }
606 
607 static inline int contains_aobs(struct qdio_q *q)
608 {
609 	return !q->is_input_q && q->u.out.use_cq;
610 }
611 
612 static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count)
613 {
614 	unsigned char state = 0;
615 	int j, b = start;
616 
617 	if (!contains_aobs(q))
618 		return;
619 
620 	for (j = 0; j < count; ++j) {
621 		get_buf_state(q, b, &state, 0);
622 		if (state == SLSB_P_OUTPUT_PENDING) {
623 			struct qaob *aob = q->u.out.aobs[b];
624 			if (aob == NULL)
625 				continue;
626 
627 			q->u.out.sbal_state[b].flags |=
628 				QDIO_OUTBUF_STATE_FLAG_PENDING;
629 			q->u.out.aobs[b] = NULL;
630 		} else if (state == SLSB_P_OUTPUT_EMPTY) {
631 			q->u.out.sbal_state[b].aob = NULL;
632 		}
633 		b = next_buf(b);
634 	}
635 }
636 
637 static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q,
638 					int bufnr)
639 {
640 	unsigned long phys_aob = 0;
641 
642 	if (!q->use_cq)
643 		goto out;
644 
645 	if (!q->aobs[bufnr]) {
646 		struct qaob *aob = qdio_allocate_aob();
647 		q->aobs[bufnr] = aob;
648 	}
649 	if (q->aobs[bufnr]) {
650 		q->sbal_state[bufnr].flags = QDIO_OUTBUF_STATE_FLAG_NONE;
651 		q->sbal_state[bufnr].aob = q->aobs[bufnr];
652 		q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user;
653 		phys_aob = virt_to_phys(q->aobs[bufnr]);
654 		WARN_ON_ONCE(phys_aob & 0xFF);
655 	}
656 
657 out:
658 	return phys_aob;
659 }
660 
661 static void qdio_kick_handler(struct qdio_q *q)
662 {
663 	int start = q->first_to_kick;
664 	int end = q->first_to_check;
665 	int count;
666 
667 	if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
668 		return;
669 
670 	count = sub_buf(end, start);
671 
672 	if (q->is_input_q) {
673 		qperf_inc(q, inbound_handler);
674 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count);
675 	} else {
676 		qperf_inc(q, outbound_handler);
677 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x",
678 			      start, count);
679 	}
680 
681 	qdio_handle_aobs(q, start, count);
682 
683 	q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
684 		   q->irq_ptr->int_parm);
685 
686 	/* for the next time */
687 	q->first_to_kick = end;
688 	q->qdio_error = 0;
689 }
690 
691 static inline int qdio_tasklet_schedule(struct qdio_q *q)
692 {
693 	if (likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE)) {
694 		tasklet_schedule(&q->tasklet);
695 		return 0;
696 	}
697 	return -EPERM;
698 }
699 
700 static void __qdio_inbound_processing(struct qdio_q *q)
701 {
702 	qperf_inc(q, tasklet_inbound);
703 
704 	if (!qdio_inbound_q_moved(q))
705 		return;
706 
707 	qdio_kick_handler(q);
708 
709 	if (!qdio_inbound_q_done(q)) {
710 		/* means poll time is not yet over */
711 		qperf_inc(q, tasklet_inbound_resched);
712 		if (!qdio_tasklet_schedule(q))
713 			return;
714 	}
715 
716 	qdio_stop_polling(q);
717 	/*
718 	 * We need to check again to not lose initiative after
719 	 * resetting the ACK state.
720 	 */
721 	if (!qdio_inbound_q_done(q)) {
722 		qperf_inc(q, tasklet_inbound_resched2);
723 		qdio_tasklet_schedule(q);
724 	}
725 }
726 
727 void qdio_inbound_processing(unsigned long data)
728 {
729 	struct qdio_q *q = (struct qdio_q *)data;
730 	__qdio_inbound_processing(q);
731 }
732 
733 static int get_outbound_buffer_frontier(struct qdio_q *q)
734 {
735 	int count, stop;
736 	unsigned char state = 0;
737 
738 	q->timestamp = get_tod_clock_fast();
739 
740 	if (need_siga_sync(q))
741 		if (((queue_type(q) != QDIO_IQDIO_QFMT) &&
742 		    !pci_out_supported(q)) ||
743 		    (queue_type(q) == QDIO_IQDIO_QFMT &&
744 		    multicast_outbound(q)))
745 			qdio_siga_sync_q(q);
746 
747 	/*
748 	 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
749 	 * would return 0.
750 	 */
751 	count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
752 	stop = add_buf(q->first_to_check, count);
753 	if (q->first_to_check == stop)
754 		goto out;
755 
756 	count = get_buf_states(q, q->first_to_check, &state, count, 0, 1);
757 	if (!count)
758 		goto out;
759 
760 	switch (state) {
761 	case SLSB_P_OUTPUT_EMPTY:
762 		/* the adapter got it */
763 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr,
764 			"out empty:%1d %02x", q->nr, count);
765 
766 		atomic_sub(count, &q->nr_buf_used);
767 		q->first_to_check = add_buf(q->first_to_check, count);
768 		if (q->irq_ptr->perf_stat_enabled)
769 			account_sbals(q, count);
770 
771 		break;
772 	case SLSB_P_OUTPUT_ERROR:
773 		process_buffer_error(q, count);
774 		q->first_to_check = add_buf(q->first_to_check, count);
775 		atomic_sub(count, &q->nr_buf_used);
776 		if (q->irq_ptr->perf_stat_enabled)
777 			account_sbals_error(q, count);
778 		break;
779 	case SLSB_CU_OUTPUT_PRIMED:
780 		/* the adapter has not fetched the output yet */
781 		if (q->irq_ptr->perf_stat_enabled)
782 			q->q_stats.nr_sbal_nop++;
783 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d",
784 			      q->nr);
785 		break;
786 	case SLSB_P_OUTPUT_NOT_INIT:
787 	case SLSB_P_OUTPUT_HALTED:
788 		break;
789 	default:
790 		WARN_ON_ONCE(1);
791 	}
792 
793 out:
794 	return q->first_to_check;
795 }
796 
797 /* all buffers processed? */
798 static inline int qdio_outbound_q_done(struct qdio_q *q)
799 {
800 	return atomic_read(&q->nr_buf_used) == 0;
801 }
802 
803 static inline int qdio_outbound_q_moved(struct qdio_q *q)
804 {
805 	int bufnr;
806 
807 	bufnr = get_outbound_buffer_frontier(q);
808 
809 	if (bufnr != q->last_move) {
810 		q->last_move = bufnr;
811 		DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
812 		return 1;
813 	} else
814 		return 0;
815 }
816 
817 static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob)
818 {
819 	int retries = 0, cc;
820 	unsigned int busy_bit;
821 
822 	if (!need_siga_out(q))
823 		return 0;
824 
825 	DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
826 retry:
827 	qperf_inc(q, siga_write);
828 
829 	cc = qdio_siga_output(q, &busy_bit, aob);
830 	switch (cc) {
831 	case 0:
832 		break;
833 	case 2:
834 		if (busy_bit) {
835 			while (++retries < QDIO_BUSY_BIT_RETRIES) {
836 				mdelay(QDIO_BUSY_BIT_RETRY_DELAY);
837 				goto retry;
838 			}
839 			DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr);
840 			cc = -EBUSY;
841 		} else {
842 			DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
843 			cc = -ENOBUFS;
844 		}
845 		break;
846 	case 1:
847 	case 3:
848 		DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
849 		cc = -EIO;
850 		break;
851 	}
852 	if (retries) {
853 		DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr);
854 		DBF_ERROR("count:%u", retries);
855 	}
856 	return cc;
857 }
858 
859 static void __qdio_outbound_processing(struct qdio_q *q)
860 {
861 	qperf_inc(q, tasklet_outbound);
862 	WARN_ON_ONCE(atomic_read(&q->nr_buf_used) < 0);
863 
864 	if (qdio_outbound_q_moved(q))
865 		qdio_kick_handler(q);
866 
867 	if (queue_type(q) == QDIO_ZFCP_QFMT)
868 		if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
869 			goto sched;
870 
871 	if (q->u.out.pci_out_enabled)
872 		return;
873 
874 	/*
875 	 * Now we know that queue type is either qeth without pci enabled
876 	 * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY
877 	 * is noticed and outbound_handler is called after some time.
878 	 */
879 	if (qdio_outbound_q_done(q))
880 		del_timer_sync(&q->u.out.timer);
881 	else
882 		if (!timer_pending(&q->u.out.timer) &&
883 		    likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE))
884 			mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
885 	return;
886 
887 sched:
888 	qdio_tasklet_schedule(q);
889 }
890 
891 /* outbound tasklet */
892 void qdio_outbound_processing(unsigned long data)
893 {
894 	struct qdio_q *q = (struct qdio_q *)data;
895 	__qdio_outbound_processing(q);
896 }
897 
898 void qdio_outbound_timer(struct timer_list *t)
899 {
900 	struct qdio_q *q = from_timer(q, t, u.out.timer);
901 
902 	qdio_tasklet_schedule(q);
903 }
904 
905 static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
906 {
907 	struct qdio_q *out;
908 	int i;
909 
910 	if (!pci_out_supported(q))
911 		return;
912 
913 	for_each_output_queue(q->irq_ptr, out, i)
914 		if (!qdio_outbound_q_done(out))
915 			qdio_tasklet_schedule(out);
916 }
917 
918 static void __tiqdio_inbound_processing(struct qdio_q *q)
919 {
920 	qperf_inc(q, tasklet_inbound);
921 	if (need_siga_sync(q) && need_siga_sync_after_ai(q))
922 		qdio_sync_queues(q);
923 
924 	/*
925 	 * The interrupt could be caused by a PCI request. Check the
926 	 * PCI capable outbound queues.
927 	 */
928 	qdio_check_outbound_after_thinint(q);
929 
930 	if (!qdio_inbound_q_moved(q))
931 		return;
932 
933 	qdio_kick_handler(q);
934 
935 	if (!qdio_inbound_q_done(q)) {
936 		qperf_inc(q, tasklet_inbound_resched);
937 		if (!qdio_tasklet_schedule(q))
938 			return;
939 	}
940 
941 	qdio_stop_polling(q);
942 	/*
943 	 * We need to check again to not lose initiative after
944 	 * resetting the ACK state.
945 	 */
946 	if (!qdio_inbound_q_done(q)) {
947 		qperf_inc(q, tasklet_inbound_resched2);
948 		qdio_tasklet_schedule(q);
949 	}
950 }
951 
952 void tiqdio_inbound_processing(unsigned long data)
953 {
954 	struct qdio_q *q = (struct qdio_q *)data;
955 	__tiqdio_inbound_processing(q);
956 }
957 
958 static inline void qdio_set_state(struct qdio_irq *irq_ptr,
959 				  enum qdio_irq_states state)
960 {
961 	DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
962 
963 	irq_ptr->state = state;
964 	mb();
965 }
966 
967 static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
968 {
969 	if (irb->esw.esw0.erw.cons) {
970 		DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
971 		DBF_ERROR_HEX(irb, 64);
972 		DBF_ERROR_HEX(irb->ecw, 64);
973 	}
974 }
975 
976 /* PCI interrupt handler */
977 static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
978 {
979 	int i;
980 	struct qdio_q *q;
981 
982 	if (unlikely(irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
983 		return;
984 
985 	for_each_input_queue(irq_ptr, q, i) {
986 		if (q->u.in.queue_start_poll) {
987 			/* skip if polling is enabled or already in work */
988 			if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
989 				     &q->u.in.queue_irq_state)) {
990 				qperf_inc(q, int_discarded);
991 				continue;
992 			}
993 			q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr,
994 						 q->irq_ptr->int_parm);
995 		} else {
996 			tasklet_schedule(&q->tasklet);
997 		}
998 	}
999 
1000 	if (!(irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED))
1001 		return;
1002 
1003 	for_each_output_queue(irq_ptr, q, i) {
1004 		if (qdio_outbound_q_done(q))
1005 			continue;
1006 		if (need_siga_sync(q) && need_siga_sync_out_after_pci(q))
1007 			qdio_siga_sync_q(q);
1008 		qdio_tasklet_schedule(q);
1009 	}
1010 }
1011 
1012 static void qdio_handle_activate_check(struct ccw_device *cdev,
1013 				unsigned long intparm, int cstat, int dstat)
1014 {
1015 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1016 	struct qdio_q *q;
1017 	int count;
1018 
1019 	DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
1020 	DBF_ERROR("intp :%lx", intparm);
1021 	DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
1022 
1023 	if (irq_ptr->nr_input_qs) {
1024 		q = irq_ptr->input_qs[0];
1025 	} else if (irq_ptr->nr_output_qs) {
1026 		q = irq_ptr->output_qs[0];
1027 	} else {
1028 		dump_stack();
1029 		goto no_handler;
1030 	}
1031 
1032 	count = sub_buf(q->first_to_check, q->first_to_kick);
1033 	q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE,
1034 		   q->nr, q->first_to_kick, count, irq_ptr->int_parm);
1035 no_handler:
1036 	qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
1037 	/*
1038 	 * In case of z/VM LGR (Live Guest Migration) QDIO recovery will happen.
1039 	 * Therefore we call the LGR detection function here.
1040 	 */
1041 	lgr_info_log();
1042 }
1043 
1044 static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
1045 				      int dstat)
1046 {
1047 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1048 
1049 	DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
1050 
1051 	if (cstat)
1052 		goto error;
1053 	if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
1054 		goto error;
1055 	if (!(dstat & DEV_STAT_DEV_END))
1056 		goto error;
1057 	qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
1058 	return;
1059 
1060 error:
1061 	DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
1062 	DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
1063 	qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
1064 }
1065 
1066 /* qdio interrupt handler */
1067 void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
1068 		      struct irb *irb)
1069 {
1070 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1071 	struct subchannel_id schid;
1072 	int cstat, dstat;
1073 
1074 	if (!intparm || !irq_ptr) {
1075 		ccw_device_get_schid(cdev, &schid);
1076 		DBF_ERROR("qint:%4x", schid.sch_no);
1077 		return;
1078 	}
1079 
1080 	if (irq_ptr->perf_stat_enabled)
1081 		irq_ptr->perf_stat.qdio_int++;
1082 
1083 	if (IS_ERR(irb)) {
1084 		DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
1085 		qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
1086 		wake_up(&cdev->private->wait_q);
1087 		return;
1088 	}
1089 	qdio_irq_check_sense(irq_ptr, irb);
1090 	cstat = irb->scsw.cmd.cstat;
1091 	dstat = irb->scsw.cmd.dstat;
1092 
1093 	switch (irq_ptr->state) {
1094 	case QDIO_IRQ_STATE_INACTIVE:
1095 		qdio_establish_handle_irq(cdev, cstat, dstat);
1096 		break;
1097 	case QDIO_IRQ_STATE_CLEANUP:
1098 		qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1099 		break;
1100 	case QDIO_IRQ_STATE_ESTABLISHED:
1101 	case QDIO_IRQ_STATE_ACTIVE:
1102 		if (cstat & SCHN_STAT_PCI) {
1103 			qdio_int_handler_pci(irq_ptr);
1104 			return;
1105 		}
1106 		if (cstat || dstat)
1107 			qdio_handle_activate_check(cdev, intparm, cstat,
1108 						   dstat);
1109 		break;
1110 	case QDIO_IRQ_STATE_STOPPED:
1111 		break;
1112 	default:
1113 		WARN_ON_ONCE(1);
1114 	}
1115 	wake_up(&cdev->private->wait_q);
1116 }
1117 
1118 /**
1119  * qdio_get_ssqd_desc - get qdio subchannel description
1120  * @cdev: ccw device to get description for
1121  * @data: where to store the ssqd
1122  *
1123  * Returns 0 or an error code. The results of the chsc are stored in the
1124  * specified structure.
1125  */
1126 int qdio_get_ssqd_desc(struct ccw_device *cdev,
1127 		       struct qdio_ssqd_desc *data)
1128 {
1129 	struct subchannel_id schid;
1130 
1131 	if (!cdev || !cdev->private)
1132 		return -EINVAL;
1133 
1134 	ccw_device_get_schid(cdev, &schid);
1135 	DBF_EVENT("get ssqd:%4x", schid.sch_no);
1136 	return qdio_setup_get_ssqd(NULL, &schid, data);
1137 }
1138 EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
1139 
1140 static void qdio_shutdown_queues(struct ccw_device *cdev)
1141 {
1142 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1143 	struct qdio_q *q;
1144 	int i;
1145 
1146 	for_each_input_queue(irq_ptr, q, i)
1147 		tasklet_kill(&q->tasklet);
1148 
1149 	for_each_output_queue(irq_ptr, q, i) {
1150 		del_timer_sync(&q->u.out.timer);
1151 		tasklet_kill(&q->tasklet);
1152 	}
1153 }
1154 
1155 /**
1156  * qdio_shutdown - shut down a qdio subchannel
1157  * @cdev: associated ccw device
1158  * @how: use halt or clear to shutdown
1159  */
1160 int qdio_shutdown(struct ccw_device *cdev, int how)
1161 {
1162 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1163 	struct subchannel_id schid;
1164 	int rc;
1165 
1166 	if (!irq_ptr)
1167 		return -ENODEV;
1168 
1169 	WARN_ON_ONCE(irqs_disabled());
1170 	ccw_device_get_schid(cdev, &schid);
1171 	DBF_EVENT("qshutdown:%4x", schid.sch_no);
1172 
1173 	mutex_lock(&irq_ptr->setup_mutex);
1174 	/*
1175 	 * Subchannel was already shot down. We cannot prevent being called
1176 	 * twice since cio may trigger a shutdown asynchronously.
1177 	 */
1178 	if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1179 		mutex_unlock(&irq_ptr->setup_mutex);
1180 		return 0;
1181 	}
1182 
1183 	/*
1184 	 * Indicate that the device is going down. Scheduling the queue
1185 	 * tasklets is forbidden from here on.
1186 	 */
1187 	qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
1188 
1189 	tiqdio_remove_input_queues(irq_ptr);
1190 	qdio_shutdown_queues(cdev);
1191 	qdio_shutdown_debug_entries(irq_ptr);
1192 
1193 	/* cleanup subchannel */
1194 	spin_lock_irq(get_ccwdev_lock(cdev));
1195 
1196 	if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
1197 		rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
1198 	else
1199 		/* default behaviour is halt */
1200 		rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
1201 	if (rc) {
1202 		DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
1203 		DBF_ERROR("rc:%4d", rc);
1204 		goto no_cleanup;
1205 	}
1206 
1207 	qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
1208 	spin_unlock_irq(get_ccwdev_lock(cdev));
1209 	wait_event_interruptible_timeout(cdev->private->wait_q,
1210 		irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
1211 		irq_ptr->state == QDIO_IRQ_STATE_ERR,
1212 		10 * HZ);
1213 	spin_lock_irq(get_ccwdev_lock(cdev));
1214 
1215 no_cleanup:
1216 	qdio_shutdown_thinint(irq_ptr);
1217 
1218 	/* restore interrupt handler */
1219 	if ((void *)cdev->handler == (void *)qdio_int_handler)
1220 		cdev->handler = irq_ptr->orig_handler;
1221 	spin_unlock_irq(get_ccwdev_lock(cdev));
1222 
1223 	qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1224 	mutex_unlock(&irq_ptr->setup_mutex);
1225 	if (rc)
1226 		return rc;
1227 	return 0;
1228 }
1229 EXPORT_SYMBOL_GPL(qdio_shutdown);
1230 
1231 /**
1232  * qdio_free - free data structures for a qdio subchannel
1233  * @cdev: associated ccw device
1234  */
1235 int qdio_free(struct ccw_device *cdev)
1236 {
1237 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1238 	struct subchannel_id schid;
1239 
1240 	if (!irq_ptr)
1241 		return -ENODEV;
1242 
1243 	ccw_device_get_schid(cdev, &schid);
1244 	DBF_EVENT("qfree:%4x", schid.sch_no);
1245 	DBF_DEV_EVENT(DBF_ERR, irq_ptr, "dbf abandoned");
1246 	mutex_lock(&irq_ptr->setup_mutex);
1247 
1248 	irq_ptr->debug_area = NULL;
1249 	cdev->private->qdio_data = NULL;
1250 	mutex_unlock(&irq_ptr->setup_mutex);
1251 
1252 	qdio_release_memory(irq_ptr);
1253 	return 0;
1254 }
1255 EXPORT_SYMBOL_GPL(qdio_free);
1256 
1257 /**
1258  * qdio_allocate - allocate qdio queues and associated data
1259  * @init_data: initialization data
1260  */
1261 int qdio_allocate(struct qdio_initialize *init_data)
1262 {
1263 	struct subchannel_id schid;
1264 	struct qdio_irq *irq_ptr;
1265 
1266 	ccw_device_get_schid(init_data->cdev, &schid);
1267 	DBF_EVENT("qallocate:%4x", schid.sch_no);
1268 
1269 	if ((init_data->no_input_qs && !init_data->input_handler) ||
1270 	    (init_data->no_output_qs && !init_data->output_handler))
1271 		return -EINVAL;
1272 
1273 	if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
1274 	    (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
1275 		return -EINVAL;
1276 
1277 	if ((!init_data->input_sbal_addr_array) ||
1278 	    (!init_data->output_sbal_addr_array))
1279 		return -EINVAL;
1280 
1281 	/* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
1282 	irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1283 	if (!irq_ptr)
1284 		goto out_err;
1285 
1286 	mutex_init(&irq_ptr->setup_mutex);
1287 	if (qdio_allocate_dbf(init_data, irq_ptr))
1288 		goto out_rel;
1289 
1290 	/*
1291 	 * Allocate a page for the chsc calls in qdio_establish.
1292 	 * Must be pre-allocated since a zfcp recovery will call
1293 	 * qdio_establish. In case of low memory and swap on a zfcp disk
1294 	 * we may not be able to allocate memory otherwise.
1295 	 */
1296 	irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
1297 	if (!irq_ptr->chsc_page)
1298 		goto out_rel;
1299 
1300 	/* qdr is used in ccw1.cda which is u32 */
1301 	irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
1302 	if (!irq_ptr->qdr)
1303 		goto out_rel;
1304 
1305 	if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
1306 			     init_data->no_output_qs))
1307 		goto out_rel;
1308 
1309 	init_data->cdev->private->qdio_data = irq_ptr;
1310 	qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1311 	return 0;
1312 out_rel:
1313 	qdio_release_memory(irq_ptr);
1314 out_err:
1315 	return -ENOMEM;
1316 }
1317 EXPORT_SYMBOL_GPL(qdio_allocate);
1318 
1319 static void qdio_detect_hsicq(struct qdio_irq *irq_ptr)
1320 {
1321 	struct qdio_q *q = irq_ptr->input_qs[0];
1322 	int i, use_cq = 0;
1323 
1324 	if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT)
1325 		use_cq = 1;
1326 
1327 	for_each_output_queue(irq_ptr, q, i) {
1328 		if (use_cq) {
1329 			if (qdio_enable_async_operation(&q->u.out) < 0) {
1330 				use_cq = 0;
1331 				continue;
1332 			}
1333 		} else
1334 			qdio_disable_async_operation(&q->u.out);
1335 	}
1336 	DBF_EVENT("use_cq:%d", use_cq);
1337 }
1338 
1339 /**
1340  * qdio_establish - establish queues on a qdio subchannel
1341  * @init_data: initialization data
1342  */
1343 int qdio_establish(struct qdio_initialize *init_data)
1344 {
1345 	struct ccw_device *cdev = init_data->cdev;
1346 	struct subchannel_id schid;
1347 	struct qdio_irq *irq_ptr;
1348 	int rc;
1349 
1350 	ccw_device_get_schid(cdev, &schid);
1351 	DBF_EVENT("qestablish:%4x", schid.sch_no);
1352 
1353 	irq_ptr = cdev->private->qdio_data;
1354 	if (!irq_ptr)
1355 		return -ENODEV;
1356 
1357 	mutex_lock(&irq_ptr->setup_mutex);
1358 	qdio_setup_irq(init_data);
1359 
1360 	rc = qdio_establish_thinint(irq_ptr);
1361 	if (rc) {
1362 		mutex_unlock(&irq_ptr->setup_mutex);
1363 		qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1364 		return rc;
1365 	}
1366 
1367 	/* establish q */
1368 	irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
1369 	irq_ptr->ccw.flags = CCW_FLAG_SLI;
1370 	irq_ptr->ccw.count = irq_ptr->equeue.count;
1371 	irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
1372 
1373 	spin_lock_irq(get_ccwdev_lock(cdev));
1374 	ccw_device_set_options_mask(cdev, 0);
1375 
1376 	rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
1377 	spin_unlock_irq(get_ccwdev_lock(cdev));
1378 	if (rc) {
1379 		DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
1380 		DBF_ERROR("rc:%4x", rc);
1381 		mutex_unlock(&irq_ptr->setup_mutex);
1382 		qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1383 		return rc;
1384 	}
1385 
1386 	wait_event_interruptible_timeout(cdev->private->wait_q,
1387 		irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
1388 		irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
1389 
1390 	if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
1391 		mutex_unlock(&irq_ptr->setup_mutex);
1392 		qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1393 		return -EIO;
1394 	}
1395 
1396 	qdio_setup_ssqd_info(irq_ptr);
1397 
1398 	qdio_detect_hsicq(irq_ptr);
1399 
1400 	/* qebsm is now setup if available, initialize buffer states */
1401 	qdio_init_buf_states(irq_ptr);
1402 
1403 	mutex_unlock(&irq_ptr->setup_mutex);
1404 	qdio_print_subchannel_info(irq_ptr, cdev);
1405 	qdio_setup_debug_entries(irq_ptr, cdev);
1406 	return 0;
1407 }
1408 EXPORT_SYMBOL_GPL(qdio_establish);
1409 
1410 /**
1411  * qdio_activate - activate queues on a qdio subchannel
1412  * @cdev: associated cdev
1413  */
1414 int qdio_activate(struct ccw_device *cdev)
1415 {
1416 	struct subchannel_id schid;
1417 	struct qdio_irq *irq_ptr;
1418 	int rc;
1419 
1420 	ccw_device_get_schid(cdev, &schid);
1421 	DBF_EVENT("qactivate:%4x", schid.sch_no);
1422 
1423 	irq_ptr = cdev->private->qdio_data;
1424 	if (!irq_ptr)
1425 		return -ENODEV;
1426 
1427 	mutex_lock(&irq_ptr->setup_mutex);
1428 	if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
1429 		rc = -EBUSY;
1430 		goto out;
1431 	}
1432 
1433 	irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
1434 	irq_ptr->ccw.flags = CCW_FLAG_SLI;
1435 	irq_ptr->ccw.count = irq_ptr->aqueue.count;
1436 	irq_ptr->ccw.cda = 0;
1437 
1438 	spin_lock_irq(get_ccwdev_lock(cdev));
1439 	ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
1440 
1441 	rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
1442 			      0, DOIO_DENY_PREFETCH);
1443 	spin_unlock_irq(get_ccwdev_lock(cdev));
1444 	if (rc) {
1445 		DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
1446 		DBF_ERROR("rc:%4x", rc);
1447 		goto out;
1448 	}
1449 
1450 	if (is_thinint_irq(irq_ptr))
1451 		tiqdio_add_input_queues(irq_ptr);
1452 
1453 	/* wait for subchannel to become active */
1454 	msleep(5);
1455 
1456 	switch (irq_ptr->state) {
1457 	case QDIO_IRQ_STATE_STOPPED:
1458 	case QDIO_IRQ_STATE_ERR:
1459 		rc = -EIO;
1460 		break;
1461 	default:
1462 		qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
1463 		rc = 0;
1464 	}
1465 out:
1466 	mutex_unlock(&irq_ptr->setup_mutex);
1467 	return rc;
1468 }
1469 EXPORT_SYMBOL_GPL(qdio_activate);
1470 
1471 static inline int buf_in_between(int bufnr, int start, int count)
1472 {
1473 	int end = add_buf(start, count);
1474 
1475 	if (end > start) {
1476 		if (bufnr >= start && bufnr < end)
1477 			return 1;
1478 		else
1479 			return 0;
1480 	}
1481 
1482 	/* wrap-around case */
1483 	if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
1484 	    (bufnr < end))
1485 		return 1;
1486 	else
1487 		return 0;
1488 }
1489 
1490 /**
1491  * handle_inbound - reset processed input buffers
1492  * @q: queue containing the buffers
1493  * @callflags: flags
1494  * @bufnr: first buffer to process
1495  * @count: how many buffers are emptied
1496  */
1497 static int handle_inbound(struct qdio_q *q, unsigned int callflags,
1498 			  int bufnr, int count)
1499 {
1500 	int diff;
1501 
1502 	qperf_inc(q, inbound_call);
1503 
1504 	if (!q->u.in.polling)
1505 		goto set;
1506 
1507 	/* protect against stop polling setting an ACK for an emptied slsb */
1508 	if (count == QDIO_MAX_BUFFERS_PER_Q) {
1509 		/* overwriting everything, just delete polling status */
1510 		q->u.in.polling = 0;
1511 		q->u.in.ack_count = 0;
1512 		goto set;
1513 	} else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
1514 		if (is_qebsm(q)) {
1515 			/* partial overwrite, just update ack_start */
1516 			diff = add_buf(bufnr, count);
1517 			diff = sub_buf(diff, q->u.in.ack_start);
1518 			q->u.in.ack_count -= diff;
1519 			if (q->u.in.ack_count <= 0) {
1520 				q->u.in.polling = 0;
1521 				q->u.in.ack_count = 0;
1522 				goto set;
1523 			}
1524 			q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
1525 		}
1526 		else
1527 			/* the only ACK will be deleted, so stop polling */
1528 			q->u.in.polling = 0;
1529 	}
1530 
1531 set:
1532 	count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
1533 	atomic_add(count, &q->nr_buf_used);
1534 
1535 	if (need_siga_in(q))
1536 		return qdio_siga_input(q);
1537 
1538 	return 0;
1539 }
1540 
1541 /**
1542  * handle_outbound - process filled outbound buffers
1543  * @q: queue containing the buffers
1544  * @callflags: flags
1545  * @bufnr: first buffer to process
1546  * @count: how many buffers are filled
1547  */
1548 static int handle_outbound(struct qdio_q *q, unsigned int callflags,
1549 			   int bufnr, int count)
1550 {
1551 	unsigned char state = 0;
1552 	int used, rc = 0;
1553 
1554 	qperf_inc(q, outbound_call);
1555 
1556 	count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
1557 	used = atomic_add_return(count, &q->nr_buf_used);
1558 
1559 	if (used == QDIO_MAX_BUFFERS_PER_Q)
1560 		qperf_inc(q, outbound_queue_full);
1561 
1562 	if (callflags & QDIO_FLAG_PCI_OUT) {
1563 		q->u.out.pci_out_enabled = 1;
1564 		qperf_inc(q, pci_request_int);
1565 	} else
1566 		q->u.out.pci_out_enabled = 0;
1567 
1568 	if (queue_type(q) == QDIO_IQDIO_QFMT) {
1569 		unsigned long phys_aob = 0;
1570 
1571 		/* One SIGA-W per buffer required for unicast HSI */
1572 		WARN_ON_ONCE(count > 1 && !multicast_outbound(q));
1573 
1574 		phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr);
1575 
1576 		rc = qdio_kick_outbound_q(q, phys_aob);
1577 	} else if (need_siga_sync(q)) {
1578 		rc = qdio_siga_sync_q(q);
1579 	} else {
1580 		/* try to fast requeue buffers */
1581 		get_buf_state(q, prev_buf(bufnr), &state, 0);
1582 		if (state != SLSB_CU_OUTPUT_PRIMED)
1583 			rc = qdio_kick_outbound_q(q, 0);
1584 		else
1585 			qperf_inc(q, fast_requeue);
1586 	}
1587 
1588 	/* in case of SIGA errors we must process the error immediately */
1589 	if (used >= q->u.out.scan_threshold || rc)
1590 		qdio_tasklet_schedule(q);
1591 	else
1592 		/* free the SBALs in case of no further traffic */
1593 		if (!timer_pending(&q->u.out.timer) &&
1594 		    likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE))
1595 			mod_timer(&q->u.out.timer, jiffies + HZ);
1596 	return rc;
1597 }
1598 
1599 /**
1600  * do_QDIO - process input or output buffers
1601  * @cdev: associated ccw_device for the qdio subchannel
1602  * @callflags: input or output and special flags from the program
1603  * @q_nr: queue number
1604  * @bufnr: buffer number
1605  * @count: how many buffers to process
1606  */
1607 int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
1608 	    int q_nr, unsigned int bufnr, unsigned int count)
1609 {
1610 	struct qdio_irq *irq_ptr;
1611 
1612 	if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
1613 		return -EINVAL;
1614 
1615 	irq_ptr = cdev->private->qdio_data;
1616 	if (!irq_ptr)
1617 		return -ENODEV;
1618 
1619 	DBF_DEV_EVENT(DBF_INFO, irq_ptr,
1620 		      "do%02x b:%02x c:%02x", callflags, bufnr, count);
1621 
1622 	if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
1623 		return -EIO;
1624 	if (!count)
1625 		return 0;
1626 	if (callflags & QDIO_FLAG_SYNC_INPUT)
1627 		return handle_inbound(irq_ptr->input_qs[q_nr],
1628 				      callflags, bufnr, count);
1629 	else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
1630 		return handle_outbound(irq_ptr->output_qs[q_nr],
1631 				       callflags, bufnr, count);
1632 	return -EINVAL;
1633 }
1634 EXPORT_SYMBOL_GPL(do_QDIO);
1635 
1636 /**
1637  * qdio_start_irq - process input buffers
1638  * @cdev: associated ccw_device for the qdio subchannel
1639  * @nr: input queue number
1640  *
1641  * Return codes
1642  *   0 - success
1643  *   1 - irqs not started since new data is available
1644  */
1645 int qdio_start_irq(struct ccw_device *cdev, int nr)
1646 {
1647 	struct qdio_q *q;
1648 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1649 
1650 	if (!irq_ptr)
1651 		return -ENODEV;
1652 	q = irq_ptr->input_qs[nr];
1653 
1654 	clear_nonshared_ind(irq_ptr);
1655 	qdio_stop_polling(q);
1656 	clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state);
1657 
1658 	/*
1659 	 * We need to check again to not lose initiative after
1660 	 * resetting the ACK state.
1661 	 */
1662 	if (test_nonshared_ind(irq_ptr))
1663 		goto rescan;
1664 	if (!qdio_inbound_q_done(q))
1665 		goto rescan;
1666 	return 0;
1667 
1668 rescan:
1669 	if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
1670 			     &q->u.in.queue_irq_state))
1671 		return 0;
1672 	else
1673 		return 1;
1674 
1675 }
1676 EXPORT_SYMBOL(qdio_start_irq);
1677 
1678 /**
1679  * qdio_get_next_buffers - process input buffers
1680  * @cdev: associated ccw_device for the qdio subchannel
1681  * @nr: input queue number
1682  * @bufnr: first filled buffer number
1683  * @error: buffers are in error state
1684  *
1685  * Return codes
1686  *   < 0 - error
1687  *   = 0 - no new buffers found
1688  *   > 0 - number of processed buffers
1689  */
1690 int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr,
1691 			  int *error)
1692 {
1693 	struct qdio_q *q;
1694 	int start, end;
1695 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1696 
1697 	if (!irq_ptr)
1698 		return -ENODEV;
1699 	q = irq_ptr->input_qs[nr];
1700 
1701 	/*
1702 	 * Cannot rely on automatic sync after interrupt since queues may
1703 	 * also be examined without interrupt.
1704 	 */
1705 	if (need_siga_sync(q))
1706 		qdio_sync_queues(q);
1707 
1708 	/* check the PCI capable outbound queues. */
1709 	qdio_check_outbound_after_thinint(q);
1710 
1711 	if (!qdio_inbound_q_moved(q))
1712 		return 0;
1713 
1714 	/* Note: upper-layer MUST stop processing immediately here ... */
1715 	if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
1716 		return -EIO;
1717 
1718 	start = q->first_to_kick;
1719 	end = q->first_to_check;
1720 	*bufnr = start;
1721 	*error = q->qdio_error;
1722 
1723 	/* for the next time */
1724 	q->first_to_kick = end;
1725 	q->qdio_error = 0;
1726 	return sub_buf(end, start);
1727 }
1728 EXPORT_SYMBOL(qdio_get_next_buffers);
1729 
1730 /**
1731  * qdio_stop_irq - disable interrupt processing for the device
1732  * @cdev: associated ccw_device for the qdio subchannel
1733  * @nr: input queue number
1734  *
1735  * Return codes
1736  *   0 - interrupts were already disabled
1737  *   1 - interrupts successfully disabled
1738  */
1739 int qdio_stop_irq(struct ccw_device *cdev, int nr)
1740 {
1741 	struct qdio_q *q;
1742 	struct qdio_irq *irq_ptr = cdev->private->qdio_data;
1743 
1744 	if (!irq_ptr)
1745 		return -ENODEV;
1746 	q = irq_ptr->input_qs[nr];
1747 
1748 	if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED,
1749 			     &q->u.in.queue_irq_state))
1750 		return 0;
1751 	else
1752 		return 1;
1753 }
1754 EXPORT_SYMBOL(qdio_stop_irq);
1755 
1756 /**
1757  * qdio_pnso_brinfo() - perform network subchannel op #0 - bridge info.
1758  * @schid:		Subchannel ID.
1759  * @cnc:		Boolean Change-Notification Control
1760  * @response:		Response code will be stored at this address
1761  * @cb: 		Callback function will be executed for each element
1762  *			of the address list
1763  * @priv:		Pointer passed from the caller to qdio_pnso_brinfo()
1764  * @type:		Type of the address entry passed to the callback
1765  * @entry:		Entry containg the address of the specified type
1766  * @priv:		Pointer to pass to the callback function.
1767  *
1768  * Performs "Store-network-bridging-information list" operation and calls
1769  * the callback function for every entry in the list. If "change-
1770  * notification-control" is set, further changes in the address list
1771  * will be reported via the IPA command.
1772  */
1773 int qdio_pnso_brinfo(struct subchannel_id schid,
1774 		int cnc, u16 *response,
1775 		void (*cb)(void *priv, enum qdio_brinfo_entry_type type,
1776 				void *entry),
1777 		void *priv)
1778 {
1779 	struct chsc_pnso_area *rr;
1780 	int rc;
1781 	u32 prev_instance = 0;
1782 	int isfirstblock = 1;
1783 	int i, size, elems;
1784 
1785 	rr = (struct chsc_pnso_area *)get_zeroed_page(GFP_KERNEL);
1786 	if (rr == NULL)
1787 		return -ENOMEM;
1788 	do {
1789 		/* on the first iteration, naihdr.resume_token will be zero */
1790 		rc = chsc_pnso_brinfo(schid, rr, rr->naihdr.resume_token, cnc);
1791 		if (rc != 0 && rc != -EBUSY)
1792 			goto out;
1793 		if (rr->response.code != 1) {
1794 			rc = -EIO;
1795 			continue;
1796 		} else
1797 			rc = 0;
1798 
1799 		if (cb == NULL)
1800 			continue;
1801 
1802 		size = rr->naihdr.naids;
1803 		elems = (rr->response.length -
1804 				sizeof(struct chsc_header) -
1805 				sizeof(struct chsc_brinfo_naihdr)) /
1806 				size;
1807 
1808 		if (!isfirstblock && (rr->naihdr.instance != prev_instance)) {
1809 			/* Inform the caller that they need to scrap */
1810 			/* the data that was already reported via cb */
1811 				rc = -EAGAIN;
1812 				break;
1813 		}
1814 		isfirstblock = 0;
1815 		prev_instance = rr->naihdr.instance;
1816 		for (i = 0; i < elems; i++)
1817 			switch (size) {
1818 			case sizeof(struct qdio_brinfo_entry_l3_ipv6):
1819 				(*cb)(priv, l3_ipv6_addr,
1820 						&rr->entries.l3_ipv6[i]);
1821 				break;
1822 			case sizeof(struct qdio_brinfo_entry_l3_ipv4):
1823 				(*cb)(priv, l3_ipv4_addr,
1824 						&rr->entries.l3_ipv4[i]);
1825 				break;
1826 			case sizeof(struct qdio_brinfo_entry_l2):
1827 				(*cb)(priv, l2_addr_lnid,
1828 						&rr->entries.l2[i]);
1829 				break;
1830 			default:
1831 				WARN_ON_ONCE(1);
1832 				rc = -EIO;
1833 				goto out;
1834 			}
1835 	} while (rr->response.code == 0x0107 ||  /* channel busy */
1836 		  (rr->response.code == 1 && /* list stored */
1837 		   /* resume token is non-zero => list incomplete */
1838 		   (rr->naihdr.resume_token.t1 || rr->naihdr.resume_token.t2)));
1839 	(*response) = rr->response.code;
1840 
1841 out:
1842 	free_page((unsigned long)rr);
1843 	return rc;
1844 }
1845 EXPORT_SYMBOL_GPL(qdio_pnso_brinfo);
1846 
1847 static int __init init_QDIO(void)
1848 {
1849 	int rc;
1850 
1851 	rc = qdio_debug_init();
1852 	if (rc)
1853 		return rc;
1854 	rc = qdio_setup_init();
1855 	if (rc)
1856 		goto out_debug;
1857 	rc = tiqdio_allocate_memory();
1858 	if (rc)
1859 		goto out_cache;
1860 	rc = tiqdio_register_thinints();
1861 	if (rc)
1862 		goto out_ti;
1863 	return 0;
1864 
1865 out_ti:
1866 	tiqdio_free_memory();
1867 out_cache:
1868 	qdio_setup_exit();
1869 out_debug:
1870 	qdio_debug_exit();
1871 	return rc;
1872 }
1873 
1874 static void __exit exit_QDIO(void)
1875 {
1876 	tiqdio_unregister_thinints();
1877 	tiqdio_free_memory();
1878 	qdio_setup_exit();
1879 	qdio_debug_exit();
1880 }
1881 
1882 module_init(init_QDIO);
1883 module_exit(exit_QDIO);
1884