1 /* 2 * linux/drivers/s390/cio/qdio_main.c 3 * 4 * Linux for s390 qdio support, buffer handling, qdio API and module support. 5 * 6 * Copyright 2000,2008 IBM Corp. 7 * Author(s): Utz Bacher <utz.bacher@de.ibm.com> 8 * Jan Glauber <jang@linux.vnet.ibm.com> 9 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com> 10 */ 11 #include <linux/module.h> 12 #include <linux/init.h> 13 #include <linux/kernel.h> 14 #include <linux/timer.h> 15 #include <linux/delay.h> 16 #include <linux/gfp.h> 17 #include <linux/io.h> 18 #include <linux/kernel_stat.h> 19 #include <linux/atomic.h> 20 #include <asm/debug.h> 21 #include <asm/qdio.h> 22 23 #include "cio.h" 24 #include "css.h" 25 #include "device.h" 26 #include "qdio.h" 27 #include "qdio_debug.h" 28 29 MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\ 30 "Jan Glauber <jang@linux.vnet.ibm.com>"); 31 MODULE_DESCRIPTION("QDIO base support"); 32 MODULE_LICENSE("GPL"); 33 34 static inline int do_siga_sync(unsigned long schid, 35 unsigned int out_mask, unsigned int in_mask, 36 unsigned int fc) 37 { 38 register unsigned long __fc asm ("0") = fc; 39 register unsigned long __schid asm ("1") = schid; 40 register unsigned long out asm ("2") = out_mask; 41 register unsigned long in asm ("3") = in_mask; 42 int cc; 43 44 asm volatile( 45 " siga 0\n" 46 " ipm %0\n" 47 " srl %0,28\n" 48 : "=d" (cc) 49 : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc"); 50 return cc; 51 } 52 53 static inline int do_siga_input(unsigned long schid, unsigned int mask, 54 unsigned int fc) 55 { 56 register unsigned long __fc asm ("0") = fc; 57 register unsigned long __schid asm ("1") = schid; 58 register unsigned long __mask asm ("2") = mask; 59 int cc; 60 61 asm volatile( 62 " siga 0\n" 63 " ipm %0\n" 64 " srl %0,28\n" 65 : "=d" (cc) 66 : "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory"); 67 return cc; 68 } 69 70 /** 71 * do_siga_output - perform SIGA-w/wt function 72 * @schid: subchannel id or in case of QEBSM the subchannel token 73 * @mask: which output queues to process 74 * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer 75 * @fc: function code to perform 76 * 77 * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION. 78 * Note: For IQDC unicast queues only the highest priority queue is processed. 79 */ 80 static inline int do_siga_output(unsigned long schid, unsigned long mask, 81 unsigned int *bb, unsigned int fc, 82 unsigned long aob) 83 { 84 register unsigned long __fc asm("0") = fc; 85 register unsigned long __schid asm("1") = schid; 86 register unsigned long __mask asm("2") = mask; 87 register unsigned long __aob asm("3") = aob; 88 int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION; 89 90 asm volatile( 91 " siga 0\n" 92 "0: ipm %0\n" 93 " srl %0,28\n" 94 "1:\n" 95 EX_TABLE(0b, 1b) 96 : "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask), 97 "+d" (__aob) 98 : : "cc", "memory"); 99 *bb = ((unsigned int) __fc) >> 31; 100 return cc; 101 } 102 103 static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq) 104 { 105 /* all done or next buffer state different */ 106 if (ccq == 0 || ccq == 32) 107 return 0; 108 /* not all buffers processed */ 109 if (ccq == 96 || ccq == 97) 110 return 1; 111 /* notify devices immediately */ 112 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq); 113 return -EIO; 114 } 115 116 /** 117 * qdio_do_eqbs - extract buffer states for QEBSM 118 * @q: queue to manipulate 119 * @state: state of the extracted buffers 120 * @start: buffer number to start at 121 * @count: count of buffers to examine 122 * @auto_ack: automatically acknowledge buffers 123 * 124 * Returns the number of successfully extracted equal buffer states. 125 * Stops processing if a state is different from the last buffers state. 126 */ 127 static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state, 128 int start, int count, int auto_ack) 129 { 130 unsigned int ccq = 0; 131 int tmp_count = count, tmp_start = start; 132 int nr = q->nr; 133 int rc; 134 135 BUG_ON(!q->irq_ptr->sch_token); 136 qperf_inc(q, eqbs); 137 138 if (!q->is_input_q) 139 nr += q->irq_ptr->nr_input_qs; 140 again: 141 ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count, 142 auto_ack); 143 rc = qdio_check_ccq(q, ccq); 144 145 /* At least one buffer was processed, return and extract the remaining 146 * buffers later. 147 */ 148 if ((ccq == 96) && (count != tmp_count)) { 149 qperf_inc(q, eqbs_partial); 150 return (count - tmp_count); 151 } 152 153 if (rc == 1) { 154 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq); 155 goto again; 156 } 157 158 if (rc < 0) { 159 DBF_ERROR("%4x EQBS ERROR", SCH_NO(q)); 160 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr); 161 q->handler(q->irq_ptr->cdev, 162 QDIO_ERROR_ACTIVATE_CHECK_CONDITION, 163 q->nr, q->first_to_kick, count, 164 q->irq_ptr->int_parm); 165 return 0; 166 } 167 return count - tmp_count; 168 } 169 170 /** 171 * qdio_do_sqbs - set buffer states for QEBSM 172 * @q: queue to manipulate 173 * @state: new state of the buffers 174 * @start: first buffer number to change 175 * @count: how many buffers to change 176 * 177 * Returns the number of successfully changed buffers. 178 * Does retrying until the specified count of buffer states is set or an 179 * error occurs. 180 */ 181 static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start, 182 int count) 183 { 184 unsigned int ccq = 0; 185 int tmp_count = count, tmp_start = start; 186 int nr = q->nr; 187 int rc; 188 189 if (!count) 190 return 0; 191 192 BUG_ON(!q->irq_ptr->sch_token); 193 qperf_inc(q, sqbs); 194 195 if (!q->is_input_q) 196 nr += q->irq_ptr->nr_input_qs; 197 again: 198 ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count); 199 rc = qdio_check_ccq(q, ccq); 200 if (rc == 1) { 201 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq); 202 qperf_inc(q, sqbs_partial); 203 goto again; 204 } 205 if (rc < 0) { 206 DBF_ERROR("%4x SQBS ERROR", SCH_NO(q)); 207 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr); 208 q->handler(q->irq_ptr->cdev, 209 QDIO_ERROR_ACTIVATE_CHECK_CONDITION, 210 q->nr, q->first_to_kick, count, 211 q->irq_ptr->int_parm); 212 return 0; 213 } 214 WARN_ON(tmp_count); 215 return count - tmp_count; 216 } 217 218 /* returns number of examined buffers and their common state in *state */ 219 static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr, 220 unsigned char *state, unsigned int count, 221 int auto_ack, int merge_pending) 222 { 223 unsigned char __state = 0; 224 int i; 225 226 BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK); 227 BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q); 228 229 if (is_qebsm(q)) 230 return qdio_do_eqbs(q, state, bufnr, count, auto_ack); 231 232 for (i = 0; i < count; i++) { 233 if (!__state) { 234 __state = q->slsb.val[bufnr]; 235 if (merge_pending && __state == SLSB_P_OUTPUT_PENDING) 236 __state = SLSB_P_OUTPUT_EMPTY; 237 } else if (merge_pending) { 238 if ((q->slsb.val[bufnr] & __state) != __state) 239 break; 240 } else if (q->slsb.val[bufnr] != __state) 241 break; 242 bufnr = next_buf(bufnr); 243 } 244 *state = __state; 245 return i; 246 } 247 248 static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr, 249 unsigned char *state, int auto_ack) 250 { 251 return get_buf_states(q, bufnr, state, 1, auto_ack, 0); 252 } 253 254 /* wrap-around safe setting of slsb states, returns number of changed buffers */ 255 static inline int set_buf_states(struct qdio_q *q, int bufnr, 256 unsigned char state, int count) 257 { 258 int i; 259 260 BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK); 261 BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q); 262 263 if (is_qebsm(q)) 264 return qdio_do_sqbs(q, state, bufnr, count); 265 266 for (i = 0; i < count; i++) { 267 xchg(&q->slsb.val[bufnr], state); 268 bufnr = next_buf(bufnr); 269 } 270 return count; 271 } 272 273 static inline int set_buf_state(struct qdio_q *q, int bufnr, 274 unsigned char state) 275 { 276 return set_buf_states(q, bufnr, state, 1); 277 } 278 279 /* set slsb states to initial state */ 280 void qdio_init_buf_states(struct qdio_irq *irq_ptr) 281 { 282 struct qdio_q *q; 283 int i; 284 285 for_each_input_queue(irq_ptr, q, i) 286 set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT, 287 QDIO_MAX_BUFFERS_PER_Q); 288 for_each_output_queue(irq_ptr, q, i) 289 set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT, 290 QDIO_MAX_BUFFERS_PER_Q); 291 } 292 293 static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output, 294 unsigned int input) 295 { 296 unsigned long schid = *((u32 *) &q->irq_ptr->schid); 297 unsigned int fc = QDIO_SIGA_SYNC; 298 int cc; 299 300 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr); 301 qperf_inc(q, siga_sync); 302 303 if (is_qebsm(q)) { 304 schid = q->irq_ptr->sch_token; 305 fc |= QDIO_SIGA_QEBSM_FLAG; 306 } 307 308 cc = do_siga_sync(schid, output, input, fc); 309 if (unlikely(cc)) 310 DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc); 311 return cc; 312 } 313 314 static inline int qdio_siga_sync_q(struct qdio_q *q) 315 { 316 if (q->is_input_q) 317 return qdio_siga_sync(q, 0, q->mask); 318 else 319 return qdio_siga_sync(q, q->mask, 0); 320 } 321 322 static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit, 323 unsigned long aob) 324 { 325 unsigned long schid = *((u32 *) &q->irq_ptr->schid); 326 unsigned int fc = QDIO_SIGA_WRITE; 327 u64 start_time = 0; 328 int retries = 0, cc; 329 unsigned long laob = 0; 330 331 if (q->u.out.use_cq && aob != 0) { 332 fc = QDIO_SIGA_WRITEQ; 333 laob = aob; 334 } 335 336 if (is_qebsm(q)) { 337 schid = q->irq_ptr->sch_token; 338 fc |= QDIO_SIGA_QEBSM_FLAG; 339 } 340 again: 341 WARN_ON_ONCE((aob && queue_type(q) != QDIO_IQDIO_QFMT) || 342 (aob && fc != QDIO_SIGA_WRITEQ)); 343 cc = do_siga_output(schid, q->mask, busy_bit, fc, laob); 344 345 /* hipersocket busy condition */ 346 if (unlikely(*busy_bit)) { 347 WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2); 348 retries++; 349 350 if (!start_time) { 351 start_time = get_clock(); 352 goto again; 353 } 354 if ((get_clock() - start_time) < QDIO_BUSY_BIT_PATIENCE) 355 goto again; 356 } 357 if (retries) { 358 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, 359 "%4x cc2 BB1:%1d", SCH_NO(q), q->nr); 360 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries); 361 } 362 return cc; 363 } 364 365 static inline int qdio_siga_input(struct qdio_q *q) 366 { 367 unsigned long schid = *((u32 *) &q->irq_ptr->schid); 368 unsigned int fc = QDIO_SIGA_READ; 369 int cc; 370 371 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr); 372 qperf_inc(q, siga_read); 373 374 if (is_qebsm(q)) { 375 schid = q->irq_ptr->sch_token; 376 fc |= QDIO_SIGA_QEBSM_FLAG; 377 } 378 379 cc = do_siga_input(schid, q->mask, fc); 380 if (unlikely(cc)) 381 DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc); 382 return cc; 383 } 384 385 #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0) 386 #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U) 387 388 static inline void qdio_sync_queues(struct qdio_q *q) 389 { 390 /* PCI capable outbound queues will also be scanned so sync them too */ 391 if (pci_out_supported(q)) 392 qdio_siga_sync_all(q); 393 else 394 qdio_siga_sync_q(q); 395 } 396 397 int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr, 398 unsigned char *state) 399 { 400 if (need_siga_sync(q)) 401 qdio_siga_sync_q(q); 402 return get_buf_states(q, bufnr, state, 1, 0, 0); 403 } 404 405 static inline void qdio_stop_polling(struct qdio_q *q) 406 { 407 if (!q->u.in.polling) 408 return; 409 410 q->u.in.polling = 0; 411 qperf_inc(q, stop_polling); 412 413 /* show the card that we are not polling anymore */ 414 if (is_qebsm(q)) { 415 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT, 416 q->u.in.ack_count); 417 q->u.in.ack_count = 0; 418 } else 419 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT); 420 } 421 422 static inline void account_sbals(struct qdio_q *q, int count) 423 { 424 int pos = 0; 425 426 q->q_stats.nr_sbal_total += count; 427 if (count == QDIO_MAX_BUFFERS_MASK) { 428 q->q_stats.nr_sbals[7]++; 429 return; 430 } 431 while (count >>= 1) 432 pos++; 433 q->q_stats.nr_sbals[pos]++; 434 } 435 436 static void process_buffer_error(struct qdio_q *q, int count) 437 { 438 unsigned char state = (q->is_input_q) ? SLSB_P_INPUT_NOT_INIT : 439 SLSB_P_OUTPUT_NOT_INIT; 440 441 q->qdio_error |= QDIO_ERROR_SLSB_STATE; 442 443 /* special handling for no target buffer empty */ 444 if ((!q->is_input_q && 445 (q->sbal[q->first_to_check]->element[15].sflags) == 0x10)) { 446 qperf_inc(q, target_full); 447 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x", 448 q->first_to_check); 449 return; 450 } 451 452 DBF_ERROR("%4x BUF ERROR", SCH_NO(q)); 453 DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr); 454 DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count); 455 DBF_ERROR("F14:%2x F15:%2x", 456 q->sbal[q->first_to_check]->element[14].sflags, 457 q->sbal[q->first_to_check]->element[15].sflags); 458 459 /* 460 * Interrupts may be avoided as long as the error is present 461 * so change the buffer state immediately to avoid starvation. 462 */ 463 set_buf_states(q, q->first_to_check, state, count); 464 } 465 466 static inline void inbound_primed(struct qdio_q *q, int count) 467 { 468 int new; 469 470 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %02x", count); 471 472 /* for QEBSM the ACK was already set by EQBS */ 473 if (is_qebsm(q)) { 474 if (!q->u.in.polling) { 475 q->u.in.polling = 1; 476 q->u.in.ack_count = count; 477 q->u.in.ack_start = q->first_to_check; 478 return; 479 } 480 481 /* delete the previous ACK's */ 482 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT, 483 q->u.in.ack_count); 484 q->u.in.ack_count = count; 485 q->u.in.ack_start = q->first_to_check; 486 return; 487 } 488 489 /* 490 * ACK the newest buffer. The ACK will be removed in qdio_stop_polling 491 * or by the next inbound run. 492 */ 493 new = add_buf(q->first_to_check, count - 1); 494 if (q->u.in.polling) { 495 /* reset the previous ACK but first set the new one */ 496 set_buf_state(q, new, SLSB_P_INPUT_ACK); 497 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT); 498 } else { 499 q->u.in.polling = 1; 500 set_buf_state(q, new, SLSB_P_INPUT_ACK); 501 } 502 503 q->u.in.ack_start = new; 504 count--; 505 if (!count) 506 return; 507 /* need to change ALL buffers to get more interrupts */ 508 set_buf_states(q, q->first_to_check, SLSB_P_INPUT_NOT_INIT, count); 509 } 510 511 static int get_inbound_buffer_frontier(struct qdio_q *q) 512 { 513 int count, stop; 514 unsigned char state = 0; 515 516 /* 517 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved 518 * would return 0. 519 */ 520 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK); 521 stop = add_buf(q->first_to_check, count); 522 523 if (q->first_to_check == stop) 524 goto out; 525 526 /* 527 * No siga sync here, as a PCI or we after a thin interrupt 528 * already sync'ed the queues. 529 */ 530 count = get_buf_states(q, q->first_to_check, &state, count, 1, 0); 531 if (!count) 532 goto out; 533 534 switch (state) { 535 case SLSB_P_INPUT_PRIMED: 536 inbound_primed(q, count); 537 q->first_to_check = add_buf(q->first_to_check, count); 538 if (atomic_sub(count, &q->nr_buf_used) == 0) 539 qperf_inc(q, inbound_queue_full); 540 if (q->irq_ptr->perf_stat_enabled) 541 account_sbals(q, count); 542 break; 543 case SLSB_P_INPUT_ERROR: 544 process_buffer_error(q, count); 545 q->first_to_check = add_buf(q->first_to_check, count); 546 atomic_sub(count, &q->nr_buf_used); 547 if (q->irq_ptr->perf_stat_enabled) 548 account_sbals_error(q, count); 549 break; 550 case SLSB_CU_INPUT_EMPTY: 551 case SLSB_P_INPUT_NOT_INIT: 552 case SLSB_P_INPUT_ACK: 553 if (q->irq_ptr->perf_stat_enabled) 554 q->q_stats.nr_sbal_nop++; 555 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop"); 556 break; 557 default: 558 BUG(); 559 } 560 out: 561 return q->first_to_check; 562 } 563 564 static int qdio_inbound_q_moved(struct qdio_q *q) 565 { 566 int bufnr; 567 568 bufnr = get_inbound_buffer_frontier(q); 569 570 if ((bufnr != q->last_move) || q->qdio_error) { 571 q->last_move = bufnr; 572 if (!is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR) 573 q->u.in.timestamp = get_clock(); 574 return 1; 575 } else 576 return 0; 577 } 578 579 static inline int qdio_inbound_q_done(struct qdio_q *q) 580 { 581 unsigned char state = 0; 582 583 if (!atomic_read(&q->nr_buf_used)) 584 return 1; 585 586 if (need_siga_sync(q)) 587 qdio_siga_sync_q(q); 588 get_buf_state(q, q->first_to_check, &state, 0); 589 590 if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR) 591 /* more work coming */ 592 return 0; 593 594 if (is_thinint_irq(q->irq_ptr)) 595 return 1; 596 597 /* don't poll under z/VM */ 598 if (MACHINE_IS_VM) 599 return 1; 600 601 /* 602 * At this point we know, that inbound first_to_check 603 * has (probably) not moved (see qdio_inbound_processing). 604 */ 605 if (get_clock() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) { 606 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x", 607 q->first_to_check); 608 return 1; 609 } else 610 return 0; 611 } 612 613 static inline int contains_aobs(struct qdio_q *q) 614 { 615 return !q->is_input_q && q->u.out.use_cq; 616 } 617 618 static inline void qdio_trace_aob(struct qdio_irq *irq, struct qdio_q *q, 619 int i, struct qaob *aob) 620 { 621 int tmp; 622 623 DBF_DEV_EVENT(DBF_INFO, irq, "AOB%d:%lx", i, 624 (unsigned long) virt_to_phys(aob)); 625 DBF_DEV_EVENT(DBF_INFO, irq, "RES00:%lx", 626 (unsigned long) aob->res0[0]); 627 DBF_DEV_EVENT(DBF_INFO, irq, "RES01:%lx", 628 (unsigned long) aob->res0[1]); 629 DBF_DEV_EVENT(DBF_INFO, irq, "RES02:%lx", 630 (unsigned long) aob->res0[2]); 631 DBF_DEV_EVENT(DBF_INFO, irq, "RES03:%lx", 632 (unsigned long) aob->res0[3]); 633 DBF_DEV_EVENT(DBF_INFO, irq, "RES04:%lx", 634 (unsigned long) aob->res0[4]); 635 DBF_DEV_EVENT(DBF_INFO, irq, "RES05:%lx", 636 (unsigned long) aob->res0[5]); 637 DBF_DEV_EVENT(DBF_INFO, irq, "RES1:%x", aob->res1); 638 DBF_DEV_EVENT(DBF_INFO, irq, "RES2:%x", aob->res2); 639 DBF_DEV_EVENT(DBF_INFO, irq, "RES3:%x", aob->res3); 640 DBF_DEV_EVENT(DBF_INFO, irq, "AORC:%u", aob->aorc); 641 DBF_DEV_EVENT(DBF_INFO, irq, "FLAGS:%u", aob->flags); 642 DBF_DEV_EVENT(DBF_INFO, irq, "CBTBS:%u", aob->cbtbs); 643 DBF_DEV_EVENT(DBF_INFO, irq, "SBC:%u", aob->sb_count); 644 for (tmp = 0; tmp < QDIO_MAX_ELEMENTS_PER_BUFFER; ++tmp) { 645 DBF_DEV_EVENT(DBF_INFO, irq, "SBA%d:%lx", tmp, 646 (unsigned long) aob->sba[tmp]); 647 DBF_DEV_EVENT(DBF_INFO, irq, "rSBA%d:%lx", tmp, 648 (unsigned long) q->sbal[i]->element[tmp].addr); 649 DBF_DEV_EVENT(DBF_INFO, irq, "DC%d:%u", tmp, aob->dcount[tmp]); 650 DBF_DEV_EVENT(DBF_INFO, irq, "rDC%d:%u", tmp, 651 q->sbal[i]->element[tmp].length); 652 } 653 DBF_DEV_EVENT(DBF_INFO, irq, "USER0:%lx", (unsigned long) aob->user0); 654 for (tmp = 0; tmp < 2; ++tmp) { 655 DBF_DEV_EVENT(DBF_INFO, irq, "RES4%d:%lx", tmp, 656 (unsigned long) aob->res4[tmp]); 657 } 658 DBF_DEV_EVENT(DBF_INFO, irq, "USER1:%lx", (unsigned long) aob->user1); 659 DBF_DEV_EVENT(DBF_INFO, irq, "USER2:%lx", (unsigned long) aob->user2); 660 } 661 662 static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count) 663 { 664 unsigned char state = 0; 665 int j, b = start; 666 667 if (!contains_aobs(q)) 668 return; 669 670 for (j = 0; j < count; ++j) { 671 get_buf_state(q, b, &state, 0); 672 if (state == SLSB_P_OUTPUT_PENDING) { 673 struct qaob *aob = q->u.out.aobs[b]; 674 if (aob == NULL) 675 continue; 676 677 BUG_ON(q->u.out.sbal_state == NULL); 678 q->u.out.sbal_state[b].flags |= 679 QDIO_OUTBUF_STATE_FLAG_PENDING; 680 q->u.out.aobs[b] = NULL; 681 } else if (state == SLSB_P_OUTPUT_EMPTY) { 682 BUG_ON(q->u.out.sbal_state == NULL); 683 q->u.out.sbal_state[b].aob = NULL; 684 } 685 b = next_buf(b); 686 } 687 } 688 689 static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q, 690 int bufnr) 691 { 692 unsigned long phys_aob = 0; 693 694 if (!q->use_cq) 695 goto out; 696 697 if (!q->aobs[bufnr]) { 698 struct qaob *aob = qdio_allocate_aob(); 699 q->aobs[bufnr] = aob; 700 } 701 if (q->aobs[bufnr]) { 702 BUG_ON(q->sbal_state == NULL); 703 q->sbal_state[bufnr].flags = QDIO_OUTBUF_STATE_FLAG_NONE; 704 q->sbal_state[bufnr].aob = q->aobs[bufnr]; 705 q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user; 706 phys_aob = virt_to_phys(q->aobs[bufnr]); 707 BUG_ON(phys_aob & 0xFF); 708 } 709 710 out: 711 return phys_aob; 712 } 713 714 static void qdio_kick_handler(struct qdio_q *q) 715 { 716 int start = q->first_to_kick; 717 int end = q->first_to_check; 718 int count; 719 720 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)) 721 return; 722 723 count = sub_buf(end, start); 724 725 if (q->is_input_q) { 726 qperf_inc(q, inbound_handler); 727 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count); 728 } else { 729 qperf_inc(q, outbound_handler); 730 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x", 731 start, count); 732 } 733 734 qdio_handle_aobs(q, start, count); 735 736 q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count, 737 q->irq_ptr->int_parm); 738 739 /* for the next time */ 740 q->first_to_kick = end; 741 q->qdio_error = 0; 742 } 743 744 static void __qdio_inbound_processing(struct qdio_q *q) 745 { 746 qperf_inc(q, tasklet_inbound); 747 748 if (!qdio_inbound_q_moved(q)) 749 return; 750 751 qdio_kick_handler(q); 752 753 if (!qdio_inbound_q_done(q)) { 754 /* means poll time is not yet over */ 755 qperf_inc(q, tasklet_inbound_resched); 756 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) { 757 tasklet_schedule(&q->tasklet); 758 return; 759 } 760 } 761 762 qdio_stop_polling(q); 763 /* 764 * We need to check again to not lose initiative after 765 * resetting the ACK state. 766 */ 767 if (!qdio_inbound_q_done(q)) { 768 qperf_inc(q, tasklet_inbound_resched2); 769 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) 770 tasklet_schedule(&q->tasklet); 771 } 772 } 773 774 void qdio_inbound_processing(unsigned long data) 775 { 776 struct qdio_q *q = (struct qdio_q *)data; 777 __qdio_inbound_processing(q); 778 } 779 780 static int get_outbound_buffer_frontier(struct qdio_q *q) 781 { 782 int count, stop; 783 unsigned char state = 0; 784 785 if (need_siga_sync(q)) 786 if (((queue_type(q) != QDIO_IQDIO_QFMT) && 787 !pci_out_supported(q)) || 788 (queue_type(q) == QDIO_IQDIO_QFMT && 789 multicast_outbound(q))) 790 qdio_siga_sync_q(q); 791 792 /* 793 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved 794 * would return 0. 795 */ 796 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK); 797 stop = add_buf(q->first_to_check, count); 798 if (q->first_to_check == stop) 799 goto out; 800 801 count = get_buf_states(q, q->first_to_check, &state, count, 0, 1); 802 if (!count) 803 goto out; 804 805 switch (state) { 806 case SLSB_P_OUTPUT_PENDING: 807 BUG(); 808 case SLSB_P_OUTPUT_EMPTY: 809 /* the adapter got it */ 810 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, 811 "out empty:%1d %02x", q->nr, count); 812 813 atomic_sub(count, &q->nr_buf_used); 814 q->first_to_check = add_buf(q->first_to_check, count); 815 if (q->irq_ptr->perf_stat_enabled) 816 account_sbals(q, count); 817 818 break; 819 case SLSB_P_OUTPUT_ERROR: 820 process_buffer_error(q, count); 821 q->first_to_check = add_buf(q->first_to_check, count); 822 atomic_sub(count, &q->nr_buf_used); 823 if (q->irq_ptr->perf_stat_enabled) 824 account_sbals_error(q, count); 825 break; 826 case SLSB_CU_OUTPUT_PRIMED: 827 /* the adapter has not fetched the output yet */ 828 if (q->irq_ptr->perf_stat_enabled) 829 q->q_stats.nr_sbal_nop++; 830 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d", 831 q->nr); 832 break; 833 case SLSB_P_OUTPUT_NOT_INIT: 834 case SLSB_P_OUTPUT_HALTED: 835 break; 836 default: 837 BUG(); 838 } 839 840 out: 841 return q->first_to_check; 842 } 843 844 /* all buffers processed? */ 845 static inline int qdio_outbound_q_done(struct qdio_q *q) 846 { 847 return atomic_read(&q->nr_buf_used) == 0; 848 } 849 850 static inline int qdio_outbound_q_moved(struct qdio_q *q) 851 { 852 int bufnr; 853 854 bufnr = get_outbound_buffer_frontier(q); 855 856 if ((bufnr != q->last_move) || q->qdio_error) { 857 q->last_move = bufnr; 858 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr); 859 return 1; 860 } else 861 return 0; 862 } 863 864 static int qdio_kick_outbound_q(struct qdio_q *q, unsigned long aob) 865 { 866 int retries = 0, cc; 867 unsigned int busy_bit; 868 869 if (!need_siga_out(q)) 870 return 0; 871 872 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr); 873 retry: 874 qperf_inc(q, siga_write); 875 876 cc = qdio_siga_output(q, &busy_bit, aob); 877 switch (cc) { 878 case 0: 879 break; 880 case 2: 881 if (busy_bit) { 882 while (++retries < QDIO_BUSY_BIT_RETRIES) { 883 mdelay(QDIO_BUSY_BIT_RETRY_DELAY); 884 goto retry; 885 } 886 DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr); 887 cc |= QDIO_ERROR_SIGA_BUSY; 888 } else 889 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr); 890 break; 891 case 1: 892 case 3: 893 DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc); 894 break; 895 } 896 if (retries) { 897 DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr); 898 DBF_ERROR("count:%u", retries); 899 } 900 return cc; 901 } 902 903 static void __qdio_outbound_processing(struct qdio_q *q) 904 { 905 qperf_inc(q, tasklet_outbound); 906 BUG_ON(atomic_read(&q->nr_buf_used) < 0); 907 908 if (qdio_outbound_q_moved(q)) 909 qdio_kick_handler(q); 910 911 if (queue_type(q) == QDIO_ZFCP_QFMT) 912 if (!pci_out_supported(q) && !qdio_outbound_q_done(q)) 913 goto sched; 914 915 /* bail out for HiperSockets unicast queues */ 916 if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q)) 917 return; 918 919 if ((queue_type(q) == QDIO_IQDIO_QFMT) && 920 (atomic_read(&q->nr_buf_used)) > QDIO_IQDIO_POLL_LVL) 921 goto sched; 922 923 if (q->u.out.pci_out_enabled) 924 return; 925 926 /* 927 * Now we know that queue type is either qeth without pci enabled 928 * or HiperSockets multicast. Make sure buffer switch from PRIMED to 929 * EMPTY is noticed and outbound_handler is called after some time. 930 */ 931 if (qdio_outbound_q_done(q)) 932 del_timer(&q->u.out.timer); 933 else 934 if (!timer_pending(&q->u.out.timer)) 935 mod_timer(&q->u.out.timer, jiffies + 10 * HZ); 936 return; 937 938 sched: 939 if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED)) 940 return; 941 tasklet_schedule(&q->tasklet); 942 } 943 944 /* outbound tasklet */ 945 void qdio_outbound_processing(unsigned long data) 946 { 947 struct qdio_q *q = (struct qdio_q *)data; 948 __qdio_outbound_processing(q); 949 } 950 951 void qdio_outbound_timer(unsigned long data) 952 { 953 struct qdio_q *q = (struct qdio_q *)data; 954 955 if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED)) 956 return; 957 tasklet_schedule(&q->tasklet); 958 } 959 960 static inline void qdio_check_outbound_after_thinint(struct qdio_q *q) 961 { 962 struct qdio_q *out; 963 int i; 964 965 if (!pci_out_supported(q)) 966 return; 967 968 for_each_output_queue(q->irq_ptr, out, i) 969 if (!qdio_outbound_q_done(out)) 970 tasklet_schedule(&out->tasklet); 971 } 972 973 static void __tiqdio_inbound_processing(struct qdio_q *q) 974 { 975 qperf_inc(q, tasklet_inbound); 976 if (need_siga_sync(q) && need_siga_sync_after_ai(q)) 977 qdio_sync_queues(q); 978 979 /* 980 * The interrupt could be caused by a PCI request. Check the 981 * PCI capable outbound queues. 982 */ 983 qdio_check_outbound_after_thinint(q); 984 985 if (!qdio_inbound_q_moved(q)) 986 return; 987 988 qdio_kick_handler(q); 989 990 if (!qdio_inbound_q_done(q)) { 991 qperf_inc(q, tasklet_inbound_resched); 992 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) { 993 tasklet_schedule(&q->tasklet); 994 return; 995 } 996 } 997 998 qdio_stop_polling(q); 999 /* 1000 * We need to check again to not lose initiative after 1001 * resetting the ACK state. 1002 */ 1003 if (!qdio_inbound_q_done(q)) { 1004 qperf_inc(q, tasklet_inbound_resched2); 1005 if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED)) 1006 tasklet_schedule(&q->tasklet); 1007 } 1008 } 1009 1010 void tiqdio_inbound_processing(unsigned long data) 1011 { 1012 struct qdio_q *q = (struct qdio_q *)data; 1013 __tiqdio_inbound_processing(q); 1014 } 1015 1016 static inline void qdio_set_state(struct qdio_irq *irq_ptr, 1017 enum qdio_irq_states state) 1018 { 1019 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state); 1020 1021 irq_ptr->state = state; 1022 mb(); 1023 } 1024 1025 static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb) 1026 { 1027 if (irb->esw.esw0.erw.cons) { 1028 DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no); 1029 DBF_ERROR_HEX(irb, 64); 1030 DBF_ERROR_HEX(irb->ecw, 64); 1031 } 1032 } 1033 1034 /* PCI interrupt handler */ 1035 static void qdio_int_handler_pci(struct qdio_irq *irq_ptr) 1036 { 1037 int i; 1038 struct qdio_q *q; 1039 1040 if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED)) 1041 return; 1042 1043 for_each_input_queue(irq_ptr, q, i) { 1044 if (q->u.in.queue_start_poll) { 1045 /* skip if polling is enabled or already in work */ 1046 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED, 1047 &q->u.in.queue_irq_state)) { 1048 qperf_inc(q, int_discarded); 1049 continue; 1050 } 1051 q->u.in.queue_start_poll(q->irq_ptr->cdev, q->nr, 1052 q->irq_ptr->int_parm); 1053 } else { 1054 tasklet_schedule(&q->tasklet); 1055 } 1056 } 1057 1058 if (!pci_out_supported(q)) 1059 return; 1060 1061 for_each_output_queue(irq_ptr, q, i) { 1062 if (qdio_outbound_q_done(q)) 1063 continue; 1064 if (need_siga_sync(q) && need_siga_sync_out_after_pci(q)) 1065 qdio_siga_sync_q(q); 1066 tasklet_schedule(&q->tasklet); 1067 } 1068 } 1069 1070 static void qdio_handle_activate_check(struct ccw_device *cdev, 1071 unsigned long intparm, int cstat, int dstat) 1072 { 1073 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1074 struct qdio_q *q; 1075 int count; 1076 1077 DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no); 1078 DBF_ERROR("intp :%lx", intparm); 1079 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat); 1080 1081 if (irq_ptr->nr_input_qs) { 1082 q = irq_ptr->input_qs[0]; 1083 } else if (irq_ptr->nr_output_qs) { 1084 q = irq_ptr->output_qs[0]; 1085 } else { 1086 dump_stack(); 1087 goto no_handler; 1088 } 1089 1090 count = sub_buf(q->first_to_check, q->first_to_kick); 1091 q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION, 1092 q->nr, q->first_to_kick, count, irq_ptr->int_parm); 1093 no_handler: 1094 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED); 1095 } 1096 1097 static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat, 1098 int dstat) 1099 { 1100 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1101 1102 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq"); 1103 1104 if (cstat) 1105 goto error; 1106 if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END)) 1107 goto error; 1108 if (!(dstat & DEV_STAT_DEV_END)) 1109 goto error; 1110 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED); 1111 return; 1112 1113 error: 1114 DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no); 1115 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat); 1116 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR); 1117 } 1118 1119 /* qdio interrupt handler */ 1120 void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm, 1121 struct irb *irb) 1122 { 1123 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1124 int cstat, dstat; 1125 1126 if (!intparm || !irq_ptr) { 1127 DBF_ERROR("qint:%4x", cdev->private->schid.sch_no); 1128 return; 1129 } 1130 1131 kstat_cpu(smp_processor_id()).irqs[IOINT_QDI]++; 1132 if (irq_ptr->perf_stat_enabled) 1133 irq_ptr->perf_stat.qdio_int++; 1134 1135 if (IS_ERR(irb)) { 1136 switch (PTR_ERR(irb)) { 1137 case -EIO: 1138 DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no); 1139 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR); 1140 wake_up(&cdev->private->wait_q); 1141 return; 1142 default: 1143 WARN_ON(1); 1144 return; 1145 } 1146 } 1147 qdio_irq_check_sense(irq_ptr, irb); 1148 cstat = irb->scsw.cmd.cstat; 1149 dstat = irb->scsw.cmd.dstat; 1150 1151 switch (irq_ptr->state) { 1152 case QDIO_IRQ_STATE_INACTIVE: 1153 qdio_establish_handle_irq(cdev, cstat, dstat); 1154 break; 1155 case QDIO_IRQ_STATE_CLEANUP: 1156 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); 1157 break; 1158 case QDIO_IRQ_STATE_ESTABLISHED: 1159 case QDIO_IRQ_STATE_ACTIVE: 1160 if (cstat & SCHN_STAT_PCI) { 1161 qdio_int_handler_pci(irq_ptr); 1162 return; 1163 } 1164 if (cstat || dstat) 1165 qdio_handle_activate_check(cdev, intparm, cstat, 1166 dstat); 1167 break; 1168 case QDIO_IRQ_STATE_STOPPED: 1169 break; 1170 default: 1171 WARN_ON(1); 1172 } 1173 wake_up(&cdev->private->wait_q); 1174 } 1175 1176 /** 1177 * qdio_get_ssqd_desc - get qdio subchannel description 1178 * @cdev: ccw device to get description for 1179 * @data: where to store the ssqd 1180 * 1181 * Returns 0 or an error code. The results of the chsc are stored in the 1182 * specified structure. 1183 */ 1184 int qdio_get_ssqd_desc(struct ccw_device *cdev, 1185 struct qdio_ssqd_desc *data) 1186 { 1187 1188 if (!cdev || !cdev->private) 1189 return -EINVAL; 1190 1191 DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no); 1192 return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data); 1193 } 1194 EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc); 1195 1196 static void qdio_shutdown_queues(struct ccw_device *cdev) 1197 { 1198 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1199 struct qdio_q *q; 1200 int i; 1201 1202 for_each_input_queue(irq_ptr, q, i) 1203 tasklet_kill(&q->tasklet); 1204 1205 for_each_output_queue(irq_ptr, q, i) { 1206 del_timer(&q->u.out.timer); 1207 tasklet_kill(&q->tasklet); 1208 } 1209 } 1210 1211 /** 1212 * qdio_shutdown - shut down a qdio subchannel 1213 * @cdev: associated ccw device 1214 * @how: use halt or clear to shutdown 1215 */ 1216 int qdio_shutdown(struct ccw_device *cdev, int how) 1217 { 1218 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1219 int rc; 1220 unsigned long flags; 1221 1222 if (!irq_ptr) 1223 return -ENODEV; 1224 1225 BUG_ON(irqs_disabled()); 1226 DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no); 1227 1228 mutex_lock(&irq_ptr->setup_mutex); 1229 /* 1230 * Subchannel was already shot down. We cannot prevent being called 1231 * twice since cio may trigger a shutdown asynchronously. 1232 */ 1233 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) { 1234 mutex_unlock(&irq_ptr->setup_mutex); 1235 return 0; 1236 } 1237 1238 /* 1239 * Indicate that the device is going down. Scheduling the queue 1240 * tasklets is forbidden from here on. 1241 */ 1242 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED); 1243 1244 tiqdio_remove_input_queues(irq_ptr); 1245 qdio_shutdown_queues(cdev); 1246 qdio_shutdown_debug_entries(irq_ptr, cdev); 1247 1248 /* cleanup subchannel */ 1249 spin_lock_irqsave(get_ccwdev_lock(cdev), flags); 1250 1251 if (how & QDIO_FLAG_CLEANUP_USING_CLEAR) 1252 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP); 1253 else 1254 /* default behaviour is halt */ 1255 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP); 1256 if (rc) { 1257 DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no); 1258 DBF_ERROR("rc:%4d", rc); 1259 goto no_cleanup; 1260 } 1261 1262 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP); 1263 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags); 1264 wait_event_interruptible_timeout(cdev->private->wait_q, 1265 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE || 1266 irq_ptr->state == QDIO_IRQ_STATE_ERR, 1267 10 * HZ); 1268 spin_lock_irqsave(get_ccwdev_lock(cdev), flags); 1269 1270 no_cleanup: 1271 qdio_shutdown_thinint(irq_ptr); 1272 1273 /* restore interrupt handler */ 1274 if ((void *)cdev->handler == (void *)qdio_int_handler) 1275 cdev->handler = irq_ptr->orig_handler; 1276 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags); 1277 1278 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); 1279 mutex_unlock(&irq_ptr->setup_mutex); 1280 if (rc) 1281 return rc; 1282 return 0; 1283 } 1284 EXPORT_SYMBOL_GPL(qdio_shutdown); 1285 1286 /** 1287 * qdio_free - free data structures for a qdio subchannel 1288 * @cdev: associated ccw device 1289 */ 1290 int qdio_free(struct ccw_device *cdev) 1291 { 1292 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1293 1294 if (!irq_ptr) 1295 return -ENODEV; 1296 1297 DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no); 1298 mutex_lock(&irq_ptr->setup_mutex); 1299 1300 if (irq_ptr->debug_area != NULL) { 1301 debug_unregister(irq_ptr->debug_area); 1302 irq_ptr->debug_area = NULL; 1303 } 1304 cdev->private->qdio_data = NULL; 1305 mutex_unlock(&irq_ptr->setup_mutex); 1306 1307 qdio_release_memory(irq_ptr); 1308 return 0; 1309 } 1310 EXPORT_SYMBOL_GPL(qdio_free); 1311 1312 /** 1313 * qdio_allocate - allocate qdio queues and associated data 1314 * @init_data: initialization data 1315 */ 1316 int qdio_allocate(struct qdio_initialize *init_data) 1317 { 1318 struct qdio_irq *irq_ptr; 1319 1320 DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no); 1321 1322 if ((init_data->no_input_qs && !init_data->input_handler) || 1323 (init_data->no_output_qs && !init_data->output_handler)) 1324 return -EINVAL; 1325 1326 if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) || 1327 (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ)) 1328 return -EINVAL; 1329 1330 if ((!init_data->input_sbal_addr_array) || 1331 (!init_data->output_sbal_addr_array)) 1332 return -EINVAL; 1333 1334 /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */ 1335 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA); 1336 if (!irq_ptr) 1337 goto out_err; 1338 1339 mutex_init(&irq_ptr->setup_mutex); 1340 qdio_allocate_dbf(init_data, irq_ptr); 1341 1342 /* 1343 * Allocate a page for the chsc calls in qdio_establish. 1344 * Must be pre-allocated since a zfcp recovery will call 1345 * qdio_establish. In case of low memory and swap on a zfcp disk 1346 * we may not be able to allocate memory otherwise. 1347 */ 1348 irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL); 1349 if (!irq_ptr->chsc_page) 1350 goto out_rel; 1351 1352 /* qdr is used in ccw1.cda which is u32 */ 1353 irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA); 1354 if (!irq_ptr->qdr) 1355 goto out_rel; 1356 WARN_ON((unsigned long)irq_ptr->qdr & 0xfff); 1357 1358 if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs, 1359 init_data->no_output_qs)) 1360 goto out_rel; 1361 1362 init_data->cdev->private->qdio_data = irq_ptr; 1363 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); 1364 return 0; 1365 out_rel: 1366 qdio_release_memory(irq_ptr); 1367 out_err: 1368 return -ENOMEM; 1369 } 1370 EXPORT_SYMBOL_GPL(qdio_allocate); 1371 1372 static void qdio_detect_hsicq(struct qdio_irq *irq_ptr) 1373 { 1374 struct qdio_q *q = irq_ptr->input_qs[0]; 1375 int i, use_cq = 0; 1376 1377 if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT) 1378 use_cq = 1; 1379 1380 for_each_output_queue(irq_ptr, q, i) { 1381 if (use_cq) { 1382 if (qdio_enable_async_operation(&q->u.out) < 0) { 1383 use_cq = 0; 1384 continue; 1385 } 1386 } else 1387 qdio_disable_async_operation(&q->u.out); 1388 } 1389 DBF_EVENT("use_cq:%d", use_cq); 1390 } 1391 1392 /** 1393 * qdio_establish - establish queues on a qdio subchannel 1394 * @init_data: initialization data 1395 */ 1396 int qdio_establish(struct qdio_initialize *init_data) 1397 { 1398 struct qdio_irq *irq_ptr; 1399 struct ccw_device *cdev = init_data->cdev; 1400 unsigned long saveflags; 1401 int rc; 1402 1403 DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no); 1404 1405 irq_ptr = cdev->private->qdio_data; 1406 if (!irq_ptr) 1407 return -ENODEV; 1408 1409 if (cdev->private->state != DEV_STATE_ONLINE) 1410 return -EINVAL; 1411 1412 mutex_lock(&irq_ptr->setup_mutex); 1413 qdio_setup_irq(init_data); 1414 1415 rc = qdio_establish_thinint(irq_ptr); 1416 if (rc) { 1417 mutex_unlock(&irq_ptr->setup_mutex); 1418 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); 1419 return rc; 1420 } 1421 1422 /* establish q */ 1423 irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd; 1424 irq_ptr->ccw.flags = CCW_FLAG_SLI; 1425 irq_ptr->ccw.count = irq_ptr->equeue.count; 1426 irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr); 1427 1428 spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags); 1429 ccw_device_set_options_mask(cdev, 0); 1430 1431 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0); 1432 if (rc) { 1433 DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no); 1434 DBF_ERROR("rc:%4x", rc); 1435 } 1436 spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags); 1437 1438 if (rc) { 1439 mutex_unlock(&irq_ptr->setup_mutex); 1440 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); 1441 return rc; 1442 } 1443 1444 wait_event_interruptible_timeout(cdev->private->wait_q, 1445 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED || 1446 irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ); 1447 1448 if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) { 1449 mutex_unlock(&irq_ptr->setup_mutex); 1450 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); 1451 return -EIO; 1452 } 1453 1454 qdio_setup_ssqd_info(irq_ptr); 1455 DBF_EVENT("qib ac:%4x", irq_ptr->qib.ac); 1456 1457 qdio_detect_hsicq(irq_ptr); 1458 1459 /* qebsm is now setup if available, initialize buffer states */ 1460 qdio_init_buf_states(irq_ptr); 1461 1462 mutex_unlock(&irq_ptr->setup_mutex); 1463 qdio_print_subchannel_info(irq_ptr, cdev); 1464 qdio_setup_debug_entries(irq_ptr, cdev); 1465 return 0; 1466 } 1467 EXPORT_SYMBOL_GPL(qdio_establish); 1468 1469 /** 1470 * qdio_activate - activate queues on a qdio subchannel 1471 * @cdev: associated cdev 1472 */ 1473 int qdio_activate(struct ccw_device *cdev) 1474 { 1475 struct qdio_irq *irq_ptr; 1476 int rc; 1477 unsigned long saveflags; 1478 1479 DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no); 1480 1481 irq_ptr = cdev->private->qdio_data; 1482 if (!irq_ptr) 1483 return -ENODEV; 1484 1485 if (cdev->private->state != DEV_STATE_ONLINE) 1486 return -EINVAL; 1487 1488 mutex_lock(&irq_ptr->setup_mutex); 1489 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) { 1490 rc = -EBUSY; 1491 goto out; 1492 } 1493 1494 irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd; 1495 irq_ptr->ccw.flags = CCW_FLAG_SLI; 1496 irq_ptr->ccw.count = irq_ptr->aqueue.count; 1497 irq_ptr->ccw.cda = 0; 1498 1499 spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags); 1500 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL); 1501 1502 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE, 1503 0, DOIO_DENY_PREFETCH); 1504 if (rc) { 1505 DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no); 1506 DBF_ERROR("rc:%4x", rc); 1507 } 1508 spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags); 1509 1510 if (rc) 1511 goto out; 1512 1513 if (is_thinint_irq(irq_ptr)) 1514 tiqdio_add_input_queues(irq_ptr); 1515 1516 /* wait for subchannel to become active */ 1517 msleep(5); 1518 1519 switch (irq_ptr->state) { 1520 case QDIO_IRQ_STATE_STOPPED: 1521 case QDIO_IRQ_STATE_ERR: 1522 rc = -EIO; 1523 break; 1524 default: 1525 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE); 1526 rc = 0; 1527 } 1528 out: 1529 mutex_unlock(&irq_ptr->setup_mutex); 1530 return rc; 1531 } 1532 EXPORT_SYMBOL_GPL(qdio_activate); 1533 1534 static inline int buf_in_between(int bufnr, int start, int count) 1535 { 1536 int end = add_buf(start, count); 1537 1538 if (end > start) { 1539 if (bufnr >= start && bufnr < end) 1540 return 1; 1541 else 1542 return 0; 1543 } 1544 1545 /* wrap-around case */ 1546 if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) || 1547 (bufnr < end)) 1548 return 1; 1549 else 1550 return 0; 1551 } 1552 1553 /** 1554 * handle_inbound - reset processed input buffers 1555 * @q: queue containing the buffers 1556 * @callflags: flags 1557 * @bufnr: first buffer to process 1558 * @count: how many buffers are emptied 1559 */ 1560 static int handle_inbound(struct qdio_q *q, unsigned int callflags, 1561 int bufnr, int count) 1562 { 1563 int used, diff; 1564 1565 qperf_inc(q, inbound_call); 1566 1567 if (!q->u.in.polling) 1568 goto set; 1569 1570 /* protect against stop polling setting an ACK for an emptied slsb */ 1571 if (count == QDIO_MAX_BUFFERS_PER_Q) { 1572 /* overwriting everything, just delete polling status */ 1573 q->u.in.polling = 0; 1574 q->u.in.ack_count = 0; 1575 goto set; 1576 } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) { 1577 if (is_qebsm(q)) { 1578 /* partial overwrite, just update ack_start */ 1579 diff = add_buf(bufnr, count); 1580 diff = sub_buf(diff, q->u.in.ack_start); 1581 q->u.in.ack_count -= diff; 1582 if (q->u.in.ack_count <= 0) { 1583 q->u.in.polling = 0; 1584 q->u.in.ack_count = 0; 1585 goto set; 1586 } 1587 q->u.in.ack_start = add_buf(q->u.in.ack_start, diff); 1588 } 1589 else 1590 /* the only ACK will be deleted, so stop polling */ 1591 q->u.in.polling = 0; 1592 } 1593 1594 set: 1595 count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count); 1596 1597 used = atomic_add_return(count, &q->nr_buf_used) - count; 1598 BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q); 1599 1600 if (need_siga_in(q)) 1601 return qdio_siga_input(q); 1602 1603 return 0; 1604 } 1605 1606 /** 1607 * handle_outbound - process filled outbound buffers 1608 * @q: queue containing the buffers 1609 * @callflags: flags 1610 * @bufnr: first buffer to process 1611 * @count: how many buffers are filled 1612 */ 1613 static int handle_outbound(struct qdio_q *q, unsigned int callflags, 1614 int bufnr, int count) 1615 { 1616 unsigned char state = 0; 1617 int used, rc = 0; 1618 1619 qperf_inc(q, outbound_call); 1620 1621 count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count); 1622 used = atomic_add_return(count, &q->nr_buf_used); 1623 BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q); 1624 1625 if (used == QDIO_MAX_BUFFERS_PER_Q) 1626 qperf_inc(q, outbound_queue_full); 1627 1628 if (callflags & QDIO_FLAG_PCI_OUT) { 1629 q->u.out.pci_out_enabled = 1; 1630 qperf_inc(q, pci_request_int); 1631 } else 1632 q->u.out.pci_out_enabled = 0; 1633 1634 if (queue_type(q) == QDIO_IQDIO_QFMT) { 1635 unsigned long phys_aob = 0; 1636 1637 /* One SIGA-W per buffer required for unicast HSI */ 1638 WARN_ON_ONCE(count > 1 && !multicast_outbound(q)); 1639 1640 phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr); 1641 1642 rc = qdio_kick_outbound_q(q, phys_aob); 1643 } else if (need_siga_sync(q)) { 1644 rc = qdio_siga_sync_q(q); 1645 } else { 1646 /* try to fast requeue buffers */ 1647 get_buf_state(q, prev_buf(bufnr), &state, 0); 1648 if (state != SLSB_CU_OUTPUT_PRIMED) 1649 rc = qdio_kick_outbound_q(q, 0); 1650 else 1651 qperf_inc(q, fast_requeue); 1652 } 1653 1654 /* in case of SIGA errors we must process the error immediately */ 1655 if (used >= q->u.out.scan_threshold || rc) 1656 tasklet_schedule(&q->tasklet); 1657 else 1658 /* free the SBALs in case of no further traffic */ 1659 if (!timer_pending(&q->u.out.timer)) 1660 mod_timer(&q->u.out.timer, jiffies + HZ); 1661 return rc; 1662 } 1663 1664 /** 1665 * do_QDIO - process input or output buffers 1666 * @cdev: associated ccw_device for the qdio subchannel 1667 * @callflags: input or output and special flags from the program 1668 * @q_nr: queue number 1669 * @bufnr: buffer number 1670 * @count: how many buffers to process 1671 */ 1672 int do_QDIO(struct ccw_device *cdev, unsigned int callflags, 1673 int q_nr, unsigned int bufnr, unsigned int count) 1674 { 1675 struct qdio_irq *irq_ptr; 1676 1677 1678 if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q) 1679 return -EINVAL; 1680 1681 irq_ptr = cdev->private->qdio_data; 1682 if (!irq_ptr) 1683 return -ENODEV; 1684 1685 DBF_DEV_EVENT(DBF_INFO, irq_ptr, 1686 "do%02x b:%02x c:%02x", callflags, bufnr, count); 1687 1688 if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE) 1689 return -EBUSY; 1690 if (!count) 1691 return 0; 1692 if (callflags & QDIO_FLAG_SYNC_INPUT) 1693 return handle_inbound(irq_ptr->input_qs[q_nr], 1694 callflags, bufnr, count); 1695 else if (callflags & QDIO_FLAG_SYNC_OUTPUT) 1696 return handle_outbound(irq_ptr->output_qs[q_nr], 1697 callflags, bufnr, count); 1698 return -EINVAL; 1699 } 1700 EXPORT_SYMBOL_GPL(do_QDIO); 1701 1702 /** 1703 * qdio_start_irq - process input buffers 1704 * @cdev: associated ccw_device for the qdio subchannel 1705 * @nr: input queue number 1706 * 1707 * Return codes 1708 * 0 - success 1709 * 1 - irqs not started since new data is available 1710 */ 1711 int qdio_start_irq(struct ccw_device *cdev, int nr) 1712 { 1713 struct qdio_q *q; 1714 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1715 1716 if (!irq_ptr) 1717 return -ENODEV; 1718 q = irq_ptr->input_qs[nr]; 1719 1720 WARN_ON(queue_irqs_enabled(q)); 1721 1722 if (!shared_ind(q)) 1723 xchg(q->irq_ptr->dsci, 0); 1724 1725 qdio_stop_polling(q); 1726 clear_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state); 1727 1728 /* 1729 * We need to check again to not lose initiative after 1730 * resetting the ACK state. 1731 */ 1732 if (!shared_ind(q) && *q->irq_ptr->dsci) 1733 goto rescan; 1734 if (!qdio_inbound_q_done(q)) 1735 goto rescan; 1736 return 0; 1737 1738 rescan: 1739 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED, 1740 &q->u.in.queue_irq_state)) 1741 return 0; 1742 else 1743 return 1; 1744 1745 } 1746 EXPORT_SYMBOL(qdio_start_irq); 1747 1748 /** 1749 * qdio_get_next_buffers - process input buffers 1750 * @cdev: associated ccw_device for the qdio subchannel 1751 * @nr: input queue number 1752 * @bufnr: first filled buffer number 1753 * @error: buffers are in error state 1754 * 1755 * Return codes 1756 * < 0 - error 1757 * = 0 - no new buffers found 1758 * > 0 - number of processed buffers 1759 */ 1760 int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr, 1761 int *error) 1762 { 1763 struct qdio_q *q; 1764 int start, end; 1765 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1766 1767 if (!irq_ptr) 1768 return -ENODEV; 1769 q = irq_ptr->input_qs[nr]; 1770 WARN_ON(queue_irqs_enabled(q)); 1771 1772 /* 1773 * Cannot rely on automatic sync after interrupt since queues may 1774 * also be examined without interrupt. 1775 */ 1776 if (need_siga_sync(q)) 1777 qdio_sync_queues(q); 1778 1779 /* check the PCI capable outbound queues. */ 1780 qdio_check_outbound_after_thinint(q); 1781 1782 if (!qdio_inbound_q_moved(q)) 1783 return 0; 1784 1785 /* Note: upper-layer MUST stop processing immediately here ... */ 1786 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)) 1787 return -EIO; 1788 1789 start = q->first_to_kick; 1790 end = q->first_to_check; 1791 *bufnr = start; 1792 *error = q->qdio_error; 1793 1794 /* for the next time */ 1795 q->first_to_kick = end; 1796 q->qdio_error = 0; 1797 return sub_buf(end, start); 1798 } 1799 EXPORT_SYMBOL(qdio_get_next_buffers); 1800 1801 /** 1802 * qdio_stop_irq - disable interrupt processing for the device 1803 * @cdev: associated ccw_device for the qdio subchannel 1804 * @nr: input queue number 1805 * 1806 * Return codes 1807 * 0 - interrupts were already disabled 1808 * 1 - interrupts successfully disabled 1809 */ 1810 int qdio_stop_irq(struct ccw_device *cdev, int nr) 1811 { 1812 struct qdio_q *q; 1813 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1814 1815 if (!irq_ptr) 1816 return -ENODEV; 1817 q = irq_ptr->input_qs[nr]; 1818 1819 if (test_and_set_bit(QDIO_QUEUE_IRQS_DISABLED, 1820 &q->u.in.queue_irq_state)) 1821 return 0; 1822 else 1823 return 1; 1824 } 1825 EXPORT_SYMBOL(qdio_stop_irq); 1826 1827 static int __init init_QDIO(void) 1828 { 1829 int rc; 1830 1831 rc = qdio_debug_init(); 1832 if (rc) 1833 return rc; 1834 rc = qdio_setup_init(); 1835 if (rc) 1836 goto out_debug; 1837 rc = tiqdio_allocate_memory(); 1838 if (rc) 1839 goto out_cache; 1840 rc = tiqdio_register_thinints(); 1841 if (rc) 1842 goto out_ti; 1843 return 0; 1844 1845 out_ti: 1846 tiqdio_free_memory(); 1847 out_cache: 1848 qdio_setup_exit(); 1849 out_debug: 1850 qdio_debug_exit(); 1851 return rc; 1852 } 1853 1854 static void __exit exit_QDIO(void) 1855 { 1856 tiqdio_unregister_thinints(); 1857 tiqdio_free_memory(); 1858 qdio_setup_exit(); 1859 qdio_debug_exit(); 1860 } 1861 1862 module_init(init_QDIO); 1863 module_exit(exit_QDIO); 1864