1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Linux for s390 qdio support, buffer handling, qdio API and module support. 4 * 5 * Copyright IBM Corp. 2000, 2008 6 * Author(s): Utz Bacher <utz.bacher@de.ibm.com> 7 * Jan Glauber <jang@linux.vnet.ibm.com> 8 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com> 9 */ 10 #include <linux/module.h> 11 #include <linux/init.h> 12 #include <linux/kernel.h> 13 #include <linux/timer.h> 14 #include <linux/delay.h> 15 #include <linux/gfp.h> 16 #include <linux/io.h> 17 #include <linux/atomic.h> 18 #include <asm/debug.h> 19 #include <asm/qdio.h> 20 #include <asm/ipl.h> 21 22 #include "cio.h" 23 #include "css.h" 24 #include "device.h" 25 #include "qdio.h" 26 #include "qdio_debug.h" 27 28 MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\ 29 "Jan Glauber <jang@linux.vnet.ibm.com>"); 30 MODULE_DESCRIPTION("QDIO base support"); 31 MODULE_LICENSE("GPL"); 32 33 static inline int do_siga_sync(unsigned long schid, 34 unsigned int out_mask, unsigned int in_mask, 35 unsigned int fc) 36 { 37 register unsigned long __fc asm ("0") = fc; 38 register unsigned long __schid asm ("1") = schid; 39 register unsigned long out asm ("2") = out_mask; 40 register unsigned long in asm ("3") = in_mask; 41 int cc; 42 43 asm volatile( 44 " siga 0\n" 45 " ipm %0\n" 46 " srl %0,28\n" 47 : "=d" (cc) 48 : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc"); 49 return cc; 50 } 51 52 static inline int do_siga_input(unsigned long schid, unsigned int mask, 53 unsigned int fc) 54 { 55 register unsigned long __fc asm ("0") = fc; 56 register unsigned long __schid asm ("1") = schid; 57 register unsigned long __mask asm ("2") = mask; 58 int cc; 59 60 asm volatile( 61 " siga 0\n" 62 " ipm %0\n" 63 " srl %0,28\n" 64 : "=d" (cc) 65 : "d" (__fc), "d" (__schid), "d" (__mask) : "cc"); 66 return cc; 67 } 68 69 /** 70 * do_siga_output - perform SIGA-w/wt function 71 * @schid: subchannel id or in case of QEBSM the subchannel token 72 * @mask: which output queues to process 73 * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer 74 * @fc: function code to perform 75 * @aob: asynchronous operation block 76 * 77 * Returns condition code. 78 * Note: For IQDC unicast queues only the highest priority queue is processed. 79 */ 80 static inline int do_siga_output(unsigned long schid, unsigned long mask, 81 unsigned int *bb, unsigned int fc, 82 unsigned long aob) 83 { 84 register unsigned long __fc asm("0") = fc; 85 register unsigned long __schid asm("1") = schid; 86 register unsigned long __mask asm("2") = mask; 87 register unsigned long __aob asm("3") = aob; 88 int cc; 89 90 asm volatile( 91 " siga 0\n" 92 " ipm %0\n" 93 " srl %0,28\n" 94 : "=d" (cc), "+d" (__fc), "+d" (__aob) 95 : "d" (__schid), "d" (__mask) 96 : "cc"); 97 *bb = __fc >> 31; 98 return cc; 99 } 100 101 /** 102 * qdio_do_eqbs - extract buffer states for QEBSM 103 * @q: queue to manipulate 104 * @state: state of the extracted buffers 105 * @start: buffer number to start at 106 * @count: count of buffers to examine 107 * @auto_ack: automatically acknowledge buffers 108 * 109 * Returns the number of successfully extracted equal buffer states. 110 * Stops processing if a state is different from the last buffers state. 111 */ 112 static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state, 113 int start, int count, int auto_ack) 114 { 115 int tmp_count = count, tmp_start = start, nr = q->nr; 116 unsigned int ccq = 0; 117 118 qperf_inc(q, eqbs); 119 120 if (!q->is_input_q) 121 nr += q->irq_ptr->nr_input_qs; 122 again: 123 ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count, 124 auto_ack); 125 126 switch (ccq) { 127 case 0: 128 case 32: 129 /* all done, or next buffer state different */ 130 return count - tmp_count; 131 case 96: 132 /* not all buffers processed */ 133 qperf_inc(q, eqbs_partial); 134 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "EQBS part:%02x", 135 tmp_count); 136 return count - tmp_count; 137 case 97: 138 /* no buffer processed */ 139 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq); 140 goto again; 141 default: 142 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq); 143 DBF_ERROR("%4x EQBS ERROR", SCH_NO(q)); 144 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr); 145 q->handler(q->irq_ptr->cdev, QDIO_ERROR_GET_BUF_STATE, q->nr, 146 q->first_to_check, count, q->irq_ptr->int_parm); 147 return 0; 148 } 149 } 150 151 /** 152 * qdio_do_sqbs - set buffer states for QEBSM 153 * @q: queue to manipulate 154 * @state: new state of the buffers 155 * @start: first buffer number to change 156 * @count: how many buffers to change 157 * 158 * Returns the number of successfully changed buffers. 159 * Does retrying until the specified count of buffer states is set or an 160 * error occurs. 161 */ 162 static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start, 163 int count) 164 { 165 unsigned int ccq = 0; 166 int tmp_count = count, tmp_start = start; 167 int nr = q->nr; 168 169 if (!count) 170 return 0; 171 qperf_inc(q, sqbs); 172 173 if (!q->is_input_q) 174 nr += q->irq_ptr->nr_input_qs; 175 again: 176 ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count); 177 178 switch (ccq) { 179 case 0: 180 case 32: 181 /* all done, or active buffer adapter-owned */ 182 WARN_ON_ONCE(tmp_count); 183 return count - tmp_count; 184 case 96: 185 /* not all buffers processed */ 186 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq); 187 qperf_inc(q, sqbs_partial); 188 goto again; 189 default: 190 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq); 191 DBF_ERROR("%4x SQBS ERROR", SCH_NO(q)); 192 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr); 193 q->handler(q->irq_ptr->cdev, QDIO_ERROR_SET_BUF_STATE, q->nr, 194 q->first_to_check, count, q->irq_ptr->int_parm); 195 return 0; 196 } 197 } 198 199 /* 200 * Returns number of examined buffers and their common state in *state. 201 * Requested number of buffers-to-examine must be > 0. 202 */ 203 static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr, 204 unsigned char *state, unsigned int count, 205 int auto_ack) 206 { 207 unsigned char __state = 0; 208 int i = 1; 209 210 if (is_qebsm(q)) 211 return qdio_do_eqbs(q, state, bufnr, count, auto_ack); 212 213 /* get initial state: */ 214 __state = q->slsb.val[bufnr]; 215 216 /* Bail out early if there is no work on the queue: */ 217 if (__state & SLSB_OWNER_CU) 218 goto out; 219 220 for (; i < count; i++) { 221 bufnr = next_buf(bufnr); 222 223 /* stop if next state differs from initial state: */ 224 if (q->slsb.val[bufnr] != __state) 225 break; 226 } 227 228 out: 229 *state = __state; 230 return i; 231 } 232 233 static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr, 234 unsigned char *state, int auto_ack) 235 { 236 return get_buf_states(q, bufnr, state, 1, auto_ack); 237 } 238 239 /* wrap-around safe setting of slsb states, returns number of changed buffers */ 240 static inline int set_buf_states(struct qdio_q *q, int bufnr, 241 unsigned char state, int count) 242 { 243 int i; 244 245 if (is_qebsm(q)) 246 return qdio_do_sqbs(q, state, bufnr, count); 247 248 /* Ensure that all preceding changes to the SBALs are visible: */ 249 mb(); 250 251 for (i = 0; i < count; i++) { 252 WRITE_ONCE(q->slsb.val[bufnr], state); 253 bufnr = next_buf(bufnr); 254 } 255 256 /* Make our SLSB changes visible: */ 257 mb(); 258 259 return count; 260 } 261 262 static inline int set_buf_state(struct qdio_q *q, int bufnr, 263 unsigned char state) 264 { 265 return set_buf_states(q, bufnr, state, 1); 266 } 267 268 /* set slsb states to initial state */ 269 static void qdio_init_buf_states(struct qdio_irq *irq_ptr) 270 { 271 struct qdio_q *q; 272 int i; 273 274 for_each_input_queue(irq_ptr, q, i) 275 set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT, 276 QDIO_MAX_BUFFERS_PER_Q); 277 for_each_output_queue(irq_ptr, q, i) 278 set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT, 279 QDIO_MAX_BUFFERS_PER_Q); 280 } 281 282 static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output, 283 unsigned int input) 284 { 285 unsigned long schid = *((u32 *) &q->irq_ptr->schid); 286 unsigned int fc = QDIO_SIGA_SYNC; 287 int cc; 288 289 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr); 290 qperf_inc(q, siga_sync); 291 292 if (is_qebsm(q)) { 293 schid = q->irq_ptr->sch_token; 294 fc |= QDIO_SIGA_QEBSM_FLAG; 295 } 296 297 cc = do_siga_sync(schid, output, input, fc); 298 if (unlikely(cc)) 299 DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc); 300 return (cc) ? -EIO : 0; 301 } 302 303 static inline int qdio_siga_sync_q(struct qdio_q *q) 304 { 305 if (q->is_input_q) 306 return qdio_siga_sync(q, 0, q->mask); 307 else 308 return qdio_siga_sync(q, q->mask, 0); 309 } 310 311 static int qdio_siga_output(struct qdio_q *q, unsigned int count, 312 unsigned int *busy_bit, unsigned long aob) 313 { 314 unsigned long schid = *((u32 *) &q->irq_ptr->schid); 315 unsigned int fc = QDIO_SIGA_WRITE; 316 u64 start_time = 0; 317 int retries = 0, cc; 318 319 if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q)) { 320 if (count > 1) 321 fc = QDIO_SIGA_WRITEM; 322 else if (aob) 323 fc = QDIO_SIGA_WRITEQ; 324 } 325 326 if (is_qebsm(q)) { 327 schid = q->irq_ptr->sch_token; 328 fc |= QDIO_SIGA_QEBSM_FLAG; 329 } 330 again: 331 cc = do_siga_output(schid, q->mask, busy_bit, fc, aob); 332 333 /* hipersocket busy condition */ 334 if (unlikely(*busy_bit)) { 335 retries++; 336 337 if (!start_time) { 338 start_time = get_tod_clock_fast(); 339 goto again; 340 } 341 if (get_tod_clock_fast() - start_time < QDIO_BUSY_BIT_PATIENCE) 342 goto again; 343 } 344 if (retries) { 345 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, 346 "%4x cc2 BB1:%1d", SCH_NO(q), q->nr); 347 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries); 348 } 349 return cc; 350 } 351 352 static inline int qdio_siga_input(struct qdio_q *q) 353 { 354 unsigned long schid = *((u32 *) &q->irq_ptr->schid); 355 unsigned int fc = QDIO_SIGA_READ; 356 int cc; 357 358 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr); 359 qperf_inc(q, siga_read); 360 361 if (is_qebsm(q)) { 362 schid = q->irq_ptr->sch_token; 363 fc |= QDIO_SIGA_QEBSM_FLAG; 364 } 365 366 cc = do_siga_input(schid, q->mask, fc); 367 if (unlikely(cc)) 368 DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc); 369 return (cc) ? -EIO : 0; 370 } 371 372 #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0) 373 #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U) 374 375 static inline void qdio_sync_queues(struct qdio_q *q) 376 { 377 /* PCI capable outbound queues will also be scanned so sync them too */ 378 if (pci_out_supported(q->irq_ptr)) 379 qdio_siga_sync_all(q); 380 else 381 qdio_siga_sync_q(q); 382 } 383 384 int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr, 385 unsigned char *state) 386 { 387 if (need_siga_sync(q)) 388 qdio_siga_sync_q(q); 389 return get_buf_state(q, bufnr, state, 0); 390 } 391 392 static inline void qdio_stop_polling(struct qdio_q *q) 393 { 394 if (!q->u.in.batch_count) 395 return; 396 397 qperf_inc(q, stop_polling); 398 399 /* show the card that we are not polling anymore */ 400 set_buf_states(q, q->u.in.batch_start, SLSB_P_INPUT_NOT_INIT, 401 q->u.in.batch_count); 402 q->u.in.batch_count = 0; 403 } 404 405 static inline void account_sbals(struct qdio_q *q, unsigned int count) 406 { 407 q->q_stats.nr_sbal_total += count; 408 q->q_stats.nr_sbals[ilog2(count)]++; 409 } 410 411 static void process_buffer_error(struct qdio_q *q, unsigned int start, 412 int count) 413 { 414 /* special handling for no target buffer empty */ 415 if (queue_type(q) == QDIO_IQDIO_QFMT && !q->is_input_q && 416 q->sbal[start]->element[15].sflags == 0x10) { 417 qperf_inc(q, target_full); 418 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x", start); 419 return; 420 } 421 422 DBF_ERROR("%4x BUF ERROR", SCH_NO(q)); 423 DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr); 424 DBF_ERROR("FTC:%3d C:%3d", start, count); 425 DBF_ERROR("F14:%2x F15:%2x", 426 q->sbal[start]->element[14].sflags, 427 q->sbal[start]->element[15].sflags); 428 } 429 430 static inline void inbound_handle_work(struct qdio_q *q, unsigned int start, 431 int count, bool auto_ack) 432 { 433 /* ACK the newest SBAL: */ 434 if (!auto_ack) 435 set_buf_state(q, add_buf(start, count - 1), SLSB_P_INPUT_ACK); 436 437 if (!q->u.in.batch_count) 438 q->u.in.batch_start = start; 439 q->u.in.batch_count += count; 440 } 441 442 static int get_inbound_buffer_frontier(struct qdio_q *q, unsigned int start, 443 unsigned int *error) 444 { 445 unsigned char state = 0; 446 int count; 447 448 q->timestamp = get_tod_clock_fast(); 449 450 count = atomic_read(&q->nr_buf_used); 451 if (!count) 452 return 0; 453 454 /* 455 * No siga sync here, as a PCI or we after a thin interrupt 456 * already sync'ed the queues. 457 */ 458 count = get_buf_states(q, start, &state, count, 1); 459 if (!count) 460 return 0; 461 462 switch (state) { 463 case SLSB_P_INPUT_PRIMED: 464 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim:%1d %02x", q->nr, 465 count); 466 467 inbound_handle_work(q, start, count, is_qebsm(q)); 468 if (atomic_sub_return(count, &q->nr_buf_used) == 0) 469 qperf_inc(q, inbound_queue_full); 470 if (q->irq_ptr->perf_stat_enabled) 471 account_sbals(q, count); 472 return count; 473 case SLSB_P_INPUT_ERROR: 474 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in err:%1d %02x", q->nr, 475 count); 476 477 *error = QDIO_ERROR_SLSB_STATE; 478 process_buffer_error(q, start, count); 479 inbound_handle_work(q, start, count, false); 480 if (atomic_sub_return(count, &q->nr_buf_used) == 0) 481 qperf_inc(q, inbound_queue_full); 482 if (q->irq_ptr->perf_stat_enabled) 483 account_sbals_error(q, count); 484 return count; 485 case SLSB_CU_INPUT_EMPTY: 486 if (q->irq_ptr->perf_stat_enabled) 487 q->q_stats.nr_sbal_nop++; 488 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop:%1d %#02x", 489 q->nr, start); 490 return 0; 491 case SLSB_P_INPUT_NOT_INIT: 492 case SLSB_P_INPUT_ACK: 493 /* We should never see this state, throw a WARN: */ 494 default: 495 dev_WARN_ONCE(&q->irq_ptr->cdev->dev, 1, 496 "found state %#x at index %u on queue %u\n", 497 state, start, q->nr); 498 return 0; 499 } 500 } 501 502 static inline int qdio_inbound_q_done(struct qdio_q *q, unsigned int start) 503 { 504 unsigned char state = 0; 505 506 if (!atomic_read(&q->nr_buf_used)) 507 return 1; 508 509 if (need_siga_sync(q)) 510 qdio_siga_sync_q(q); 511 get_buf_state(q, start, &state, 0); 512 513 if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR) 514 /* more work coming */ 515 return 0; 516 517 return 1; 518 } 519 520 static inline int qdio_tasklet_schedule(struct qdio_q *q) 521 { 522 if (likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE)) { 523 tasklet_schedule(&q->u.out.tasklet); 524 return 0; 525 } 526 return -EPERM; 527 } 528 529 static int get_outbound_buffer_frontier(struct qdio_q *q, unsigned int start, 530 unsigned int *error) 531 { 532 unsigned char state = 0; 533 int count; 534 535 q->timestamp = get_tod_clock_fast(); 536 537 if (need_siga_sync(q)) 538 if (((queue_type(q) != QDIO_IQDIO_QFMT) && 539 !pci_out_supported(q->irq_ptr)) || 540 (queue_type(q) == QDIO_IQDIO_QFMT && 541 multicast_outbound(q))) 542 qdio_siga_sync_q(q); 543 544 count = atomic_read(&q->nr_buf_used); 545 if (!count) 546 return 0; 547 548 count = get_buf_states(q, start, &state, count, 0); 549 if (!count) 550 return 0; 551 552 switch (state) { 553 case SLSB_P_OUTPUT_PENDING: 554 *error = QDIO_ERROR_SLSB_PENDING; 555 fallthrough; 556 case SLSB_P_OUTPUT_EMPTY: 557 /* the adapter got it */ 558 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, 559 "out empty:%1d %02x", q->nr, count); 560 561 atomic_sub(count, &q->nr_buf_used); 562 if (q->irq_ptr->perf_stat_enabled) 563 account_sbals(q, count); 564 return count; 565 case SLSB_P_OUTPUT_ERROR: 566 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out error:%1d %02x", 567 q->nr, count); 568 569 *error = QDIO_ERROR_SLSB_STATE; 570 process_buffer_error(q, start, count); 571 atomic_sub(count, &q->nr_buf_used); 572 if (q->irq_ptr->perf_stat_enabled) 573 account_sbals_error(q, count); 574 return count; 575 case SLSB_CU_OUTPUT_PRIMED: 576 /* the adapter has not fetched the output yet */ 577 if (q->irq_ptr->perf_stat_enabled) 578 q->q_stats.nr_sbal_nop++; 579 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d", 580 q->nr); 581 return 0; 582 case SLSB_P_OUTPUT_HALTED: 583 return 0; 584 case SLSB_P_OUTPUT_NOT_INIT: 585 /* We should never see this state, throw a WARN: */ 586 default: 587 dev_WARN_ONCE(&q->irq_ptr->cdev->dev, 1, 588 "found state %#x at index %u on queue %u\n", 589 state, start, q->nr); 590 return 0; 591 } 592 } 593 594 /* all buffers processed? */ 595 static inline int qdio_outbound_q_done(struct qdio_q *q) 596 { 597 return atomic_read(&q->nr_buf_used) == 0; 598 } 599 600 static int qdio_kick_outbound_q(struct qdio_q *q, unsigned int count, 601 unsigned long aob) 602 { 603 int retries = 0, cc; 604 unsigned int busy_bit; 605 606 if (!need_siga_out(q)) 607 return 0; 608 609 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr); 610 retry: 611 qperf_inc(q, siga_write); 612 613 cc = qdio_siga_output(q, count, &busy_bit, aob); 614 switch (cc) { 615 case 0: 616 break; 617 case 2: 618 if (busy_bit) { 619 while (++retries < QDIO_BUSY_BIT_RETRIES) { 620 mdelay(QDIO_BUSY_BIT_RETRY_DELAY); 621 goto retry; 622 } 623 DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr); 624 cc = -EBUSY; 625 } else { 626 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr); 627 cc = -ENOBUFS; 628 } 629 break; 630 case 1: 631 case 3: 632 DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc); 633 cc = -EIO; 634 break; 635 } 636 if (retries) { 637 DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr); 638 DBF_ERROR("count:%u", retries); 639 } 640 return cc; 641 } 642 643 void qdio_outbound_tasklet(struct tasklet_struct *t) 644 { 645 struct qdio_output_q *out_q = from_tasklet(out_q, t, tasklet); 646 struct qdio_q *q = container_of(out_q, struct qdio_q, u.out); 647 unsigned int start = q->first_to_check; 648 unsigned int error = 0; 649 int count; 650 651 qperf_inc(q, tasklet_outbound); 652 WARN_ON_ONCE(atomic_read(&q->nr_buf_used) < 0); 653 654 count = get_outbound_buffer_frontier(q, start, &error); 655 if (count) { 656 q->first_to_check = add_buf(start, count); 657 658 if (q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE) { 659 qperf_inc(q, outbound_handler); 660 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x", 661 start, count); 662 663 q->handler(q->irq_ptr->cdev, error, q->nr, start, 664 count, q->irq_ptr->int_parm); 665 } 666 } 667 668 if (queue_type(q) == QDIO_ZFCP_QFMT && !pci_out_supported(q->irq_ptr) && 669 !qdio_outbound_q_done(q)) 670 goto sched; 671 672 if (q->u.out.pci_out_enabled) 673 return; 674 675 /* 676 * Now we know that queue type is either qeth without pci enabled 677 * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY 678 * is noticed and outbound_handler is called after some time. 679 */ 680 if (qdio_outbound_q_done(q)) 681 del_timer_sync(&q->u.out.timer); 682 else 683 if (!timer_pending(&q->u.out.timer) && 684 likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE)) 685 mod_timer(&q->u.out.timer, jiffies + 10 * HZ); 686 return; 687 688 sched: 689 qdio_tasklet_schedule(q); 690 } 691 692 void qdio_outbound_timer(struct timer_list *t) 693 { 694 struct qdio_q *q = from_timer(q, t, u.out.timer); 695 696 qdio_tasklet_schedule(q); 697 } 698 699 static inline void qdio_check_outbound_pci_queues(struct qdio_irq *irq) 700 { 701 struct qdio_q *out; 702 int i; 703 704 if (!pci_out_supported(irq) || !irq->scan_threshold) 705 return; 706 707 for_each_output_queue(irq, out, i) 708 if (!qdio_outbound_q_done(out)) 709 qdio_tasklet_schedule(out); 710 } 711 712 static inline void qdio_set_state(struct qdio_irq *irq_ptr, 713 enum qdio_irq_states state) 714 { 715 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state); 716 717 irq_ptr->state = state; 718 mb(); 719 } 720 721 static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb) 722 { 723 if (irb->esw.esw0.erw.cons) { 724 DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no); 725 DBF_ERROR_HEX(irb, 64); 726 DBF_ERROR_HEX(irb->ecw, 64); 727 } 728 } 729 730 /* PCI interrupt handler */ 731 static void qdio_int_handler_pci(struct qdio_irq *irq_ptr) 732 { 733 int i; 734 struct qdio_q *q; 735 736 if (unlikely(irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)) 737 return; 738 739 qdio_deliver_irq(irq_ptr); 740 irq_ptr->last_data_irq_time = S390_lowcore.int_clock; 741 742 if (!pci_out_supported(irq_ptr) || !irq_ptr->scan_threshold) 743 return; 744 745 for_each_output_queue(irq_ptr, q, i) { 746 if (qdio_outbound_q_done(q)) 747 continue; 748 if (need_siga_sync(q) && need_siga_sync_out_after_pci(q)) 749 qdio_siga_sync_q(q); 750 qdio_tasklet_schedule(q); 751 } 752 } 753 754 static void qdio_handle_activate_check(struct qdio_irq *irq_ptr, 755 unsigned long intparm, int cstat, 756 int dstat) 757 { 758 struct qdio_q *q; 759 760 DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no); 761 DBF_ERROR("intp :%lx", intparm); 762 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat); 763 764 if (irq_ptr->nr_input_qs) { 765 q = irq_ptr->input_qs[0]; 766 } else if (irq_ptr->nr_output_qs) { 767 q = irq_ptr->output_qs[0]; 768 } else { 769 dump_stack(); 770 goto no_handler; 771 } 772 773 q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE, 774 q->nr, q->first_to_check, 0, irq_ptr->int_parm); 775 no_handler: 776 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED); 777 /* 778 * In case of z/VM LGR (Live Guest Migration) QDIO recovery will happen. 779 * Therefore we call the LGR detection function here. 780 */ 781 lgr_info_log(); 782 } 783 784 static void qdio_establish_handle_irq(struct qdio_irq *irq_ptr, int cstat, 785 int dstat) 786 { 787 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq"); 788 789 if (cstat) 790 goto error; 791 if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END)) 792 goto error; 793 if (!(dstat & DEV_STAT_DEV_END)) 794 goto error; 795 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED); 796 return; 797 798 error: 799 DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no); 800 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat); 801 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR); 802 } 803 804 /* qdio interrupt handler */ 805 void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm, 806 struct irb *irb) 807 { 808 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 809 struct subchannel_id schid; 810 int cstat, dstat; 811 812 if (!intparm || !irq_ptr) { 813 ccw_device_get_schid(cdev, &schid); 814 DBF_ERROR("qint:%4x", schid.sch_no); 815 return; 816 } 817 818 if (irq_ptr->perf_stat_enabled) 819 irq_ptr->perf_stat.qdio_int++; 820 821 if (IS_ERR(irb)) { 822 DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no); 823 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR); 824 wake_up(&cdev->private->wait_q); 825 return; 826 } 827 qdio_irq_check_sense(irq_ptr, irb); 828 cstat = irb->scsw.cmd.cstat; 829 dstat = irb->scsw.cmd.dstat; 830 831 switch (irq_ptr->state) { 832 case QDIO_IRQ_STATE_INACTIVE: 833 qdio_establish_handle_irq(irq_ptr, cstat, dstat); 834 break; 835 case QDIO_IRQ_STATE_CLEANUP: 836 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); 837 break; 838 case QDIO_IRQ_STATE_ESTABLISHED: 839 case QDIO_IRQ_STATE_ACTIVE: 840 if (cstat & SCHN_STAT_PCI) { 841 qdio_int_handler_pci(irq_ptr); 842 return; 843 } 844 if (cstat || dstat) 845 qdio_handle_activate_check(irq_ptr, intparm, cstat, 846 dstat); 847 break; 848 case QDIO_IRQ_STATE_STOPPED: 849 break; 850 default: 851 WARN_ON_ONCE(1); 852 } 853 wake_up(&cdev->private->wait_q); 854 } 855 856 /** 857 * qdio_get_ssqd_desc - get qdio subchannel description 858 * @cdev: ccw device to get description for 859 * @data: where to store the ssqd 860 * 861 * Returns 0 or an error code. The results of the chsc are stored in the 862 * specified structure. 863 */ 864 int qdio_get_ssqd_desc(struct ccw_device *cdev, 865 struct qdio_ssqd_desc *data) 866 { 867 struct subchannel_id schid; 868 869 if (!cdev || !cdev->private) 870 return -EINVAL; 871 872 ccw_device_get_schid(cdev, &schid); 873 DBF_EVENT("get ssqd:%4x", schid.sch_no); 874 return qdio_setup_get_ssqd(NULL, &schid, data); 875 } 876 EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc); 877 878 static void qdio_shutdown_queues(struct qdio_irq *irq_ptr) 879 { 880 struct qdio_q *q; 881 int i; 882 883 for_each_output_queue(irq_ptr, q, i) { 884 del_timer_sync(&q->u.out.timer); 885 tasklet_kill(&q->u.out.tasklet); 886 } 887 } 888 889 /** 890 * qdio_shutdown - shut down a qdio subchannel 891 * @cdev: associated ccw device 892 * @how: use halt or clear to shutdown 893 */ 894 int qdio_shutdown(struct ccw_device *cdev, int how) 895 { 896 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 897 struct subchannel_id schid; 898 int rc; 899 900 if (!irq_ptr) 901 return -ENODEV; 902 903 WARN_ON_ONCE(irqs_disabled()); 904 ccw_device_get_schid(cdev, &schid); 905 DBF_EVENT("qshutdown:%4x", schid.sch_no); 906 907 mutex_lock(&irq_ptr->setup_mutex); 908 /* 909 * Subchannel was already shot down. We cannot prevent being called 910 * twice since cio may trigger a shutdown asynchronously. 911 */ 912 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) { 913 mutex_unlock(&irq_ptr->setup_mutex); 914 return 0; 915 } 916 917 /* 918 * Indicate that the device is going down. Scheduling the queue 919 * tasklets is forbidden from here on. 920 */ 921 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED); 922 923 qdio_shutdown_queues(irq_ptr); 924 qdio_shutdown_debug_entries(irq_ptr); 925 926 /* cleanup subchannel */ 927 spin_lock_irq(get_ccwdev_lock(cdev)); 928 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP); 929 if (how & QDIO_FLAG_CLEANUP_USING_CLEAR) 930 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP); 931 else 932 /* default behaviour is halt */ 933 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP); 934 spin_unlock_irq(get_ccwdev_lock(cdev)); 935 if (rc) { 936 DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no); 937 DBF_ERROR("rc:%4d", rc); 938 goto no_cleanup; 939 } 940 941 wait_event_interruptible_timeout(cdev->private->wait_q, 942 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE || 943 irq_ptr->state == QDIO_IRQ_STATE_ERR, 944 10 * HZ); 945 946 no_cleanup: 947 qdio_shutdown_thinint(irq_ptr); 948 qdio_shutdown_irq(irq_ptr); 949 950 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); 951 mutex_unlock(&irq_ptr->setup_mutex); 952 if (rc) 953 return rc; 954 return 0; 955 } 956 EXPORT_SYMBOL_GPL(qdio_shutdown); 957 958 /** 959 * qdio_free - free data structures for a qdio subchannel 960 * @cdev: associated ccw device 961 */ 962 int qdio_free(struct ccw_device *cdev) 963 { 964 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 965 struct subchannel_id schid; 966 967 if (!irq_ptr) 968 return -ENODEV; 969 970 ccw_device_get_schid(cdev, &schid); 971 DBF_EVENT("qfree:%4x", schid.sch_no); 972 DBF_DEV_EVENT(DBF_ERR, irq_ptr, "dbf abandoned"); 973 mutex_lock(&irq_ptr->setup_mutex); 974 975 irq_ptr->debug_area = NULL; 976 cdev->private->qdio_data = NULL; 977 mutex_unlock(&irq_ptr->setup_mutex); 978 979 qdio_free_queues(irq_ptr); 980 free_page((unsigned long) irq_ptr->qdr); 981 free_page(irq_ptr->chsc_page); 982 free_page((unsigned long) irq_ptr); 983 return 0; 984 } 985 EXPORT_SYMBOL_GPL(qdio_free); 986 987 /** 988 * qdio_allocate - allocate qdio queues and associated data 989 * @cdev: associated ccw device 990 * @no_input_qs: allocate this number of Input Queues 991 * @no_output_qs: allocate this number of Output Queues 992 */ 993 int qdio_allocate(struct ccw_device *cdev, unsigned int no_input_qs, 994 unsigned int no_output_qs) 995 { 996 struct subchannel_id schid; 997 struct qdio_irq *irq_ptr; 998 int rc = -ENOMEM; 999 1000 ccw_device_get_schid(cdev, &schid); 1001 DBF_EVENT("qallocate:%4x", schid.sch_no); 1002 1003 if (no_input_qs > QDIO_MAX_QUEUES_PER_IRQ || 1004 no_output_qs > QDIO_MAX_QUEUES_PER_IRQ) 1005 return -EINVAL; 1006 1007 /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */ 1008 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA); 1009 if (!irq_ptr) 1010 return -ENOMEM; 1011 1012 irq_ptr->cdev = cdev; 1013 mutex_init(&irq_ptr->setup_mutex); 1014 if (qdio_allocate_dbf(irq_ptr)) 1015 goto err_dbf; 1016 1017 DBF_DEV_EVENT(DBF_ERR, irq_ptr, "alloc niq:%1u noq:%1u", no_input_qs, 1018 no_output_qs); 1019 1020 /* 1021 * Allocate a page for the chsc calls in qdio_establish. 1022 * Must be pre-allocated since a zfcp recovery will call 1023 * qdio_establish. In case of low memory and swap on a zfcp disk 1024 * we may not be able to allocate memory otherwise. 1025 */ 1026 irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL); 1027 if (!irq_ptr->chsc_page) 1028 goto err_chsc; 1029 1030 /* qdr is used in ccw1.cda which is u32 */ 1031 irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA); 1032 if (!irq_ptr->qdr) 1033 goto err_qdr; 1034 1035 rc = qdio_allocate_qs(irq_ptr, no_input_qs, no_output_qs); 1036 if (rc) 1037 goto err_queues; 1038 1039 cdev->private->qdio_data = irq_ptr; 1040 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); 1041 return 0; 1042 1043 err_queues: 1044 free_page((unsigned long) irq_ptr->qdr); 1045 err_qdr: 1046 free_page(irq_ptr->chsc_page); 1047 err_chsc: 1048 err_dbf: 1049 free_page((unsigned long) irq_ptr); 1050 return rc; 1051 } 1052 EXPORT_SYMBOL_GPL(qdio_allocate); 1053 1054 static void qdio_trace_init_data(struct qdio_irq *irq, 1055 struct qdio_initialize *data) 1056 { 1057 DBF_DEV_EVENT(DBF_ERR, irq, "qfmt:%1u", data->q_format); 1058 DBF_DEV_EVENT(DBF_ERR, irq, "qpff%4x", data->qib_param_field_format); 1059 DBF_DEV_HEX(irq, &data->qib_param_field, sizeof(void *), DBF_ERR); 1060 DBF_DEV_HEX(irq, &data->input_slib_elements, sizeof(void *), DBF_ERR); 1061 DBF_DEV_HEX(irq, &data->output_slib_elements, sizeof(void *), DBF_ERR); 1062 DBF_DEV_EVENT(DBF_ERR, irq, "niq:%1u noq:%1u", data->no_input_qs, 1063 data->no_output_qs); 1064 DBF_DEV_HEX(irq, &data->input_handler, sizeof(void *), DBF_ERR); 1065 DBF_DEV_HEX(irq, &data->output_handler, sizeof(void *), DBF_ERR); 1066 DBF_DEV_HEX(irq, &data->int_parm, sizeof(long), DBF_ERR); 1067 DBF_DEV_HEX(irq, &data->input_sbal_addr_array, sizeof(void *), DBF_ERR); 1068 DBF_DEV_HEX(irq, &data->output_sbal_addr_array, sizeof(void *), 1069 DBF_ERR); 1070 } 1071 1072 /** 1073 * qdio_establish - establish queues on a qdio subchannel 1074 * @cdev: associated ccw device 1075 * @init_data: initialization data 1076 */ 1077 int qdio_establish(struct ccw_device *cdev, 1078 struct qdio_initialize *init_data) 1079 { 1080 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1081 struct subchannel_id schid; 1082 int rc; 1083 1084 ccw_device_get_schid(cdev, &schid); 1085 DBF_EVENT("qestablish:%4x", schid.sch_no); 1086 1087 if (!irq_ptr) 1088 return -ENODEV; 1089 1090 if (init_data->no_input_qs > irq_ptr->max_input_qs || 1091 init_data->no_output_qs > irq_ptr->max_output_qs) 1092 return -EINVAL; 1093 1094 if ((init_data->no_input_qs && !init_data->input_handler) || 1095 (init_data->no_output_qs && !init_data->output_handler)) 1096 return -EINVAL; 1097 1098 if (!init_data->input_sbal_addr_array || 1099 !init_data->output_sbal_addr_array) 1100 return -EINVAL; 1101 1102 if (!init_data->irq_poll) 1103 return -EINVAL; 1104 1105 mutex_lock(&irq_ptr->setup_mutex); 1106 qdio_trace_init_data(irq_ptr, init_data); 1107 qdio_setup_irq(irq_ptr, init_data); 1108 1109 rc = qdio_establish_thinint(irq_ptr); 1110 if (rc) { 1111 qdio_shutdown_irq(irq_ptr); 1112 mutex_unlock(&irq_ptr->setup_mutex); 1113 return rc; 1114 } 1115 1116 /* establish q */ 1117 irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd; 1118 irq_ptr->ccw.flags = CCW_FLAG_SLI; 1119 irq_ptr->ccw.count = irq_ptr->equeue.count; 1120 irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr); 1121 1122 spin_lock_irq(get_ccwdev_lock(cdev)); 1123 ccw_device_set_options_mask(cdev, 0); 1124 1125 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0); 1126 spin_unlock_irq(get_ccwdev_lock(cdev)); 1127 if (rc) { 1128 DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no); 1129 DBF_ERROR("rc:%4x", rc); 1130 qdio_shutdown_thinint(irq_ptr); 1131 qdio_shutdown_irq(irq_ptr); 1132 mutex_unlock(&irq_ptr->setup_mutex); 1133 return rc; 1134 } 1135 1136 wait_event_interruptible_timeout(cdev->private->wait_q, 1137 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED || 1138 irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ); 1139 1140 if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) { 1141 mutex_unlock(&irq_ptr->setup_mutex); 1142 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); 1143 return -EIO; 1144 } 1145 1146 qdio_setup_ssqd_info(irq_ptr); 1147 1148 /* qebsm is now setup if available, initialize buffer states */ 1149 qdio_init_buf_states(irq_ptr); 1150 1151 mutex_unlock(&irq_ptr->setup_mutex); 1152 qdio_print_subchannel_info(irq_ptr); 1153 qdio_setup_debug_entries(irq_ptr); 1154 return 0; 1155 } 1156 EXPORT_SYMBOL_GPL(qdio_establish); 1157 1158 /** 1159 * qdio_activate - activate queues on a qdio subchannel 1160 * @cdev: associated cdev 1161 */ 1162 int qdio_activate(struct ccw_device *cdev) 1163 { 1164 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1165 struct subchannel_id schid; 1166 int rc; 1167 1168 ccw_device_get_schid(cdev, &schid); 1169 DBF_EVENT("qactivate:%4x", schid.sch_no); 1170 1171 if (!irq_ptr) 1172 return -ENODEV; 1173 1174 mutex_lock(&irq_ptr->setup_mutex); 1175 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) { 1176 rc = -EBUSY; 1177 goto out; 1178 } 1179 1180 irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd; 1181 irq_ptr->ccw.flags = CCW_FLAG_SLI; 1182 irq_ptr->ccw.count = irq_ptr->aqueue.count; 1183 irq_ptr->ccw.cda = 0; 1184 1185 spin_lock_irq(get_ccwdev_lock(cdev)); 1186 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL); 1187 1188 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE, 1189 0, DOIO_DENY_PREFETCH); 1190 spin_unlock_irq(get_ccwdev_lock(cdev)); 1191 if (rc) { 1192 DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no); 1193 DBF_ERROR("rc:%4x", rc); 1194 goto out; 1195 } 1196 1197 /* wait for subchannel to become active */ 1198 msleep(5); 1199 1200 switch (irq_ptr->state) { 1201 case QDIO_IRQ_STATE_STOPPED: 1202 case QDIO_IRQ_STATE_ERR: 1203 rc = -EIO; 1204 break; 1205 default: 1206 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE); 1207 rc = 0; 1208 } 1209 out: 1210 mutex_unlock(&irq_ptr->setup_mutex); 1211 return rc; 1212 } 1213 EXPORT_SYMBOL_GPL(qdio_activate); 1214 1215 /** 1216 * handle_inbound - reset processed input buffers 1217 * @q: queue containing the buffers 1218 * @callflags: flags 1219 * @bufnr: first buffer to process 1220 * @count: how many buffers are emptied 1221 */ 1222 static int handle_inbound(struct qdio_q *q, unsigned int callflags, 1223 int bufnr, int count) 1224 { 1225 int overlap; 1226 1227 qperf_inc(q, inbound_call); 1228 1229 /* If any processed SBALs are returned to HW, adjust our tracking: */ 1230 overlap = min_t(int, count - sub_buf(q->u.in.batch_start, bufnr), 1231 q->u.in.batch_count); 1232 if (overlap > 0) { 1233 q->u.in.batch_start = add_buf(q->u.in.batch_start, overlap); 1234 q->u.in.batch_count -= overlap; 1235 } 1236 1237 count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count); 1238 atomic_add(count, &q->nr_buf_used); 1239 1240 if (need_siga_in(q)) 1241 return qdio_siga_input(q); 1242 1243 return 0; 1244 } 1245 1246 /** 1247 * handle_outbound - process filled outbound buffers 1248 * @q: queue containing the buffers 1249 * @callflags: flags 1250 * @bufnr: first buffer to process 1251 * @count: how many buffers are filled 1252 * @aob: asynchronous operation block 1253 */ 1254 static int handle_outbound(struct qdio_q *q, unsigned int callflags, 1255 unsigned int bufnr, unsigned int count, 1256 struct qaob *aob) 1257 { 1258 const unsigned int scan_threshold = q->irq_ptr->scan_threshold; 1259 unsigned char state = 0; 1260 int used, rc = 0; 1261 1262 qperf_inc(q, outbound_call); 1263 1264 count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count); 1265 used = atomic_add_return(count, &q->nr_buf_used); 1266 1267 if (used == QDIO_MAX_BUFFERS_PER_Q) 1268 qperf_inc(q, outbound_queue_full); 1269 1270 if (callflags & QDIO_FLAG_PCI_OUT) { 1271 q->u.out.pci_out_enabled = 1; 1272 qperf_inc(q, pci_request_int); 1273 } else 1274 q->u.out.pci_out_enabled = 0; 1275 1276 if (queue_type(q) == QDIO_IQDIO_QFMT) { 1277 unsigned long phys_aob = aob ? virt_to_phys(aob) : 0; 1278 1279 WARN_ON_ONCE(!IS_ALIGNED(phys_aob, 256)); 1280 rc = qdio_kick_outbound_q(q, count, phys_aob); 1281 } else if (need_siga_sync(q)) { 1282 rc = qdio_siga_sync_q(q); 1283 } else if (count < QDIO_MAX_BUFFERS_PER_Q && 1284 get_buf_state(q, prev_buf(bufnr), &state, 0) > 0 && 1285 state == SLSB_CU_OUTPUT_PRIMED) { 1286 /* The previous buffer is not processed yet, tack on. */ 1287 qperf_inc(q, fast_requeue); 1288 } else { 1289 rc = qdio_kick_outbound_q(q, count, 0); 1290 } 1291 1292 /* Let drivers implement their own completion scanning: */ 1293 if (!scan_threshold) 1294 return rc; 1295 1296 /* in case of SIGA errors we must process the error immediately */ 1297 if (used >= scan_threshold || rc) 1298 qdio_tasklet_schedule(q); 1299 else 1300 /* free the SBALs in case of no further traffic */ 1301 if (!timer_pending(&q->u.out.timer) && 1302 likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE)) 1303 mod_timer(&q->u.out.timer, jiffies + HZ); 1304 return rc; 1305 } 1306 1307 /** 1308 * do_QDIO - process input or output buffers 1309 * @cdev: associated ccw_device for the qdio subchannel 1310 * @callflags: input or output and special flags from the program 1311 * @q_nr: queue number 1312 * @bufnr: buffer number 1313 * @count: how many buffers to process 1314 * @aob: asynchronous operation block (outbound only) 1315 */ 1316 int do_QDIO(struct ccw_device *cdev, unsigned int callflags, 1317 int q_nr, unsigned int bufnr, unsigned int count, struct qaob *aob) 1318 { 1319 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1320 1321 if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q) 1322 return -EINVAL; 1323 1324 if (!irq_ptr) 1325 return -ENODEV; 1326 1327 DBF_DEV_EVENT(DBF_INFO, irq_ptr, 1328 "do%02x b:%02x c:%02x", callflags, bufnr, count); 1329 1330 if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE) 1331 return -EIO; 1332 if (!count) 1333 return 0; 1334 if (callflags & QDIO_FLAG_SYNC_INPUT) 1335 return handle_inbound(irq_ptr->input_qs[q_nr], 1336 callflags, bufnr, count); 1337 else if (callflags & QDIO_FLAG_SYNC_OUTPUT) 1338 return handle_outbound(irq_ptr->output_qs[q_nr], 1339 callflags, bufnr, count, aob); 1340 return -EINVAL; 1341 } 1342 EXPORT_SYMBOL_GPL(do_QDIO); 1343 1344 /** 1345 * qdio_start_irq - enable interrupt processing for the device 1346 * @cdev: associated ccw_device for the qdio subchannel 1347 * 1348 * Return codes 1349 * 0 - success 1350 * 1 - irqs not started since new data is available 1351 */ 1352 int qdio_start_irq(struct ccw_device *cdev) 1353 { 1354 struct qdio_q *q; 1355 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1356 unsigned int i; 1357 1358 if (!irq_ptr) 1359 return -ENODEV; 1360 1361 for_each_input_queue(irq_ptr, q, i) 1362 qdio_stop_polling(q); 1363 1364 clear_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state); 1365 1366 /* 1367 * We need to check again to not lose initiative after 1368 * resetting the ACK state. 1369 */ 1370 if (test_nonshared_ind(irq_ptr)) 1371 goto rescan; 1372 1373 for_each_input_queue(irq_ptr, q, i) { 1374 if (!qdio_inbound_q_done(q, q->first_to_check)) 1375 goto rescan; 1376 } 1377 1378 return 0; 1379 1380 rescan: 1381 if (test_and_set_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state)) 1382 return 0; 1383 else 1384 return 1; 1385 1386 } 1387 EXPORT_SYMBOL(qdio_start_irq); 1388 1389 static int __qdio_inspect_queue(struct qdio_q *q, unsigned int *bufnr, 1390 unsigned int *error) 1391 { 1392 unsigned int start = q->first_to_check; 1393 int count; 1394 1395 *error = 0; 1396 count = q->is_input_q ? get_inbound_buffer_frontier(q, start, error) : 1397 get_outbound_buffer_frontier(q, start, error); 1398 if (count == 0) 1399 return 0; 1400 1401 *bufnr = start; 1402 1403 /* for the next time */ 1404 q->first_to_check = add_buf(start, count); 1405 1406 return count; 1407 } 1408 1409 int qdio_inspect_queue(struct ccw_device *cdev, unsigned int nr, bool is_input, 1410 unsigned int *bufnr, unsigned int *error) 1411 { 1412 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1413 struct qdio_q *q; 1414 1415 if (!irq_ptr) 1416 return -ENODEV; 1417 q = is_input ? irq_ptr->input_qs[nr] : irq_ptr->output_qs[nr]; 1418 1419 if (need_siga_sync(q)) 1420 qdio_siga_sync_q(q); 1421 1422 return __qdio_inspect_queue(q, bufnr, error); 1423 } 1424 EXPORT_SYMBOL_GPL(qdio_inspect_queue); 1425 1426 /** 1427 * qdio_get_next_buffers - process input buffers 1428 * @cdev: associated ccw_device for the qdio subchannel 1429 * @nr: input queue number 1430 * @bufnr: first filled buffer number 1431 * @error: buffers are in error state 1432 * 1433 * Return codes 1434 * < 0 - error 1435 * = 0 - no new buffers found 1436 * > 0 - number of processed buffers 1437 */ 1438 int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr, 1439 int *error) 1440 { 1441 struct qdio_q *q; 1442 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1443 1444 if (!irq_ptr) 1445 return -ENODEV; 1446 q = irq_ptr->input_qs[nr]; 1447 1448 /* 1449 * Cannot rely on automatic sync after interrupt since queues may 1450 * also be examined without interrupt. 1451 */ 1452 if (need_siga_sync(q)) 1453 qdio_sync_queues(q); 1454 1455 qdio_check_outbound_pci_queues(irq_ptr); 1456 1457 /* Note: upper-layer MUST stop processing immediately here ... */ 1458 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)) 1459 return -EIO; 1460 1461 return __qdio_inspect_queue(q, bufnr, error); 1462 } 1463 EXPORT_SYMBOL(qdio_get_next_buffers); 1464 1465 /** 1466 * qdio_stop_irq - disable interrupt processing for the device 1467 * @cdev: associated ccw_device for the qdio subchannel 1468 * 1469 * Return codes 1470 * 0 - interrupts were already disabled 1471 * 1 - interrupts successfully disabled 1472 */ 1473 int qdio_stop_irq(struct ccw_device *cdev) 1474 { 1475 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1476 1477 if (!irq_ptr) 1478 return -ENODEV; 1479 1480 if (test_and_set_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state)) 1481 return 0; 1482 else 1483 return 1; 1484 } 1485 EXPORT_SYMBOL(qdio_stop_irq); 1486 1487 static int __init init_QDIO(void) 1488 { 1489 int rc; 1490 1491 rc = qdio_debug_init(); 1492 if (rc) 1493 return rc; 1494 rc = qdio_setup_init(); 1495 if (rc) 1496 goto out_debug; 1497 rc = qdio_thinint_init(); 1498 if (rc) 1499 goto out_cache; 1500 return 0; 1501 1502 out_cache: 1503 qdio_setup_exit(); 1504 out_debug: 1505 qdio_debug_exit(); 1506 return rc; 1507 } 1508 1509 static void __exit exit_QDIO(void) 1510 { 1511 qdio_thinint_exit(); 1512 qdio_setup_exit(); 1513 qdio_debug_exit(); 1514 } 1515 1516 module_init(init_QDIO); 1517 module_exit(exit_QDIO); 1518