1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Linux for s390 qdio support, buffer handling, qdio API and module support. 4 * 5 * Copyright IBM Corp. 2000, 2008 6 * Author(s): Utz Bacher <utz.bacher@de.ibm.com> 7 * Jan Glauber <jang@linux.vnet.ibm.com> 8 * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com> 9 */ 10 #include <linux/module.h> 11 #include <linux/init.h> 12 #include <linux/kernel.h> 13 #include <linux/timer.h> 14 #include <linux/delay.h> 15 #include <linux/gfp.h> 16 #include <linux/io.h> 17 #include <linux/atomic.h> 18 #include <asm/debug.h> 19 #include <asm/qdio.h> 20 #include <asm/ipl.h> 21 22 #include "cio.h" 23 #include "css.h" 24 #include "device.h" 25 #include "qdio.h" 26 #include "qdio_debug.h" 27 28 MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\ 29 "Jan Glauber <jang@linux.vnet.ibm.com>"); 30 MODULE_DESCRIPTION("QDIO base support"); 31 MODULE_LICENSE("GPL"); 32 33 static inline int do_siga_sync(unsigned long schid, 34 unsigned int out_mask, unsigned int in_mask, 35 unsigned int fc) 36 { 37 register unsigned long __fc asm ("0") = fc; 38 register unsigned long __schid asm ("1") = schid; 39 register unsigned long out asm ("2") = out_mask; 40 register unsigned long in asm ("3") = in_mask; 41 int cc; 42 43 asm volatile( 44 " siga 0\n" 45 " ipm %0\n" 46 " srl %0,28\n" 47 : "=d" (cc) 48 : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc"); 49 return cc; 50 } 51 52 static inline int do_siga_input(unsigned long schid, unsigned int mask, 53 unsigned int fc) 54 { 55 register unsigned long __fc asm ("0") = fc; 56 register unsigned long __schid asm ("1") = schid; 57 register unsigned long __mask asm ("2") = mask; 58 int cc; 59 60 asm volatile( 61 " siga 0\n" 62 " ipm %0\n" 63 " srl %0,28\n" 64 : "=d" (cc) 65 : "d" (__fc), "d" (__schid), "d" (__mask) : "cc"); 66 return cc; 67 } 68 69 /** 70 * do_siga_output - perform SIGA-w/wt function 71 * @schid: subchannel id or in case of QEBSM the subchannel token 72 * @mask: which output queues to process 73 * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer 74 * @fc: function code to perform 75 * @aob: asynchronous operation block 76 * 77 * Returns condition code. 78 * Note: For IQDC unicast queues only the highest priority queue is processed. 79 */ 80 static inline int do_siga_output(unsigned long schid, unsigned long mask, 81 unsigned int *bb, unsigned int fc, 82 unsigned long aob) 83 { 84 register unsigned long __fc asm("0") = fc; 85 register unsigned long __schid asm("1") = schid; 86 register unsigned long __mask asm("2") = mask; 87 register unsigned long __aob asm("3") = aob; 88 int cc; 89 90 asm volatile( 91 " siga 0\n" 92 " ipm %0\n" 93 " srl %0,28\n" 94 : "=d" (cc), "+d" (__fc), "+d" (__aob) 95 : "d" (__schid), "d" (__mask) 96 : "cc"); 97 *bb = __fc >> 31; 98 return cc; 99 } 100 101 /** 102 * qdio_do_eqbs - extract buffer states for QEBSM 103 * @q: queue to manipulate 104 * @state: state of the extracted buffers 105 * @start: buffer number to start at 106 * @count: count of buffers to examine 107 * @auto_ack: automatically acknowledge buffers 108 * 109 * Returns the number of successfully extracted equal buffer states. 110 * Stops processing if a state is different from the last buffers state. 111 */ 112 static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state, 113 int start, int count, int auto_ack) 114 { 115 int tmp_count = count, tmp_start = start, nr = q->nr; 116 unsigned int ccq = 0; 117 118 qperf_inc(q, eqbs); 119 120 if (!q->is_input_q) 121 nr += q->irq_ptr->nr_input_qs; 122 again: 123 ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count, 124 auto_ack); 125 126 switch (ccq) { 127 case 0: 128 case 32: 129 /* all done, or next buffer state different */ 130 return count - tmp_count; 131 case 96: 132 /* not all buffers processed */ 133 qperf_inc(q, eqbs_partial); 134 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "EQBS part:%02x", 135 tmp_count); 136 return count - tmp_count; 137 case 97: 138 /* no buffer processed */ 139 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq); 140 goto again; 141 default: 142 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq); 143 DBF_ERROR("%4x EQBS ERROR", SCH_NO(q)); 144 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr); 145 q->handler(q->irq_ptr->cdev, QDIO_ERROR_GET_BUF_STATE, q->nr, 146 q->first_to_kick, count, q->irq_ptr->int_parm); 147 return 0; 148 } 149 } 150 151 /** 152 * qdio_do_sqbs - set buffer states for QEBSM 153 * @q: queue to manipulate 154 * @state: new state of the buffers 155 * @start: first buffer number to change 156 * @count: how many buffers to change 157 * 158 * Returns the number of successfully changed buffers. 159 * Does retrying until the specified count of buffer states is set or an 160 * error occurs. 161 */ 162 static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start, 163 int count) 164 { 165 unsigned int ccq = 0; 166 int tmp_count = count, tmp_start = start; 167 int nr = q->nr; 168 169 if (!count) 170 return 0; 171 qperf_inc(q, sqbs); 172 173 if (!q->is_input_q) 174 nr += q->irq_ptr->nr_input_qs; 175 again: 176 ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count); 177 178 switch (ccq) { 179 case 0: 180 case 32: 181 /* all done, or active buffer adapter-owned */ 182 WARN_ON_ONCE(tmp_count); 183 return count - tmp_count; 184 case 96: 185 /* not all buffers processed */ 186 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq); 187 qperf_inc(q, sqbs_partial); 188 goto again; 189 default: 190 DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq); 191 DBF_ERROR("%4x SQBS ERROR", SCH_NO(q)); 192 DBF_ERROR("%3d%3d%2d", count, tmp_count, nr); 193 q->handler(q->irq_ptr->cdev, QDIO_ERROR_SET_BUF_STATE, q->nr, 194 q->first_to_kick, count, q->irq_ptr->int_parm); 195 return 0; 196 } 197 } 198 199 /* 200 * Returns number of examined buffers and their common state in *state. 201 * Requested number of buffers-to-examine must be > 0. 202 */ 203 static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr, 204 unsigned char *state, unsigned int count, 205 int auto_ack, int merge_pending) 206 { 207 unsigned char __state = 0; 208 int i = 1; 209 210 if (is_qebsm(q)) 211 return qdio_do_eqbs(q, state, bufnr, count, auto_ack); 212 213 /* get initial state: */ 214 __state = q->slsb.val[bufnr]; 215 216 /* Bail out early if there is no work on the queue: */ 217 if (__state & SLSB_OWNER_CU) 218 goto out; 219 220 if (merge_pending && __state == SLSB_P_OUTPUT_PENDING) 221 __state = SLSB_P_OUTPUT_EMPTY; 222 223 for (; i < count; i++) { 224 bufnr = next_buf(bufnr); 225 226 /* merge PENDING into EMPTY: */ 227 if (merge_pending && 228 q->slsb.val[bufnr] == SLSB_P_OUTPUT_PENDING && 229 __state == SLSB_P_OUTPUT_EMPTY) 230 continue; 231 232 /* stop if next state differs from initial state: */ 233 if (q->slsb.val[bufnr] != __state) 234 break; 235 } 236 237 out: 238 *state = __state; 239 return i; 240 } 241 242 static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr, 243 unsigned char *state, int auto_ack) 244 { 245 return get_buf_states(q, bufnr, state, 1, auto_ack, 0); 246 } 247 248 /* wrap-around safe setting of slsb states, returns number of changed buffers */ 249 static inline int set_buf_states(struct qdio_q *q, int bufnr, 250 unsigned char state, int count) 251 { 252 int i; 253 254 if (is_qebsm(q)) 255 return qdio_do_sqbs(q, state, bufnr, count); 256 257 for (i = 0; i < count; i++) { 258 xchg(&q->slsb.val[bufnr], state); 259 bufnr = next_buf(bufnr); 260 } 261 return count; 262 } 263 264 static inline int set_buf_state(struct qdio_q *q, int bufnr, 265 unsigned char state) 266 { 267 return set_buf_states(q, bufnr, state, 1); 268 } 269 270 /* set slsb states to initial state */ 271 static void qdio_init_buf_states(struct qdio_irq *irq_ptr) 272 { 273 struct qdio_q *q; 274 int i; 275 276 for_each_input_queue(irq_ptr, q, i) 277 set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT, 278 QDIO_MAX_BUFFERS_PER_Q); 279 for_each_output_queue(irq_ptr, q, i) 280 set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT, 281 QDIO_MAX_BUFFERS_PER_Q); 282 } 283 284 static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output, 285 unsigned int input) 286 { 287 unsigned long schid = *((u32 *) &q->irq_ptr->schid); 288 unsigned int fc = QDIO_SIGA_SYNC; 289 int cc; 290 291 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr); 292 qperf_inc(q, siga_sync); 293 294 if (is_qebsm(q)) { 295 schid = q->irq_ptr->sch_token; 296 fc |= QDIO_SIGA_QEBSM_FLAG; 297 } 298 299 cc = do_siga_sync(schid, output, input, fc); 300 if (unlikely(cc)) 301 DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc); 302 return (cc) ? -EIO : 0; 303 } 304 305 static inline int qdio_siga_sync_q(struct qdio_q *q) 306 { 307 if (q->is_input_q) 308 return qdio_siga_sync(q, 0, q->mask); 309 else 310 return qdio_siga_sync(q, q->mask, 0); 311 } 312 313 static int qdio_siga_output(struct qdio_q *q, unsigned int count, 314 unsigned int *busy_bit, unsigned long aob) 315 { 316 unsigned long schid = *((u32 *) &q->irq_ptr->schid); 317 unsigned int fc = QDIO_SIGA_WRITE; 318 u64 start_time = 0; 319 int retries = 0, cc; 320 321 if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q)) { 322 if (count > 1) 323 fc = QDIO_SIGA_WRITEM; 324 else if (aob) 325 fc = QDIO_SIGA_WRITEQ; 326 } 327 328 if (is_qebsm(q)) { 329 schid = q->irq_ptr->sch_token; 330 fc |= QDIO_SIGA_QEBSM_FLAG; 331 } 332 again: 333 cc = do_siga_output(schid, q->mask, busy_bit, fc, aob); 334 335 /* hipersocket busy condition */ 336 if (unlikely(*busy_bit)) { 337 retries++; 338 339 if (!start_time) { 340 start_time = get_tod_clock_fast(); 341 goto again; 342 } 343 if (get_tod_clock_fast() - start_time < QDIO_BUSY_BIT_PATIENCE) 344 goto again; 345 } 346 if (retries) { 347 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, 348 "%4x cc2 BB1:%1d", SCH_NO(q), q->nr); 349 DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "count:%u", retries); 350 } 351 return cc; 352 } 353 354 static inline int qdio_siga_input(struct qdio_q *q) 355 { 356 unsigned long schid = *((u32 *) &q->irq_ptr->schid); 357 unsigned int fc = QDIO_SIGA_READ; 358 int cc; 359 360 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr); 361 qperf_inc(q, siga_read); 362 363 if (is_qebsm(q)) { 364 schid = q->irq_ptr->sch_token; 365 fc |= QDIO_SIGA_QEBSM_FLAG; 366 } 367 368 cc = do_siga_input(schid, q->mask, fc); 369 if (unlikely(cc)) 370 DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc); 371 return (cc) ? -EIO : 0; 372 } 373 374 #define qdio_siga_sync_out(q) qdio_siga_sync(q, ~0U, 0) 375 #define qdio_siga_sync_all(q) qdio_siga_sync(q, ~0U, ~0U) 376 377 static inline void qdio_sync_queues(struct qdio_q *q) 378 { 379 /* PCI capable outbound queues will also be scanned so sync them too */ 380 if (pci_out_supported(q->irq_ptr)) 381 qdio_siga_sync_all(q); 382 else 383 qdio_siga_sync_q(q); 384 } 385 386 int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr, 387 unsigned char *state) 388 { 389 if (need_siga_sync(q)) 390 qdio_siga_sync_q(q); 391 return get_buf_state(q, bufnr, state, 0); 392 } 393 394 static inline void qdio_stop_polling(struct qdio_q *q) 395 { 396 if (!q->u.in.ack_count) 397 return; 398 399 qperf_inc(q, stop_polling); 400 401 /* show the card that we are not polling anymore */ 402 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT, 403 q->u.in.ack_count); 404 q->u.in.ack_count = 0; 405 } 406 407 static inline void account_sbals(struct qdio_q *q, unsigned int count) 408 { 409 int pos; 410 411 q->q_stats.nr_sbal_total += count; 412 if (count == QDIO_MAX_BUFFERS_MASK) { 413 q->q_stats.nr_sbals[7]++; 414 return; 415 } 416 pos = ilog2(count); 417 q->q_stats.nr_sbals[pos]++; 418 } 419 420 static void process_buffer_error(struct qdio_q *q, unsigned int start, 421 int count) 422 { 423 q->qdio_error = QDIO_ERROR_SLSB_STATE; 424 425 /* special handling for no target buffer empty */ 426 if (queue_type(q) == QDIO_IQDIO_QFMT && !q->is_input_q && 427 q->sbal[start]->element[15].sflags == 0x10) { 428 qperf_inc(q, target_full); 429 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x", start); 430 return; 431 } 432 433 DBF_ERROR("%4x BUF ERROR", SCH_NO(q)); 434 DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr); 435 DBF_ERROR("FTC:%3d C:%3d", start, count); 436 DBF_ERROR("F14:%2x F15:%2x", 437 q->sbal[start]->element[14].sflags, 438 q->sbal[start]->element[15].sflags); 439 } 440 441 static inline void inbound_primed(struct qdio_q *q, unsigned int start, 442 int count) 443 { 444 int new; 445 446 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim:%1d %02x", q->nr, count); 447 448 /* for QEBSM the ACK was already set by EQBS */ 449 if (is_qebsm(q)) { 450 if (!q->u.in.ack_count) { 451 q->u.in.ack_count = count; 452 q->u.in.ack_start = start; 453 return; 454 } 455 456 /* delete the previous ACK's */ 457 set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT, 458 q->u.in.ack_count); 459 q->u.in.ack_count = count; 460 q->u.in.ack_start = start; 461 return; 462 } 463 464 /* 465 * ACK the newest buffer. The ACK will be removed in qdio_stop_polling 466 * or by the next inbound run. 467 */ 468 new = add_buf(start, count - 1); 469 if (q->u.in.ack_count) { 470 /* reset the previous ACK but first set the new one */ 471 set_buf_state(q, new, SLSB_P_INPUT_ACK); 472 set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT); 473 } else { 474 q->u.in.ack_count = 1; 475 set_buf_state(q, new, SLSB_P_INPUT_ACK); 476 } 477 478 q->u.in.ack_start = new; 479 count--; 480 if (!count) 481 return; 482 /* need to change ALL buffers to get more interrupts */ 483 set_buf_states(q, start, SLSB_P_INPUT_NOT_INIT, count); 484 } 485 486 static int get_inbound_buffer_frontier(struct qdio_q *q, unsigned int start) 487 { 488 unsigned char state = 0; 489 int count; 490 491 q->timestamp = get_tod_clock_fast(); 492 493 /* 494 * Don't check 128 buffers, as otherwise qdio_inbound_q_moved 495 * would return 0. 496 */ 497 count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK); 498 if (!count) 499 return 0; 500 501 /* 502 * No siga sync here, as a PCI or we after a thin interrupt 503 * already sync'ed the queues. 504 */ 505 count = get_buf_states(q, start, &state, count, 1, 0); 506 if (!count) 507 return 0; 508 509 switch (state) { 510 case SLSB_P_INPUT_PRIMED: 511 inbound_primed(q, start, count); 512 if (atomic_sub_return(count, &q->nr_buf_used) == 0) 513 qperf_inc(q, inbound_queue_full); 514 if (q->irq_ptr->perf_stat_enabled) 515 account_sbals(q, count); 516 return count; 517 case SLSB_P_INPUT_ERROR: 518 process_buffer_error(q, start, count); 519 /* 520 * Interrupts may be avoided as long as the error is present 521 * so change the buffer state immediately to avoid starvation. 522 */ 523 set_buf_states(q, start, SLSB_P_INPUT_NOT_INIT, count); 524 if (atomic_sub_return(count, &q->nr_buf_used) == 0) 525 qperf_inc(q, inbound_queue_full); 526 if (q->irq_ptr->perf_stat_enabled) 527 account_sbals_error(q, count); 528 return count; 529 case SLSB_CU_INPUT_EMPTY: 530 case SLSB_P_INPUT_NOT_INIT: 531 case SLSB_P_INPUT_ACK: 532 if (q->irq_ptr->perf_stat_enabled) 533 q->q_stats.nr_sbal_nop++; 534 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop:%1d %#02x", 535 q->nr, start); 536 return 0; 537 default: 538 WARN_ON_ONCE(1); 539 return 0; 540 } 541 } 542 543 static int qdio_inbound_q_moved(struct qdio_q *q, unsigned int start) 544 { 545 int count; 546 547 count = get_inbound_buffer_frontier(q, start); 548 549 if (count && !is_thinint_irq(q->irq_ptr) && MACHINE_IS_LPAR) 550 q->u.in.timestamp = get_tod_clock(); 551 552 return count; 553 } 554 555 static inline int qdio_inbound_q_done(struct qdio_q *q, unsigned int start) 556 { 557 unsigned char state = 0; 558 559 if (!atomic_read(&q->nr_buf_used)) 560 return 1; 561 562 if (need_siga_sync(q)) 563 qdio_siga_sync_q(q); 564 get_buf_state(q, start, &state, 0); 565 566 if (state == SLSB_P_INPUT_PRIMED || state == SLSB_P_INPUT_ERROR) 567 /* more work coming */ 568 return 0; 569 570 if (is_thinint_irq(q->irq_ptr)) 571 return 1; 572 573 /* don't poll under z/VM */ 574 if (MACHINE_IS_VM) 575 return 1; 576 577 /* 578 * At this point we know, that inbound first_to_check 579 * has (probably) not moved (see qdio_inbound_processing). 580 */ 581 if (get_tod_clock_fast() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) { 582 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%02x", start); 583 return 1; 584 } else 585 return 0; 586 } 587 588 static inline void qdio_handle_aobs(struct qdio_q *q, int start, int count) 589 { 590 unsigned char state = 0; 591 int j, b = start; 592 593 for (j = 0; j < count; ++j) { 594 get_buf_state(q, b, &state, 0); 595 if (state == SLSB_P_OUTPUT_PENDING) { 596 struct qaob *aob = q->u.out.aobs[b]; 597 if (aob == NULL) 598 continue; 599 600 q->u.out.sbal_state[b].flags |= 601 QDIO_OUTBUF_STATE_FLAG_PENDING; 602 q->u.out.aobs[b] = NULL; 603 } 604 b = next_buf(b); 605 } 606 } 607 608 static inline unsigned long qdio_aob_for_buffer(struct qdio_output_q *q, 609 int bufnr) 610 { 611 unsigned long phys_aob = 0; 612 613 if (!q->aobs[bufnr]) { 614 struct qaob *aob = qdio_allocate_aob(); 615 q->aobs[bufnr] = aob; 616 } 617 if (q->aobs[bufnr]) { 618 q->aobs[bufnr]->user1 = (u64) q->sbal_state[bufnr].user; 619 phys_aob = virt_to_phys(q->aobs[bufnr]); 620 WARN_ON_ONCE(phys_aob & 0xFF); 621 } 622 623 q->sbal_state[bufnr].flags = 0; 624 return phys_aob; 625 } 626 627 static void qdio_kick_handler(struct qdio_q *q, unsigned int count) 628 { 629 int start = q->first_to_kick; 630 631 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)) 632 return; 633 634 if (q->is_input_q) { 635 qperf_inc(q, inbound_handler); 636 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%02x c:%02x", start, count); 637 } else { 638 qperf_inc(q, outbound_handler); 639 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: s:%02x c:%02x", 640 start, count); 641 } 642 643 q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count, 644 q->irq_ptr->int_parm); 645 646 /* for the next time */ 647 q->first_to_kick = add_buf(start, count); 648 q->qdio_error = 0; 649 } 650 651 static inline int qdio_tasklet_schedule(struct qdio_q *q) 652 { 653 if (likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE)) { 654 tasklet_schedule(&q->tasklet); 655 return 0; 656 } 657 return -EPERM; 658 } 659 660 static void __qdio_inbound_processing(struct qdio_q *q) 661 { 662 unsigned int start = q->first_to_check; 663 int count; 664 665 qperf_inc(q, tasklet_inbound); 666 667 count = qdio_inbound_q_moved(q, start); 668 if (count == 0) 669 return; 670 671 start = add_buf(start, count); 672 q->first_to_check = start; 673 qdio_kick_handler(q, count); 674 675 if (!qdio_inbound_q_done(q, start)) { 676 /* means poll time is not yet over */ 677 qperf_inc(q, tasklet_inbound_resched); 678 if (!qdio_tasklet_schedule(q)) 679 return; 680 } 681 682 qdio_stop_polling(q); 683 /* 684 * We need to check again to not lose initiative after 685 * resetting the ACK state. 686 */ 687 if (!qdio_inbound_q_done(q, start)) { 688 qperf_inc(q, tasklet_inbound_resched2); 689 qdio_tasklet_schedule(q); 690 } 691 } 692 693 void qdio_inbound_processing(unsigned long data) 694 { 695 struct qdio_q *q = (struct qdio_q *)data; 696 __qdio_inbound_processing(q); 697 } 698 699 static int get_outbound_buffer_frontier(struct qdio_q *q, unsigned int start) 700 { 701 unsigned char state = 0; 702 int count; 703 704 q->timestamp = get_tod_clock_fast(); 705 706 if (need_siga_sync(q)) 707 if (((queue_type(q) != QDIO_IQDIO_QFMT) && 708 !pci_out_supported(q->irq_ptr)) || 709 (queue_type(q) == QDIO_IQDIO_QFMT && 710 multicast_outbound(q))) 711 qdio_siga_sync_q(q); 712 713 count = atomic_read(&q->nr_buf_used); 714 if (!count) 715 return 0; 716 717 count = get_buf_states(q, start, &state, count, 0, q->u.out.use_cq); 718 if (!count) 719 return 0; 720 721 switch (state) { 722 case SLSB_P_OUTPUT_EMPTY: 723 case SLSB_P_OUTPUT_PENDING: 724 /* the adapter got it */ 725 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, 726 "out empty:%1d %02x", q->nr, count); 727 728 atomic_sub(count, &q->nr_buf_used); 729 if (q->irq_ptr->perf_stat_enabled) 730 account_sbals(q, count); 731 return count; 732 case SLSB_P_OUTPUT_ERROR: 733 process_buffer_error(q, start, count); 734 atomic_sub(count, &q->nr_buf_used); 735 if (q->irq_ptr->perf_stat_enabled) 736 account_sbals_error(q, count); 737 return count; 738 case SLSB_CU_OUTPUT_PRIMED: 739 /* the adapter has not fetched the output yet */ 740 if (q->irq_ptr->perf_stat_enabled) 741 q->q_stats.nr_sbal_nop++; 742 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d", 743 q->nr); 744 return 0; 745 case SLSB_P_OUTPUT_NOT_INIT: 746 case SLSB_P_OUTPUT_HALTED: 747 return 0; 748 default: 749 WARN_ON_ONCE(1); 750 return 0; 751 } 752 } 753 754 /* all buffers processed? */ 755 static inline int qdio_outbound_q_done(struct qdio_q *q) 756 { 757 return atomic_read(&q->nr_buf_used) == 0; 758 } 759 760 static inline int qdio_outbound_q_moved(struct qdio_q *q, unsigned int start) 761 { 762 int count; 763 764 count = get_outbound_buffer_frontier(q, start); 765 766 if (count) { 767 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr); 768 if (q->u.out.use_cq) 769 qdio_handle_aobs(q, start, count); 770 } 771 772 return count; 773 } 774 775 static int qdio_kick_outbound_q(struct qdio_q *q, unsigned int count, 776 unsigned long aob) 777 { 778 int retries = 0, cc; 779 unsigned int busy_bit; 780 781 if (!need_siga_out(q)) 782 return 0; 783 784 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr); 785 retry: 786 qperf_inc(q, siga_write); 787 788 cc = qdio_siga_output(q, count, &busy_bit, aob); 789 switch (cc) { 790 case 0: 791 break; 792 case 2: 793 if (busy_bit) { 794 while (++retries < QDIO_BUSY_BIT_RETRIES) { 795 mdelay(QDIO_BUSY_BIT_RETRY_DELAY); 796 goto retry; 797 } 798 DBF_ERROR("%4x cc2 BBC:%1d", SCH_NO(q), q->nr); 799 cc = -EBUSY; 800 } else { 801 DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr); 802 cc = -ENOBUFS; 803 } 804 break; 805 case 1: 806 case 3: 807 DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc); 808 cc = -EIO; 809 break; 810 } 811 if (retries) { 812 DBF_ERROR("%4x cc2 BB2:%1d", SCH_NO(q), q->nr); 813 DBF_ERROR("count:%u", retries); 814 } 815 return cc; 816 } 817 818 static void __qdio_outbound_processing(struct qdio_q *q) 819 { 820 unsigned int start = q->first_to_check; 821 int count; 822 823 qperf_inc(q, tasklet_outbound); 824 WARN_ON_ONCE(atomic_read(&q->nr_buf_used) < 0); 825 826 count = qdio_outbound_q_moved(q, start); 827 if (count) { 828 q->first_to_check = add_buf(start, count); 829 qdio_kick_handler(q, count); 830 } 831 832 if (queue_type(q) == QDIO_ZFCP_QFMT && !pci_out_supported(q->irq_ptr) && 833 !qdio_outbound_q_done(q)) 834 goto sched; 835 836 if (q->u.out.pci_out_enabled) 837 return; 838 839 /* 840 * Now we know that queue type is either qeth without pci enabled 841 * or HiperSockets. Make sure buffer switch from PRIMED to EMPTY 842 * is noticed and outbound_handler is called after some time. 843 */ 844 if (qdio_outbound_q_done(q)) 845 del_timer_sync(&q->u.out.timer); 846 else 847 if (!timer_pending(&q->u.out.timer) && 848 likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE)) 849 mod_timer(&q->u.out.timer, jiffies + 10 * HZ); 850 return; 851 852 sched: 853 qdio_tasklet_schedule(q); 854 } 855 856 /* outbound tasklet */ 857 void qdio_outbound_processing(unsigned long data) 858 { 859 struct qdio_q *q = (struct qdio_q *)data; 860 __qdio_outbound_processing(q); 861 } 862 863 void qdio_outbound_timer(struct timer_list *t) 864 { 865 struct qdio_q *q = from_timer(q, t, u.out.timer); 866 867 qdio_tasklet_schedule(q); 868 } 869 870 static inline void qdio_check_outbound_pci_queues(struct qdio_irq *irq) 871 { 872 struct qdio_q *out; 873 int i; 874 875 if (!pci_out_supported(irq) || !irq->scan_threshold) 876 return; 877 878 for_each_output_queue(irq, out, i) 879 if (!qdio_outbound_q_done(out)) 880 qdio_tasklet_schedule(out); 881 } 882 883 static void __tiqdio_inbound_processing(struct qdio_q *q) 884 { 885 unsigned int start = q->first_to_check; 886 int count; 887 888 qperf_inc(q, tasklet_inbound); 889 if (need_siga_sync(q) && need_siga_sync_after_ai(q)) 890 qdio_sync_queues(q); 891 892 /* The interrupt could be caused by a PCI request: */ 893 qdio_check_outbound_pci_queues(q->irq_ptr); 894 895 count = qdio_inbound_q_moved(q, start); 896 if (count == 0) 897 return; 898 899 start = add_buf(start, count); 900 q->first_to_check = start; 901 qdio_kick_handler(q, count); 902 903 if (!qdio_inbound_q_done(q, start)) { 904 qperf_inc(q, tasklet_inbound_resched); 905 if (!qdio_tasklet_schedule(q)) 906 return; 907 } 908 909 qdio_stop_polling(q); 910 /* 911 * We need to check again to not lose initiative after 912 * resetting the ACK state. 913 */ 914 if (!qdio_inbound_q_done(q, start)) { 915 qperf_inc(q, tasklet_inbound_resched2); 916 qdio_tasklet_schedule(q); 917 } 918 } 919 920 void tiqdio_inbound_processing(unsigned long data) 921 { 922 struct qdio_q *q = (struct qdio_q *)data; 923 __tiqdio_inbound_processing(q); 924 } 925 926 static inline void qdio_set_state(struct qdio_irq *irq_ptr, 927 enum qdio_irq_states state) 928 { 929 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state); 930 931 irq_ptr->state = state; 932 mb(); 933 } 934 935 static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb) 936 { 937 if (irb->esw.esw0.erw.cons) { 938 DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no); 939 DBF_ERROR_HEX(irb, 64); 940 DBF_ERROR_HEX(irb->ecw, 64); 941 } 942 } 943 944 /* PCI interrupt handler */ 945 static void qdio_int_handler_pci(struct qdio_irq *irq_ptr) 946 { 947 int i; 948 struct qdio_q *q; 949 950 if (unlikely(irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)) 951 return; 952 953 if (irq_ptr->irq_poll) { 954 if (!test_and_set_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state)) 955 irq_ptr->irq_poll(irq_ptr->cdev, irq_ptr->int_parm); 956 else 957 QDIO_PERF_STAT_INC(irq_ptr, int_discarded); 958 } else { 959 for_each_input_queue(irq_ptr, q, i) 960 tasklet_schedule(&q->tasklet); 961 } 962 963 if (!pci_out_supported(irq_ptr) || !irq_ptr->scan_threshold) 964 return; 965 966 for_each_output_queue(irq_ptr, q, i) { 967 if (qdio_outbound_q_done(q)) 968 continue; 969 if (need_siga_sync(q) && need_siga_sync_out_after_pci(q)) 970 qdio_siga_sync_q(q); 971 qdio_tasklet_schedule(q); 972 } 973 } 974 975 static void qdio_handle_activate_check(struct ccw_device *cdev, 976 unsigned long intparm, int cstat, int dstat) 977 { 978 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 979 struct qdio_q *q; 980 int count; 981 982 DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no); 983 DBF_ERROR("intp :%lx", intparm); 984 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat); 985 986 if (irq_ptr->nr_input_qs) { 987 q = irq_ptr->input_qs[0]; 988 } else if (irq_ptr->nr_output_qs) { 989 q = irq_ptr->output_qs[0]; 990 } else { 991 dump_stack(); 992 goto no_handler; 993 } 994 995 count = sub_buf(q->first_to_check, q->first_to_kick); 996 q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE, 997 q->nr, q->first_to_kick, count, irq_ptr->int_parm); 998 no_handler: 999 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED); 1000 /* 1001 * In case of z/VM LGR (Live Guest Migration) QDIO recovery will happen. 1002 * Therefore we call the LGR detection function here. 1003 */ 1004 lgr_info_log(); 1005 } 1006 1007 static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat, 1008 int dstat) 1009 { 1010 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1011 1012 DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq"); 1013 1014 if (cstat) 1015 goto error; 1016 if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END)) 1017 goto error; 1018 if (!(dstat & DEV_STAT_DEV_END)) 1019 goto error; 1020 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED); 1021 return; 1022 1023 error: 1024 DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no); 1025 DBF_ERROR("ds: %2x cs:%2x", dstat, cstat); 1026 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR); 1027 } 1028 1029 /* qdio interrupt handler */ 1030 void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm, 1031 struct irb *irb) 1032 { 1033 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1034 struct subchannel_id schid; 1035 int cstat, dstat; 1036 1037 if (!intparm || !irq_ptr) { 1038 ccw_device_get_schid(cdev, &schid); 1039 DBF_ERROR("qint:%4x", schid.sch_no); 1040 return; 1041 } 1042 1043 if (irq_ptr->perf_stat_enabled) 1044 irq_ptr->perf_stat.qdio_int++; 1045 1046 if (IS_ERR(irb)) { 1047 DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no); 1048 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR); 1049 wake_up(&cdev->private->wait_q); 1050 return; 1051 } 1052 qdio_irq_check_sense(irq_ptr, irb); 1053 cstat = irb->scsw.cmd.cstat; 1054 dstat = irb->scsw.cmd.dstat; 1055 1056 switch (irq_ptr->state) { 1057 case QDIO_IRQ_STATE_INACTIVE: 1058 qdio_establish_handle_irq(cdev, cstat, dstat); 1059 break; 1060 case QDIO_IRQ_STATE_CLEANUP: 1061 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); 1062 break; 1063 case QDIO_IRQ_STATE_ESTABLISHED: 1064 case QDIO_IRQ_STATE_ACTIVE: 1065 if (cstat & SCHN_STAT_PCI) { 1066 qdio_int_handler_pci(irq_ptr); 1067 return; 1068 } 1069 if (cstat || dstat) 1070 qdio_handle_activate_check(cdev, intparm, cstat, 1071 dstat); 1072 break; 1073 case QDIO_IRQ_STATE_STOPPED: 1074 break; 1075 default: 1076 WARN_ON_ONCE(1); 1077 } 1078 wake_up(&cdev->private->wait_q); 1079 } 1080 1081 /** 1082 * qdio_get_ssqd_desc - get qdio subchannel description 1083 * @cdev: ccw device to get description for 1084 * @data: where to store the ssqd 1085 * 1086 * Returns 0 or an error code. The results of the chsc are stored in the 1087 * specified structure. 1088 */ 1089 int qdio_get_ssqd_desc(struct ccw_device *cdev, 1090 struct qdio_ssqd_desc *data) 1091 { 1092 struct subchannel_id schid; 1093 1094 if (!cdev || !cdev->private) 1095 return -EINVAL; 1096 1097 ccw_device_get_schid(cdev, &schid); 1098 DBF_EVENT("get ssqd:%4x", schid.sch_no); 1099 return qdio_setup_get_ssqd(NULL, &schid, data); 1100 } 1101 EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc); 1102 1103 static void qdio_shutdown_queues(struct qdio_irq *irq_ptr) 1104 { 1105 struct qdio_q *q; 1106 int i; 1107 1108 for_each_input_queue(irq_ptr, q, i) 1109 tasklet_kill(&q->tasklet); 1110 1111 for_each_output_queue(irq_ptr, q, i) { 1112 del_timer_sync(&q->u.out.timer); 1113 tasklet_kill(&q->tasklet); 1114 } 1115 } 1116 1117 /** 1118 * qdio_shutdown - shut down a qdio subchannel 1119 * @cdev: associated ccw device 1120 * @how: use halt or clear to shutdown 1121 */ 1122 int qdio_shutdown(struct ccw_device *cdev, int how) 1123 { 1124 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1125 struct subchannel_id schid; 1126 int rc; 1127 1128 if (!irq_ptr) 1129 return -ENODEV; 1130 1131 WARN_ON_ONCE(irqs_disabled()); 1132 ccw_device_get_schid(cdev, &schid); 1133 DBF_EVENT("qshutdown:%4x", schid.sch_no); 1134 1135 mutex_lock(&irq_ptr->setup_mutex); 1136 /* 1137 * Subchannel was already shot down. We cannot prevent being called 1138 * twice since cio may trigger a shutdown asynchronously. 1139 */ 1140 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) { 1141 mutex_unlock(&irq_ptr->setup_mutex); 1142 return 0; 1143 } 1144 1145 /* 1146 * Indicate that the device is going down. Scheduling the queue 1147 * tasklets is forbidden from here on. 1148 */ 1149 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED); 1150 1151 tiqdio_remove_device(irq_ptr); 1152 qdio_shutdown_queues(irq_ptr); 1153 qdio_shutdown_debug_entries(irq_ptr); 1154 1155 /* cleanup subchannel */ 1156 spin_lock_irq(get_ccwdev_lock(cdev)); 1157 1158 if (how & QDIO_FLAG_CLEANUP_USING_CLEAR) 1159 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP); 1160 else 1161 /* default behaviour is halt */ 1162 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP); 1163 if (rc) { 1164 DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no); 1165 DBF_ERROR("rc:%4d", rc); 1166 goto no_cleanup; 1167 } 1168 1169 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP); 1170 spin_unlock_irq(get_ccwdev_lock(cdev)); 1171 wait_event_interruptible_timeout(cdev->private->wait_q, 1172 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE || 1173 irq_ptr->state == QDIO_IRQ_STATE_ERR, 1174 10 * HZ); 1175 spin_lock_irq(get_ccwdev_lock(cdev)); 1176 1177 no_cleanup: 1178 qdio_shutdown_thinint(irq_ptr); 1179 1180 /* restore interrupt handler */ 1181 if ((void *)cdev->handler == (void *)qdio_int_handler) { 1182 cdev->handler = irq_ptr->orig_handler; 1183 cdev->private->intparm = 0; 1184 } 1185 spin_unlock_irq(get_ccwdev_lock(cdev)); 1186 1187 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); 1188 mutex_unlock(&irq_ptr->setup_mutex); 1189 if (rc) 1190 return rc; 1191 return 0; 1192 } 1193 EXPORT_SYMBOL_GPL(qdio_shutdown); 1194 1195 /** 1196 * qdio_free - free data structures for a qdio subchannel 1197 * @cdev: associated ccw device 1198 */ 1199 int qdio_free(struct ccw_device *cdev) 1200 { 1201 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1202 struct subchannel_id schid; 1203 1204 if (!irq_ptr) 1205 return -ENODEV; 1206 1207 ccw_device_get_schid(cdev, &schid); 1208 DBF_EVENT("qfree:%4x", schid.sch_no); 1209 DBF_DEV_EVENT(DBF_ERR, irq_ptr, "dbf abandoned"); 1210 mutex_lock(&irq_ptr->setup_mutex); 1211 1212 irq_ptr->debug_area = NULL; 1213 cdev->private->qdio_data = NULL; 1214 mutex_unlock(&irq_ptr->setup_mutex); 1215 1216 qdio_release_memory(irq_ptr); 1217 return 0; 1218 } 1219 EXPORT_SYMBOL_GPL(qdio_free); 1220 1221 /** 1222 * qdio_allocate - allocate qdio queues and associated data 1223 * @cdev: associated ccw device 1224 * @no_input_qs: allocate this number of Input Queues 1225 * @no_output_qs: allocate this number of Output Queues 1226 */ 1227 int qdio_allocate(struct ccw_device *cdev, unsigned int no_input_qs, 1228 unsigned int no_output_qs) 1229 { 1230 struct subchannel_id schid; 1231 struct qdio_irq *irq_ptr; 1232 1233 ccw_device_get_schid(cdev, &schid); 1234 DBF_EVENT("qallocate:%4x", schid.sch_no); 1235 1236 if (no_input_qs > QDIO_MAX_QUEUES_PER_IRQ || 1237 no_output_qs > QDIO_MAX_QUEUES_PER_IRQ) 1238 return -EINVAL; 1239 1240 /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */ 1241 irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA); 1242 if (!irq_ptr) 1243 goto out_err; 1244 1245 irq_ptr->cdev = cdev; 1246 mutex_init(&irq_ptr->setup_mutex); 1247 if (qdio_allocate_dbf(irq_ptr)) 1248 goto out_rel; 1249 1250 DBF_DEV_EVENT(DBF_ERR, irq_ptr, "alloc niq:%1u noq:%1u", no_input_qs, 1251 no_output_qs); 1252 1253 /* 1254 * Allocate a page for the chsc calls in qdio_establish. 1255 * Must be pre-allocated since a zfcp recovery will call 1256 * qdio_establish. In case of low memory and swap on a zfcp disk 1257 * we may not be able to allocate memory otherwise. 1258 */ 1259 irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL); 1260 if (!irq_ptr->chsc_page) 1261 goto out_rel; 1262 1263 /* qdr is used in ccw1.cda which is u32 */ 1264 irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA); 1265 if (!irq_ptr->qdr) 1266 goto out_rel; 1267 1268 if (qdio_allocate_qs(irq_ptr, no_input_qs, no_output_qs)) 1269 goto out_rel; 1270 1271 INIT_LIST_HEAD(&irq_ptr->entry); 1272 cdev->private->qdio_data = irq_ptr; 1273 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE); 1274 return 0; 1275 out_rel: 1276 qdio_release_memory(irq_ptr); 1277 out_err: 1278 return -ENOMEM; 1279 } 1280 EXPORT_SYMBOL_GPL(qdio_allocate); 1281 1282 static void qdio_detect_hsicq(struct qdio_irq *irq_ptr) 1283 { 1284 struct qdio_q *q = irq_ptr->input_qs[0]; 1285 int i, use_cq = 0; 1286 1287 if (irq_ptr->nr_input_qs > 1 && queue_type(q) == QDIO_IQDIO_QFMT) 1288 use_cq = 1; 1289 1290 for_each_output_queue(irq_ptr, q, i) { 1291 if (use_cq) { 1292 if (multicast_outbound(q)) 1293 continue; 1294 if (qdio_enable_async_operation(&q->u.out) < 0) { 1295 use_cq = 0; 1296 continue; 1297 } 1298 } else 1299 qdio_disable_async_operation(&q->u.out); 1300 } 1301 DBF_EVENT("use_cq:%d", use_cq); 1302 } 1303 1304 static void qdio_trace_init_data(struct qdio_irq *irq, 1305 struct qdio_initialize *data) 1306 { 1307 DBF_DEV_EVENT(DBF_ERR, irq, "qfmt:%1u", data->q_format); 1308 DBF_DEV_HEX(irq, data->adapter_name, 8, DBF_ERR); 1309 DBF_DEV_EVENT(DBF_ERR, irq, "qpff%4x", data->qib_param_field_format); 1310 DBF_DEV_HEX(irq, &data->qib_param_field, sizeof(void *), DBF_ERR); 1311 DBF_DEV_HEX(irq, &data->input_slib_elements, sizeof(void *), DBF_ERR); 1312 DBF_DEV_HEX(irq, &data->output_slib_elements, sizeof(void *), DBF_ERR); 1313 DBF_DEV_EVENT(DBF_ERR, irq, "niq:%1u noq:%1u", data->no_input_qs, 1314 data->no_output_qs); 1315 DBF_DEV_HEX(irq, &data->input_handler, sizeof(void *), DBF_ERR); 1316 DBF_DEV_HEX(irq, &data->output_handler, sizeof(void *), DBF_ERR); 1317 DBF_DEV_HEX(irq, &data->int_parm, sizeof(long), DBF_ERR); 1318 DBF_DEV_HEX(irq, &data->input_sbal_addr_array, sizeof(void *), DBF_ERR); 1319 DBF_DEV_HEX(irq, &data->output_sbal_addr_array, sizeof(void *), 1320 DBF_ERR); 1321 } 1322 1323 /** 1324 * qdio_establish - establish queues on a qdio subchannel 1325 * @cdev: associated ccw device 1326 * @init_data: initialization data 1327 */ 1328 int qdio_establish(struct ccw_device *cdev, 1329 struct qdio_initialize *init_data) 1330 { 1331 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1332 struct subchannel_id schid; 1333 int rc; 1334 1335 ccw_device_get_schid(cdev, &schid); 1336 DBF_EVENT("qestablish:%4x", schid.sch_no); 1337 1338 if (!irq_ptr) 1339 return -ENODEV; 1340 1341 if ((init_data->no_input_qs && !init_data->input_handler) || 1342 (init_data->no_output_qs && !init_data->output_handler)) 1343 return -EINVAL; 1344 1345 if (!init_data->input_sbal_addr_array || 1346 !init_data->output_sbal_addr_array) 1347 return -EINVAL; 1348 1349 mutex_lock(&irq_ptr->setup_mutex); 1350 qdio_trace_init_data(irq_ptr, init_data); 1351 qdio_setup_irq(irq_ptr, init_data); 1352 1353 rc = qdio_establish_thinint(irq_ptr); 1354 if (rc) { 1355 mutex_unlock(&irq_ptr->setup_mutex); 1356 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); 1357 return rc; 1358 } 1359 1360 /* establish q */ 1361 irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd; 1362 irq_ptr->ccw.flags = CCW_FLAG_SLI; 1363 irq_ptr->ccw.count = irq_ptr->equeue.count; 1364 irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr); 1365 1366 spin_lock_irq(get_ccwdev_lock(cdev)); 1367 ccw_device_set_options_mask(cdev, 0); 1368 1369 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0); 1370 spin_unlock_irq(get_ccwdev_lock(cdev)); 1371 if (rc) { 1372 DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no); 1373 DBF_ERROR("rc:%4x", rc); 1374 mutex_unlock(&irq_ptr->setup_mutex); 1375 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); 1376 return rc; 1377 } 1378 1379 wait_event_interruptible_timeout(cdev->private->wait_q, 1380 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED || 1381 irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ); 1382 1383 if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) { 1384 mutex_unlock(&irq_ptr->setup_mutex); 1385 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR); 1386 return -EIO; 1387 } 1388 1389 qdio_setup_ssqd_info(irq_ptr); 1390 1391 qdio_detect_hsicq(irq_ptr); 1392 1393 /* qebsm is now setup if available, initialize buffer states */ 1394 qdio_init_buf_states(irq_ptr); 1395 1396 mutex_unlock(&irq_ptr->setup_mutex); 1397 qdio_print_subchannel_info(irq_ptr); 1398 qdio_setup_debug_entries(irq_ptr); 1399 return 0; 1400 } 1401 EXPORT_SYMBOL_GPL(qdio_establish); 1402 1403 /** 1404 * qdio_activate - activate queues on a qdio subchannel 1405 * @cdev: associated cdev 1406 */ 1407 int qdio_activate(struct ccw_device *cdev) 1408 { 1409 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1410 struct subchannel_id schid; 1411 int rc; 1412 1413 ccw_device_get_schid(cdev, &schid); 1414 DBF_EVENT("qactivate:%4x", schid.sch_no); 1415 1416 if (!irq_ptr) 1417 return -ENODEV; 1418 1419 mutex_lock(&irq_ptr->setup_mutex); 1420 if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) { 1421 rc = -EBUSY; 1422 goto out; 1423 } 1424 1425 irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd; 1426 irq_ptr->ccw.flags = CCW_FLAG_SLI; 1427 irq_ptr->ccw.count = irq_ptr->aqueue.count; 1428 irq_ptr->ccw.cda = 0; 1429 1430 spin_lock_irq(get_ccwdev_lock(cdev)); 1431 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL); 1432 1433 rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE, 1434 0, DOIO_DENY_PREFETCH); 1435 spin_unlock_irq(get_ccwdev_lock(cdev)); 1436 if (rc) { 1437 DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no); 1438 DBF_ERROR("rc:%4x", rc); 1439 goto out; 1440 } 1441 1442 if (is_thinint_irq(irq_ptr)) 1443 tiqdio_add_device(irq_ptr); 1444 1445 /* wait for subchannel to become active */ 1446 msleep(5); 1447 1448 switch (irq_ptr->state) { 1449 case QDIO_IRQ_STATE_STOPPED: 1450 case QDIO_IRQ_STATE_ERR: 1451 rc = -EIO; 1452 break; 1453 default: 1454 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE); 1455 rc = 0; 1456 } 1457 out: 1458 mutex_unlock(&irq_ptr->setup_mutex); 1459 return rc; 1460 } 1461 EXPORT_SYMBOL_GPL(qdio_activate); 1462 1463 static inline int buf_in_between(int bufnr, int start, int count) 1464 { 1465 int end = add_buf(start, count); 1466 1467 if (end > start) { 1468 if (bufnr >= start && bufnr < end) 1469 return 1; 1470 else 1471 return 0; 1472 } 1473 1474 /* wrap-around case */ 1475 if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) || 1476 (bufnr < end)) 1477 return 1; 1478 else 1479 return 0; 1480 } 1481 1482 /** 1483 * handle_inbound - reset processed input buffers 1484 * @q: queue containing the buffers 1485 * @callflags: flags 1486 * @bufnr: first buffer to process 1487 * @count: how many buffers are emptied 1488 */ 1489 static int handle_inbound(struct qdio_q *q, unsigned int callflags, 1490 int bufnr, int count) 1491 { 1492 int diff; 1493 1494 qperf_inc(q, inbound_call); 1495 1496 if (!q->u.in.ack_count) 1497 goto set; 1498 1499 /* protect against stop polling setting an ACK for an emptied slsb */ 1500 if (count == QDIO_MAX_BUFFERS_PER_Q) { 1501 /* overwriting everything, just delete polling status */ 1502 q->u.in.ack_count = 0; 1503 goto set; 1504 } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) { 1505 if (is_qebsm(q)) { 1506 /* partial overwrite, just update ack_start */ 1507 diff = add_buf(bufnr, count); 1508 diff = sub_buf(diff, q->u.in.ack_start); 1509 q->u.in.ack_count -= diff; 1510 if (q->u.in.ack_count <= 0) { 1511 q->u.in.ack_count = 0; 1512 goto set; 1513 } 1514 q->u.in.ack_start = add_buf(q->u.in.ack_start, diff); 1515 } else { 1516 /* the only ACK will be deleted */ 1517 q->u.in.ack_count = 0; 1518 } 1519 } 1520 1521 set: 1522 count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count); 1523 atomic_add(count, &q->nr_buf_used); 1524 1525 if (need_siga_in(q)) 1526 return qdio_siga_input(q); 1527 1528 return 0; 1529 } 1530 1531 /** 1532 * handle_outbound - process filled outbound buffers 1533 * @q: queue containing the buffers 1534 * @callflags: flags 1535 * @bufnr: first buffer to process 1536 * @count: how many buffers are filled 1537 */ 1538 static int handle_outbound(struct qdio_q *q, unsigned int callflags, 1539 unsigned int bufnr, unsigned int count) 1540 { 1541 const unsigned int scan_threshold = q->irq_ptr->scan_threshold; 1542 unsigned char state = 0; 1543 int used, rc = 0; 1544 1545 qperf_inc(q, outbound_call); 1546 1547 count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count); 1548 used = atomic_add_return(count, &q->nr_buf_used); 1549 1550 if (used == QDIO_MAX_BUFFERS_PER_Q) 1551 qperf_inc(q, outbound_queue_full); 1552 1553 if (callflags & QDIO_FLAG_PCI_OUT) { 1554 q->u.out.pci_out_enabled = 1; 1555 qperf_inc(q, pci_request_int); 1556 } else 1557 q->u.out.pci_out_enabled = 0; 1558 1559 if (queue_type(q) == QDIO_IQDIO_QFMT) { 1560 unsigned long phys_aob = 0; 1561 1562 if (q->u.out.use_cq && count == 1) 1563 phys_aob = qdio_aob_for_buffer(&q->u.out, bufnr); 1564 1565 rc = qdio_kick_outbound_q(q, count, phys_aob); 1566 } else if (need_siga_sync(q)) { 1567 rc = qdio_siga_sync_q(q); 1568 } else if (count < QDIO_MAX_BUFFERS_PER_Q && 1569 get_buf_state(q, prev_buf(bufnr), &state, 0) > 0 && 1570 state == SLSB_CU_OUTPUT_PRIMED) { 1571 /* The previous buffer is not processed yet, tack on. */ 1572 qperf_inc(q, fast_requeue); 1573 } else { 1574 rc = qdio_kick_outbound_q(q, count, 0); 1575 } 1576 1577 /* Let drivers implement their own completion scanning: */ 1578 if (!scan_threshold) 1579 return rc; 1580 1581 /* in case of SIGA errors we must process the error immediately */ 1582 if (used >= scan_threshold || rc) 1583 qdio_tasklet_schedule(q); 1584 else 1585 /* free the SBALs in case of no further traffic */ 1586 if (!timer_pending(&q->u.out.timer) && 1587 likely(q->irq_ptr->state == QDIO_IRQ_STATE_ACTIVE)) 1588 mod_timer(&q->u.out.timer, jiffies + HZ); 1589 return rc; 1590 } 1591 1592 /** 1593 * do_QDIO - process input or output buffers 1594 * @cdev: associated ccw_device for the qdio subchannel 1595 * @callflags: input or output and special flags from the program 1596 * @q_nr: queue number 1597 * @bufnr: buffer number 1598 * @count: how many buffers to process 1599 */ 1600 int do_QDIO(struct ccw_device *cdev, unsigned int callflags, 1601 int q_nr, unsigned int bufnr, unsigned int count) 1602 { 1603 struct qdio_irq *irq_ptr; 1604 1605 if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q) 1606 return -EINVAL; 1607 1608 irq_ptr = cdev->private->qdio_data; 1609 if (!irq_ptr) 1610 return -ENODEV; 1611 1612 DBF_DEV_EVENT(DBF_INFO, irq_ptr, 1613 "do%02x b:%02x c:%02x", callflags, bufnr, count); 1614 1615 if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE) 1616 return -EIO; 1617 if (!count) 1618 return 0; 1619 if (callflags & QDIO_FLAG_SYNC_INPUT) 1620 return handle_inbound(irq_ptr->input_qs[q_nr], 1621 callflags, bufnr, count); 1622 else if (callflags & QDIO_FLAG_SYNC_OUTPUT) 1623 return handle_outbound(irq_ptr->output_qs[q_nr], 1624 callflags, bufnr, count); 1625 return -EINVAL; 1626 } 1627 EXPORT_SYMBOL_GPL(do_QDIO); 1628 1629 /** 1630 * qdio_start_irq - process input buffers 1631 * @cdev: associated ccw_device for the qdio subchannel 1632 * 1633 * Return codes 1634 * 0 - success 1635 * 1 - irqs not started since new data is available 1636 */ 1637 int qdio_start_irq(struct ccw_device *cdev) 1638 { 1639 struct qdio_q *q; 1640 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1641 unsigned int i; 1642 1643 if (!irq_ptr) 1644 return -ENODEV; 1645 1646 for_each_input_queue(irq_ptr, q, i) 1647 qdio_stop_polling(q); 1648 1649 clear_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state); 1650 1651 /* 1652 * We need to check again to not lose initiative after 1653 * resetting the ACK state. 1654 */ 1655 if (test_nonshared_ind(irq_ptr)) 1656 goto rescan; 1657 1658 for_each_input_queue(irq_ptr, q, i) { 1659 if (!qdio_inbound_q_done(q, q->first_to_check)) 1660 goto rescan; 1661 } 1662 1663 return 0; 1664 1665 rescan: 1666 if (test_and_set_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state)) 1667 return 0; 1668 else 1669 return 1; 1670 1671 } 1672 EXPORT_SYMBOL(qdio_start_irq); 1673 1674 static int __qdio_inspect_queue(struct qdio_q *q, unsigned int *bufnr, 1675 unsigned int *error) 1676 { 1677 unsigned int start = q->first_to_check; 1678 int count; 1679 1680 count = q->is_input_q ? qdio_inbound_q_moved(q, start) : 1681 qdio_outbound_q_moved(q, start); 1682 if (count == 0) 1683 return 0; 1684 1685 *bufnr = start; 1686 *error = q->qdio_error; 1687 1688 /* for the next time */ 1689 q->first_to_check = add_buf(start, count); 1690 q->qdio_error = 0; 1691 1692 return count; 1693 } 1694 1695 int qdio_inspect_queue(struct ccw_device *cdev, unsigned int nr, bool is_input, 1696 unsigned int *bufnr, unsigned int *error) 1697 { 1698 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1699 struct qdio_q *q; 1700 1701 if (!irq_ptr) 1702 return -ENODEV; 1703 q = is_input ? irq_ptr->input_qs[nr] : irq_ptr->output_qs[nr]; 1704 1705 if (need_siga_sync(q)) 1706 qdio_siga_sync_q(q); 1707 1708 return __qdio_inspect_queue(q, bufnr, error); 1709 } 1710 EXPORT_SYMBOL_GPL(qdio_inspect_queue); 1711 1712 /** 1713 * qdio_get_next_buffers - process input buffers 1714 * @cdev: associated ccw_device for the qdio subchannel 1715 * @nr: input queue number 1716 * @bufnr: first filled buffer number 1717 * @error: buffers are in error state 1718 * 1719 * Return codes 1720 * < 0 - error 1721 * = 0 - no new buffers found 1722 * > 0 - number of processed buffers 1723 */ 1724 int qdio_get_next_buffers(struct ccw_device *cdev, int nr, int *bufnr, 1725 int *error) 1726 { 1727 struct qdio_q *q; 1728 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1729 1730 if (!irq_ptr) 1731 return -ENODEV; 1732 q = irq_ptr->input_qs[nr]; 1733 1734 /* 1735 * Cannot rely on automatic sync after interrupt since queues may 1736 * also be examined without interrupt. 1737 */ 1738 if (need_siga_sync(q)) 1739 qdio_sync_queues(q); 1740 1741 qdio_check_outbound_pci_queues(irq_ptr); 1742 1743 /* Note: upper-layer MUST stop processing immediately here ... */ 1744 if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)) 1745 return -EIO; 1746 1747 return __qdio_inspect_queue(q, bufnr, error); 1748 } 1749 EXPORT_SYMBOL(qdio_get_next_buffers); 1750 1751 /** 1752 * qdio_stop_irq - disable interrupt processing for the device 1753 * @cdev: associated ccw_device for the qdio subchannel 1754 * 1755 * Return codes 1756 * 0 - interrupts were already disabled 1757 * 1 - interrupts successfully disabled 1758 */ 1759 int qdio_stop_irq(struct ccw_device *cdev) 1760 { 1761 struct qdio_irq *irq_ptr = cdev->private->qdio_data; 1762 1763 if (!irq_ptr) 1764 return -ENODEV; 1765 1766 if (test_and_set_bit(QDIO_IRQ_DISABLED, &irq_ptr->poll_state)) 1767 return 0; 1768 else 1769 return 1; 1770 } 1771 EXPORT_SYMBOL(qdio_stop_irq); 1772 1773 /** 1774 * qdio_pnso_brinfo() - perform network subchannel op #0 - bridge info. 1775 * @schid: Subchannel ID. 1776 * @cnc: Boolean Change-Notification Control 1777 * @response: Response code will be stored at this address 1778 * @cb: Callback function will be executed for each element 1779 * of the address list 1780 * @priv: Pointer to pass to the callback function. 1781 * 1782 * Performs "Store-network-bridging-information list" operation and calls 1783 * the callback function for every entry in the list. If "change- 1784 * notification-control" is set, further changes in the address list 1785 * will be reported via the IPA command. 1786 */ 1787 int qdio_pnso_brinfo(struct subchannel_id schid, 1788 int cnc, u16 *response, 1789 void (*cb)(void *priv, enum qdio_brinfo_entry_type type, 1790 void *entry), 1791 void *priv) 1792 { 1793 struct chsc_pnso_area *rr; 1794 int rc; 1795 u32 prev_instance = 0; 1796 int isfirstblock = 1; 1797 int i, size, elems; 1798 1799 rr = (struct chsc_pnso_area *)get_zeroed_page(GFP_KERNEL); 1800 if (rr == NULL) 1801 return -ENOMEM; 1802 do { 1803 /* on the first iteration, naihdr.resume_token will be zero */ 1804 rc = chsc_pnso_brinfo(schid, rr, rr->naihdr.resume_token, cnc); 1805 if (rc != 0 && rc != -EBUSY) 1806 goto out; 1807 if (rr->response.code != 1) { 1808 rc = -EIO; 1809 continue; 1810 } else 1811 rc = 0; 1812 1813 if (cb == NULL) 1814 continue; 1815 1816 size = rr->naihdr.naids; 1817 elems = (rr->response.length - 1818 sizeof(struct chsc_header) - 1819 sizeof(struct chsc_brinfo_naihdr)) / 1820 size; 1821 1822 if (!isfirstblock && (rr->naihdr.instance != prev_instance)) { 1823 /* Inform the caller that they need to scrap */ 1824 /* the data that was already reported via cb */ 1825 rc = -EAGAIN; 1826 break; 1827 } 1828 isfirstblock = 0; 1829 prev_instance = rr->naihdr.instance; 1830 for (i = 0; i < elems; i++) 1831 switch (size) { 1832 case sizeof(struct qdio_brinfo_entry_l3_ipv6): 1833 (*cb)(priv, l3_ipv6_addr, 1834 &rr->entries.l3_ipv6[i]); 1835 break; 1836 case sizeof(struct qdio_brinfo_entry_l3_ipv4): 1837 (*cb)(priv, l3_ipv4_addr, 1838 &rr->entries.l3_ipv4[i]); 1839 break; 1840 case sizeof(struct qdio_brinfo_entry_l2): 1841 (*cb)(priv, l2_addr_lnid, 1842 &rr->entries.l2[i]); 1843 break; 1844 default: 1845 WARN_ON_ONCE(1); 1846 rc = -EIO; 1847 goto out; 1848 } 1849 } while (rr->response.code == 0x0107 || /* channel busy */ 1850 (rr->response.code == 1 && /* list stored */ 1851 /* resume token is non-zero => list incomplete */ 1852 (rr->naihdr.resume_token.t1 || rr->naihdr.resume_token.t2))); 1853 (*response) = rr->response.code; 1854 1855 out: 1856 free_page((unsigned long)rr); 1857 return rc; 1858 } 1859 EXPORT_SYMBOL_GPL(qdio_pnso_brinfo); 1860 1861 static int __init init_QDIO(void) 1862 { 1863 int rc; 1864 1865 rc = qdio_debug_init(); 1866 if (rc) 1867 return rc; 1868 rc = qdio_setup_init(); 1869 if (rc) 1870 goto out_debug; 1871 rc = tiqdio_allocate_memory(); 1872 if (rc) 1873 goto out_cache; 1874 rc = tiqdio_register_thinints(); 1875 if (rc) 1876 goto out_ti; 1877 return 0; 1878 1879 out_ti: 1880 tiqdio_free_memory(); 1881 out_cache: 1882 qdio_setup_exit(); 1883 out_debug: 1884 qdio_debug_exit(); 1885 return rc; 1886 } 1887 1888 static void __exit exit_QDIO(void) 1889 { 1890 tiqdio_unregister_thinints(); 1891 tiqdio_free_memory(); 1892 qdio_setup_exit(); 1893 qdio_debug_exit(); 1894 } 1895 1896 module_init(init_QDIO); 1897 module_exit(exit_QDIO); 1898