xref: /openbmc/linux/drivers/s390/cio/qdio.h (revision 31b90347)
1 /*
2  * Copyright IBM Corp. 2000, 2009
3  * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
4  *	      Jan Glauber <jang@linux.vnet.ibm.com>
5  */
6 #ifndef _CIO_QDIO_H
7 #define _CIO_QDIO_H
8 
9 #include <asm/page.h>
10 #include <asm/schid.h>
11 #include <asm/debug.h>
12 #include "chsc.h"
13 
14 #define QDIO_BUSY_BIT_PATIENCE		(100 << 12)	/* 100 microseconds */
15 #define QDIO_BUSY_BIT_RETRY_DELAY	10		/* 10 milliseconds */
16 #define QDIO_BUSY_BIT_RETRIES		1000		/* = 10s retry time */
17 #define QDIO_INPUT_THRESHOLD		(500 << 12)	/* 500 microseconds */
18 
19 enum qdio_irq_states {
20 	QDIO_IRQ_STATE_INACTIVE,
21 	QDIO_IRQ_STATE_ESTABLISHED,
22 	QDIO_IRQ_STATE_ACTIVE,
23 	QDIO_IRQ_STATE_STOPPED,
24 	QDIO_IRQ_STATE_CLEANUP,
25 	QDIO_IRQ_STATE_ERR,
26 	NR_QDIO_IRQ_STATES,
27 };
28 
29 /* used as intparm in do_IO */
30 #define QDIO_DOING_ESTABLISH	1
31 #define QDIO_DOING_ACTIVATE	2
32 #define QDIO_DOING_CLEANUP	3
33 
34 #define SLSB_STATE_NOT_INIT	0x0
35 #define SLSB_STATE_EMPTY	0x1
36 #define SLSB_STATE_PRIMED	0x2
37 #define SLSB_STATE_PENDING	0x3
38 #define SLSB_STATE_HALTED	0xe
39 #define SLSB_STATE_ERROR	0xf
40 #define SLSB_TYPE_INPUT		0x0
41 #define SLSB_TYPE_OUTPUT	0x20
42 #define SLSB_OWNER_PROG		0x80
43 #define SLSB_OWNER_CU		0x40
44 
45 #define SLSB_P_INPUT_NOT_INIT	\
46 	(SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_NOT_INIT)  /* 0x80 */
47 #define SLSB_P_INPUT_ACK	\
48 	(SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY)	   /* 0x81 */
49 #define SLSB_CU_INPUT_EMPTY	\
50 	(SLSB_OWNER_CU | SLSB_TYPE_INPUT | SLSB_STATE_EMPTY)	   /* 0x41 */
51 #define SLSB_P_INPUT_PRIMED	\
52 	(SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_PRIMED)	   /* 0x82 */
53 #define SLSB_P_INPUT_HALTED	\
54 	(SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_HALTED)	   /* 0x8e */
55 #define SLSB_P_INPUT_ERROR	\
56 	(SLSB_OWNER_PROG | SLSB_TYPE_INPUT | SLSB_STATE_ERROR)	   /* 0x8f */
57 #define SLSB_P_OUTPUT_NOT_INIT	\
58 	(SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_NOT_INIT) /* 0xa0 */
59 #define SLSB_P_OUTPUT_EMPTY	\
60 	(SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_EMPTY)	   /* 0xa1 */
61 #define SLSB_P_OUTPUT_PENDING \
62 	(SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_PENDING)  /* 0xa3 */
63 #define SLSB_CU_OUTPUT_PRIMED	\
64 	(SLSB_OWNER_CU | SLSB_TYPE_OUTPUT | SLSB_STATE_PRIMED)	   /* 0x62 */
65 #define SLSB_P_OUTPUT_HALTED	\
66 	(SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_HALTED)   /* 0xae */
67 #define SLSB_P_OUTPUT_ERROR	\
68 	(SLSB_OWNER_PROG | SLSB_TYPE_OUTPUT | SLSB_STATE_ERROR)	   /* 0xaf */
69 
70 #define SLSB_ERROR_DURING_LOOKUP  0xff
71 
72 /* additional CIWs returned by extended Sense-ID */
73 #define CIW_TYPE_EQUEUE			0x3 /* establish QDIO queues */
74 #define CIW_TYPE_AQUEUE			0x4 /* activate QDIO queues */
75 
76 /* flags for st qdio sch data */
77 #define CHSC_FLAG_QDIO_CAPABILITY	0x80
78 #define CHSC_FLAG_VALIDITY		0x40
79 
80 /* SIGA flags */
81 #define QDIO_SIGA_WRITE		0x00
82 #define QDIO_SIGA_READ		0x01
83 #define QDIO_SIGA_SYNC		0x02
84 #define QDIO_SIGA_WRITEQ	0x04
85 #define QDIO_SIGA_QEBSM_FLAG	0x80
86 
87 #ifdef CONFIG_64BIT
88 static inline int do_sqbs(u64 token, unsigned char state, int queue,
89 			  int *start, int *count)
90 {
91 	register unsigned long _ccq asm ("0") = *count;
92 	register unsigned long _token asm ("1") = token;
93 	unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
94 
95 	asm volatile(
96 		"	.insn	rsy,0xeb000000008A,%1,0,0(%2)"
97 		: "+d" (_ccq), "+d" (_queuestart)
98 		: "d" ((unsigned long)state), "d" (_token)
99 		: "memory", "cc");
100 	*count = _ccq & 0xff;
101 	*start = _queuestart & 0xff;
102 
103 	return (_ccq >> 32) & 0xff;
104 }
105 
106 static inline int do_eqbs(u64 token, unsigned char *state, int queue,
107 			  int *start, int *count, int ack)
108 {
109 	register unsigned long _ccq asm ("0") = *count;
110 	register unsigned long _token asm ("1") = token;
111 	unsigned long _queuestart = ((unsigned long)queue << 32) | *start;
112 	unsigned long _state = (unsigned long)ack << 63;
113 
114 	asm volatile(
115 		"	.insn	rrf,0xB99c0000,%1,%2,0,0"
116 		: "+d" (_ccq), "+d" (_queuestart), "+d" (_state)
117 		: "d" (_token)
118 		: "memory", "cc");
119 	*count = _ccq & 0xff;
120 	*start = _queuestart & 0xff;
121 	*state = _state & 0xff;
122 
123 	return (_ccq >> 32) & 0xff;
124 }
125 #else
126 static inline int do_sqbs(u64 token, unsigned char state, int queue,
127 			  int *start, int *count) { return 0; }
128 static inline int do_eqbs(u64 token, unsigned char *state, int queue,
129 			  int *start, int *count, int ack) { return 0; }
130 #endif /* CONFIG_64BIT */
131 
132 struct qdio_irq;
133 
134 struct siga_flag {
135 	u8 input:1;
136 	u8 output:1;
137 	u8 sync:1;
138 	u8 sync_after_ai:1;
139 	u8 sync_out_after_pci:1;
140 	u8:3;
141 } __attribute__ ((packed));
142 
143 struct qdio_dev_perf_stat {
144 	unsigned int adapter_int;
145 	unsigned int qdio_int;
146 	unsigned int pci_request_int;
147 
148 	unsigned int tasklet_inbound;
149 	unsigned int tasklet_inbound_resched;
150 	unsigned int tasklet_inbound_resched2;
151 	unsigned int tasklet_outbound;
152 
153 	unsigned int siga_read;
154 	unsigned int siga_write;
155 	unsigned int siga_sync;
156 
157 	unsigned int inbound_call;
158 	unsigned int inbound_handler;
159 	unsigned int stop_polling;
160 	unsigned int inbound_queue_full;
161 	unsigned int outbound_call;
162 	unsigned int outbound_handler;
163 	unsigned int outbound_queue_full;
164 	unsigned int fast_requeue;
165 	unsigned int target_full;
166 	unsigned int eqbs;
167 	unsigned int eqbs_partial;
168 	unsigned int sqbs;
169 	unsigned int sqbs_partial;
170 	unsigned int int_discarded;
171 } ____cacheline_aligned;
172 
173 struct qdio_queue_perf_stat {
174 	/*
175 	 * Sorted into order-2 buckets: 1, 2-3, 4-7, ... 64-127, 128.
176 	 * Since max. 127 SBALs are scanned reuse entry for 128 as queue full
177 	 * aka 127 SBALs found.
178 	 */
179 	unsigned int nr_sbals[8];
180 	unsigned int nr_sbal_error;
181 	unsigned int nr_sbal_nop;
182 	unsigned int nr_sbal_total;
183 };
184 
185 enum qdio_queue_irq_states {
186 	QDIO_QUEUE_IRQS_DISABLED,
187 };
188 
189 struct qdio_input_q {
190 	/* input buffer acknowledgement flag */
191 	int polling;
192 	/* first ACK'ed buffer */
193 	int ack_start;
194 	/* how much sbals are acknowledged with qebsm */
195 	int ack_count;
196 	/* last time of noticing incoming data */
197 	u64 timestamp;
198 	/* upper-layer polling flag */
199 	unsigned long queue_irq_state;
200 	/* callback to start upper-layer polling */
201 	void (*queue_start_poll) (struct ccw_device *, int, unsigned long);
202 };
203 
204 struct qdio_output_q {
205 	/* PCIs are enabled for the queue */
206 	int pci_out_enabled;
207 	/* cq: use asynchronous output buffers */
208 	int use_cq;
209 	/* cq: aobs used for particual SBAL */
210 	struct qaob **aobs;
211 	/* cq: sbal state related to asynchronous operation */
212 	struct qdio_outbuf_state *sbal_state;
213 	/* timer to check for more outbound work */
214 	struct timer_list timer;
215 	/* used SBALs before tasklet schedule */
216 	int scan_threshold;
217 };
218 
219 /*
220  * Note on cache alignment: grouped slsb and write mostly data at the beginning
221  * sbal[] is read-only and starts on a new cacheline followed by read mostly.
222  */
223 struct qdio_q {
224 	struct slsb slsb;
225 
226 	union {
227 		struct qdio_input_q in;
228 		struct qdio_output_q out;
229 	} u;
230 
231 	/*
232 	 * inbound: next buffer the program should check for
233 	 * outbound: next buffer to check if adapter processed it
234 	 */
235 	int first_to_check;
236 
237 	/* first_to_check of the last time */
238 	int last_move;
239 
240 	/* beginning position for calling the program */
241 	int first_to_kick;
242 
243 	/* number of buffers in use by the adapter */
244 	atomic_t nr_buf_used;
245 
246 	/* error condition during a data transfer */
247 	unsigned int qdio_error;
248 
249 	/* last scan of the queue */
250 	u64 timestamp;
251 
252 	struct tasklet_struct tasklet;
253 	struct qdio_queue_perf_stat q_stats;
254 
255 	struct qdio_buffer *sbal[QDIO_MAX_BUFFERS_PER_Q] ____cacheline_aligned;
256 
257 	/* queue number */
258 	int nr;
259 
260 	/* bitmask of queue number */
261 	int mask;
262 
263 	/* input or output queue */
264 	int is_input_q;
265 
266 	/* list of thinint input queues */
267 	struct list_head entry;
268 
269 	/* upper-layer program handler */
270 	qdio_handler_t (*handler);
271 
272 	struct dentry *debugfs_q;
273 	struct qdio_irq *irq_ptr;
274 	struct sl *sl;
275 	/*
276 	 * A page is allocated under this pointer and used for slib and sl.
277 	 * slib is 2048 bytes big and sl points to offset PAGE_SIZE / 2.
278 	 */
279 	struct slib *slib;
280 } __attribute__ ((aligned(256)));
281 
282 struct qdio_irq {
283 	struct qib qib;
284 	u32 *dsci;		/* address of device state change indicator */
285 	struct ccw_device *cdev;
286 	struct dentry *debugfs_dev;
287 	struct dentry *debugfs_perf;
288 
289 	unsigned long int_parm;
290 	struct subchannel_id schid;
291 	unsigned long sch_token;	/* QEBSM facility */
292 
293 	enum qdio_irq_states state;
294 
295 	struct siga_flag siga_flag;	/* siga sync information from qdioac */
296 
297 	int nr_input_qs;
298 	int nr_output_qs;
299 
300 	struct ccw1 ccw;
301 	struct ciw equeue;
302 	struct ciw aqueue;
303 
304 	struct qdio_ssqd_desc ssqd_desc;
305 	void (*orig_handler) (struct ccw_device *, unsigned long, struct irb *);
306 
307 	int perf_stat_enabled;
308 
309 	struct qdr *qdr;
310 	unsigned long chsc_page;
311 
312 	struct qdio_q *input_qs[QDIO_MAX_QUEUES_PER_IRQ];
313 	struct qdio_q *output_qs[QDIO_MAX_QUEUES_PER_IRQ];
314 
315 	debug_info_t *debug_area;
316 	struct mutex setup_mutex;
317 	struct qdio_dev_perf_stat perf_stat;
318 };
319 
320 /* helper functions */
321 #define queue_type(q)	q->irq_ptr->qib.qfmt
322 #define SCH_NO(q)	(q->irq_ptr->schid.sch_no)
323 
324 #define is_thinint_irq(irq) \
325 	(irq->qib.qfmt == QDIO_IQDIO_QFMT || \
326 	 css_general_characteristics.aif_osa)
327 
328 #define qperf(__qdev, __attr)	((__qdev)->perf_stat.(__attr))
329 
330 #define qperf_inc(__q, __attr)						\
331 ({									\
332 	struct qdio_irq *qdev = (__q)->irq_ptr;				\
333 	if (qdev->perf_stat_enabled)					\
334 		(qdev->perf_stat.__attr)++;				\
335 })
336 
337 static inline void account_sbals_error(struct qdio_q *q, int count)
338 {
339 	q->q_stats.nr_sbal_error += count;
340 	q->q_stats.nr_sbal_total += count;
341 }
342 
343 /* the highest iqdio queue is used for multicast */
344 static inline int multicast_outbound(struct qdio_q *q)
345 {
346 	return (q->irq_ptr->nr_output_qs > 1) &&
347 	       (q->nr == q->irq_ptr->nr_output_qs - 1);
348 }
349 
350 #define pci_out_supported(q) \
351 	(q->irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED)
352 #define is_qebsm(q)			(q->irq_ptr->sch_token != 0)
353 
354 #define need_siga_in(q)			(q->irq_ptr->siga_flag.input)
355 #define need_siga_out(q)		(q->irq_ptr->siga_flag.output)
356 #define need_siga_sync(q)		(unlikely(q->irq_ptr->siga_flag.sync))
357 #define need_siga_sync_after_ai(q)	\
358 	(unlikely(q->irq_ptr->siga_flag.sync_after_ai))
359 #define need_siga_sync_out_after_pci(q)	\
360 	(unlikely(q->irq_ptr->siga_flag.sync_out_after_pci))
361 
362 #define for_each_input_queue(irq_ptr, q, i)	\
363 	for (i = 0, q = irq_ptr->input_qs[0];	\
364 		i < irq_ptr->nr_input_qs;	\
365 		q = irq_ptr->input_qs[++i])
366 #define for_each_output_queue(irq_ptr, q, i)	\
367 	for (i = 0, q = irq_ptr->output_qs[0];	\
368 		i < irq_ptr->nr_output_qs;	\
369 		q = irq_ptr->output_qs[++i])
370 
371 #define prev_buf(bufnr)	\
372 	((bufnr + QDIO_MAX_BUFFERS_MASK) & QDIO_MAX_BUFFERS_MASK)
373 #define next_buf(bufnr)	\
374 	((bufnr + 1) & QDIO_MAX_BUFFERS_MASK)
375 #define add_buf(bufnr, inc) \
376 	((bufnr + inc) & QDIO_MAX_BUFFERS_MASK)
377 #define sub_buf(bufnr, dec) \
378 	((bufnr - dec) & QDIO_MAX_BUFFERS_MASK)
379 
380 #define queue_irqs_enabled(q)			\
381 	(test_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state) == 0)
382 #define queue_irqs_disabled(q)			\
383 	(test_bit(QDIO_QUEUE_IRQS_DISABLED, &q->u.in.queue_irq_state) != 0)
384 
385 extern u64 last_ai_time;
386 
387 /* prototypes for thin interrupt */
388 void qdio_setup_thinint(struct qdio_irq *irq_ptr);
389 int qdio_establish_thinint(struct qdio_irq *irq_ptr);
390 void qdio_shutdown_thinint(struct qdio_irq *irq_ptr);
391 void tiqdio_add_input_queues(struct qdio_irq *irq_ptr);
392 void tiqdio_remove_input_queues(struct qdio_irq *irq_ptr);
393 void tiqdio_inbound_processing(unsigned long q);
394 int tiqdio_allocate_memory(void);
395 void tiqdio_free_memory(void);
396 int tiqdio_register_thinints(void);
397 void tiqdio_unregister_thinints(void);
398 void clear_nonshared_ind(struct qdio_irq *);
399 int test_nonshared_ind(struct qdio_irq *);
400 
401 /* prototypes for setup */
402 void qdio_inbound_processing(unsigned long data);
403 void qdio_outbound_processing(unsigned long data);
404 void qdio_outbound_timer(unsigned long data);
405 void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
406 		      struct irb *irb);
407 int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs,
408 		     int nr_output_qs);
409 void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr);
410 int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
411 			struct subchannel_id *schid,
412 			struct qdio_ssqd_desc *data);
413 int qdio_setup_irq(struct qdio_initialize *init_data);
414 void qdio_print_subchannel_info(struct qdio_irq *irq_ptr,
415 				struct ccw_device *cdev);
416 void qdio_release_memory(struct qdio_irq *irq_ptr);
417 int qdio_setup_create_sysfs(struct ccw_device *cdev);
418 void qdio_setup_destroy_sysfs(struct ccw_device *cdev);
419 int qdio_setup_init(void);
420 void qdio_setup_exit(void);
421 int qdio_enable_async_operation(struct qdio_output_q *q);
422 void qdio_disable_async_operation(struct qdio_output_q *q);
423 struct qaob *qdio_allocate_aob(void);
424 
425 int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
426 			unsigned char *state);
427 #endif /* _CIO_QDIO_H */
428