1 #ifndef S390_CIO_IOASM_H 2 #define S390_CIO_IOASM_H 3 4 #include <asm/chpid.h> 5 #include <asm/schid.h> 6 7 /* 8 * TPI info structure 9 */ 10 struct tpi_info { 11 struct subchannel_id schid; 12 __u32 intparm; /* interruption parameter */ 13 __u32 adapter_IO : 1; 14 __u32 reserved2 : 1; 15 __u32 isc : 3; 16 __u32 reserved3 : 12; 17 __u32 int_type : 3; 18 __u32 reserved4 : 12; 19 } __attribute__ ((packed)); 20 21 22 /* 23 * Some S390 specific IO instructions as inline 24 */ 25 26 static inline int stsch(struct subchannel_id schid, 27 volatile struct schib *addr) 28 { 29 register struct subchannel_id reg1 asm ("1") = schid; 30 int ccode; 31 32 asm volatile( 33 " stsch 0(%2)\n" 34 " ipm %0\n" 35 " srl %0,28" 36 : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); 37 return ccode; 38 } 39 40 static inline int stsch_err(struct subchannel_id schid, 41 volatile struct schib *addr) 42 { 43 register struct subchannel_id reg1 asm ("1") = schid; 44 int ccode = -EIO; 45 46 asm volatile( 47 " stsch 0(%2)\n" 48 "0: ipm %0\n" 49 " srl %0,28\n" 50 "1:\n" 51 EX_TABLE(0b,1b) 52 : "+d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); 53 return ccode; 54 } 55 56 static inline int msch(struct subchannel_id schid, 57 volatile struct schib *addr) 58 { 59 register struct subchannel_id reg1 asm ("1") = schid; 60 int ccode; 61 62 asm volatile( 63 " msch 0(%2)\n" 64 " ipm %0\n" 65 " srl %0,28" 66 : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); 67 return ccode; 68 } 69 70 static inline int msch_err(struct subchannel_id schid, 71 volatile struct schib *addr) 72 { 73 register struct subchannel_id reg1 asm ("1") = schid; 74 int ccode = -EIO; 75 76 asm volatile( 77 " msch 0(%2)\n" 78 "0: ipm %0\n" 79 " srl %0,28\n" 80 "1:\n" 81 EX_TABLE(0b,1b) 82 : "+d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); 83 return ccode; 84 } 85 86 static inline int tsch(struct subchannel_id schid, 87 volatile struct irb *addr) 88 { 89 register struct subchannel_id reg1 asm ("1") = schid; 90 int ccode; 91 92 asm volatile( 93 " tsch 0(%2)\n" 94 " ipm %0\n" 95 " srl %0,28" 96 : "=d" (ccode) : "d" (reg1), "a" (addr), "m" (*addr) : "cc"); 97 return ccode; 98 } 99 100 static inline int tpi( volatile struct tpi_info *addr) 101 { 102 int ccode; 103 104 asm volatile( 105 " tpi 0(%1)\n" 106 " ipm %0\n" 107 " srl %0,28" 108 : "=d" (ccode) : "a" (addr), "m" (*addr) : "cc"); 109 return ccode; 110 } 111 112 static inline int chsc(void *chsc_area) 113 { 114 typedef struct { char _[4096]; } addr_type; 115 int cc; 116 117 asm volatile( 118 " .insn rre,0xb25f0000,%2,0\n" 119 " ipm %0\n" 120 " srl %0,28\n" 121 : "=d" (cc), "=m" (*(addr_type *) chsc_area) 122 : "d" (chsc_area), "m" (*(addr_type *) chsc_area) 123 : "cc"); 124 return cc; 125 } 126 127 static inline int rchp(struct chp_id chpid) 128 { 129 register struct chp_id reg1 asm ("1") = chpid; 130 int ccode; 131 132 asm volatile( 133 " lr 1,%1\n" 134 " rchp\n" 135 " ipm %0\n" 136 " srl %0,28" 137 : "=d" (ccode) : "d" (reg1) : "cc"); 138 return ccode; 139 } 140 141 #endif 142