1 /* 2 * An i2c driver for the Xicor/Intersil X1205 RTC 3 * Copyright 2004 Karen Spearel 4 * Copyright 2005 Alessandro Zummo 5 * 6 * please send all reports to: 7 * Karen Spearel <kas111 at gmail dot com> 8 * Alessandro Zummo <a.zummo@towertech.it> 9 * 10 * based on a lot of other RTC drivers. 11 * 12 * Information and datasheet: 13 * http://www.intersil.com/cda/deviceinfo/0,1477,X1205,00.html 14 * 15 * This program is free software; you can redistribute it and/or modify 16 * it under the terms of the GNU General Public License version 2 as 17 * published by the Free Software Foundation. 18 */ 19 20 #include <linux/i2c.h> 21 #include <linux/bcd.h> 22 #include <linux/rtc.h> 23 #include <linux/delay.h> 24 25 #define DRV_VERSION "1.0.8" 26 27 /* offsets into CCR area */ 28 29 #define CCR_SEC 0 30 #define CCR_MIN 1 31 #define CCR_HOUR 2 32 #define CCR_MDAY 3 33 #define CCR_MONTH 4 34 #define CCR_YEAR 5 35 #define CCR_WDAY 6 36 #define CCR_Y2K 7 37 38 #define X1205_REG_SR 0x3F /* status register */ 39 #define X1205_REG_Y2K 0x37 40 #define X1205_REG_DW 0x36 41 #define X1205_REG_YR 0x35 42 #define X1205_REG_MO 0x34 43 #define X1205_REG_DT 0x33 44 #define X1205_REG_HR 0x32 45 #define X1205_REG_MN 0x31 46 #define X1205_REG_SC 0x30 47 #define X1205_REG_DTR 0x13 48 #define X1205_REG_ATR 0x12 49 #define X1205_REG_INT 0x11 50 #define X1205_REG_0 0x10 51 #define X1205_REG_Y2K1 0x0F 52 #define X1205_REG_DWA1 0x0E 53 #define X1205_REG_YRA1 0x0D 54 #define X1205_REG_MOA1 0x0C 55 #define X1205_REG_DTA1 0x0B 56 #define X1205_REG_HRA1 0x0A 57 #define X1205_REG_MNA1 0x09 58 #define X1205_REG_SCA1 0x08 59 #define X1205_REG_Y2K0 0x07 60 #define X1205_REG_DWA0 0x06 61 #define X1205_REG_YRA0 0x05 62 #define X1205_REG_MOA0 0x04 63 #define X1205_REG_DTA0 0x03 64 #define X1205_REG_HRA0 0x02 65 #define X1205_REG_MNA0 0x01 66 #define X1205_REG_SCA0 0x00 67 68 #define X1205_CCR_BASE 0x30 /* Base address of CCR */ 69 #define X1205_ALM0_BASE 0x00 /* Base address of ALARM0 */ 70 71 #define X1205_SR_RTCF 0x01 /* Clock failure */ 72 #define X1205_SR_WEL 0x02 /* Write Enable Latch */ 73 #define X1205_SR_RWEL 0x04 /* Register Write Enable */ 74 #define X1205_SR_AL0 0x20 /* Alarm 0 match */ 75 76 #define X1205_DTR_DTR0 0x01 77 #define X1205_DTR_DTR1 0x02 78 #define X1205_DTR_DTR2 0x04 79 80 #define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */ 81 82 #define X1205_INT_AL0E 0x20 /* Alarm 0 enable */ 83 84 static struct i2c_driver x1205_driver; 85 86 /* 87 * In the routines that deal directly with the x1205 hardware, we use 88 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch 89 * Epoch is initialized as 2000. Time is set to UTC. 90 */ 91 static int x1205_get_datetime(struct i2c_client *client, struct rtc_time *tm, 92 unsigned char reg_base) 93 { 94 unsigned char dt_addr[2] = { 0, reg_base }; 95 unsigned char buf[8]; 96 int i; 97 98 struct i2c_msg msgs[] = { 99 { client->addr, 0, 2, dt_addr }, /* setup read ptr */ 100 { client->addr, I2C_M_RD, 8, buf }, /* read date */ 101 }; 102 103 /* read date registers */ 104 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) { 105 dev_err(&client->dev, "%s: read error\n", __func__); 106 return -EIO; 107 } 108 109 dev_dbg(&client->dev, 110 "%s: raw read data - sec=%02x, min=%02x, hr=%02x, " 111 "mday=%02x, mon=%02x, year=%02x, wday=%02x, y2k=%02x\n", 112 __func__, 113 buf[0], buf[1], buf[2], buf[3], 114 buf[4], buf[5], buf[6], buf[7]); 115 116 /* Mask out the enable bits if these are alarm registers */ 117 if (reg_base < X1205_CCR_BASE) 118 for (i = 0; i <= 4; i++) 119 buf[i] &= 0x7F; 120 121 tm->tm_sec = bcd2bin(buf[CCR_SEC]); 122 tm->tm_min = bcd2bin(buf[CCR_MIN]); 123 tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */ 124 tm->tm_mday = bcd2bin(buf[CCR_MDAY]); 125 tm->tm_mon = bcd2bin(buf[CCR_MONTH]) - 1; /* mon is 0-11 */ 126 tm->tm_year = bcd2bin(buf[CCR_YEAR]) 127 + (bcd2bin(buf[CCR_Y2K]) * 100) - 1900; 128 tm->tm_wday = buf[CCR_WDAY]; 129 130 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, " 131 "mday=%d, mon=%d, year=%d, wday=%d\n", 132 __func__, 133 tm->tm_sec, tm->tm_min, tm->tm_hour, 134 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); 135 136 return 0; 137 } 138 139 static int x1205_get_status(struct i2c_client *client, unsigned char *sr) 140 { 141 static unsigned char sr_addr[2] = { 0, X1205_REG_SR }; 142 143 struct i2c_msg msgs[] = { 144 { client->addr, 0, 2, sr_addr }, /* setup read ptr */ 145 { client->addr, I2C_M_RD, 1, sr }, /* read status */ 146 }; 147 148 /* read status register */ 149 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) { 150 dev_err(&client->dev, "%s: read error\n", __func__); 151 return -EIO; 152 } 153 154 return 0; 155 } 156 157 static int x1205_set_datetime(struct i2c_client *client, struct rtc_time *tm, 158 int datetoo, u8 reg_base, unsigned char alm_enable) 159 { 160 int i, xfer, nbytes; 161 unsigned char buf[8]; 162 unsigned char rdata[10] = { 0, reg_base }; 163 164 static const unsigned char wel[3] = { 0, X1205_REG_SR, 165 X1205_SR_WEL }; 166 167 static const unsigned char rwel[3] = { 0, X1205_REG_SR, 168 X1205_SR_WEL | X1205_SR_RWEL }; 169 170 static const unsigned char diswe[3] = { 0, X1205_REG_SR, 0 }; 171 172 dev_dbg(&client->dev, 173 "%s: secs=%d, mins=%d, hours=%d\n", 174 __func__, 175 tm->tm_sec, tm->tm_min, tm->tm_hour); 176 177 buf[CCR_SEC] = bin2bcd(tm->tm_sec); 178 buf[CCR_MIN] = bin2bcd(tm->tm_min); 179 180 /* set hour and 24hr bit */ 181 buf[CCR_HOUR] = bin2bcd(tm->tm_hour) | X1205_HR_MIL; 182 183 /* should we also set the date? */ 184 if (datetoo) { 185 dev_dbg(&client->dev, 186 "%s: mday=%d, mon=%d, year=%d, wday=%d\n", 187 __func__, 188 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); 189 190 buf[CCR_MDAY] = bin2bcd(tm->tm_mday); 191 192 /* month, 1 - 12 */ 193 buf[CCR_MONTH] = bin2bcd(tm->tm_mon + 1); 194 195 /* year, since the rtc epoch*/ 196 buf[CCR_YEAR] = bin2bcd(tm->tm_year % 100); 197 buf[CCR_WDAY] = tm->tm_wday & 0x07; 198 buf[CCR_Y2K] = bin2bcd(tm->tm_year / 100); 199 } 200 201 /* If writing alarm registers, set compare bits on registers 0-4 */ 202 if (reg_base < X1205_CCR_BASE) 203 for (i = 0; i <= 4; i++) 204 buf[i] |= 0x80; 205 206 /* this sequence is required to unlock the chip */ 207 if ((xfer = i2c_master_send(client, wel, 3)) != 3) { 208 dev_err(&client->dev, "%s: wel - %d\n", __func__, xfer); 209 return -EIO; 210 } 211 212 if ((xfer = i2c_master_send(client, rwel, 3)) != 3) { 213 dev_err(&client->dev, "%s: rwel - %d\n", __func__, xfer); 214 return -EIO; 215 } 216 217 218 /* write register's data */ 219 if (datetoo) 220 nbytes = 8; 221 else 222 nbytes = 3; 223 for (i = 0; i < nbytes; i++) 224 rdata[2+i] = buf[i]; 225 226 xfer = i2c_master_send(client, rdata, nbytes+2); 227 if (xfer != nbytes+2) { 228 dev_err(&client->dev, 229 "%s: result=%d addr=%02x, data=%02x\n", 230 __func__, 231 xfer, rdata[1], rdata[2]); 232 return -EIO; 233 } 234 235 /* If we wrote to the nonvolatile region, wait 10msec for write cycle*/ 236 if (reg_base < X1205_CCR_BASE) { 237 unsigned char al0e[3] = { 0, X1205_REG_INT, 0 }; 238 239 msleep(10); 240 241 /* ...and set or clear the AL0E bit in the INT register */ 242 243 /* Need to set RWEL again as the write has cleared it */ 244 xfer = i2c_master_send(client, rwel, 3); 245 if (xfer != 3) { 246 dev_err(&client->dev, 247 "%s: aloe rwel - %d\n", 248 __func__, 249 xfer); 250 return -EIO; 251 } 252 253 if (alm_enable) 254 al0e[2] = X1205_INT_AL0E; 255 256 xfer = i2c_master_send(client, al0e, 3); 257 if (xfer != 3) { 258 dev_err(&client->dev, 259 "%s: al0e - %d\n", 260 __func__, 261 xfer); 262 return -EIO; 263 } 264 265 /* and wait 10msec again for this write to complete */ 266 msleep(10); 267 } 268 269 /* disable further writes */ 270 if ((xfer = i2c_master_send(client, diswe, 3)) != 3) { 271 dev_err(&client->dev, "%s: diswe - %d\n", __func__, xfer); 272 return -EIO; 273 } 274 275 return 0; 276 } 277 278 static int x1205_fix_osc(struct i2c_client *client) 279 { 280 int err; 281 struct rtc_time tm; 282 283 tm.tm_hour = tm.tm_min = tm.tm_sec = 0; 284 285 err = x1205_set_datetime(client, &tm, 0, X1205_CCR_BASE, 0); 286 if (err < 0) 287 dev_err(&client->dev, "unable to restart the oscillator\n"); 288 289 return err; 290 } 291 292 static int x1205_get_dtrim(struct i2c_client *client, int *trim) 293 { 294 unsigned char dtr; 295 static unsigned char dtr_addr[2] = { 0, X1205_REG_DTR }; 296 297 struct i2c_msg msgs[] = { 298 { client->addr, 0, 2, dtr_addr }, /* setup read ptr */ 299 { client->addr, I2C_M_RD, 1, &dtr }, /* read dtr */ 300 }; 301 302 /* read dtr register */ 303 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) { 304 dev_err(&client->dev, "%s: read error\n", __func__); 305 return -EIO; 306 } 307 308 dev_dbg(&client->dev, "%s: raw dtr=%x\n", __func__, dtr); 309 310 *trim = 0; 311 312 if (dtr & X1205_DTR_DTR0) 313 *trim += 20; 314 315 if (dtr & X1205_DTR_DTR1) 316 *trim += 10; 317 318 if (dtr & X1205_DTR_DTR2) 319 *trim = -*trim; 320 321 return 0; 322 } 323 324 static int x1205_get_atrim(struct i2c_client *client, int *trim) 325 { 326 s8 atr; 327 static unsigned char atr_addr[2] = { 0, X1205_REG_ATR }; 328 329 struct i2c_msg msgs[] = { 330 { client->addr, 0, 2, atr_addr }, /* setup read ptr */ 331 { client->addr, I2C_M_RD, 1, &atr }, /* read atr */ 332 }; 333 334 /* read atr register */ 335 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) { 336 dev_err(&client->dev, "%s: read error\n", __func__); 337 return -EIO; 338 } 339 340 dev_dbg(&client->dev, "%s: raw atr=%x\n", __func__, atr); 341 342 /* atr is a two's complement value on 6 bits, 343 * perform sign extension. The formula is 344 * Catr = (atr * 0.25pF) + 11.00pF. 345 */ 346 if (atr & 0x20) 347 atr |= 0xC0; 348 349 dev_dbg(&client->dev, "%s: raw atr=%x (%d)\n", __func__, atr, atr); 350 351 *trim = (atr * 250) + 11000; 352 353 dev_dbg(&client->dev, "%s: real=%d\n", __func__, *trim); 354 355 return 0; 356 } 357 358 struct x1205_limit 359 { 360 unsigned char reg, mask, min, max; 361 }; 362 363 static int x1205_validate_client(struct i2c_client *client) 364 { 365 int i, xfer; 366 367 /* Probe array. We will read the register at the specified 368 * address and check if the given bits are zero. 369 */ 370 static const unsigned char probe_zero_pattern[] = { 371 /* register, mask */ 372 X1205_REG_SR, 0x18, 373 X1205_REG_DTR, 0xF8, 374 X1205_REG_ATR, 0xC0, 375 X1205_REG_INT, 0x18, 376 X1205_REG_0, 0xFF, 377 }; 378 379 static const struct x1205_limit probe_limits_pattern[] = { 380 /* register, mask, min, max */ 381 { X1205_REG_Y2K, 0xFF, 19, 20 }, 382 { X1205_REG_DW, 0xFF, 0, 6 }, 383 { X1205_REG_YR, 0xFF, 0, 99 }, 384 { X1205_REG_MO, 0xFF, 0, 12 }, 385 { X1205_REG_DT, 0xFF, 0, 31 }, 386 { X1205_REG_HR, 0x7F, 0, 23 }, 387 { X1205_REG_MN, 0xFF, 0, 59 }, 388 { X1205_REG_SC, 0xFF, 0, 59 }, 389 { X1205_REG_Y2K1, 0xFF, 19, 20 }, 390 { X1205_REG_Y2K0, 0xFF, 19, 20 }, 391 }; 392 393 /* check that registers have bits a 0 where expected */ 394 for (i = 0; i < ARRAY_SIZE(probe_zero_pattern); i += 2) { 395 unsigned char buf; 396 397 unsigned char addr[2] = { 0, probe_zero_pattern[i] }; 398 399 struct i2c_msg msgs[2] = { 400 { client->addr, 0, 2, addr }, 401 { client->addr, I2C_M_RD, 1, &buf }, 402 }; 403 404 if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) { 405 dev_err(&client->dev, 406 "%s: could not read register %x\n", 407 __func__, probe_zero_pattern[i]); 408 409 return -EIO; 410 } 411 412 if ((buf & probe_zero_pattern[i+1]) != 0) { 413 dev_err(&client->dev, 414 "%s: register=%02x, zero pattern=%d, value=%x\n", 415 __func__, probe_zero_pattern[i], i, buf); 416 417 return -ENODEV; 418 } 419 } 420 421 /* check limits (only registers with bcd values) */ 422 for (i = 0; i < ARRAY_SIZE(probe_limits_pattern); i++) { 423 unsigned char reg, value; 424 425 unsigned char addr[2] = { 0, probe_limits_pattern[i].reg }; 426 427 struct i2c_msg msgs[2] = { 428 { client->addr, 0, 2, addr }, 429 { client->addr, I2C_M_RD, 1, ® }, 430 }; 431 432 if ((xfer = i2c_transfer(client->adapter, msgs, 2)) != 2) { 433 dev_err(&client->dev, 434 "%s: could not read register %x\n", 435 __func__, probe_limits_pattern[i].reg); 436 437 return -EIO; 438 } 439 440 value = bcd2bin(reg & probe_limits_pattern[i].mask); 441 442 if (value > probe_limits_pattern[i].max || 443 value < probe_limits_pattern[i].min) { 444 dev_dbg(&client->dev, 445 "%s: register=%x, lim pattern=%d, value=%d\n", 446 __func__, probe_limits_pattern[i].reg, 447 i, value); 448 449 return -ENODEV; 450 } 451 } 452 453 return 0; 454 } 455 456 static int x1205_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 457 { 458 int err; 459 unsigned char intreg, status; 460 static unsigned char int_addr[2] = { 0, X1205_REG_INT }; 461 struct i2c_client *client = to_i2c_client(dev); 462 struct i2c_msg msgs[] = { 463 { client->addr, 0, 2, int_addr }, /* setup read ptr */ 464 { client->addr, I2C_M_RD, 1, &intreg }, /* read INT register */ 465 }; 466 467 /* read interrupt register and status register */ 468 if (i2c_transfer(client->adapter, &msgs[0], 2) != 2) { 469 dev_err(&client->dev, "%s: read error\n", __func__); 470 return -EIO; 471 } 472 err = x1205_get_status(client, &status); 473 if (err == 0) { 474 alrm->pending = (status & X1205_SR_AL0) ? 1 : 0; 475 alrm->enabled = (intreg & X1205_INT_AL0E) ? 1 : 0; 476 err = x1205_get_datetime(client, &alrm->time, X1205_ALM0_BASE); 477 } 478 return err; 479 } 480 481 static int x1205_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 482 { 483 return x1205_set_datetime(to_i2c_client(dev), 484 &alrm->time, 1, X1205_ALM0_BASE, alrm->enabled); 485 } 486 487 static int x1205_rtc_read_time(struct device *dev, struct rtc_time *tm) 488 { 489 return x1205_get_datetime(to_i2c_client(dev), 490 tm, X1205_CCR_BASE); 491 } 492 493 static int x1205_rtc_set_time(struct device *dev, struct rtc_time *tm) 494 { 495 return x1205_set_datetime(to_i2c_client(dev), 496 tm, 1, X1205_CCR_BASE, 0); 497 } 498 499 static int x1205_rtc_proc(struct device *dev, struct seq_file *seq) 500 { 501 int err, dtrim, atrim; 502 503 if ((err = x1205_get_dtrim(to_i2c_client(dev), &dtrim)) == 0) 504 seq_printf(seq, "digital_trim\t: %d ppm\n", dtrim); 505 506 if ((err = x1205_get_atrim(to_i2c_client(dev), &atrim)) == 0) 507 seq_printf(seq, "analog_trim\t: %d.%02d pF\n", 508 atrim / 1000, atrim % 1000); 509 return 0; 510 } 511 512 static const struct rtc_class_ops x1205_rtc_ops = { 513 .proc = x1205_rtc_proc, 514 .read_time = x1205_rtc_read_time, 515 .set_time = x1205_rtc_set_time, 516 .read_alarm = x1205_rtc_read_alarm, 517 .set_alarm = x1205_rtc_set_alarm, 518 }; 519 520 static ssize_t x1205_sysfs_show_atrim(struct device *dev, 521 struct device_attribute *attr, char *buf) 522 { 523 int err, atrim; 524 525 err = x1205_get_atrim(to_i2c_client(dev), &atrim); 526 if (err) 527 return err; 528 529 return sprintf(buf, "%d.%02d pF\n", atrim / 1000, atrim % 1000); 530 } 531 static DEVICE_ATTR(atrim, S_IRUGO, x1205_sysfs_show_atrim, NULL); 532 533 static ssize_t x1205_sysfs_show_dtrim(struct device *dev, 534 struct device_attribute *attr, char *buf) 535 { 536 int err, dtrim; 537 538 err = x1205_get_dtrim(to_i2c_client(dev), &dtrim); 539 if (err) 540 return err; 541 542 return sprintf(buf, "%d ppm\n", dtrim); 543 } 544 static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL); 545 546 static int x1205_sysfs_register(struct device *dev) 547 { 548 int err; 549 550 err = device_create_file(dev, &dev_attr_atrim); 551 if (err) 552 return err; 553 554 err = device_create_file(dev, &dev_attr_dtrim); 555 if (err) 556 device_remove_file(dev, &dev_attr_atrim); 557 558 return err; 559 } 560 561 static void x1205_sysfs_unregister(struct device *dev) 562 { 563 device_remove_file(dev, &dev_attr_atrim); 564 device_remove_file(dev, &dev_attr_dtrim); 565 } 566 567 568 static int x1205_probe(struct i2c_client *client, 569 const struct i2c_device_id *id) 570 { 571 int err = 0; 572 unsigned char sr; 573 struct rtc_device *rtc; 574 575 dev_dbg(&client->dev, "%s\n", __func__); 576 577 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 578 return -ENODEV; 579 580 if (x1205_validate_client(client) < 0) 581 return -ENODEV; 582 583 dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n"); 584 585 rtc = rtc_device_register(x1205_driver.driver.name, &client->dev, 586 &x1205_rtc_ops, THIS_MODULE); 587 588 if (IS_ERR(rtc)) 589 return PTR_ERR(rtc); 590 591 i2c_set_clientdata(client, rtc); 592 593 /* Check for power failures and eventualy enable the osc */ 594 if ((err = x1205_get_status(client, &sr)) == 0) { 595 if (sr & X1205_SR_RTCF) { 596 dev_err(&client->dev, 597 "power failure detected, " 598 "please set the clock\n"); 599 udelay(50); 600 x1205_fix_osc(client); 601 } 602 } 603 else 604 dev_err(&client->dev, "couldn't read status\n"); 605 606 err = x1205_sysfs_register(&client->dev); 607 if (err) 608 goto exit_devreg; 609 610 return 0; 611 612 exit_devreg: 613 rtc_device_unregister(rtc); 614 615 return err; 616 } 617 618 static int x1205_remove(struct i2c_client *client) 619 { 620 struct rtc_device *rtc = i2c_get_clientdata(client); 621 622 rtc_device_unregister(rtc); 623 x1205_sysfs_unregister(&client->dev); 624 return 0; 625 } 626 627 static const struct i2c_device_id x1205_id[] = { 628 { "x1205", 0 }, 629 { } 630 }; 631 MODULE_DEVICE_TABLE(i2c, x1205_id); 632 633 static struct i2c_driver x1205_driver = { 634 .driver = { 635 .name = "rtc-x1205", 636 }, 637 .probe = x1205_probe, 638 .remove = x1205_remove, 639 .id_table = x1205_id, 640 }; 641 642 static int __init x1205_init(void) 643 { 644 return i2c_add_driver(&x1205_driver); 645 } 646 647 static void __exit x1205_exit(void) 648 { 649 i2c_del_driver(&x1205_driver); 650 } 651 652 MODULE_AUTHOR( 653 "Karen Spearel <kas111 at gmail dot com>, " 654 "Alessandro Zummo <a.zummo@towertech.it>"); 655 MODULE_DESCRIPTION("Xicor/Intersil X1205 RTC driver"); 656 MODULE_LICENSE("GPL"); 657 MODULE_VERSION(DRV_VERSION); 658 659 module_init(x1205_init); 660 module_exit(x1205_exit); 661