1 /* 2 * rtc-twl.c -- TWL Real Time Clock interface 3 * 4 * Copyright (C) 2007 MontaVista Software, Inc 5 * Author: Alexandre Rusev <source@mvista.com> 6 * 7 * Based on original TI driver twl4030-rtc.c 8 * Copyright (C) 2006 Texas Instruments, Inc. 9 * 10 * Based on rtc-omap.c 11 * Copyright (C) 2003 MontaVista Software, Inc. 12 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com> 13 * Copyright (C) 2006 David Brownell 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License 17 * as published by the Free Software Foundation; either version 18 * 2 of the License, or (at your option) any later version. 19 */ 20 21 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 22 23 #include <linux/kernel.h> 24 #include <linux/errno.h> 25 #include <linux/init.h> 26 #include <linux/module.h> 27 #include <linux/types.h> 28 #include <linux/rtc.h> 29 #include <linux/bcd.h> 30 #include <linux/platform_device.h> 31 #include <linux/interrupt.h> 32 #include <linux/of.h> 33 34 #include <linux/mfd/twl.h> 35 36 enum twl_class { 37 TWL_4030 = 0, 38 TWL_6030, 39 }; 40 41 /* 42 * RTC block register offsets (use TWL_MODULE_RTC) 43 */ 44 enum { 45 REG_SECONDS_REG = 0, 46 REG_MINUTES_REG, 47 REG_HOURS_REG, 48 REG_DAYS_REG, 49 REG_MONTHS_REG, 50 REG_YEARS_REG, 51 REG_WEEKS_REG, 52 53 REG_ALARM_SECONDS_REG, 54 REG_ALARM_MINUTES_REG, 55 REG_ALARM_HOURS_REG, 56 REG_ALARM_DAYS_REG, 57 REG_ALARM_MONTHS_REG, 58 REG_ALARM_YEARS_REG, 59 60 REG_RTC_CTRL_REG, 61 REG_RTC_STATUS_REG, 62 REG_RTC_INTERRUPTS_REG, 63 64 REG_RTC_COMP_LSB_REG, 65 REG_RTC_COMP_MSB_REG, 66 }; 67 static const u8 twl4030_rtc_reg_map[] = { 68 [REG_SECONDS_REG] = 0x00, 69 [REG_MINUTES_REG] = 0x01, 70 [REG_HOURS_REG] = 0x02, 71 [REG_DAYS_REG] = 0x03, 72 [REG_MONTHS_REG] = 0x04, 73 [REG_YEARS_REG] = 0x05, 74 [REG_WEEKS_REG] = 0x06, 75 76 [REG_ALARM_SECONDS_REG] = 0x07, 77 [REG_ALARM_MINUTES_REG] = 0x08, 78 [REG_ALARM_HOURS_REG] = 0x09, 79 [REG_ALARM_DAYS_REG] = 0x0A, 80 [REG_ALARM_MONTHS_REG] = 0x0B, 81 [REG_ALARM_YEARS_REG] = 0x0C, 82 83 [REG_RTC_CTRL_REG] = 0x0D, 84 [REG_RTC_STATUS_REG] = 0x0E, 85 [REG_RTC_INTERRUPTS_REG] = 0x0F, 86 87 [REG_RTC_COMP_LSB_REG] = 0x10, 88 [REG_RTC_COMP_MSB_REG] = 0x11, 89 }; 90 static const u8 twl6030_rtc_reg_map[] = { 91 [REG_SECONDS_REG] = 0x00, 92 [REG_MINUTES_REG] = 0x01, 93 [REG_HOURS_REG] = 0x02, 94 [REG_DAYS_REG] = 0x03, 95 [REG_MONTHS_REG] = 0x04, 96 [REG_YEARS_REG] = 0x05, 97 [REG_WEEKS_REG] = 0x06, 98 99 [REG_ALARM_SECONDS_REG] = 0x08, 100 [REG_ALARM_MINUTES_REG] = 0x09, 101 [REG_ALARM_HOURS_REG] = 0x0A, 102 [REG_ALARM_DAYS_REG] = 0x0B, 103 [REG_ALARM_MONTHS_REG] = 0x0C, 104 [REG_ALARM_YEARS_REG] = 0x0D, 105 106 [REG_RTC_CTRL_REG] = 0x10, 107 [REG_RTC_STATUS_REG] = 0x11, 108 [REG_RTC_INTERRUPTS_REG] = 0x12, 109 110 [REG_RTC_COMP_LSB_REG] = 0x13, 111 [REG_RTC_COMP_MSB_REG] = 0x14, 112 }; 113 114 /* RTC_CTRL_REG bitfields */ 115 #define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01 116 #define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02 117 #define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04 118 #define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08 119 #define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10 120 #define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20 121 #define BIT_RTC_CTRL_REG_GET_TIME_M 0x40 122 #define BIT_RTC_CTRL_REG_RTC_V_OPT 0x80 123 124 /* RTC_STATUS_REG bitfields */ 125 #define BIT_RTC_STATUS_REG_RUN_M 0x02 126 #define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04 127 #define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08 128 #define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10 129 #define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20 130 #define BIT_RTC_STATUS_REG_ALARM_M 0x40 131 #define BIT_RTC_STATUS_REG_POWER_UP_M 0x80 132 133 /* RTC_INTERRUPTS_REG bitfields */ 134 #define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03 135 #define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04 136 #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08 137 138 139 /* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */ 140 #define ALL_TIME_REGS 6 141 142 /*----------------------------------------------------------------------*/ 143 struct twl_rtc { 144 struct device *dev; 145 struct rtc_device *rtc; 146 u8 *reg_map; 147 /* 148 * Cache the value for timer/alarm interrupts register; this is 149 * only changed by callers holding rtc ops lock (or resume). 150 */ 151 unsigned char rtc_irq_bits; 152 bool wake_enabled; 153 #ifdef CONFIG_PM_SLEEP 154 unsigned char irqstat; 155 #endif 156 enum twl_class class; 157 }; 158 159 /* 160 * Supports 1 byte read from TWL RTC register. 161 */ 162 static int twl_rtc_read_u8(struct twl_rtc *twl_rtc, u8 *data, u8 reg) 163 { 164 int ret; 165 166 ret = twl_i2c_read_u8(TWL_MODULE_RTC, data, (twl_rtc->reg_map[reg])); 167 if (ret < 0) 168 pr_err("Could not read TWL register %X - error %d\n", reg, ret); 169 return ret; 170 } 171 172 /* 173 * Supports 1 byte write to TWL RTC registers. 174 */ 175 static int twl_rtc_write_u8(struct twl_rtc *twl_rtc, u8 data, u8 reg) 176 { 177 int ret; 178 179 ret = twl_i2c_write_u8(TWL_MODULE_RTC, data, (twl_rtc->reg_map[reg])); 180 if (ret < 0) 181 pr_err("Could not write TWL register %X - error %d\n", 182 reg, ret); 183 return ret; 184 } 185 186 /* 187 * Enable 1/second update and/or alarm interrupts. 188 */ 189 static int set_rtc_irq_bit(struct twl_rtc *twl_rtc, unsigned char bit) 190 { 191 unsigned char val; 192 int ret; 193 194 /* if the bit is set, return from here */ 195 if (twl_rtc->rtc_irq_bits & bit) 196 return 0; 197 198 val = twl_rtc->rtc_irq_bits | bit; 199 val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M; 200 ret = twl_rtc_write_u8(twl_rtc, val, REG_RTC_INTERRUPTS_REG); 201 if (ret == 0) 202 twl_rtc->rtc_irq_bits = val; 203 204 return ret; 205 } 206 207 /* 208 * Disable update and/or alarm interrupts. 209 */ 210 static int mask_rtc_irq_bit(struct twl_rtc *twl_rtc, unsigned char bit) 211 { 212 unsigned char val; 213 int ret; 214 215 /* if the bit is clear, return from here */ 216 if (!(twl_rtc->rtc_irq_bits & bit)) 217 return 0; 218 219 val = twl_rtc->rtc_irq_bits & ~bit; 220 ret = twl_rtc_write_u8(twl_rtc, val, REG_RTC_INTERRUPTS_REG); 221 if (ret == 0) 222 twl_rtc->rtc_irq_bits = val; 223 224 return ret; 225 } 226 227 static int twl_rtc_alarm_irq_enable(struct device *dev, unsigned enabled) 228 { 229 struct platform_device *pdev = to_platform_device(dev); 230 struct twl_rtc *twl_rtc = dev_get_drvdata(dev); 231 int irq = platform_get_irq(pdev, 0); 232 int ret; 233 234 if (enabled) { 235 ret = set_rtc_irq_bit(twl_rtc, 236 BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); 237 if (device_can_wakeup(dev) && !twl_rtc->wake_enabled) { 238 enable_irq_wake(irq); 239 twl_rtc->wake_enabled = true; 240 } 241 } else { 242 ret = mask_rtc_irq_bit(twl_rtc, 243 BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); 244 if (twl_rtc->wake_enabled) { 245 disable_irq_wake(irq); 246 twl_rtc->wake_enabled = false; 247 } 248 } 249 250 return ret; 251 } 252 253 /* 254 * Gets current TWL RTC time and date parameters. 255 * 256 * The RTC's time/alarm representation is not what gmtime(3) requires 257 * Linux to use: 258 * 259 * - Months are 1..12 vs Linux 0-11 260 * - Years are 0..99 vs Linux 1900..N (we assume 21st century) 261 */ 262 static int twl_rtc_read_time(struct device *dev, struct rtc_time *tm) 263 { 264 struct twl_rtc *twl_rtc = dev_get_drvdata(dev); 265 unsigned char rtc_data[ALL_TIME_REGS]; 266 int ret; 267 u8 save_control; 268 u8 rtc_control; 269 270 ret = twl_rtc_read_u8(twl_rtc, &save_control, REG_RTC_CTRL_REG); 271 if (ret < 0) { 272 dev_err(dev, "%s: reading CTRL_REG, error %d\n", __func__, ret); 273 return ret; 274 } 275 /* for twl6030/32 make sure BIT_RTC_CTRL_REG_GET_TIME_M is clear */ 276 if (twl_rtc->class == TWL_6030) { 277 if (save_control & BIT_RTC_CTRL_REG_GET_TIME_M) { 278 save_control &= ~BIT_RTC_CTRL_REG_GET_TIME_M; 279 ret = twl_rtc_write_u8(twl_rtc, save_control, 280 REG_RTC_CTRL_REG); 281 if (ret < 0) { 282 dev_err(dev, "%s clr GET_TIME, error %d\n", 283 __func__, ret); 284 return ret; 285 } 286 } 287 } 288 289 /* Copy RTC counting registers to static registers or latches */ 290 rtc_control = save_control | BIT_RTC_CTRL_REG_GET_TIME_M; 291 292 /* for twl6030/32 enable read access to static shadowed registers */ 293 if (twl_rtc->class == TWL_6030) 294 rtc_control |= BIT_RTC_CTRL_REG_RTC_V_OPT; 295 296 ret = twl_rtc_write_u8(twl_rtc, rtc_control, REG_RTC_CTRL_REG); 297 if (ret < 0) { 298 dev_err(dev, "%s: writing CTRL_REG, error %d\n", __func__, ret); 299 return ret; 300 } 301 302 ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data, 303 (twl_rtc->reg_map[REG_SECONDS_REG]), ALL_TIME_REGS); 304 305 if (ret < 0) { 306 dev_err(dev, "%s: reading data, error %d\n", __func__, ret); 307 return ret; 308 } 309 310 /* for twl6030 restore original state of rtc control register */ 311 if (twl_rtc->class == TWL_6030) { 312 ret = twl_rtc_write_u8(twl_rtc, save_control, REG_RTC_CTRL_REG); 313 if (ret < 0) { 314 dev_err(dev, "%s: restore CTRL_REG, error %d\n", 315 __func__, ret); 316 return ret; 317 } 318 } 319 320 tm->tm_sec = bcd2bin(rtc_data[0]); 321 tm->tm_min = bcd2bin(rtc_data[1]); 322 tm->tm_hour = bcd2bin(rtc_data[2]); 323 tm->tm_mday = bcd2bin(rtc_data[3]); 324 tm->tm_mon = bcd2bin(rtc_data[4]) - 1; 325 tm->tm_year = bcd2bin(rtc_data[5]) + 100; 326 327 return ret; 328 } 329 330 static int twl_rtc_set_time(struct device *dev, struct rtc_time *tm) 331 { 332 struct twl_rtc *twl_rtc = dev_get_drvdata(dev); 333 unsigned char save_control; 334 unsigned char rtc_data[ALL_TIME_REGS]; 335 int ret; 336 337 rtc_data[0] = bin2bcd(tm->tm_sec); 338 rtc_data[1] = bin2bcd(tm->tm_min); 339 rtc_data[2] = bin2bcd(tm->tm_hour); 340 rtc_data[3] = bin2bcd(tm->tm_mday); 341 rtc_data[4] = bin2bcd(tm->tm_mon + 1); 342 rtc_data[5] = bin2bcd(tm->tm_year - 100); 343 344 /* Stop RTC while updating the TC registers */ 345 ret = twl_rtc_read_u8(twl_rtc, &save_control, REG_RTC_CTRL_REG); 346 if (ret < 0) 347 goto out; 348 349 save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M; 350 ret = twl_rtc_write_u8(twl_rtc, save_control, REG_RTC_CTRL_REG); 351 if (ret < 0) 352 goto out; 353 354 /* update all the time registers in one shot */ 355 ret = twl_i2c_write(TWL_MODULE_RTC, rtc_data, 356 (twl_rtc->reg_map[REG_SECONDS_REG]), ALL_TIME_REGS); 357 if (ret < 0) { 358 dev_err(dev, "rtc_set_time error %d\n", ret); 359 goto out; 360 } 361 362 /* Start back RTC */ 363 save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M; 364 ret = twl_rtc_write_u8(twl_rtc, save_control, REG_RTC_CTRL_REG); 365 366 out: 367 return ret; 368 } 369 370 /* 371 * Gets current TWL RTC alarm time. 372 */ 373 static int twl_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) 374 { 375 struct twl_rtc *twl_rtc = dev_get_drvdata(dev); 376 unsigned char rtc_data[ALL_TIME_REGS]; 377 int ret; 378 379 ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data, 380 twl_rtc->reg_map[REG_ALARM_SECONDS_REG], ALL_TIME_REGS); 381 if (ret < 0) { 382 dev_err(dev, "rtc_read_alarm error %d\n", ret); 383 return ret; 384 } 385 386 /* some of these fields may be wildcard/"match all" */ 387 alm->time.tm_sec = bcd2bin(rtc_data[0]); 388 alm->time.tm_min = bcd2bin(rtc_data[1]); 389 alm->time.tm_hour = bcd2bin(rtc_data[2]); 390 alm->time.tm_mday = bcd2bin(rtc_data[3]); 391 alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1; 392 alm->time.tm_year = bcd2bin(rtc_data[5]) + 100; 393 394 /* report cached alarm enable state */ 395 if (twl_rtc->rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M) 396 alm->enabled = 1; 397 398 return ret; 399 } 400 401 static int twl_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) 402 { 403 struct twl_rtc *twl_rtc = dev_get_drvdata(dev); 404 405 unsigned char alarm_data[ALL_TIME_REGS]; 406 int ret; 407 408 ret = twl_rtc_alarm_irq_enable(dev, 0); 409 if (ret) 410 goto out; 411 412 alarm_data[0] = bin2bcd(alm->time.tm_sec); 413 alarm_data[1] = bin2bcd(alm->time.tm_min); 414 alarm_data[2] = bin2bcd(alm->time.tm_hour); 415 alarm_data[3] = bin2bcd(alm->time.tm_mday); 416 alarm_data[4] = bin2bcd(alm->time.tm_mon + 1); 417 alarm_data[5] = bin2bcd(alm->time.tm_year - 100); 418 419 /* update all the alarm registers in one shot */ 420 ret = twl_i2c_write(TWL_MODULE_RTC, alarm_data, 421 twl_rtc->reg_map[REG_ALARM_SECONDS_REG], ALL_TIME_REGS); 422 if (ret) { 423 dev_err(dev, "rtc_set_alarm error %d\n", ret); 424 goto out; 425 } 426 427 if (alm->enabled) 428 ret = twl_rtc_alarm_irq_enable(dev, 1); 429 out: 430 return ret; 431 } 432 433 static irqreturn_t twl_rtc_interrupt(int irq, void *data) 434 { 435 struct twl_rtc *twl_rtc = data; 436 unsigned long events; 437 int ret = IRQ_NONE; 438 int res; 439 u8 rd_reg; 440 441 res = twl_rtc_read_u8(twl_rtc, &rd_reg, REG_RTC_STATUS_REG); 442 if (res) 443 goto out; 444 /* 445 * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG. 446 * only one (ALARM or RTC) interrupt source may be enabled 447 * at time, we also could check our results 448 * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM] 449 */ 450 if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M) 451 events = RTC_IRQF | RTC_AF; 452 else 453 events = RTC_IRQF | RTC_PF; 454 455 res = twl_rtc_write_u8(twl_rtc, BIT_RTC_STATUS_REG_ALARM_M, 456 REG_RTC_STATUS_REG); 457 if (res) 458 goto out; 459 460 if (twl_rtc->class == TWL_4030) { 461 /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1 462 * needs 2 reads to clear the interrupt. One read is done in 463 * do_twl_pwrirq(). Doing the second read, to clear 464 * the bit. 465 * 466 * FIXME the reason PWR_ISR1 needs an extra read is that 467 * RTC_IF retriggered until we cleared REG_ALARM_M above. 468 * But re-reading like this is a bad hack; by doing so we 469 * risk wrongly clearing status for some other IRQ (losing 470 * the interrupt). Be smarter about handling RTC_UF ... 471 */ 472 res = twl_i2c_read_u8(TWL4030_MODULE_INT, 473 &rd_reg, TWL4030_INT_PWR_ISR1); 474 if (res) 475 goto out; 476 } 477 478 /* Notify RTC core on event */ 479 rtc_update_irq(twl_rtc->rtc, 1, events); 480 481 ret = IRQ_HANDLED; 482 out: 483 return ret; 484 } 485 486 static const struct rtc_class_ops twl_rtc_ops = { 487 .read_time = twl_rtc_read_time, 488 .set_time = twl_rtc_set_time, 489 .read_alarm = twl_rtc_read_alarm, 490 .set_alarm = twl_rtc_set_alarm, 491 .alarm_irq_enable = twl_rtc_alarm_irq_enable, 492 }; 493 494 /*----------------------------------------------------------------------*/ 495 496 static int twl_rtc_probe(struct platform_device *pdev) 497 { 498 struct twl_rtc *twl_rtc; 499 struct device_node *np = pdev->dev.of_node; 500 int ret = -EINVAL; 501 int irq = platform_get_irq(pdev, 0); 502 u8 rd_reg; 503 504 if (!np) { 505 dev_err(&pdev->dev, "no DT info\n"); 506 return -EINVAL; 507 } 508 509 if (irq <= 0) 510 return ret; 511 512 twl_rtc = devm_kzalloc(&pdev->dev, sizeof(*twl_rtc), GFP_KERNEL); 513 if (!twl_rtc) 514 return -ENOMEM; 515 516 if (twl_class_is_4030()) { 517 twl_rtc->class = TWL_4030; 518 twl_rtc->reg_map = (u8 *)twl4030_rtc_reg_map; 519 } else if (twl_class_is_6030()) { 520 twl_rtc->class = TWL_6030; 521 twl_rtc->reg_map = (u8 *)twl6030_rtc_reg_map; 522 } else { 523 dev_err(&pdev->dev, "TWL Class not supported.\n"); 524 return -EINVAL; 525 } 526 527 ret = twl_rtc_read_u8(twl_rtc, &rd_reg, REG_RTC_STATUS_REG); 528 if (ret < 0) 529 return ret; 530 531 if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M) 532 dev_warn(&pdev->dev, "Power up reset detected.\n"); 533 534 if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M) 535 dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n"); 536 537 /* Clear RTC Power up reset and pending alarm interrupts */ 538 ret = twl_rtc_write_u8(twl_rtc, rd_reg, REG_RTC_STATUS_REG); 539 if (ret < 0) 540 return ret; 541 542 if (twl_rtc->class == TWL_6030) { 543 twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK, 544 REG_INT_MSK_LINE_A); 545 twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK, 546 REG_INT_MSK_STS_A); 547 } 548 549 dev_info(&pdev->dev, "Enabling TWL-RTC\n"); 550 ret = twl_rtc_write_u8(twl_rtc, BIT_RTC_CTRL_REG_STOP_RTC_M, 551 REG_RTC_CTRL_REG); 552 if (ret < 0) 553 return ret; 554 555 /* ensure interrupts are disabled, bootloaders can be strange */ 556 ret = twl_rtc_write_u8(twl_rtc, 0, REG_RTC_INTERRUPTS_REG); 557 if (ret < 0) 558 dev_warn(&pdev->dev, "unable to disable interrupt\n"); 559 560 /* init cached IRQ enable bits */ 561 ret = twl_rtc_read_u8(twl_rtc, &twl_rtc->rtc_irq_bits, 562 REG_RTC_INTERRUPTS_REG); 563 if (ret < 0) 564 return ret; 565 566 platform_set_drvdata(pdev, twl_rtc); 567 device_init_wakeup(&pdev->dev, 1); 568 569 twl_rtc->rtc = devm_rtc_device_register(&pdev->dev, pdev->name, 570 &twl_rtc_ops, THIS_MODULE); 571 if (IS_ERR(twl_rtc->rtc)) { 572 dev_err(&pdev->dev, "can't register RTC device, err %ld\n", 573 PTR_ERR(twl_rtc->rtc)); 574 return PTR_ERR(twl_rtc->rtc); 575 } 576 577 ret = devm_request_threaded_irq(&pdev->dev, irq, NULL, 578 twl_rtc_interrupt, 579 IRQF_TRIGGER_RISING | IRQF_ONESHOT, 580 dev_name(&twl_rtc->rtc->dev), twl_rtc); 581 if (ret < 0) { 582 dev_err(&pdev->dev, "IRQ is not free.\n"); 583 return ret; 584 } 585 586 return 0; 587 } 588 589 /* 590 * Disable all TWL RTC module interrupts. 591 * Sets status flag to free. 592 */ 593 static int twl_rtc_remove(struct platform_device *pdev) 594 { 595 struct twl_rtc *twl_rtc = platform_get_drvdata(pdev); 596 597 /* leave rtc running, but disable irqs */ 598 mask_rtc_irq_bit(twl_rtc, BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); 599 mask_rtc_irq_bit(twl_rtc, BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); 600 if (twl_rtc->class == TWL_6030) { 601 twl6030_interrupt_mask(TWL6030_RTC_INT_MASK, 602 REG_INT_MSK_LINE_A); 603 twl6030_interrupt_mask(TWL6030_RTC_INT_MASK, 604 REG_INT_MSK_STS_A); 605 } 606 607 return 0; 608 } 609 610 static void twl_rtc_shutdown(struct platform_device *pdev) 611 { 612 struct twl_rtc *twl_rtc = platform_get_drvdata(pdev); 613 614 /* mask timer interrupts, but leave alarm interrupts on to enable 615 power-on when alarm is triggered */ 616 mask_rtc_irq_bit(twl_rtc, BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); 617 } 618 619 #ifdef CONFIG_PM_SLEEP 620 static int twl_rtc_suspend(struct device *dev) 621 { 622 struct twl_rtc *twl_rtc = dev_get_drvdata(dev); 623 624 twl_rtc->irqstat = twl_rtc->rtc_irq_bits; 625 626 mask_rtc_irq_bit(twl_rtc, BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); 627 return 0; 628 } 629 630 static int twl_rtc_resume(struct device *dev) 631 { 632 struct twl_rtc *twl_rtc = dev_get_drvdata(dev); 633 634 set_rtc_irq_bit(twl_rtc, twl_rtc->irqstat); 635 return 0; 636 } 637 #endif 638 639 static SIMPLE_DEV_PM_OPS(twl_rtc_pm_ops, twl_rtc_suspend, twl_rtc_resume); 640 641 static const struct of_device_id twl_rtc_of_match[] = { 642 {.compatible = "ti,twl4030-rtc", }, 643 { }, 644 }; 645 MODULE_DEVICE_TABLE(of, twl_rtc_of_match); 646 647 static struct platform_driver twl4030rtc_driver = { 648 .probe = twl_rtc_probe, 649 .remove = twl_rtc_remove, 650 .shutdown = twl_rtc_shutdown, 651 .driver = { 652 .name = "twl_rtc", 653 .pm = &twl_rtc_pm_ops, 654 .of_match_table = twl_rtc_of_match, 655 }, 656 }; 657 658 module_platform_driver(twl4030rtc_driver); 659 660 MODULE_AUTHOR("Texas Instruments, MontaVista Software"); 661 MODULE_LICENSE("GPL"); 662