1 /* 2 * rtc-twl.c -- TWL Real Time Clock interface 3 * 4 * Copyright (C) 2007 MontaVista Software, Inc 5 * Author: Alexandre Rusev <source@mvista.com> 6 * 7 * Based on original TI driver twl4030-rtc.c 8 * Copyright (C) 2006 Texas Instruments, Inc. 9 * 10 * Based on rtc-omap.c 11 * Copyright (C) 2003 MontaVista Software, Inc. 12 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com> 13 * Copyright (C) 2006 David Brownell 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License 17 * as published by the Free Software Foundation; either version 18 * 2 of the License, or (at your option) any later version. 19 */ 20 21 #include <linux/kernel.h> 22 #include <linux/errno.h> 23 #include <linux/init.h> 24 #include <linux/module.h> 25 #include <linux/types.h> 26 #include <linux/rtc.h> 27 #include <linux/bcd.h> 28 #include <linux/platform_device.h> 29 #include <linux/interrupt.h> 30 31 #include <linux/i2c/twl.h> 32 33 34 /* 35 * RTC block register offsets (use TWL_MODULE_RTC) 36 */ 37 enum { 38 REG_SECONDS_REG = 0, 39 REG_MINUTES_REG, 40 REG_HOURS_REG, 41 REG_DAYS_REG, 42 REG_MONTHS_REG, 43 REG_YEARS_REG, 44 REG_WEEKS_REG, 45 46 REG_ALARM_SECONDS_REG, 47 REG_ALARM_MINUTES_REG, 48 REG_ALARM_HOURS_REG, 49 REG_ALARM_DAYS_REG, 50 REG_ALARM_MONTHS_REG, 51 REG_ALARM_YEARS_REG, 52 53 REG_RTC_CTRL_REG, 54 REG_RTC_STATUS_REG, 55 REG_RTC_INTERRUPTS_REG, 56 57 REG_RTC_COMP_LSB_REG, 58 REG_RTC_COMP_MSB_REG, 59 }; 60 static const u8 twl4030_rtc_reg_map[] = { 61 [REG_SECONDS_REG] = 0x00, 62 [REG_MINUTES_REG] = 0x01, 63 [REG_HOURS_REG] = 0x02, 64 [REG_DAYS_REG] = 0x03, 65 [REG_MONTHS_REG] = 0x04, 66 [REG_YEARS_REG] = 0x05, 67 [REG_WEEKS_REG] = 0x06, 68 69 [REG_ALARM_SECONDS_REG] = 0x07, 70 [REG_ALARM_MINUTES_REG] = 0x08, 71 [REG_ALARM_HOURS_REG] = 0x09, 72 [REG_ALARM_DAYS_REG] = 0x0A, 73 [REG_ALARM_MONTHS_REG] = 0x0B, 74 [REG_ALARM_YEARS_REG] = 0x0C, 75 76 [REG_RTC_CTRL_REG] = 0x0D, 77 [REG_RTC_STATUS_REG] = 0x0E, 78 [REG_RTC_INTERRUPTS_REG] = 0x0F, 79 80 [REG_RTC_COMP_LSB_REG] = 0x10, 81 [REG_RTC_COMP_MSB_REG] = 0x11, 82 }; 83 static const u8 twl6030_rtc_reg_map[] = { 84 [REG_SECONDS_REG] = 0x00, 85 [REG_MINUTES_REG] = 0x01, 86 [REG_HOURS_REG] = 0x02, 87 [REG_DAYS_REG] = 0x03, 88 [REG_MONTHS_REG] = 0x04, 89 [REG_YEARS_REG] = 0x05, 90 [REG_WEEKS_REG] = 0x06, 91 92 [REG_ALARM_SECONDS_REG] = 0x08, 93 [REG_ALARM_MINUTES_REG] = 0x09, 94 [REG_ALARM_HOURS_REG] = 0x0A, 95 [REG_ALARM_DAYS_REG] = 0x0B, 96 [REG_ALARM_MONTHS_REG] = 0x0C, 97 [REG_ALARM_YEARS_REG] = 0x0D, 98 99 [REG_RTC_CTRL_REG] = 0x10, 100 [REG_RTC_STATUS_REG] = 0x11, 101 [REG_RTC_INTERRUPTS_REG] = 0x12, 102 103 [REG_RTC_COMP_LSB_REG] = 0x13, 104 [REG_RTC_COMP_MSB_REG] = 0x14, 105 }; 106 107 /* RTC_CTRL_REG bitfields */ 108 #define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01 109 #define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02 110 #define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04 111 #define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08 112 #define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10 113 #define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20 114 #define BIT_RTC_CTRL_REG_GET_TIME_M 0x40 115 #define BIT_RTC_CTRL_REG_RTC_V_OPT 0x80 116 117 /* RTC_STATUS_REG bitfields */ 118 #define BIT_RTC_STATUS_REG_RUN_M 0x02 119 #define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04 120 #define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08 121 #define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10 122 #define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20 123 #define BIT_RTC_STATUS_REG_ALARM_M 0x40 124 #define BIT_RTC_STATUS_REG_POWER_UP_M 0x80 125 126 /* RTC_INTERRUPTS_REG bitfields */ 127 #define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03 128 #define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04 129 #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08 130 131 132 /* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */ 133 #define ALL_TIME_REGS 6 134 135 /*----------------------------------------------------------------------*/ 136 static u8 *rtc_reg_map; 137 138 /* 139 * Supports 1 byte read from TWL RTC register. 140 */ 141 static int twl_rtc_read_u8(u8 *data, u8 reg) 142 { 143 int ret; 144 145 ret = twl_i2c_read_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg])); 146 if (ret < 0) 147 pr_err("twl_rtc: Could not read TWL" 148 "register %X - error %d\n", reg, ret); 149 return ret; 150 } 151 152 /* 153 * Supports 1 byte write to TWL RTC registers. 154 */ 155 static int twl_rtc_write_u8(u8 data, u8 reg) 156 { 157 int ret; 158 159 ret = twl_i2c_write_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg])); 160 if (ret < 0) 161 pr_err("twl_rtc: Could not write TWL" 162 "register %X - error %d\n", reg, ret); 163 return ret; 164 } 165 166 /* 167 * Cache the value for timer/alarm interrupts register; this is 168 * only changed by callers holding rtc ops lock (or resume). 169 */ 170 static unsigned char rtc_irq_bits; 171 172 /* 173 * Enable 1/second update and/or alarm interrupts. 174 */ 175 static int set_rtc_irq_bit(unsigned char bit) 176 { 177 unsigned char val; 178 int ret; 179 180 /* if the bit is set, return from here */ 181 if (rtc_irq_bits & bit) 182 return 0; 183 184 val = rtc_irq_bits | bit; 185 val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M; 186 ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG); 187 if (ret == 0) 188 rtc_irq_bits = val; 189 190 return ret; 191 } 192 193 /* 194 * Disable update and/or alarm interrupts. 195 */ 196 static int mask_rtc_irq_bit(unsigned char bit) 197 { 198 unsigned char val; 199 int ret; 200 201 /* if the bit is clear, return from here */ 202 if (!(rtc_irq_bits & bit)) 203 return 0; 204 205 val = rtc_irq_bits & ~bit; 206 ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG); 207 if (ret == 0) 208 rtc_irq_bits = val; 209 210 return ret; 211 } 212 213 static int twl_rtc_alarm_irq_enable(struct device *dev, unsigned enabled) 214 { 215 int ret; 216 217 if (enabled) 218 ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); 219 else 220 ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); 221 222 return ret; 223 } 224 225 /* 226 * Gets current TWL RTC time and date parameters. 227 * 228 * The RTC's time/alarm representation is not what gmtime(3) requires 229 * Linux to use: 230 * 231 * - Months are 1..12 vs Linux 0-11 232 * - Years are 0..99 vs Linux 1900..N (we assume 21st century) 233 */ 234 static int twl_rtc_read_time(struct device *dev, struct rtc_time *tm) 235 { 236 unsigned char rtc_data[ALL_TIME_REGS + 1]; 237 int ret; 238 u8 save_control; 239 u8 rtc_control; 240 241 ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG); 242 if (ret < 0) { 243 dev_err(dev, "%s: reading CTRL_REG, error %d\n", __func__, ret); 244 return ret; 245 } 246 /* for twl6030/32 make sure BIT_RTC_CTRL_REG_GET_TIME_M is clear */ 247 if (twl_class_is_6030()) { 248 if (save_control & BIT_RTC_CTRL_REG_GET_TIME_M) { 249 save_control &= ~BIT_RTC_CTRL_REG_GET_TIME_M; 250 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG); 251 if (ret < 0) { 252 dev_err(dev, "%s clr GET_TIME, error %d\n", 253 __func__, ret); 254 return ret; 255 } 256 } 257 } 258 259 /* Copy RTC counting registers to static registers or latches */ 260 rtc_control = save_control | BIT_RTC_CTRL_REG_GET_TIME_M; 261 262 /* for twl6030/32 enable read access to static shadowed registers */ 263 if (twl_class_is_6030()) 264 rtc_control |= BIT_RTC_CTRL_REG_RTC_V_OPT; 265 266 ret = twl_rtc_write_u8(rtc_control, REG_RTC_CTRL_REG); 267 if (ret < 0) { 268 dev_err(dev, "%s: writing CTRL_REG, error %d\n", __func__, ret); 269 return ret; 270 } 271 272 ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data, 273 (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS); 274 275 if (ret < 0) { 276 dev_err(dev, "%s: reading data, error %d\n", __func__, ret); 277 return ret; 278 } 279 280 /* for twl6030 restore original state of rtc control register */ 281 if (twl_class_is_6030()) { 282 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG); 283 if (ret < 0) { 284 dev_err(dev, "%s: restore CTRL_REG, error %d\n", 285 __func__, ret); 286 return ret; 287 } 288 } 289 290 tm->tm_sec = bcd2bin(rtc_data[0]); 291 tm->tm_min = bcd2bin(rtc_data[1]); 292 tm->tm_hour = bcd2bin(rtc_data[2]); 293 tm->tm_mday = bcd2bin(rtc_data[3]); 294 tm->tm_mon = bcd2bin(rtc_data[4]) - 1; 295 tm->tm_year = bcd2bin(rtc_data[5]) + 100; 296 297 return ret; 298 } 299 300 static int twl_rtc_set_time(struct device *dev, struct rtc_time *tm) 301 { 302 unsigned char save_control; 303 unsigned char rtc_data[ALL_TIME_REGS + 1]; 304 int ret; 305 306 rtc_data[1] = bin2bcd(tm->tm_sec); 307 rtc_data[2] = bin2bcd(tm->tm_min); 308 rtc_data[3] = bin2bcd(tm->tm_hour); 309 rtc_data[4] = bin2bcd(tm->tm_mday); 310 rtc_data[5] = bin2bcd(tm->tm_mon + 1); 311 rtc_data[6] = bin2bcd(tm->tm_year - 100); 312 313 /* Stop RTC while updating the TC registers */ 314 ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG); 315 if (ret < 0) 316 goto out; 317 318 save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M; 319 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG); 320 if (ret < 0) 321 goto out; 322 323 /* update all the time registers in one shot */ 324 ret = twl_i2c_write(TWL_MODULE_RTC, rtc_data, 325 (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS); 326 if (ret < 0) { 327 dev_err(dev, "rtc_set_time error %d\n", ret); 328 goto out; 329 } 330 331 /* Start back RTC */ 332 save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M; 333 ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG); 334 335 out: 336 return ret; 337 } 338 339 /* 340 * Gets current TWL RTC alarm time. 341 */ 342 static int twl_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) 343 { 344 unsigned char rtc_data[ALL_TIME_REGS + 1]; 345 int ret; 346 347 ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data, 348 (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS); 349 if (ret < 0) { 350 dev_err(dev, "rtc_read_alarm error %d\n", ret); 351 return ret; 352 } 353 354 /* some of these fields may be wildcard/"match all" */ 355 alm->time.tm_sec = bcd2bin(rtc_data[0]); 356 alm->time.tm_min = bcd2bin(rtc_data[1]); 357 alm->time.tm_hour = bcd2bin(rtc_data[2]); 358 alm->time.tm_mday = bcd2bin(rtc_data[3]); 359 alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1; 360 alm->time.tm_year = bcd2bin(rtc_data[5]) + 100; 361 362 /* report cached alarm enable state */ 363 if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M) 364 alm->enabled = 1; 365 366 return ret; 367 } 368 369 static int twl_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) 370 { 371 unsigned char alarm_data[ALL_TIME_REGS + 1]; 372 int ret; 373 374 ret = twl_rtc_alarm_irq_enable(dev, 0); 375 if (ret) 376 goto out; 377 378 alarm_data[1] = bin2bcd(alm->time.tm_sec); 379 alarm_data[2] = bin2bcd(alm->time.tm_min); 380 alarm_data[3] = bin2bcd(alm->time.tm_hour); 381 alarm_data[4] = bin2bcd(alm->time.tm_mday); 382 alarm_data[5] = bin2bcd(alm->time.tm_mon + 1); 383 alarm_data[6] = bin2bcd(alm->time.tm_year - 100); 384 385 /* update all the alarm registers in one shot */ 386 ret = twl_i2c_write(TWL_MODULE_RTC, alarm_data, 387 (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS); 388 if (ret) { 389 dev_err(dev, "rtc_set_alarm error %d\n", ret); 390 goto out; 391 } 392 393 if (alm->enabled) 394 ret = twl_rtc_alarm_irq_enable(dev, 1); 395 out: 396 return ret; 397 } 398 399 static irqreturn_t twl_rtc_interrupt(int irq, void *rtc) 400 { 401 unsigned long events; 402 int ret = IRQ_NONE; 403 int res; 404 u8 rd_reg; 405 406 res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); 407 if (res) 408 goto out; 409 /* 410 * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG. 411 * only one (ALARM or RTC) interrupt source may be enabled 412 * at time, we also could check our results 413 * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM] 414 */ 415 if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M) 416 events = RTC_IRQF | RTC_AF; 417 else 418 events = RTC_IRQF | RTC_PF; 419 420 res = twl_rtc_write_u8(BIT_RTC_STATUS_REG_ALARM_M, 421 REG_RTC_STATUS_REG); 422 if (res) 423 goto out; 424 425 if (twl_class_is_4030()) { 426 /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1 427 * needs 2 reads to clear the interrupt. One read is done in 428 * do_twl_pwrirq(). Doing the second read, to clear 429 * the bit. 430 * 431 * FIXME the reason PWR_ISR1 needs an extra read is that 432 * RTC_IF retriggered until we cleared REG_ALARM_M above. 433 * But re-reading like this is a bad hack; by doing so we 434 * risk wrongly clearing status for some other IRQ (losing 435 * the interrupt). Be smarter about handling RTC_UF ... 436 */ 437 res = twl_i2c_read_u8(TWL4030_MODULE_INT, 438 &rd_reg, TWL4030_INT_PWR_ISR1); 439 if (res) 440 goto out; 441 } 442 443 /* Notify RTC core on event */ 444 rtc_update_irq(rtc, 1, events); 445 446 ret = IRQ_HANDLED; 447 out: 448 return ret; 449 } 450 451 static struct rtc_class_ops twl_rtc_ops = { 452 .read_time = twl_rtc_read_time, 453 .set_time = twl_rtc_set_time, 454 .read_alarm = twl_rtc_read_alarm, 455 .set_alarm = twl_rtc_set_alarm, 456 .alarm_irq_enable = twl_rtc_alarm_irq_enable, 457 }; 458 459 /*----------------------------------------------------------------------*/ 460 461 static int __devinit twl_rtc_probe(struct platform_device *pdev) 462 { 463 struct rtc_device *rtc; 464 int ret = -EINVAL; 465 int irq = platform_get_irq(pdev, 0); 466 u8 rd_reg; 467 468 if (irq <= 0) 469 goto out1; 470 471 ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); 472 if (ret < 0) 473 goto out1; 474 475 if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M) 476 dev_warn(&pdev->dev, "Power up reset detected.\n"); 477 478 if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M) 479 dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n"); 480 481 /* Clear RTC Power up reset and pending alarm interrupts */ 482 ret = twl_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG); 483 if (ret < 0) 484 goto out1; 485 486 if (twl_class_is_6030()) { 487 twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK, 488 REG_INT_MSK_LINE_A); 489 twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK, 490 REG_INT_MSK_STS_A); 491 } 492 493 dev_info(&pdev->dev, "Enabling TWL-RTC\n"); 494 ret = twl_rtc_write_u8(BIT_RTC_CTRL_REG_STOP_RTC_M, REG_RTC_CTRL_REG); 495 if (ret < 0) 496 goto out1; 497 498 /* init cached IRQ enable bits */ 499 ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG); 500 if (ret < 0) 501 goto out1; 502 503 rtc = rtc_device_register(pdev->name, 504 &pdev->dev, &twl_rtc_ops, THIS_MODULE); 505 if (IS_ERR(rtc)) { 506 ret = PTR_ERR(rtc); 507 dev_err(&pdev->dev, "can't register RTC device, err %ld\n", 508 PTR_ERR(rtc)); 509 goto out1; 510 } 511 512 ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt, 513 IRQF_TRIGGER_RISING, 514 dev_name(&rtc->dev), rtc); 515 if (ret < 0) { 516 dev_err(&pdev->dev, "IRQ is not free.\n"); 517 goto out2; 518 } 519 520 platform_set_drvdata(pdev, rtc); 521 return 0; 522 523 out2: 524 rtc_device_unregister(rtc); 525 out1: 526 return ret; 527 } 528 529 /* 530 * Disable all TWL RTC module interrupts. 531 * Sets status flag to free. 532 */ 533 static int __devexit twl_rtc_remove(struct platform_device *pdev) 534 { 535 /* leave rtc running, but disable irqs */ 536 struct rtc_device *rtc = platform_get_drvdata(pdev); 537 int irq = platform_get_irq(pdev, 0); 538 539 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); 540 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); 541 if (twl_class_is_6030()) { 542 twl6030_interrupt_mask(TWL6030_RTC_INT_MASK, 543 REG_INT_MSK_LINE_A); 544 twl6030_interrupt_mask(TWL6030_RTC_INT_MASK, 545 REG_INT_MSK_STS_A); 546 } 547 548 549 free_irq(irq, rtc); 550 551 rtc_device_unregister(rtc); 552 platform_set_drvdata(pdev, NULL); 553 return 0; 554 } 555 556 static void twl_rtc_shutdown(struct platform_device *pdev) 557 { 558 /* mask timer interrupts, but leave alarm interrupts on to enable 559 power-on when alarm is triggered */ 560 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); 561 } 562 563 #ifdef CONFIG_PM 564 565 static unsigned char irqstat; 566 567 static int twl_rtc_suspend(struct platform_device *pdev, pm_message_t state) 568 { 569 irqstat = rtc_irq_bits; 570 571 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M); 572 return 0; 573 } 574 575 static int twl_rtc_resume(struct platform_device *pdev) 576 { 577 set_rtc_irq_bit(irqstat); 578 return 0; 579 } 580 581 #else 582 #define twl_rtc_suspend NULL 583 #define twl_rtc_resume NULL 584 #endif 585 586 static const struct of_device_id twl_rtc_of_match[] = { 587 {.compatible = "ti,twl4030-rtc", }, 588 { }, 589 }; 590 MODULE_DEVICE_TABLE(of, twl_rtc_of_match); 591 MODULE_ALIAS("platform:twl_rtc"); 592 593 static struct platform_driver twl4030rtc_driver = { 594 .probe = twl_rtc_probe, 595 .remove = __devexit_p(twl_rtc_remove), 596 .shutdown = twl_rtc_shutdown, 597 .suspend = twl_rtc_suspend, 598 .resume = twl_rtc_resume, 599 .driver = { 600 .owner = THIS_MODULE, 601 .name = "twl_rtc", 602 .of_match_table = twl_rtc_of_match, 603 }, 604 }; 605 606 static int __init twl_rtc_init(void) 607 { 608 if (twl_class_is_4030()) 609 rtc_reg_map = (u8 *) twl4030_rtc_reg_map; 610 else 611 rtc_reg_map = (u8 *) twl6030_rtc_reg_map; 612 613 return platform_driver_register(&twl4030rtc_driver); 614 } 615 module_init(twl_rtc_init); 616 617 static void __exit twl_rtc_exit(void) 618 { 619 platform_driver_unregister(&twl4030rtc_driver); 620 } 621 module_exit(twl_rtc_exit); 622 623 MODULE_AUTHOR("Texas Instruments, MontaVista Software"); 624 MODULE_LICENSE("GPL"); 625