xref: /openbmc/linux/drivers/rtc/rtc-tps6586x.c (revision 9b93eb47)
1 /*
2  * rtc-tps6586x.c: RTC driver for TI PMIC TPS6586X
3  *
4  * Copyright (c) 2012, NVIDIA Corporation.
5  *
6  * Author: Laxman Dewangan <ldewangan@nvidia.com>
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation version 2.
11  *
12  * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind,
13  * whether express or implied; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15  * General Public License for more details.
16  *
17  * You should have received a copy of the GNU General Public License
18  * along with this program; if not, write to the Free Software
19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
20  * 02111-1307, USA
21  */
22 
23 #include <linux/device.h>
24 #include <linux/err.h>
25 #include <linux/init.h>
26 #include <linux/kernel.h>
27 #include <linux/mfd/tps6586x.h>
28 #include <linux/module.h>
29 #include <linux/platform_device.h>
30 #include <linux/pm_runtime.h>
31 #include <linux/rtc.h>
32 #include <linux/slab.h>
33 
34 #define RTC_CTRL			0xc0
35 #define POR_RESET_N			BIT(7)
36 #define OSC_SRC_SEL			BIT(6)
37 #define RTC_ENABLE			BIT(5)	/* enables alarm */
38 #define RTC_BUF_ENABLE			BIT(4)	/* 32 KHz buffer enable */
39 #define PRE_BYPASS			BIT(3)	/* 0=1KHz or 1=32KHz updates */
40 #define CL_SEL_MASK			(BIT(2)|BIT(1))
41 #define CL_SEL_POS			1
42 #define RTC_ALARM1_HI			0xc1
43 #define RTC_COUNT4			0xc6
44 
45 /* start a PMU RTC access by reading the register prior to the RTC_COUNT4 */
46 #define RTC_COUNT4_DUMMYREAD		0xc5
47 
48 /*only 14-bits width in second*/
49 #define ALM1_VALID_RANGE_IN_SEC		0x3FFF
50 
51 #define TPS6586X_RTC_CL_SEL_1_5PF	0x0
52 #define TPS6586X_RTC_CL_SEL_6_5PF	0x1
53 #define TPS6586X_RTC_CL_SEL_7_5PF	0x2
54 #define TPS6586X_RTC_CL_SEL_12_5PF	0x3
55 
56 struct tps6586x_rtc {
57 	struct device		*dev;
58 	struct rtc_device	*rtc;
59 	int			irq;
60 	bool			irq_en;
61 };
62 
63 static inline struct device *to_tps6586x_dev(struct device *dev)
64 {
65 	return dev->parent;
66 }
67 
68 static int tps6586x_rtc_read_time(struct device *dev, struct rtc_time *tm)
69 {
70 	struct device *tps_dev = to_tps6586x_dev(dev);
71 	unsigned long long ticks = 0;
72 	time64_t seconds;
73 	u8 buff[6];
74 	int ret;
75 	int i;
76 
77 	ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD, sizeof(buff), buff);
78 	if (ret < 0) {
79 		dev_err(dev, "read counter failed with err %d\n", ret);
80 		return ret;
81 	}
82 
83 	for (i = 1; i < sizeof(buff); i++) {
84 		ticks <<= 8;
85 		ticks |= buff[i];
86 	}
87 
88 	seconds = ticks >> 10;
89 	rtc_time64_to_tm(seconds, tm);
90 
91 	return 0;
92 }
93 
94 static int tps6586x_rtc_set_time(struct device *dev, struct rtc_time *tm)
95 {
96 	struct device *tps_dev = to_tps6586x_dev(dev);
97 	unsigned long long ticks;
98 	time64_t seconds;
99 	u8 buff[5];
100 	int ret;
101 
102 	seconds = rtc_tm_to_time64(tm);
103 
104 	ticks = (unsigned long long)seconds << 10;
105 	buff[0] = (ticks >> 32) & 0xff;
106 	buff[1] = (ticks >> 24) & 0xff;
107 	buff[2] = (ticks >> 16) & 0xff;
108 	buff[3] = (ticks >> 8) & 0xff;
109 	buff[4] = ticks & 0xff;
110 
111 	/* Disable RTC before changing time */
112 	ret = tps6586x_clr_bits(tps_dev, RTC_CTRL, RTC_ENABLE);
113 	if (ret < 0) {
114 		dev_err(dev, "failed to clear RTC_ENABLE\n");
115 		return ret;
116 	}
117 
118 	ret = tps6586x_writes(tps_dev, RTC_COUNT4, sizeof(buff), buff);
119 	if (ret < 0) {
120 		dev_err(dev, "failed to program new time\n");
121 		return ret;
122 	}
123 
124 	/* Enable RTC */
125 	ret = tps6586x_set_bits(tps_dev, RTC_CTRL, RTC_ENABLE);
126 	if (ret < 0) {
127 		dev_err(dev, "failed to set RTC_ENABLE\n");
128 		return ret;
129 	}
130 	return 0;
131 }
132 
133 static int tps6586x_rtc_alarm_irq_enable(struct device *dev,
134 			 unsigned int enabled)
135 {
136 	struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
137 
138 	if (enabled && !rtc->irq_en) {
139 		enable_irq(rtc->irq);
140 		rtc->irq_en = true;
141 	} else if (!enabled && rtc->irq_en)  {
142 		disable_irq(rtc->irq);
143 		rtc->irq_en = false;
144 	}
145 	return 0;
146 }
147 
148 static int tps6586x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
149 {
150 	struct device *tps_dev = to_tps6586x_dev(dev);
151 	time64_t seconds;
152 	unsigned long ticks;
153 	unsigned long rtc_current_time;
154 	unsigned long long rticks = 0;
155 	u8 buff[3];
156 	u8 rbuff[6];
157 	int ret;
158 	int i;
159 
160 	seconds = rtc_tm_to_time64(&alrm->time);
161 
162 	ret = tps6586x_rtc_alarm_irq_enable(dev, alrm->enabled);
163 	if (ret < 0) {
164 		dev_err(dev, "can't set alarm irq, err %d\n", ret);
165 		return ret;
166 	}
167 
168 	ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD,
169 			sizeof(rbuff), rbuff);
170 	if (ret < 0) {
171 		dev_err(dev, "read counter failed with err %d\n", ret);
172 		return ret;
173 	}
174 
175 	for (i = 1; i < sizeof(rbuff); i++) {
176 		rticks <<= 8;
177 		rticks |= rbuff[i];
178 	}
179 
180 	rtc_current_time = rticks >> 10;
181 	if ((seconds - rtc_current_time) > ALM1_VALID_RANGE_IN_SEC)
182 		seconds = rtc_current_time - 1;
183 
184 	ticks = (unsigned long long)seconds << 10;
185 	buff[0] = (ticks >> 16) & 0xff;
186 	buff[1] = (ticks >> 8) & 0xff;
187 	buff[2] = ticks & 0xff;
188 
189 	ret = tps6586x_writes(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff);
190 	if (ret)
191 		dev_err(dev, "programming alarm failed with err %d\n", ret);
192 
193 	return ret;
194 }
195 
196 static int tps6586x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
197 {
198 	struct device *tps_dev = to_tps6586x_dev(dev);
199 	unsigned long ticks;
200 	time64_t seconds;
201 	u8 buff[3];
202 	int ret;
203 
204 	ret = tps6586x_reads(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff);
205 	if (ret) {
206 		dev_err(dev, "read RTC_ALARM1_HI failed with err %d\n", ret);
207 		return ret;
208 	}
209 
210 	ticks = (buff[0] << 16) | (buff[1] << 8) | buff[2];
211 	seconds = ticks >> 10;
212 
213 	rtc_time64_to_tm(seconds, &alrm->time);
214 	return 0;
215 }
216 
217 static const struct rtc_class_ops tps6586x_rtc_ops = {
218 	.read_time	= tps6586x_rtc_read_time,
219 	.set_time	= tps6586x_rtc_set_time,
220 	.set_alarm	= tps6586x_rtc_set_alarm,
221 	.read_alarm	= tps6586x_rtc_read_alarm,
222 	.alarm_irq_enable = tps6586x_rtc_alarm_irq_enable,
223 };
224 
225 static irqreturn_t tps6586x_rtc_irq(int irq, void *data)
226 {
227 	struct tps6586x_rtc *rtc = data;
228 
229 	rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF);
230 	return IRQ_HANDLED;
231 }
232 
233 static int tps6586x_rtc_probe(struct platform_device *pdev)
234 {
235 	struct device *tps_dev = to_tps6586x_dev(&pdev->dev);
236 	struct tps6586x_rtc *rtc;
237 	int ret;
238 
239 	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
240 	if (!rtc)
241 		return -ENOMEM;
242 
243 	rtc->dev = &pdev->dev;
244 	rtc->irq = platform_get_irq(pdev, 0);
245 
246 	/* 1 kHz tick mode, enable tick counting */
247 	ret = tps6586x_update(tps_dev, RTC_CTRL,
248 		RTC_ENABLE | OSC_SRC_SEL |
249 		((TPS6586X_RTC_CL_SEL_1_5PF << CL_SEL_POS) & CL_SEL_MASK),
250 		RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
251 	if (ret < 0) {
252 		dev_err(&pdev->dev, "unable to start counter\n");
253 		return ret;
254 	}
255 
256 	device_init_wakeup(&pdev->dev, 1);
257 
258 	platform_set_drvdata(pdev, rtc);
259 	rtc->rtc = devm_rtc_allocate_device(&pdev->dev);
260 	if (IS_ERR(rtc->rtc)) {
261 		ret = PTR_ERR(rtc->rtc);
262 		dev_err(&pdev->dev, "RTC allocate device: ret %d\n", ret);
263 		goto fail_rtc_register;
264 	}
265 
266 	rtc->rtc->ops = &tps6586x_rtc_ops;
267 	rtc->rtc->range_max = (1ULL << 30) - 1; /* 30-bit seconds */
268 	rtc->rtc->start_secs = mktime64(2009, 1, 1, 0, 0, 0);
269 	rtc->rtc->set_start_time = true;
270 
271 	ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL,
272 				tps6586x_rtc_irq,
273 				IRQF_ONESHOT,
274 				dev_name(&pdev->dev), rtc);
275 	if (ret < 0) {
276 		dev_err(&pdev->dev, "request IRQ(%d) failed with ret %d\n",
277 				rtc->irq, ret);
278 		goto fail_rtc_register;
279 	}
280 	disable_irq(rtc->irq);
281 
282 	ret = rtc_register_device(rtc->rtc);
283 	if (ret) {
284 		dev_err(&pdev->dev, "RTC device register: ret %d\n", ret);
285 		goto fail_rtc_register;
286 	}
287 
288 	return 0;
289 
290 fail_rtc_register:
291 	tps6586x_update(tps_dev, RTC_CTRL, 0,
292 		RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
293 	return ret;
294 };
295 
296 static int tps6586x_rtc_remove(struct platform_device *pdev)
297 {
298 	struct device *tps_dev = to_tps6586x_dev(&pdev->dev);
299 
300 	tps6586x_update(tps_dev, RTC_CTRL, 0,
301 		RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK);
302 	return 0;
303 }
304 
305 #ifdef CONFIG_PM_SLEEP
306 static int tps6586x_rtc_suspend(struct device *dev)
307 {
308 	struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
309 
310 	if (device_may_wakeup(dev))
311 		enable_irq_wake(rtc->irq);
312 	return 0;
313 }
314 
315 static int tps6586x_rtc_resume(struct device *dev)
316 {
317 	struct tps6586x_rtc *rtc = dev_get_drvdata(dev);
318 
319 	if (device_may_wakeup(dev))
320 		disable_irq_wake(rtc->irq);
321 	return 0;
322 }
323 #endif
324 
325 static SIMPLE_DEV_PM_OPS(tps6586x_pm_ops, tps6586x_rtc_suspend,
326 			tps6586x_rtc_resume);
327 
328 static struct platform_driver tps6586x_rtc_driver = {
329 	.driver	= {
330 		.name	= "tps6586x-rtc",
331 		.pm	= &tps6586x_pm_ops,
332 	},
333 	.probe	= tps6586x_rtc_probe,
334 	.remove	= tps6586x_rtc_remove,
335 };
336 module_platform_driver(tps6586x_rtc_driver);
337 
338 MODULE_ALIAS("platform:tps6586x-rtc");
339 MODULE_DESCRIPTION("TI TPS6586x RTC driver");
340 MODULE_AUTHOR("Laxman dewangan <ldewangan@nvidia.com>");
341 MODULE_LICENSE("GPL v2");
342