1 /* 2 * SuperH On-Chip RTC Support 3 * 4 * Copyright (C) 2006 - 2009 Paul Mundt 5 * Copyright (C) 2006 Jamie Lenehan 6 * Copyright (C) 2008 Angelo Castello 7 * 8 * Based on the old arch/sh/kernel/cpu/rtc.c by: 9 * 10 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org> 11 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka 12 * 13 * This file is subject to the terms and conditions of the GNU General Public 14 * License. See the file "COPYING" in the main directory of this archive 15 * for more details. 16 */ 17 #include <linux/module.h> 18 #include <linux/kernel.h> 19 #include <linux/bcd.h> 20 #include <linux/rtc.h> 21 #include <linux/init.h> 22 #include <linux/platform_device.h> 23 #include <linux/seq_file.h> 24 #include <linux/interrupt.h> 25 #include <linux/spinlock.h> 26 #include <linux/io.h> 27 #include <linux/log2.h> 28 #include <linux/clk.h> 29 #include <linux/slab.h> 30 #include <asm/rtc.h> 31 32 #define DRV_NAME "sh-rtc" 33 #define DRV_VERSION "0.2.3" 34 35 #define RTC_REG(r) ((r) * rtc_reg_size) 36 37 #define R64CNT RTC_REG(0) 38 39 #define RSECCNT RTC_REG(1) /* RTC sec */ 40 #define RMINCNT RTC_REG(2) /* RTC min */ 41 #define RHRCNT RTC_REG(3) /* RTC hour */ 42 #define RWKCNT RTC_REG(4) /* RTC week */ 43 #define RDAYCNT RTC_REG(5) /* RTC day */ 44 #define RMONCNT RTC_REG(6) /* RTC month */ 45 #define RYRCNT RTC_REG(7) /* RTC year */ 46 #define RSECAR RTC_REG(8) /* ALARM sec */ 47 #define RMINAR RTC_REG(9) /* ALARM min */ 48 #define RHRAR RTC_REG(10) /* ALARM hour */ 49 #define RWKAR RTC_REG(11) /* ALARM week */ 50 #define RDAYAR RTC_REG(12) /* ALARM day */ 51 #define RMONAR RTC_REG(13) /* ALARM month */ 52 #define RCR1 RTC_REG(14) /* Control */ 53 #define RCR2 RTC_REG(15) /* Control */ 54 55 /* 56 * Note on RYRAR and RCR3: Up until this point most of the register 57 * definitions are consistent across all of the available parts. However, 58 * the placement of the optional RYRAR and RCR3 (the RYRAR control 59 * register used to control RYRCNT/RYRAR compare) varies considerably 60 * across various parts, occasionally being mapped in to a completely 61 * unrelated address space. For proper RYRAR support a separate resource 62 * would have to be handed off, but as this is purely optional in 63 * practice, we simply opt not to support it, thereby keeping the code 64 * quite a bit more simplified. 65 */ 66 67 /* ALARM Bits - or with BCD encoded value */ 68 #define AR_ENB 0x80 /* Enable for alarm cmp */ 69 70 /* Period Bits */ 71 #define PF_HP 0x100 /* Enable Half Period to support 8,32,128Hz */ 72 #define PF_COUNT 0x200 /* Half periodic counter */ 73 #define PF_OXS 0x400 /* Periodic One x Second */ 74 #define PF_KOU 0x800 /* Kernel or User periodic request 1=kernel */ 75 #define PF_MASK 0xf00 76 77 /* RCR1 Bits */ 78 #define RCR1_CF 0x80 /* Carry Flag */ 79 #define RCR1_CIE 0x10 /* Carry Interrupt Enable */ 80 #define RCR1_AIE 0x08 /* Alarm Interrupt Enable */ 81 #define RCR1_AF 0x01 /* Alarm Flag */ 82 83 /* RCR2 Bits */ 84 #define RCR2_PEF 0x80 /* PEriodic interrupt Flag */ 85 #define RCR2_PESMASK 0x70 /* Periodic interrupt Set */ 86 #define RCR2_RTCEN 0x08 /* ENable RTC */ 87 #define RCR2_ADJ 0x04 /* ADJustment (30-second) */ 88 #define RCR2_RESET 0x02 /* Reset bit */ 89 #define RCR2_START 0x01 /* Start bit */ 90 91 struct sh_rtc { 92 void __iomem *regbase; 93 unsigned long regsize; 94 struct resource *res; 95 int alarm_irq; 96 int periodic_irq; 97 int carry_irq; 98 struct clk *clk; 99 struct rtc_device *rtc_dev; 100 spinlock_t lock; 101 unsigned long capabilities; /* See asm/rtc.h for cap bits */ 102 unsigned short periodic_freq; 103 }; 104 105 static int __sh_rtc_interrupt(struct sh_rtc *rtc) 106 { 107 unsigned int tmp, pending; 108 109 tmp = readb(rtc->regbase + RCR1); 110 pending = tmp & RCR1_CF; 111 tmp &= ~RCR1_CF; 112 writeb(tmp, rtc->regbase + RCR1); 113 114 /* Users have requested One x Second IRQ */ 115 if (pending && rtc->periodic_freq & PF_OXS) 116 rtc_update_irq(rtc->rtc_dev, 1, RTC_UF | RTC_IRQF); 117 118 return pending; 119 } 120 121 static int __sh_rtc_alarm(struct sh_rtc *rtc) 122 { 123 unsigned int tmp, pending; 124 125 tmp = readb(rtc->regbase + RCR1); 126 pending = tmp & RCR1_AF; 127 tmp &= ~(RCR1_AF | RCR1_AIE); 128 writeb(tmp, rtc->regbase + RCR1); 129 130 if (pending) 131 rtc_update_irq(rtc->rtc_dev, 1, RTC_AF | RTC_IRQF); 132 133 return pending; 134 } 135 136 static int __sh_rtc_periodic(struct sh_rtc *rtc) 137 { 138 struct rtc_device *rtc_dev = rtc->rtc_dev; 139 struct rtc_task *irq_task; 140 unsigned int tmp, pending; 141 142 tmp = readb(rtc->regbase + RCR2); 143 pending = tmp & RCR2_PEF; 144 tmp &= ~RCR2_PEF; 145 writeb(tmp, rtc->regbase + RCR2); 146 147 if (!pending) 148 return 0; 149 150 /* Half period enabled than one skipped and the next notified */ 151 if ((rtc->periodic_freq & PF_HP) && (rtc->periodic_freq & PF_COUNT)) 152 rtc->periodic_freq &= ~PF_COUNT; 153 else { 154 if (rtc->periodic_freq & PF_HP) 155 rtc->periodic_freq |= PF_COUNT; 156 if (rtc->periodic_freq & PF_KOU) { 157 spin_lock(&rtc_dev->irq_task_lock); 158 irq_task = rtc_dev->irq_task; 159 if (irq_task) 160 irq_task->func(irq_task->private_data); 161 spin_unlock(&rtc_dev->irq_task_lock); 162 } else 163 rtc_update_irq(rtc->rtc_dev, 1, RTC_PF | RTC_IRQF); 164 } 165 166 return pending; 167 } 168 169 static irqreturn_t sh_rtc_interrupt(int irq, void *dev_id) 170 { 171 struct sh_rtc *rtc = dev_id; 172 int ret; 173 174 spin_lock(&rtc->lock); 175 ret = __sh_rtc_interrupt(rtc); 176 spin_unlock(&rtc->lock); 177 178 return IRQ_RETVAL(ret); 179 } 180 181 static irqreturn_t sh_rtc_alarm(int irq, void *dev_id) 182 { 183 struct sh_rtc *rtc = dev_id; 184 int ret; 185 186 spin_lock(&rtc->lock); 187 ret = __sh_rtc_alarm(rtc); 188 spin_unlock(&rtc->lock); 189 190 return IRQ_RETVAL(ret); 191 } 192 193 static irqreturn_t sh_rtc_periodic(int irq, void *dev_id) 194 { 195 struct sh_rtc *rtc = dev_id; 196 int ret; 197 198 spin_lock(&rtc->lock); 199 ret = __sh_rtc_periodic(rtc); 200 spin_unlock(&rtc->lock); 201 202 return IRQ_RETVAL(ret); 203 } 204 205 static irqreturn_t sh_rtc_shared(int irq, void *dev_id) 206 { 207 struct sh_rtc *rtc = dev_id; 208 int ret; 209 210 spin_lock(&rtc->lock); 211 ret = __sh_rtc_interrupt(rtc); 212 ret |= __sh_rtc_alarm(rtc); 213 ret |= __sh_rtc_periodic(rtc); 214 spin_unlock(&rtc->lock); 215 216 return IRQ_RETVAL(ret); 217 } 218 219 static int sh_rtc_irq_set_state(struct device *dev, int enable) 220 { 221 struct sh_rtc *rtc = dev_get_drvdata(dev); 222 unsigned int tmp; 223 224 spin_lock_irq(&rtc->lock); 225 226 tmp = readb(rtc->regbase + RCR2); 227 228 if (enable) { 229 rtc->periodic_freq |= PF_KOU; 230 tmp &= ~RCR2_PEF; /* Clear PES bit */ 231 tmp |= (rtc->periodic_freq & ~PF_HP); /* Set PES2-0 */ 232 } else { 233 rtc->periodic_freq &= ~PF_KOU; 234 tmp &= ~(RCR2_PESMASK | RCR2_PEF); 235 } 236 237 writeb(tmp, rtc->regbase + RCR2); 238 239 spin_unlock_irq(&rtc->lock); 240 241 return 0; 242 } 243 244 static int sh_rtc_irq_set_freq(struct device *dev, int freq) 245 { 246 struct sh_rtc *rtc = dev_get_drvdata(dev); 247 int tmp, ret = 0; 248 249 spin_lock_irq(&rtc->lock); 250 tmp = rtc->periodic_freq & PF_MASK; 251 252 switch (freq) { 253 case 0: 254 rtc->periodic_freq = 0x00; 255 break; 256 case 1: 257 rtc->periodic_freq = 0x60; 258 break; 259 case 2: 260 rtc->periodic_freq = 0x50; 261 break; 262 case 4: 263 rtc->periodic_freq = 0x40; 264 break; 265 case 8: 266 rtc->periodic_freq = 0x30 | PF_HP; 267 break; 268 case 16: 269 rtc->periodic_freq = 0x30; 270 break; 271 case 32: 272 rtc->periodic_freq = 0x20 | PF_HP; 273 break; 274 case 64: 275 rtc->periodic_freq = 0x20; 276 break; 277 case 128: 278 rtc->periodic_freq = 0x10 | PF_HP; 279 break; 280 case 256: 281 rtc->periodic_freq = 0x10; 282 break; 283 default: 284 ret = -ENOTSUPP; 285 } 286 287 if (ret == 0) 288 rtc->periodic_freq |= tmp; 289 290 spin_unlock_irq(&rtc->lock); 291 return ret; 292 } 293 294 static inline void sh_rtc_setaie(struct device *dev, unsigned int enable) 295 { 296 struct sh_rtc *rtc = dev_get_drvdata(dev); 297 unsigned int tmp; 298 299 spin_lock_irq(&rtc->lock); 300 301 tmp = readb(rtc->regbase + RCR1); 302 303 if (enable) 304 tmp |= RCR1_AIE; 305 else 306 tmp &= ~RCR1_AIE; 307 308 writeb(tmp, rtc->regbase + RCR1); 309 310 spin_unlock_irq(&rtc->lock); 311 } 312 313 static int sh_rtc_proc(struct device *dev, struct seq_file *seq) 314 { 315 struct sh_rtc *rtc = dev_get_drvdata(dev); 316 unsigned int tmp; 317 318 tmp = readb(rtc->regbase + RCR1); 319 seq_printf(seq, "carry_IRQ\t: %s\n", (tmp & RCR1_CIE) ? "yes" : "no"); 320 321 tmp = readb(rtc->regbase + RCR2); 322 seq_printf(seq, "periodic_IRQ\t: %s\n", 323 (tmp & RCR2_PESMASK) ? "yes" : "no"); 324 325 return 0; 326 } 327 328 static inline void sh_rtc_setcie(struct device *dev, unsigned int enable) 329 { 330 struct sh_rtc *rtc = dev_get_drvdata(dev); 331 unsigned int tmp; 332 333 spin_lock_irq(&rtc->lock); 334 335 tmp = readb(rtc->regbase + RCR1); 336 337 if (!enable) 338 tmp &= ~RCR1_CIE; 339 else 340 tmp |= RCR1_CIE; 341 342 writeb(tmp, rtc->regbase + RCR1); 343 344 spin_unlock_irq(&rtc->lock); 345 } 346 347 static int sh_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) 348 { 349 sh_rtc_setaie(dev, enabled); 350 return 0; 351 } 352 353 static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm) 354 { 355 struct platform_device *pdev = to_platform_device(dev); 356 struct sh_rtc *rtc = platform_get_drvdata(pdev); 357 unsigned int sec128, sec2, yr, yr100, cf_bit; 358 359 do { 360 unsigned int tmp; 361 362 spin_lock_irq(&rtc->lock); 363 364 tmp = readb(rtc->regbase + RCR1); 365 tmp &= ~RCR1_CF; /* Clear CF-bit */ 366 tmp |= RCR1_CIE; 367 writeb(tmp, rtc->regbase + RCR1); 368 369 sec128 = readb(rtc->regbase + R64CNT); 370 371 tm->tm_sec = bcd2bin(readb(rtc->regbase + RSECCNT)); 372 tm->tm_min = bcd2bin(readb(rtc->regbase + RMINCNT)); 373 tm->tm_hour = bcd2bin(readb(rtc->regbase + RHRCNT)); 374 tm->tm_wday = bcd2bin(readb(rtc->regbase + RWKCNT)); 375 tm->tm_mday = bcd2bin(readb(rtc->regbase + RDAYCNT)); 376 tm->tm_mon = bcd2bin(readb(rtc->regbase + RMONCNT)) - 1; 377 378 if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) { 379 yr = readw(rtc->regbase + RYRCNT); 380 yr100 = bcd2bin(yr >> 8); 381 yr &= 0xff; 382 } else { 383 yr = readb(rtc->regbase + RYRCNT); 384 yr100 = bcd2bin((yr == 0x99) ? 0x19 : 0x20); 385 } 386 387 tm->tm_year = (yr100 * 100 + bcd2bin(yr)) - 1900; 388 389 sec2 = readb(rtc->regbase + R64CNT); 390 cf_bit = readb(rtc->regbase + RCR1) & RCR1_CF; 391 392 spin_unlock_irq(&rtc->lock); 393 } while (cf_bit != 0 || ((sec128 ^ sec2) & RTC_BIT_INVERTED) != 0); 394 395 #if RTC_BIT_INVERTED != 0 396 if ((sec128 & RTC_BIT_INVERTED)) 397 tm->tm_sec--; 398 #endif 399 400 /* only keep the carry interrupt enabled if UIE is on */ 401 if (!(rtc->periodic_freq & PF_OXS)) 402 sh_rtc_setcie(dev, 0); 403 404 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, " 405 "mday=%d, mon=%d, year=%d, wday=%d\n", 406 __func__, 407 tm->tm_sec, tm->tm_min, tm->tm_hour, 408 tm->tm_mday, tm->tm_mon + 1, tm->tm_year, tm->tm_wday); 409 410 return rtc_valid_tm(tm); 411 } 412 413 static int sh_rtc_set_time(struct device *dev, struct rtc_time *tm) 414 { 415 struct platform_device *pdev = to_platform_device(dev); 416 struct sh_rtc *rtc = platform_get_drvdata(pdev); 417 unsigned int tmp; 418 int year; 419 420 spin_lock_irq(&rtc->lock); 421 422 /* Reset pre-scaler & stop RTC */ 423 tmp = readb(rtc->regbase + RCR2); 424 tmp |= RCR2_RESET; 425 tmp &= ~RCR2_START; 426 writeb(tmp, rtc->regbase + RCR2); 427 428 writeb(bin2bcd(tm->tm_sec), rtc->regbase + RSECCNT); 429 writeb(bin2bcd(tm->tm_min), rtc->regbase + RMINCNT); 430 writeb(bin2bcd(tm->tm_hour), rtc->regbase + RHRCNT); 431 writeb(bin2bcd(tm->tm_wday), rtc->regbase + RWKCNT); 432 writeb(bin2bcd(tm->tm_mday), rtc->regbase + RDAYCNT); 433 writeb(bin2bcd(tm->tm_mon + 1), rtc->regbase + RMONCNT); 434 435 if (rtc->capabilities & RTC_CAP_4_DIGIT_YEAR) { 436 year = (bin2bcd((tm->tm_year + 1900) / 100) << 8) | 437 bin2bcd(tm->tm_year % 100); 438 writew(year, rtc->regbase + RYRCNT); 439 } else { 440 year = tm->tm_year % 100; 441 writeb(bin2bcd(year), rtc->regbase + RYRCNT); 442 } 443 444 /* Start RTC */ 445 tmp = readb(rtc->regbase + RCR2); 446 tmp &= ~RCR2_RESET; 447 tmp |= RCR2_RTCEN | RCR2_START; 448 writeb(tmp, rtc->regbase + RCR2); 449 450 spin_unlock_irq(&rtc->lock); 451 452 return 0; 453 } 454 455 static inline int sh_rtc_read_alarm_value(struct sh_rtc *rtc, int reg_off) 456 { 457 unsigned int byte; 458 int value = 0xff; /* return 0xff for ignored values */ 459 460 byte = readb(rtc->regbase + reg_off); 461 if (byte & AR_ENB) { 462 byte &= ~AR_ENB; /* strip the enable bit */ 463 value = bcd2bin(byte); 464 } 465 466 return value; 467 } 468 469 static int sh_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *wkalrm) 470 { 471 struct platform_device *pdev = to_platform_device(dev); 472 struct sh_rtc *rtc = platform_get_drvdata(pdev); 473 struct rtc_time *tm = &wkalrm->time; 474 475 spin_lock_irq(&rtc->lock); 476 477 tm->tm_sec = sh_rtc_read_alarm_value(rtc, RSECAR); 478 tm->tm_min = sh_rtc_read_alarm_value(rtc, RMINAR); 479 tm->tm_hour = sh_rtc_read_alarm_value(rtc, RHRAR); 480 tm->tm_wday = sh_rtc_read_alarm_value(rtc, RWKAR); 481 tm->tm_mday = sh_rtc_read_alarm_value(rtc, RDAYAR); 482 tm->tm_mon = sh_rtc_read_alarm_value(rtc, RMONAR); 483 if (tm->tm_mon > 0) 484 tm->tm_mon -= 1; /* RTC is 1-12, tm_mon is 0-11 */ 485 tm->tm_year = 0xffff; 486 487 wkalrm->enabled = (readb(rtc->regbase + RCR1) & RCR1_AIE) ? 1 : 0; 488 489 spin_unlock_irq(&rtc->lock); 490 491 return 0; 492 } 493 494 static inline void sh_rtc_write_alarm_value(struct sh_rtc *rtc, 495 int value, int reg_off) 496 { 497 /* < 0 for a value that is ignored */ 498 if (value < 0) 499 writeb(0, rtc->regbase + reg_off); 500 else 501 writeb(bin2bcd(value) | AR_ENB, rtc->regbase + reg_off); 502 } 503 504 static int sh_rtc_check_alarm(struct rtc_time *tm) 505 { 506 /* 507 * The original rtc says anything > 0xc0 is "don't care" or "match 508 * all" - most users use 0xff but rtc-dev uses -1 for the same thing. 509 * The original rtc doesn't support years - some things use -1 and 510 * some 0xffff. We use -1 to make out tests easier. 511 */ 512 if (tm->tm_year == 0xffff) 513 tm->tm_year = -1; 514 if (tm->tm_mon >= 0xff) 515 tm->tm_mon = -1; 516 if (tm->tm_mday >= 0xff) 517 tm->tm_mday = -1; 518 if (tm->tm_wday >= 0xff) 519 tm->tm_wday = -1; 520 if (tm->tm_hour >= 0xff) 521 tm->tm_hour = -1; 522 if (tm->tm_min >= 0xff) 523 tm->tm_min = -1; 524 if (tm->tm_sec >= 0xff) 525 tm->tm_sec = -1; 526 527 if (tm->tm_year > 9999 || 528 tm->tm_mon >= 12 || 529 tm->tm_mday == 0 || tm->tm_mday >= 32 || 530 tm->tm_wday >= 7 || 531 tm->tm_hour >= 24 || 532 tm->tm_min >= 60 || 533 tm->tm_sec >= 60) 534 return -EINVAL; 535 536 return 0; 537 } 538 539 static int sh_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm) 540 { 541 struct platform_device *pdev = to_platform_device(dev); 542 struct sh_rtc *rtc = platform_get_drvdata(pdev); 543 unsigned int rcr1; 544 struct rtc_time *tm = &wkalrm->time; 545 int mon, err; 546 547 err = sh_rtc_check_alarm(tm); 548 if (unlikely(err < 0)) 549 return err; 550 551 spin_lock_irq(&rtc->lock); 552 553 /* disable alarm interrupt and clear the alarm flag */ 554 rcr1 = readb(rtc->regbase + RCR1); 555 rcr1 &= ~(RCR1_AF | RCR1_AIE); 556 writeb(rcr1, rtc->regbase + RCR1); 557 558 /* set alarm time */ 559 sh_rtc_write_alarm_value(rtc, tm->tm_sec, RSECAR); 560 sh_rtc_write_alarm_value(rtc, tm->tm_min, RMINAR); 561 sh_rtc_write_alarm_value(rtc, tm->tm_hour, RHRAR); 562 sh_rtc_write_alarm_value(rtc, tm->tm_wday, RWKAR); 563 sh_rtc_write_alarm_value(rtc, tm->tm_mday, RDAYAR); 564 mon = tm->tm_mon; 565 if (mon >= 0) 566 mon += 1; 567 sh_rtc_write_alarm_value(rtc, mon, RMONAR); 568 569 if (wkalrm->enabled) { 570 rcr1 |= RCR1_AIE; 571 writeb(rcr1, rtc->regbase + RCR1); 572 } 573 574 spin_unlock_irq(&rtc->lock); 575 576 return 0; 577 } 578 579 static struct rtc_class_ops sh_rtc_ops = { 580 .read_time = sh_rtc_read_time, 581 .set_time = sh_rtc_set_time, 582 .read_alarm = sh_rtc_read_alarm, 583 .set_alarm = sh_rtc_set_alarm, 584 .proc = sh_rtc_proc, 585 .alarm_irq_enable = sh_rtc_alarm_irq_enable, 586 }; 587 588 static int __init sh_rtc_probe(struct platform_device *pdev) 589 { 590 struct sh_rtc *rtc; 591 struct resource *res; 592 struct rtc_time r; 593 char clk_name[6]; 594 int clk_id, ret; 595 596 rtc = kzalloc(sizeof(struct sh_rtc), GFP_KERNEL); 597 if (unlikely(!rtc)) 598 return -ENOMEM; 599 600 spin_lock_init(&rtc->lock); 601 602 /* get periodic/carry/alarm irqs */ 603 ret = platform_get_irq(pdev, 0); 604 if (unlikely(ret <= 0)) { 605 ret = -ENOENT; 606 dev_err(&pdev->dev, "No IRQ resource\n"); 607 goto err_badres; 608 } 609 610 rtc->periodic_irq = ret; 611 rtc->carry_irq = platform_get_irq(pdev, 1); 612 rtc->alarm_irq = platform_get_irq(pdev, 2); 613 614 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 615 if (unlikely(res == NULL)) { 616 ret = -ENOENT; 617 dev_err(&pdev->dev, "No IO resource\n"); 618 goto err_badres; 619 } 620 621 rtc->regsize = resource_size(res); 622 623 rtc->res = request_mem_region(res->start, rtc->regsize, pdev->name); 624 if (unlikely(!rtc->res)) { 625 ret = -EBUSY; 626 goto err_badres; 627 } 628 629 rtc->regbase = ioremap_nocache(rtc->res->start, rtc->regsize); 630 if (unlikely(!rtc->regbase)) { 631 ret = -EINVAL; 632 goto err_badmap; 633 } 634 635 clk_id = pdev->id; 636 /* With a single device, the clock id is still "rtc0" */ 637 if (clk_id < 0) 638 clk_id = 0; 639 640 snprintf(clk_name, sizeof(clk_name), "rtc%d", clk_id); 641 642 rtc->clk = clk_get(&pdev->dev, clk_name); 643 if (IS_ERR(rtc->clk)) { 644 /* 645 * No error handling for rtc->clk intentionally, not all 646 * platforms will have a unique clock for the RTC, and 647 * the clk API can handle the struct clk pointer being 648 * NULL. 649 */ 650 rtc->clk = NULL; 651 } 652 653 clk_enable(rtc->clk); 654 655 rtc->capabilities = RTC_DEF_CAPABILITIES; 656 if (pdev->dev.platform_data) { 657 struct sh_rtc_platform_info *pinfo = pdev->dev.platform_data; 658 659 /* 660 * Some CPUs have special capabilities in addition to the 661 * default set. Add those in here. 662 */ 663 rtc->capabilities |= pinfo->capabilities; 664 } 665 666 if (rtc->carry_irq <= 0) { 667 /* register shared periodic/carry/alarm irq */ 668 ret = request_irq(rtc->periodic_irq, sh_rtc_shared, 669 0, "sh-rtc", rtc); 670 if (unlikely(ret)) { 671 dev_err(&pdev->dev, 672 "request IRQ failed with %d, IRQ %d\n", ret, 673 rtc->periodic_irq); 674 goto err_unmap; 675 } 676 } else { 677 /* register periodic/carry/alarm irqs */ 678 ret = request_irq(rtc->periodic_irq, sh_rtc_periodic, 679 0, "sh-rtc period", rtc); 680 if (unlikely(ret)) { 681 dev_err(&pdev->dev, 682 "request period IRQ failed with %d, IRQ %d\n", 683 ret, rtc->periodic_irq); 684 goto err_unmap; 685 } 686 687 ret = request_irq(rtc->carry_irq, sh_rtc_interrupt, 688 0, "sh-rtc carry", rtc); 689 if (unlikely(ret)) { 690 dev_err(&pdev->dev, 691 "request carry IRQ failed with %d, IRQ %d\n", 692 ret, rtc->carry_irq); 693 free_irq(rtc->periodic_irq, rtc); 694 goto err_unmap; 695 } 696 697 ret = request_irq(rtc->alarm_irq, sh_rtc_alarm, 698 0, "sh-rtc alarm", rtc); 699 if (unlikely(ret)) { 700 dev_err(&pdev->dev, 701 "request alarm IRQ failed with %d, IRQ %d\n", 702 ret, rtc->alarm_irq); 703 free_irq(rtc->carry_irq, rtc); 704 free_irq(rtc->periodic_irq, rtc); 705 goto err_unmap; 706 } 707 } 708 709 platform_set_drvdata(pdev, rtc); 710 711 /* everything disabled by default */ 712 sh_rtc_irq_set_freq(&pdev->dev, 0); 713 sh_rtc_irq_set_state(&pdev->dev, 0); 714 sh_rtc_setaie(&pdev->dev, 0); 715 sh_rtc_setcie(&pdev->dev, 0); 716 717 rtc->rtc_dev = rtc_device_register("sh", &pdev->dev, 718 &sh_rtc_ops, THIS_MODULE); 719 if (IS_ERR(rtc->rtc_dev)) { 720 ret = PTR_ERR(rtc->rtc_dev); 721 free_irq(rtc->periodic_irq, rtc); 722 free_irq(rtc->carry_irq, rtc); 723 free_irq(rtc->alarm_irq, rtc); 724 goto err_unmap; 725 } 726 727 rtc->rtc_dev->max_user_freq = 256; 728 729 /* reset rtc to epoch 0 if time is invalid */ 730 if (rtc_read_time(rtc->rtc_dev, &r) < 0) { 731 rtc_time_to_tm(0, &r); 732 rtc_set_time(rtc->rtc_dev, &r); 733 } 734 735 device_init_wakeup(&pdev->dev, 1); 736 return 0; 737 738 err_unmap: 739 clk_disable(rtc->clk); 740 clk_put(rtc->clk); 741 iounmap(rtc->regbase); 742 err_badmap: 743 release_mem_region(rtc->res->start, rtc->regsize); 744 err_badres: 745 kfree(rtc); 746 747 return ret; 748 } 749 750 static int __exit sh_rtc_remove(struct platform_device *pdev) 751 { 752 struct sh_rtc *rtc = platform_get_drvdata(pdev); 753 754 rtc_device_unregister(rtc->rtc_dev); 755 sh_rtc_irq_set_state(&pdev->dev, 0); 756 757 sh_rtc_setaie(&pdev->dev, 0); 758 sh_rtc_setcie(&pdev->dev, 0); 759 760 free_irq(rtc->periodic_irq, rtc); 761 762 if (rtc->carry_irq > 0) { 763 free_irq(rtc->carry_irq, rtc); 764 free_irq(rtc->alarm_irq, rtc); 765 } 766 767 iounmap(rtc->regbase); 768 release_mem_region(rtc->res->start, rtc->regsize); 769 770 clk_disable(rtc->clk); 771 clk_put(rtc->clk); 772 773 platform_set_drvdata(pdev, NULL); 774 775 kfree(rtc); 776 777 return 0; 778 } 779 780 static void sh_rtc_set_irq_wake(struct device *dev, int enabled) 781 { 782 struct platform_device *pdev = to_platform_device(dev); 783 struct sh_rtc *rtc = platform_get_drvdata(pdev); 784 785 irq_set_irq_wake(rtc->periodic_irq, enabled); 786 787 if (rtc->carry_irq > 0) { 788 irq_set_irq_wake(rtc->carry_irq, enabled); 789 irq_set_irq_wake(rtc->alarm_irq, enabled); 790 } 791 } 792 793 #ifdef CONFIG_PM_SLEEP 794 static int sh_rtc_suspend(struct device *dev) 795 { 796 if (device_may_wakeup(dev)) 797 sh_rtc_set_irq_wake(dev, 1); 798 799 return 0; 800 } 801 802 static int sh_rtc_resume(struct device *dev) 803 { 804 if (device_may_wakeup(dev)) 805 sh_rtc_set_irq_wake(dev, 0); 806 807 return 0; 808 } 809 #endif 810 811 static SIMPLE_DEV_PM_OPS(sh_rtc_pm_ops, sh_rtc_suspend, sh_rtc_resume); 812 813 static struct platform_driver sh_rtc_platform_driver = { 814 .driver = { 815 .name = DRV_NAME, 816 .owner = THIS_MODULE, 817 .pm = &sh_rtc_pm_ops, 818 }, 819 .remove = __exit_p(sh_rtc_remove), 820 }; 821 822 module_platform_driver_probe(sh_rtc_platform_driver, sh_rtc_probe); 823 824 MODULE_DESCRIPTION("SuperH on-chip RTC driver"); 825 MODULE_VERSION(DRV_VERSION); 826 MODULE_AUTHOR("Paul Mundt <lethal@linux-sh.org>, " 827 "Jamie Lenehan <lenehan@twibble.org>, " 828 "Angelo Castello <angelo.castello@st.com>"); 829 MODULE_LICENSE("GPL"); 830 MODULE_ALIAS("platform:" DRV_NAME); 831