1 /* 2 * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx 3 * 4 * Copyright (c) 2000 Nils Faerber 5 * 6 * Based on rtc.c by Paul Gortmaker 7 * 8 * Original Driver by Nils Faerber <nils@kernelconcepts.de> 9 * 10 * Modifications from: 11 * CIH <cih@coventive.com> 12 * Nicolas Pitre <nico@fluxnic.net> 13 * Andrew Christian <andrew.christian@hp.com> 14 * 15 * Converted to the RTC subsystem and Driver Model 16 * by Richard Purdie <rpurdie@rpsys.net> 17 * 18 * This program is free software; you can redistribute it and/or 19 * modify it under the terms of the GNU General Public License 20 * as published by the Free Software Foundation; either version 21 * 2 of the License, or (at your option) any later version. 22 */ 23 24 #include <linux/platform_device.h> 25 #include <linux/module.h> 26 #include <linux/clk.h> 27 #include <linux/rtc.h> 28 #include <linux/init.h> 29 #include <linux/fs.h> 30 #include <linux/interrupt.h> 31 #include <linux/slab.h> 32 #include <linux/string.h> 33 #include <linux/of.h> 34 #include <linux/pm.h> 35 #include <linux/bitops.h> 36 #include <linux/io.h> 37 38 #include <mach/hardware.h> 39 #include <mach/irqs.h> 40 41 #if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP) 42 #include <mach/regs-rtc.h> 43 #endif 44 45 #define RTC_DEF_DIVIDER (32768 - 1) 46 #define RTC_DEF_TRIM 0 47 #define RTC_FREQ 1024 48 49 struct sa1100_rtc { 50 spinlock_t lock; 51 int irq_1hz; 52 int irq_alarm; 53 struct rtc_device *rtc; 54 struct clk *clk; 55 }; 56 57 static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id) 58 { 59 struct sa1100_rtc *info = dev_get_drvdata(dev_id); 60 struct rtc_device *rtc = info->rtc; 61 unsigned int rtsr; 62 unsigned long events = 0; 63 64 spin_lock(&info->lock); 65 66 rtsr = RTSR; 67 /* clear interrupt sources */ 68 RTSR = 0; 69 /* Fix for a nasty initialization problem the in SA11xx RTSR register. 70 * See also the comments in sa1100_rtc_probe(). */ 71 if (rtsr & (RTSR_ALE | RTSR_HZE)) { 72 /* This is the original code, before there was the if test 73 * above. This code does not clear interrupts that were not 74 * enabled. */ 75 RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2); 76 } else { 77 /* For some reason, it is possible to enter this routine 78 * without interruptions enabled, it has been tested with 79 * several units (Bug in SA11xx chip?). 80 * 81 * This situation leads to an infinite "loop" of interrupt 82 * routine calling and as a result the processor seems to 83 * lock on its first call to open(). */ 84 RTSR = RTSR_AL | RTSR_HZ; 85 } 86 87 /* clear alarm interrupt if it has occurred */ 88 if (rtsr & RTSR_AL) 89 rtsr &= ~RTSR_ALE; 90 RTSR = rtsr & (RTSR_ALE | RTSR_HZE); 91 92 /* update irq data & counter */ 93 if (rtsr & RTSR_AL) 94 events |= RTC_AF | RTC_IRQF; 95 if (rtsr & RTSR_HZ) 96 events |= RTC_UF | RTC_IRQF; 97 98 rtc_update_irq(rtc, 1, events); 99 100 spin_unlock(&info->lock); 101 102 return IRQ_HANDLED; 103 } 104 105 static int sa1100_rtc_open(struct device *dev) 106 { 107 struct sa1100_rtc *info = dev_get_drvdata(dev); 108 struct rtc_device *rtc = info->rtc; 109 int ret; 110 111 ret = clk_prepare_enable(info->clk); 112 if (ret) 113 goto fail_clk; 114 ret = request_irq(info->irq_1hz, sa1100_rtc_interrupt, 0, "rtc 1Hz", dev); 115 if (ret) { 116 dev_err(dev, "IRQ %d already in use.\n", info->irq_1hz); 117 goto fail_ui; 118 } 119 ret = request_irq(info->irq_alarm, sa1100_rtc_interrupt, 0, "rtc Alrm", dev); 120 if (ret) { 121 dev_err(dev, "IRQ %d already in use.\n", info->irq_alarm); 122 goto fail_ai; 123 } 124 rtc->max_user_freq = RTC_FREQ; 125 rtc_irq_set_freq(rtc, NULL, RTC_FREQ); 126 127 return 0; 128 129 fail_ai: 130 free_irq(info->irq_1hz, dev); 131 fail_ui: 132 clk_disable_unprepare(info->clk); 133 fail_clk: 134 return ret; 135 } 136 137 static void sa1100_rtc_release(struct device *dev) 138 { 139 struct sa1100_rtc *info = dev_get_drvdata(dev); 140 141 spin_lock_irq(&info->lock); 142 RTSR = 0; 143 spin_unlock_irq(&info->lock); 144 145 free_irq(info->irq_alarm, dev); 146 free_irq(info->irq_1hz, dev); 147 clk_disable_unprepare(info->clk); 148 } 149 150 static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) 151 { 152 struct sa1100_rtc *info = dev_get_drvdata(dev); 153 154 spin_lock_irq(&info->lock); 155 if (enabled) 156 RTSR |= RTSR_ALE; 157 else 158 RTSR &= ~RTSR_ALE; 159 spin_unlock_irq(&info->lock); 160 return 0; 161 } 162 163 static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm) 164 { 165 rtc_time_to_tm(RCNR, tm); 166 return 0; 167 } 168 169 static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm) 170 { 171 unsigned long time; 172 int ret; 173 174 ret = rtc_tm_to_time(tm, &time); 175 if (ret == 0) 176 RCNR = time; 177 return ret; 178 } 179 180 static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 181 { 182 u32 rtsr; 183 184 rtsr = RTSR; 185 alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0; 186 alrm->pending = (rtsr & RTSR_AL) ? 1 : 0; 187 return 0; 188 } 189 190 static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 191 { 192 struct sa1100_rtc *info = dev_get_drvdata(dev); 193 unsigned long time; 194 int ret; 195 196 spin_lock_irq(&info->lock); 197 ret = rtc_tm_to_time(&alrm->time, &time); 198 if (ret != 0) 199 goto out; 200 RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL); 201 RTAR = time; 202 if (alrm->enabled) 203 RTSR |= RTSR_ALE; 204 else 205 RTSR &= ~RTSR_ALE; 206 out: 207 spin_unlock_irq(&info->lock); 208 209 return ret; 210 } 211 212 static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq) 213 { 214 seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR); 215 seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR); 216 217 return 0; 218 } 219 220 static const struct rtc_class_ops sa1100_rtc_ops = { 221 .open = sa1100_rtc_open, 222 .release = sa1100_rtc_release, 223 .read_time = sa1100_rtc_read_time, 224 .set_time = sa1100_rtc_set_time, 225 .read_alarm = sa1100_rtc_read_alarm, 226 .set_alarm = sa1100_rtc_set_alarm, 227 .proc = sa1100_rtc_proc, 228 .alarm_irq_enable = sa1100_rtc_alarm_irq_enable, 229 }; 230 231 static int sa1100_rtc_probe(struct platform_device *pdev) 232 { 233 struct rtc_device *rtc; 234 struct sa1100_rtc *info; 235 int irq_1hz, irq_alarm, ret = 0; 236 237 irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz"); 238 irq_alarm = platform_get_irq_byname(pdev, "rtc alarm"); 239 if (irq_1hz < 0 || irq_alarm < 0) 240 return -ENODEV; 241 242 info = kzalloc(sizeof(struct sa1100_rtc), GFP_KERNEL); 243 if (!info) 244 return -ENOMEM; 245 info->clk = clk_get(&pdev->dev, NULL); 246 if (IS_ERR(info->clk)) { 247 dev_err(&pdev->dev, "failed to find rtc clock source\n"); 248 ret = PTR_ERR(info->clk); 249 goto err_clk; 250 } 251 info->irq_1hz = irq_1hz; 252 info->irq_alarm = irq_alarm; 253 spin_lock_init(&info->lock); 254 platform_set_drvdata(pdev, info); 255 256 /* 257 * According to the manual we should be able to let RTTR be zero 258 * and then a default diviser for a 32.768KHz clock is used. 259 * Apparently this doesn't work, at least for my SA1110 rev 5. 260 * If the clock divider is uninitialized then reset it to the 261 * default value to get the 1Hz clock. 262 */ 263 if (RTTR == 0) { 264 RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16); 265 dev_warn(&pdev->dev, "warning: " 266 "initializing default clock divider/trim value\n"); 267 /* The current RTC value probably doesn't make sense either */ 268 RCNR = 0; 269 } 270 271 device_init_wakeup(&pdev->dev, 1); 272 273 rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops, 274 THIS_MODULE); 275 276 if (IS_ERR(rtc)) { 277 ret = PTR_ERR(rtc); 278 goto err_dev; 279 } 280 info->rtc = rtc; 281 282 /* Fix for a nasty initialization problem the in SA11xx RTSR register. 283 * See also the comments in sa1100_rtc_interrupt(). 284 * 285 * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an 286 * interrupt pending, even though interrupts were never enabled. 287 * In this case, this bit it must be reset before enabling 288 * interruptions to avoid a nonexistent interrupt to occur. 289 * 290 * In principle, the same problem would apply to bit 0, although it has 291 * never been observed to happen. 292 * 293 * This issue is addressed both here and in sa1100_rtc_interrupt(). 294 * If the issue is not addressed here, in the times when the processor 295 * wakes up with the bit set there will be one spurious interrupt. 296 * 297 * The issue is also dealt with in sa1100_rtc_interrupt() to be on the 298 * safe side, once the condition that lead to this strange 299 * initialization is unknown and could in principle happen during 300 * normal processing. 301 * 302 * Notice that clearing bit 1 and 0 is accomplished by writting ONES to 303 * the corresponding bits in RTSR. */ 304 RTSR = RTSR_AL | RTSR_HZ; 305 306 return 0; 307 err_dev: 308 platform_set_drvdata(pdev, NULL); 309 clk_put(info->clk); 310 err_clk: 311 kfree(info); 312 return ret; 313 } 314 315 static int sa1100_rtc_remove(struct platform_device *pdev) 316 { 317 struct sa1100_rtc *info = platform_get_drvdata(pdev); 318 319 if (info) { 320 rtc_device_unregister(info->rtc); 321 clk_put(info->clk); 322 platform_set_drvdata(pdev, NULL); 323 kfree(info); 324 } 325 326 return 0; 327 } 328 329 #ifdef CONFIG_PM 330 static int sa1100_rtc_suspend(struct device *dev) 331 { 332 struct sa1100_rtc *info = dev_get_drvdata(dev); 333 if (device_may_wakeup(dev)) 334 enable_irq_wake(info->irq_alarm); 335 return 0; 336 } 337 338 static int sa1100_rtc_resume(struct device *dev) 339 { 340 struct sa1100_rtc *info = dev_get_drvdata(dev); 341 if (device_may_wakeup(dev)) 342 disable_irq_wake(info->irq_alarm); 343 return 0; 344 } 345 346 static const struct dev_pm_ops sa1100_rtc_pm_ops = { 347 .suspend = sa1100_rtc_suspend, 348 .resume = sa1100_rtc_resume, 349 }; 350 #endif 351 352 static struct of_device_id sa1100_rtc_dt_ids[] = { 353 { .compatible = "mrvl,sa1100-rtc", }, 354 { .compatible = "mrvl,mmp-rtc", }, 355 {} 356 }; 357 MODULE_DEVICE_TABLE(of, sa1100_rtc_dt_ids); 358 359 static struct platform_driver sa1100_rtc_driver = { 360 .probe = sa1100_rtc_probe, 361 .remove = sa1100_rtc_remove, 362 .driver = { 363 .name = "sa1100-rtc", 364 #ifdef CONFIG_PM 365 .pm = &sa1100_rtc_pm_ops, 366 #endif 367 .of_match_table = sa1100_rtc_dt_ids, 368 }, 369 }; 370 371 module_platform_driver(sa1100_rtc_driver); 372 373 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>"); 374 MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)"); 375 MODULE_LICENSE("GPL"); 376 MODULE_ALIAS("platform:sa1100-rtc"); 377