xref: /openbmc/linux/drivers/rtc/rtc-sa1100.c (revision 92ed1a76)
1 /*
2  * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
3  *
4  * Copyright (c) 2000 Nils Faerber
5  *
6  * Based on rtc.c by Paul Gortmaker
7  *
8  * Original Driver by Nils Faerber <nils@kernelconcepts.de>
9  *
10  * Modifications from:
11  *   CIH <cih@coventive.com>
12  *   Nicolas Pitre <nico@fluxnic.net>
13  *   Andrew Christian <andrew.christian@hp.com>
14  *
15  * Converted to the RTC subsystem and Driver Model
16  *   by Richard Purdie <rpurdie@rpsys.net>
17  *
18  * This program is free software; you can redistribute it and/or
19  * modify it under the terms of the GNU General Public License
20  * as published by the Free Software Foundation; either version
21  * 2 of the License, or (at your option) any later version.
22  */
23 
24 #include <linux/platform_device.h>
25 #include <linux/module.h>
26 #include <linux/rtc.h>
27 #include <linux/init.h>
28 #include <linux/fs.h>
29 #include <linux/interrupt.h>
30 #include <linux/string.h>
31 #include <linux/pm.h>
32 #include <linux/bitops.h>
33 
34 #include <mach/hardware.h>
35 #include <asm/irq.h>
36 
37 #ifdef CONFIG_ARCH_PXA
38 #include <mach/regs-rtc.h>
39 #include <mach/regs-ost.h>
40 #endif
41 
42 #define RTC_DEF_DIVIDER		(32768 - 1)
43 #define RTC_DEF_TRIM		0
44 
45 static const unsigned long RTC_FREQ = 1024;
46 static unsigned long timer_freq;
47 static struct rtc_time rtc_alarm;
48 static DEFINE_SPINLOCK(sa1100_rtc_lock);
49 
50 static inline int rtc_periodic_alarm(struct rtc_time *tm)
51 {
52 	return  (tm->tm_year == -1) ||
53 		((unsigned)tm->tm_mon >= 12) ||
54 		((unsigned)(tm->tm_mday - 1) >= 31) ||
55 		((unsigned)tm->tm_hour > 23) ||
56 		((unsigned)tm->tm_min > 59) ||
57 		((unsigned)tm->tm_sec > 59);
58 }
59 
60 /*
61  * Calculate the next alarm time given the requested alarm time mask
62  * and the current time.
63  */
64 static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now,
65 	struct rtc_time *alrm)
66 {
67 	unsigned long next_time;
68 	unsigned long now_time;
69 
70 	next->tm_year = now->tm_year;
71 	next->tm_mon = now->tm_mon;
72 	next->tm_mday = now->tm_mday;
73 	next->tm_hour = alrm->tm_hour;
74 	next->tm_min = alrm->tm_min;
75 	next->tm_sec = alrm->tm_sec;
76 
77 	rtc_tm_to_time(now, &now_time);
78 	rtc_tm_to_time(next, &next_time);
79 
80 	if (next_time < now_time) {
81 		/* Advance one day */
82 		next_time += 60 * 60 * 24;
83 		rtc_time_to_tm(next_time, next);
84 	}
85 }
86 
87 static int rtc_update_alarm(struct rtc_time *alrm)
88 {
89 	struct rtc_time alarm_tm, now_tm;
90 	unsigned long now, time;
91 	int ret;
92 
93 	do {
94 		now = RCNR;
95 		rtc_time_to_tm(now, &now_tm);
96 		rtc_next_alarm_time(&alarm_tm, &now_tm, alrm);
97 		ret = rtc_tm_to_time(&alarm_tm, &time);
98 		if (ret != 0)
99 			break;
100 
101 		RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
102 		RTAR = time;
103 	} while (now != RCNR);
104 
105 	return ret;
106 }
107 
108 static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
109 {
110 	struct platform_device *pdev = to_platform_device(dev_id);
111 	struct rtc_device *rtc = platform_get_drvdata(pdev);
112 	unsigned int rtsr;
113 	unsigned long events = 0;
114 
115 	spin_lock(&sa1100_rtc_lock);
116 
117 	rtsr = RTSR;
118 	/* clear interrupt sources */
119 	RTSR = 0;
120 	/* Fix for a nasty initialization problem the in SA11xx RTSR register.
121 	 * See also the comments in sa1100_rtc_probe(). */
122 	if (rtsr & (RTSR_ALE | RTSR_HZE)) {
123 		/* This is the original code, before there was the if test
124 		 * above. This code does not clear interrupts that were not
125 		 * enabled. */
126 		RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
127 	} else {
128 		/* For some reason, it is possible to enter this routine
129 		 * without interruptions enabled, it has been tested with
130 		 * several units (Bug in SA11xx chip?).
131 		 *
132 		 * This situation leads to an infinite "loop" of interrupt
133 		 * routine calling and as a result the processor seems to
134 		 * lock on its first call to open(). */
135 		RTSR = RTSR_AL | RTSR_HZ;
136 	}
137 
138 	/* clear alarm interrupt if it has occurred */
139 	if (rtsr & RTSR_AL)
140 		rtsr &= ~RTSR_ALE;
141 	RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
142 
143 	/* update irq data & counter */
144 	if (rtsr & RTSR_AL)
145 		events |= RTC_AF | RTC_IRQF;
146 	if (rtsr & RTSR_HZ)
147 		events |= RTC_UF | RTC_IRQF;
148 
149 	rtc_update_irq(rtc, 1, events);
150 
151 	if (rtsr & RTSR_AL && rtc_periodic_alarm(&rtc_alarm))
152 		rtc_update_alarm(&rtc_alarm);
153 
154 	spin_unlock(&sa1100_rtc_lock);
155 
156 	return IRQ_HANDLED;
157 }
158 
159 static int sa1100_irq_set_freq(struct device *dev, int freq)
160 {
161 	if (freq < 1 || freq > timer_freq) {
162 		return -EINVAL;
163 	} else {
164 		struct rtc_device *rtc = (struct rtc_device *)dev;
165 
166 		rtc->irq_freq = freq;
167 
168 		return 0;
169 	}
170 }
171 
172 static int rtc_timer1_count;
173 
174 static int sa1100_irq_set_state(struct device *dev, int enabled)
175 {
176 	spin_lock_irq(&sa1100_rtc_lock);
177 	if (enabled) {
178 		struct rtc_device *rtc = (struct rtc_device *)dev;
179 
180 		OSMR1 = timer_freq / rtc->irq_freq + OSCR;
181 		OIER |= OIER_E1;
182 		rtc_timer1_count = 1;
183 	} else {
184 		OIER &= ~OIER_E1;
185 	}
186 	spin_unlock_irq(&sa1100_rtc_lock);
187 
188 	return 0;
189 }
190 
191 static inline int sa1100_timer1_retrigger(struct rtc_device *rtc)
192 {
193 	unsigned long diff;
194 	unsigned long period = timer_freq / rtc->irq_freq;
195 
196 	spin_lock_irq(&sa1100_rtc_lock);
197 
198 	do {
199 		OSMR1 += period;
200 		diff = OSMR1 - OSCR;
201 		/* If OSCR > OSMR1, diff is a very large number (unsigned
202 		 * math). This means we have a lost interrupt. */
203 	} while (diff > period);
204 	OIER |= OIER_E1;
205 
206 	spin_unlock_irq(&sa1100_rtc_lock);
207 
208 	return 0;
209 }
210 
211 static irqreturn_t timer1_interrupt(int irq, void *dev_id)
212 {
213 	struct platform_device *pdev = to_platform_device(dev_id);
214 	struct rtc_device *rtc = platform_get_drvdata(pdev);
215 
216 	/*
217 	 * If we match for the first time, rtc_timer1_count will be 1.
218 	 * Otherwise, we wrapped around (very unlikely but
219 	 * still possible) so compute the amount of missed periods.
220 	 * The match reg is updated only when the data is actually retrieved
221 	 * to avoid unnecessary interrupts.
222 	 */
223 	OSSR = OSSR_M1;	/* clear match on timer1 */
224 
225 	rtc_update_irq(rtc, rtc_timer1_count, RTC_PF | RTC_IRQF);
226 
227 	if (rtc_timer1_count == 1)
228 		rtc_timer1_count =
229 			(rtc->irq_freq * ((1 << 30) / (timer_freq >> 2)));
230 
231 	/* retrigger. */
232 	sa1100_timer1_retrigger(rtc);
233 
234 	return IRQ_HANDLED;
235 }
236 
237 static int sa1100_rtc_read_callback(struct device *dev, int data)
238 {
239 	if (data & RTC_PF) {
240 		struct rtc_device *rtc = (struct rtc_device *)dev;
241 
242 		/* interpolate missed periods and set match for the next */
243 		unsigned long period = timer_freq / rtc->irq_freq;
244 		unsigned long oscr = OSCR;
245 		unsigned long osmr1 = OSMR1;
246 		unsigned long missed = (oscr - osmr1)/period;
247 		data += missed << 8;
248 		OSSR = OSSR_M1;	/* clear match on timer 1 */
249 		OSMR1 = osmr1 + (missed + 1)*period;
250 		/* Ensure we didn't miss another match in the mean time.
251 		 * Here we compare (match - OSCR) 8 instead of 0 --
252 		 * see comment in pxa_timer_interrupt() for explanation.
253 		 */
254 		while ((signed long)((osmr1 = OSMR1) - OSCR) <= 8) {
255 			data += 0x100;
256 			OSSR = OSSR_M1;	/* clear match on timer 1 */
257 			OSMR1 = osmr1 + period;
258 		}
259 	}
260 	return data;
261 }
262 
263 static int sa1100_rtc_open(struct device *dev)
264 {
265 	int ret;
266 	struct rtc_device *rtc = (struct rtc_device *)dev;
267 
268 	ret = request_irq(IRQ_RTC1Hz, sa1100_rtc_interrupt, IRQF_DISABLED,
269 		"rtc 1Hz", dev);
270 	if (ret) {
271 		dev_err(dev, "IRQ %d already in use.\n", IRQ_RTC1Hz);
272 		goto fail_ui;
273 	}
274 	ret = request_irq(IRQ_RTCAlrm, sa1100_rtc_interrupt, IRQF_DISABLED,
275 		"rtc Alrm", dev);
276 	if (ret) {
277 		dev_err(dev, "IRQ %d already in use.\n", IRQ_RTCAlrm);
278 		goto fail_ai;
279 	}
280 	ret = request_irq(IRQ_OST1, timer1_interrupt, IRQF_DISABLED,
281 		"rtc timer", dev);
282 	if (ret) {
283 		dev_err(dev, "IRQ %d already in use.\n", IRQ_OST1);
284 		goto fail_pi;
285 	}
286 	rtc->max_user_freq = RTC_FREQ;
287 	sa1100_irq_set_freq(dev, RTC_FREQ);
288 
289 	return 0;
290 
291  fail_pi:
292 	free_irq(IRQ_RTCAlrm, dev);
293  fail_ai:
294 	free_irq(IRQ_RTC1Hz, dev);
295  fail_ui:
296 	return ret;
297 }
298 
299 static void sa1100_rtc_release(struct device *dev)
300 {
301 	spin_lock_irq(&sa1100_rtc_lock);
302 	RTSR = 0;
303 	OIER &= ~OIER_E1;
304 	OSSR = OSSR_M1;
305 	spin_unlock_irq(&sa1100_rtc_lock);
306 
307 	free_irq(IRQ_OST1, dev);
308 	free_irq(IRQ_RTCAlrm, dev);
309 	free_irq(IRQ_RTC1Hz, dev);
310 }
311 
312 
313 static int sa1100_rtc_ioctl(struct device *dev, unsigned int cmd,
314 		unsigned long arg)
315 {
316 	switch (cmd) {
317 	case RTC_AIE_OFF:
318 		spin_lock_irq(&sa1100_rtc_lock);
319 		RTSR &= ~RTSR_ALE;
320 		spin_unlock_irq(&sa1100_rtc_lock);
321 		return 0;
322 	case RTC_AIE_ON:
323 		spin_lock_irq(&sa1100_rtc_lock);
324 		RTSR |= RTSR_ALE;
325 		spin_unlock_irq(&sa1100_rtc_lock);
326 		return 0;
327 	case RTC_UIE_OFF:
328 		spin_lock_irq(&sa1100_rtc_lock);
329 		RTSR &= ~RTSR_HZE;
330 		spin_unlock_irq(&sa1100_rtc_lock);
331 		return 0;
332 	case RTC_UIE_ON:
333 		spin_lock_irq(&sa1100_rtc_lock);
334 		RTSR |= RTSR_HZE;
335 		spin_unlock_irq(&sa1100_rtc_lock);
336 		return 0;
337 	}
338 	return -ENOIOCTLCMD;
339 }
340 
341 static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
342 {
343 	rtc_time_to_tm(RCNR, tm);
344 	return 0;
345 }
346 
347 static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
348 {
349 	unsigned long time;
350 	int ret;
351 
352 	ret = rtc_tm_to_time(tm, &time);
353 	if (ret == 0)
354 		RCNR = time;
355 	return ret;
356 }
357 
358 static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
359 {
360 	u32	rtsr;
361 
362 	memcpy(&alrm->time, &rtc_alarm, sizeof(struct rtc_time));
363 	rtsr = RTSR;
364 	alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
365 	alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
366 	return 0;
367 }
368 
369 static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
370 {
371 	int ret;
372 
373 	spin_lock_irq(&sa1100_rtc_lock);
374 	ret = rtc_update_alarm(&alrm->time);
375 	if (ret == 0) {
376 		if (alrm->enabled)
377 			RTSR |= RTSR_ALE;
378 		else
379 			RTSR &= ~RTSR_ALE;
380 	}
381 	spin_unlock_irq(&sa1100_rtc_lock);
382 
383 	return ret;
384 }
385 
386 static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
387 {
388 	struct rtc_device *rtc = (struct rtc_device *)dev;
389 
390 	seq_printf(seq, "trim/divider\t: 0x%08x\n", (u32) RTTR);
391 	seq_printf(seq, "update_IRQ\t: %s\n",
392 			(RTSR & RTSR_HZE) ? "yes" : "no");
393 	seq_printf(seq, "periodic_IRQ\t: %s\n",
394 			(OIER & OIER_E1) ? "yes" : "no");
395 	seq_printf(seq, "periodic_freq\t: %d\n", rtc->irq_freq);
396 	seq_printf(seq, "RTSR\t\t: 0x%08x\n", (u32)RTSR);
397 
398 	return 0;
399 }
400 
401 static const struct rtc_class_ops sa1100_rtc_ops = {
402 	.open = sa1100_rtc_open,
403 	.read_callback = sa1100_rtc_read_callback,
404 	.release = sa1100_rtc_release,
405 	.ioctl = sa1100_rtc_ioctl,
406 	.read_time = sa1100_rtc_read_time,
407 	.set_time = sa1100_rtc_set_time,
408 	.read_alarm = sa1100_rtc_read_alarm,
409 	.set_alarm = sa1100_rtc_set_alarm,
410 	.proc = sa1100_rtc_proc,
411 	.irq_set_freq = sa1100_irq_set_freq,
412 	.irq_set_state = sa1100_irq_set_state,
413 };
414 
415 static int sa1100_rtc_probe(struct platform_device *pdev)
416 {
417 	struct rtc_device *rtc;
418 
419 	timer_freq = get_clock_tick_rate();
420 
421 	/*
422 	 * According to the manual we should be able to let RTTR be zero
423 	 * and then a default diviser for a 32.768KHz clock is used.
424 	 * Apparently this doesn't work, at least for my SA1110 rev 5.
425 	 * If the clock divider is uninitialized then reset it to the
426 	 * default value to get the 1Hz clock.
427 	 */
428 	if (RTTR == 0) {
429 		RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
430 		dev_warn(&pdev->dev, "warning: "
431 			"initializing default clock divider/trim value\n");
432 		/* The current RTC value probably doesn't make sense either */
433 		RCNR = 0;
434 	}
435 
436 	device_init_wakeup(&pdev->dev, 1);
437 
438 	rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
439 		THIS_MODULE);
440 
441 	if (IS_ERR(rtc))
442 		return PTR_ERR(rtc);
443 
444 	platform_set_drvdata(pdev, rtc);
445 
446 	/* Set the irq_freq */
447 	/*TODO: Find out who is messing with this value after we initialize
448 	 * it here.*/
449 	rtc->irq_freq = RTC_FREQ;
450 
451 	/* Fix for a nasty initialization problem the in SA11xx RTSR register.
452 	 * See also the comments in sa1100_rtc_interrupt().
453 	 *
454 	 * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
455 	 * interrupt pending, even though interrupts were never enabled.
456 	 * In this case, this bit it must be reset before enabling
457 	 * interruptions to avoid a nonexistent interrupt to occur.
458 	 *
459 	 * In principle, the same problem would apply to bit 0, although it has
460 	 * never been observed to happen.
461 	 *
462 	 * This issue is addressed both here and in sa1100_rtc_interrupt().
463 	 * If the issue is not addressed here, in the times when the processor
464 	 * wakes up with the bit set there will be one spurious interrupt.
465 	 *
466 	 * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
467 	 * safe side, once the condition that lead to this strange
468 	 * initialization is unknown and could in principle happen during
469 	 * normal processing.
470 	 *
471 	 * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
472 	 * the corresponding bits in RTSR. */
473 	RTSR = RTSR_AL | RTSR_HZ;
474 
475 	return 0;
476 }
477 
478 static int sa1100_rtc_remove(struct platform_device *pdev)
479 {
480 	struct rtc_device *rtc = platform_get_drvdata(pdev);
481 
482 	if (rtc)
483 		rtc_device_unregister(rtc);
484 
485 	return 0;
486 }
487 
488 #ifdef CONFIG_PM
489 static int sa1100_rtc_suspend(struct device *dev)
490 {
491 	if (device_may_wakeup(dev))
492 		enable_irq_wake(IRQ_RTCAlrm);
493 	return 0;
494 }
495 
496 static int sa1100_rtc_resume(struct device *dev)
497 {
498 	if (device_may_wakeup(dev))
499 		disable_irq_wake(IRQ_RTCAlrm);
500 	return 0;
501 }
502 
503 static const struct dev_pm_ops sa1100_rtc_pm_ops = {
504 	.suspend	= sa1100_rtc_suspend,
505 	.resume		= sa1100_rtc_resume,
506 };
507 #endif
508 
509 static struct platform_driver sa1100_rtc_driver = {
510 	.probe		= sa1100_rtc_probe,
511 	.remove		= sa1100_rtc_remove,
512 	.driver		= {
513 		.name	= "sa1100-rtc",
514 #ifdef CONFIG_PM
515 		.pm	= &sa1100_rtc_pm_ops,
516 #endif
517 	},
518 };
519 
520 static int __init sa1100_rtc_init(void)
521 {
522 	return platform_driver_register(&sa1100_rtc_driver);
523 }
524 
525 static void __exit sa1100_rtc_exit(void)
526 {
527 	platform_driver_unregister(&sa1100_rtc_driver);
528 }
529 
530 module_init(sa1100_rtc_init);
531 module_exit(sa1100_rtc_exit);
532 
533 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
534 MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
535 MODULE_LICENSE("GPL");
536 MODULE_ALIAS("platform:sa1100-rtc");
537