1 /* 2 * Copyright (c) 2013-2014 Samsung Electronics Co., Ltd 3 * http://www.samsung.com 4 * 5 * Copyright (C) 2013 Google, Inc 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 18 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 19 20 #include <linux/module.h> 21 #include <linux/i2c.h> 22 #include <linux/bcd.h> 23 #include <linux/regmap.h> 24 #include <linux/rtc.h> 25 #include <linux/platform_device.h> 26 #include <linux/mfd/samsung/core.h> 27 #include <linux/mfd/samsung/irq.h> 28 #include <linux/mfd/samsung/rtc.h> 29 #include <linux/mfd/samsung/s2mps14.h> 30 31 /* 32 * Maximum number of retries for checking changes in UDR field 33 * of S5M_RTC_UDR_CON register (to limit possible endless loop). 34 * 35 * After writing to RTC registers (setting time or alarm) read the UDR field 36 * in S5M_RTC_UDR_CON register. UDR is auto-cleared when data have 37 * been transferred. 38 */ 39 #define UDR_READ_RETRY_CNT 5 40 41 /* Registers used by the driver which are different between chipsets. */ 42 struct s5m_rtc_reg_config { 43 /* Number of registers used for setting time/alarm0/alarm1 */ 44 unsigned int regs_count; 45 /* First register for time, seconds */ 46 unsigned int time; 47 /* RTC control register */ 48 unsigned int ctrl; 49 /* First register for alarm 0, seconds */ 50 unsigned int alarm0; 51 /* First register for alarm 1, seconds */ 52 unsigned int alarm1; 53 /* 54 * Register for update flag (UDR). Typically setting UDR field to 1 55 * will enable update of time or alarm register. Then it will be 56 * auto-cleared after successful update. 57 */ 58 unsigned int udr_update; 59 /* Auto-cleared mask in UDR field for writing time and alarm */ 60 unsigned int autoclear_udr_mask; 61 /* Mask for UDR field in 'udr_update' register */ 62 unsigned int udr_mask; 63 }; 64 65 /* Register map for S5M8763 and S5M8767 */ 66 static const struct s5m_rtc_reg_config s5m_rtc_regs = { 67 .regs_count = 8, 68 .time = S5M_RTC_SEC, 69 .ctrl = S5M_ALARM1_CONF, 70 .alarm0 = S5M_ALARM0_SEC, 71 .alarm1 = S5M_ALARM1_SEC, 72 .udr_update = S5M_RTC_UDR_CON, 73 .autoclear_udr_mask = S5M_RTC_UDR_MASK, 74 .udr_mask = S5M_RTC_UDR_MASK, 75 }; 76 77 /* 78 * Register map for S2MPS14. 79 * It may be also suitable for S2MPS11 but this was not tested. 80 */ 81 static const struct s5m_rtc_reg_config s2mps_rtc_regs = { 82 .regs_count = 7, 83 .time = S2MPS_RTC_SEC, 84 .ctrl = S2MPS_RTC_CTRL, 85 .alarm0 = S2MPS_ALARM0_SEC, 86 .alarm1 = S2MPS_ALARM1_SEC, 87 .udr_update = S2MPS_RTC_UDR_CON, 88 .autoclear_udr_mask = S2MPS_RTC_WUDR_MASK, 89 .udr_mask = S2MPS_RTC_WUDR_MASK, 90 }; 91 92 struct s5m_rtc_info { 93 struct device *dev; 94 struct i2c_client *i2c; 95 struct sec_pmic_dev *s5m87xx; 96 struct regmap *regmap; 97 struct rtc_device *rtc_dev; 98 int irq; 99 enum sec_device_type device_type; 100 int rtc_24hr_mode; 101 const struct s5m_rtc_reg_config *regs; 102 }; 103 104 static const struct regmap_config s5m_rtc_regmap_config = { 105 .reg_bits = 8, 106 .val_bits = 8, 107 108 .max_register = S5M_RTC_REG_MAX, 109 }; 110 111 static const struct regmap_config s2mps14_rtc_regmap_config = { 112 .reg_bits = 8, 113 .val_bits = 8, 114 115 .max_register = S2MPS_RTC_REG_MAX, 116 }; 117 118 static void s5m8767_data_to_tm(u8 *data, struct rtc_time *tm, 119 int rtc_24hr_mode) 120 { 121 tm->tm_sec = data[RTC_SEC] & 0x7f; 122 tm->tm_min = data[RTC_MIN] & 0x7f; 123 if (rtc_24hr_mode) { 124 tm->tm_hour = data[RTC_HOUR] & 0x1f; 125 } else { 126 tm->tm_hour = data[RTC_HOUR] & 0x0f; 127 if (data[RTC_HOUR] & HOUR_PM_MASK) 128 tm->tm_hour += 12; 129 } 130 131 tm->tm_wday = ffs(data[RTC_WEEKDAY] & 0x7f); 132 tm->tm_mday = data[RTC_DATE] & 0x1f; 133 tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1; 134 tm->tm_year = (data[RTC_YEAR1] & 0x7f) + 100; 135 tm->tm_yday = 0; 136 tm->tm_isdst = 0; 137 } 138 139 static int s5m8767_tm_to_data(struct rtc_time *tm, u8 *data) 140 { 141 data[RTC_SEC] = tm->tm_sec; 142 data[RTC_MIN] = tm->tm_min; 143 144 if (tm->tm_hour >= 12) 145 data[RTC_HOUR] = tm->tm_hour | HOUR_PM_MASK; 146 else 147 data[RTC_HOUR] = tm->tm_hour & ~HOUR_PM_MASK; 148 149 data[RTC_WEEKDAY] = 1 << tm->tm_wday; 150 data[RTC_DATE] = tm->tm_mday; 151 data[RTC_MONTH] = tm->tm_mon + 1; 152 data[RTC_YEAR1] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0; 153 154 if (tm->tm_year < 100) { 155 pr_err("RTC cannot handle the year %d\n", 156 1900 + tm->tm_year); 157 return -EINVAL; 158 } else { 159 return 0; 160 } 161 } 162 163 /* 164 * Read RTC_UDR_CON register and wait till UDR field is cleared. 165 * This indicates that time/alarm update ended. 166 */ 167 static inline int s5m8767_wait_for_udr_update(struct s5m_rtc_info *info) 168 { 169 int ret, retry = UDR_READ_RETRY_CNT; 170 unsigned int data; 171 172 do { 173 ret = regmap_read(info->regmap, info->regs->udr_update, &data); 174 } while (--retry && (data & info->regs->autoclear_udr_mask) && !ret); 175 176 if (!retry) 177 dev_err(info->dev, "waiting for UDR update, reached max number of retries\n"); 178 179 return ret; 180 } 181 182 static inline int s5m_check_peding_alarm_interrupt(struct s5m_rtc_info *info, 183 struct rtc_wkalrm *alarm) 184 { 185 int ret; 186 unsigned int val; 187 188 switch (info->device_type) { 189 case S5M8767X: 190 case S5M8763X: 191 ret = regmap_read(info->regmap, S5M_RTC_STATUS, &val); 192 val &= S5M_ALARM0_STATUS; 193 break; 194 case S2MPS15X: 195 case S2MPS14X: 196 case S2MPS13X: 197 ret = regmap_read(info->s5m87xx->regmap_pmic, S2MPS14_REG_ST2, 198 &val); 199 val &= S2MPS_ALARM0_STATUS; 200 break; 201 default: 202 return -EINVAL; 203 } 204 if (ret < 0) 205 return ret; 206 207 if (val) 208 alarm->pending = 1; 209 else 210 alarm->pending = 0; 211 212 return 0; 213 } 214 215 static inline int s5m8767_rtc_set_time_reg(struct s5m_rtc_info *info) 216 { 217 int ret; 218 unsigned int data; 219 220 ret = regmap_read(info->regmap, info->regs->udr_update, &data); 221 if (ret < 0) { 222 dev_err(info->dev, "failed to read update reg(%d)\n", ret); 223 return ret; 224 } 225 226 switch (info->device_type) { 227 case S5M8763X: 228 case S5M8767X: 229 data |= info->regs->udr_mask | S5M_RTC_TIME_EN_MASK; 230 case S2MPS15X: 231 /* As per UM, for write time register, set WUDR bit to high */ 232 data |= S2MPS15_RTC_WUDR_MASK; 233 break; 234 case S2MPS14X: 235 case S2MPS13X: 236 data |= info->regs->udr_mask; 237 break; 238 default: 239 return -EINVAL; 240 } 241 242 ret = regmap_write(info->regmap, info->regs->udr_update, data); 243 if (ret < 0) { 244 dev_err(info->dev, "failed to write update reg(%d)\n", ret); 245 return ret; 246 } 247 248 ret = s5m8767_wait_for_udr_update(info); 249 250 return ret; 251 } 252 253 static inline int s5m8767_rtc_set_alarm_reg(struct s5m_rtc_info *info) 254 { 255 int ret; 256 unsigned int data; 257 258 ret = regmap_read(info->regmap, info->regs->udr_update, &data); 259 if (ret < 0) { 260 dev_err(info->dev, "%s: fail to read update reg(%d)\n", 261 __func__, ret); 262 return ret; 263 } 264 265 data |= info->regs->udr_mask; 266 switch (info->device_type) { 267 case S5M8763X: 268 case S5M8767X: 269 data &= ~S5M_RTC_TIME_EN_MASK; 270 break; 271 case S2MPS15X: 272 /* As per UM, for write alarm, set A_UDR(bit[4]) to high 273 * udr_mask above sets bit[4] 274 */ 275 break; 276 case S2MPS14X: 277 data |= S2MPS_RTC_RUDR_MASK; 278 break; 279 case S2MPS13X: 280 data |= S2MPS13_RTC_AUDR_MASK; 281 break; 282 default: 283 return -EINVAL; 284 } 285 286 ret = regmap_write(info->regmap, info->regs->udr_update, data); 287 if (ret < 0) { 288 dev_err(info->dev, "%s: fail to write update reg(%d)\n", 289 __func__, ret); 290 return ret; 291 } 292 293 ret = s5m8767_wait_for_udr_update(info); 294 295 /* On S2MPS13 the AUDR is not auto-cleared */ 296 if (info->device_type == S2MPS13X) 297 regmap_update_bits(info->regmap, info->regs->udr_update, 298 S2MPS13_RTC_AUDR_MASK, 0); 299 300 return ret; 301 } 302 303 static void s5m8763_data_to_tm(u8 *data, struct rtc_time *tm) 304 { 305 tm->tm_sec = bcd2bin(data[RTC_SEC]); 306 tm->tm_min = bcd2bin(data[RTC_MIN]); 307 308 if (data[RTC_HOUR] & HOUR_12) { 309 tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x1f); 310 if (data[RTC_HOUR] & HOUR_PM) 311 tm->tm_hour += 12; 312 } else { 313 tm->tm_hour = bcd2bin(data[RTC_HOUR] & 0x3f); 314 } 315 316 tm->tm_wday = data[RTC_WEEKDAY] & 0x07; 317 tm->tm_mday = bcd2bin(data[RTC_DATE]); 318 tm->tm_mon = bcd2bin(data[RTC_MONTH]); 319 tm->tm_year = bcd2bin(data[RTC_YEAR1]) + bcd2bin(data[RTC_YEAR2]) * 100; 320 tm->tm_year -= 1900; 321 } 322 323 static void s5m8763_tm_to_data(struct rtc_time *tm, u8 *data) 324 { 325 data[RTC_SEC] = bin2bcd(tm->tm_sec); 326 data[RTC_MIN] = bin2bcd(tm->tm_min); 327 data[RTC_HOUR] = bin2bcd(tm->tm_hour); 328 data[RTC_WEEKDAY] = tm->tm_wday; 329 data[RTC_DATE] = bin2bcd(tm->tm_mday); 330 data[RTC_MONTH] = bin2bcd(tm->tm_mon); 331 data[RTC_YEAR1] = bin2bcd(tm->tm_year % 100); 332 data[RTC_YEAR2] = bin2bcd((tm->tm_year + 1900) / 100); 333 } 334 335 static int s5m_rtc_read_time(struct device *dev, struct rtc_time *tm) 336 { 337 struct s5m_rtc_info *info = dev_get_drvdata(dev); 338 u8 data[info->regs->regs_count]; 339 int ret; 340 341 if (info->device_type == S2MPS15X || info->device_type == S2MPS14X || 342 info->device_type == S2MPS13X) { 343 ret = regmap_update_bits(info->regmap, 344 info->regs->udr_update, 345 S2MPS_RTC_RUDR_MASK, S2MPS_RTC_RUDR_MASK); 346 if (ret) { 347 dev_err(dev, 348 "Failed to prepare registers for time reading: %d\n", 349 ret); 350 return ret; 351 } 352 } 353 ret = regmap_bulk_read(info->regmap, info->regs->time, data, 354 info->regs->regs_count); 355 if (ret < 0) 356 return ret; 357 358 switch (info->device_type) { 359 case S5M8763X: 360 s5m8763_data_to_tm(data, tm); 361 break; 362 363 case S5M8767X: 364 case S2MPS15X: 365 case S2MPS14X: 366 case S2MPS13X: 367 s5m8767_data_to_tm(data, tm, info->rtc_24hr_mode); 368 break; 369 370 default: 371 return -EINVAL; 372 } 373 374 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, 375 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday, 376 tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday); 377 378 return rtc_valid_tm(tm); 379 } 380 381 static int s5m_rtc_set_time(struct device *dev, struct rtc_time *tm) 382 { 383 struct s5m_rtc_info *info = dev_get_drvdata(dev); 384 u8 data[info->regs->regs_count]; 385 int ret = 0; 386 387 switch (info->device_type) { 388 case S5M8763X: 389 s5m8763_tm_to_data(tm, data); 390 break; 391 case S5M8767X: 392 case S2MPS15X: 393 case S2MPS14X: 394 case S2MPS13X: 395 ret = s5m8767_tm_to_data(tm, data); 396 break; 397 default: 398 return -EINVAL; 399 } 400 401 if (ret < 0) 402 return ret; 403 404 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, 405 1900 + tm->tm_year, 1 + tm->tm_mon, tm->tm_mday, 406 tm->tm_hour, tm->tm_min, tm->tm_sec, tm->tm_wday); 407 408 ret = regmap_raw_write(info->regmap, info->regs->time, data, 409 info->regs->regs_count); 410 if (ret < 0) 411 return ret; 412 413 ret = s5m8767_rtc_set_time_reg(info); 414 415 return ret; 416 } 417 418 static int s5m_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 419 { 420 struct s5m_rtc_info *info = dev_get_drvdata(dev); 421 u8 data[info->regs->regs_count]; 422 unsigned int val; 423 int ret, i; 424 425 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data, 426 info->regs->regs_count); 427 if (ret < 0) 428 return ret; 429 430 switch (info->device_type) { 431 case S5M8763X: 432 s5m8763_data_to_tm(data, &alrm->time); 433 ret = regmap_read(info->regmap, S5M_ALARM0_CONF, &val); 434 if (ret < 0) 435 return ret; 436 437 alrm->enabled = !!val; 438 break; 439 440 case S5M8767X: 441 case S2MPS15X: 442 case S2MPS14X: 443 case S2MPS13X: 444 s5m8767_data_to_tm(data, &alrm->time, info->rtc_24hr_mode); 445 alrm->enabled = 0; 446 for (i = 0; i < info->regs->regs_count; i++) { 447 if (data[i] & ALARM_ENABLE_MASK) { 448 alrm->enabled = 1; 449 break; 450 } 451 } 452 break; 453 454 default: 455 return -EINVAL; 456 } 457 458 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, 459 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon, 460 alrm->time.tm_mday, alrm->time.tm_hour, 461 alrm->time.tm_min, alrm->time.tm_sec, 462 alrm->time.tm_wday); 463 464 ret = s5m_check_peding_alarm_interrupt(info, alrm); 465 466 return 0; 467 } 468 469 static int s5m_rtc_stop_alarm(struct s5m_rtc_info *info) 470 { 471 u8 data[info->regs->regs_count]; 472 int ret, i; 473 struct rtc_time tm; 474 475 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data, 476 info->regs->regs_count); 477 if (ret < 0) 478 return ret; 479 480 s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode); 481 dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, 482 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday, 483 tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday); 484 485 switch (info->device_type) { 486 case S5M8763X: 487 ret = regmap_write(info->regmap, S5M_ALARM0_CONF, 0); 488 break; 489 490 case S5M8767X: 491 case S2MPS15X: 492 case S2MPS14X: 493 case S2MPS13X: 494 for (i = 0; i < info->regs->regs_count; i++) 495 data[i] &= ~ALARM_ENABLE_MASK; 496 497 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data, 498 info->regs->regs_count); 499 if (ret < 0) 500 return ret; 501 502 ret = s5m8767_rtc_set_alarm_reg(info); 503 504 break; 505 506 default: 507 return -EINVAL; 508 } 509 510 return ret; 511 } 512 513 static int s5m_rtc_start_alarm(struct s5m_rtc_info *info) 514 { 515 int ret; 516 u8 data[info->regs->regs_count]; 517 u8 alarm0_conf; 518 struct rtc_time tm; 519 520 ret = regmap_bulk_read(info->regmap, info->regs->alarm0, data, 521 info->regs->regs_count); 522 if (ret < 0) 523 return ret; 524 525 s5m8767_data_to_tm(data, &tm, info->rtc_24hr_mode); 526 dev_dbg(info->dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, 527 1900 + tm.tm_year, 1 + tm.tm_mon, tm.tm_mday, 528 tm.tm_hour, tm.tm_min, tm.tm_sec, tm.tm_wday); 529 530 switch (info->device_type) { 531 case S5M8763X: 532 alarm0_conf = 0x77; 533 ret = regmap_write(info->regmap, S5M_ALARM0_CONF, alarm0_conf); 534 break; 535 536 case S5M8767X: 537 case S2MPS15X: 538 case S2MPS14X: 539 case S2MPS13X: 540 data[RTC_SEC] |= ALARM_ENABLE_MASK; 541 data[RTC_MIN] |= ALARM_ENABLE_MASK; 542 data[RTC_HOUR] |= ALARM_ENABLE_MASK; 543 data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK; 544 if (data[RTC_DATE] & 0x1f) 545 data[RTC_DATE] |= ALARM_ENABLE_MASK; 546 if (data[RTC_MONTH] & 0xf) 547 data[RTC_MONTH] |= ALARM_ENABLE_MASK; 548 if (data[RTC_YEAR1] & 0x7f) 549 data[RTC_YEAR1] |= ALARM_ENABLE_MASK; 550 551 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data, 552 info->regs->regs_count); 553 if (ret < 0) 554 return ret; 555 ret = s5m8767_rtc_set_alarm_reg(info); 556 557 break; 558 559 default: 560 return -EINVAL; 561 } 562 563 return ret; 564 } 565 566 static int s5m_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 567 { 568 struct s5m_rtc_info *info = dev_get_drvdata(dev); 569 u8 data[info->regs->regs_count]; 570 int ret; 571 572 switch (info->device_type) { 573 case S5M8763X: 574 s5m8763_tm_to_data(&alrm->time, data); 575 break; 576 577 case S5M8767X: 578 case S2MPS15X: 579 case S2MPS14X: 580 case S2MPS13X: 581 s5m8767_tm_to_data(&alrm->time, data); 582 break; 583 584 default: 585 return -EINVAL; 586 } 587 588 dev_dbg(dev, "%s: %d/%d/%d %d:%d:%d(%d)\n", __func__, 589 1900 + alrm->time.tm_year, 1 + alrm->time.tm_mon, 590 alrm->time.tm_mday, alrm->time.tm_hour, alrm->time.tm_min, 591 alrm->time.tm_sec, alrm->time.tm_wday); 592 593 ret = s5m_rtc_stop_alarm(info); 594 if (ret < 0) 595 return ret; 596 597 ret = regmap_raw_write(info->regmap, info->regs->alarm0, data, 598 info->regs->regs_count); 599 if (ret < 0) 600 return ret; 601 602 ret = s5m8767_rtc_set_alarm_reg(info); 603 if (ret < 0) 604 return ret; 605 606 if (alrm->enabled) 607 ret = s5m_rtc_start_alarm(info); 608 609 return ret; 610 } 611 612 static int s5m_rtc_alarm_irq_enable(struct device *dev, 613 unsigned int enabled) 614 { 615 struct s5m_rtc_info *info = dev_get_drvdata(dev); 616 617 if (enabled) 618 return s5m_rtc_start_alarm(info); 619 else 620 return s5m_rtc_stop_alarm(info); 621 } 622 623 static irqreturn_t s5m_rtc_alarm_irq(int irq, void *data) 624 { 625 struct s5m_rtc_info *info = data; 626 627 rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF); 628 629 return IRQ_HANDLED; 630 } 631 632 static const struct rtc_class_ops s5m_rtc_ops = { 633 .read_time = s5m_rtc_read_time, 634 .set_time = s5m_rtc_set_time, 635 .read_alarm = s5m_rtc_read_alarm, 636 .set_alarm = s5m_rtc_set_alarm, 637 .alarm_irq_enable = s5m_rtc_alarm_irq_enable, 638 }; 639 640 static int s5m8767_rtc_init_reg(struct s5m_rtc_info *info) 641 { 642 u8 data[2]; 643 int ret; 644 645 switch (info->device_type) { 646 case S5M8763X: 647 case S5M8767X: 648 /* UDR update time. Default of 7.32 ms is too long. */ 649 ret = regmap_update_bits(info->regmap, S5M_RTC_UDR_CON, 650 S5M_RTC_UDR_T_MASK, S5M_RTC_UDR_T_450_US); 651 if (ret < 0) 652 dev_err(info->dev, "%s: fail to change UDR time: %d\n", 653 __func__, ret); 654 655 /* Set RTC control register : Binary mode, 24hour mode */ 656 data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); 657 data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); 658 659 ret = regmap_raw_write(info->regmap, S5M_ALARM0_CONF, data, 2); 660 break; 661 662 case S2MPS15X: 663 case S2MPS14X: 664 case S2MPS13X: 665 data[0] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); 666 ret = regmap_write(info->regmap, info->regs->ctrl, data[0]); 667 if (ret < 0) 668 break; 669 670 /* 671 * Should set WUDR & (RUDR or AUDR) bits to high after writing 672 * RTC_CTRL register like writing Alarm registers. We can't find 673 * the description from datasheet but vendor code does that 674 * really. 675 */ 676 ret = s5m8767_rtc_set_alarm_reg(info); 677 break; 678 679 default: 680 return -EINVAL; 681 } 682 683 info->rtc_24hr_mode = 1; 684 if (ret < 0) { 685 dev_err(info->dev, "%s: fail to write controlm reg(%d)\n", 686 __func__, ret); 687 return ret; 688 } 689 690 return ret; 691 } 692 693 static int s5m_rtc_probe(struct platform_device *pdev) 694 { 695 struct sec_pmic_dev *s5m87xx = dev_get_drvdata(pdev->dev.parent); 696 struct sec_platform_data *pdata = s5m87xx->pdata; 697 struct s5m_rtc_info *info; 698 const struct regmap_config *regmap_cfg; 699 int ret, alarm_irq; 700 701 if (!pdata) { 702 dev_err(pdev->dev.parent, "Platform data not supplied\n"); 703 return -ENODEV; 704 } 705 706 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); 707 if (!info) 708 return -ENOMEM; 709 710 switch (platform_get_device_id(pdev)->driver_data) { 711 case S2MPS15X: 712 case S2MPS14X: 713 case S2MPS13X: 714 regmap_cfg = &s2mps14_rtc_regmap_config; 715 info->regs = &s2mps_rtc_regs; 716 alarm_irq = S2MPS14_IRQ_RTCA0; 717 break; 718 case S5M8763X: 719 regmap_cfg = &s5m_rtc_regmap_config; 720 info->regs = &s5m_rtc_regs; 721 alarm_irq = S5M8763_IRQ_ALARM0; 722 break; 723 case S5M8767X: 724 regmap_cfg = &s5m_rtc_regmap_config; 725 info->regs = &s5m_rtc_regs; 726 alarm_irq = S5M8767_IRQ_RTCA1; 727 break; 728 default: 729 dev_err(&pdev->dev, 730 "Device type %lu is not supported by RTC driver\n", 731 platform_get_device_id(pdev)->driver_data); 732 return -ENODEV; 733 } 734 735 info->i2c = i2c_new_dummy(s5m87xx->i2c->adapter, RTC_I2C_ADDR); 736 if (!info->i2c) { 737 dev_err(&pdev->dev, "Failed to allocate I2C for RTC\n"); 738 return -ENODEV; 739 } 740 741 info->regmap = devm_regmap_init_i2c(info->i2c, regmap_cfg); 742 if (IS_ERR(info->regmap)) { 743 ret = PTR_ERR(info->regmap); 744 dev_err(&pdev->dev, "Failed to allocate RTC register map: %d\n", 745 ret); 746 goto err; 747 } 748 749 info->dev = &pdev->dev; 750 info->s5m87xx = s5m87xx; 751 info->device_type = platform_get_device_id(pdev)->driver_data; 752 753 if (s5m87xx->irq_data) { 754 info->irq = regmap_irq_get_virq(s5m87xx->irq_data, alarm_irq); 755 if (info->irq <= 0) { 756 ret = -EINVAL; 757 dev_err(&pdev->dev, "Failed to get virtual IRQ %d\n", 758 alarm_irq); 759 goto err; 760 } 761 } 762 763 platform_set_drvdata(pdev, info); 764 765 ret = s5m8767_rtc_init_reg(info); 766 767 device_init_wakeup(&pdev->dev, 1); 768 769 info->rtc_dev = devm_rtc_device_register(&pdev->dev, "s5m-rtc", 770 &s5m_rtc_ops, THIS_MODULE); 771 772 if (IS_ERR(info->rtc_dev)) { 773 ret = PTR_ERR(info->rtc_dev); 774 goto err; 775 } 776 777 if (!info->irq) { 778 dev_info(&pdev->dev, "Alarm IRQ not available\n"); 779 return 0; 780 } 781 782 ret = devm_request_threaded_irq(&pdev->dev, info->irq, NULL, 783 s5m_rtc_alarm_irq, 0, "rtc-alarm0", 784 info); 785 if (ret < 0) { 786 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n", 787 info->irq, ret); 788 goto err; 789 } 790 791 return 0; 792 793 err: 794 i2c_unregister_device(info->i2c); 795 796 return ret; 797 } 798 799 static int s5m_rtc_remove(struct platform_device *pdev) 800 { 801 struct s5m_rtc_info *info = platform_get_drvdata(pdev); 802 803 i2c_unregister_device(info->i2c); 804 805 return 0; 806 } 807 808 #ifdef CONFIG_PM_SLEEP 809 static int s5m_rtc_resume(struct device *dev) 810 { 811 struct s5m_rtc_info *info = dev_get_drvdata(dev); 812 int ret = 0; 813 814 if (info->irq && device_may_wakeup(dev)) 815 ret = disable_irq_wake(info->irq); 816 817 return ret; 818 } 819 820 static int s5m_rtc_suspend(struct device *dev) 821 { 822 struct s5m_rtc_info *info = dev_get_drvdata(dev); 823 int ret = 0; 824 825 if (info->irq && device_may_wakeup(dev)) 826 ret = enable_irq_wake(info->irq); 827 828 return ret; 829 } 830 #endif /* CONFIG_PM_SLEEP */ 831 832 static SIMPLE_DEV_PM_OPS(s5m_rtc_pm_ops, s5m_rtc_suspend, s5m_rtc_resume); 833 834 static const struct platform_device_id s5m_rtc_id[] = { 835 { "s5m-rtc", S5M8767X }, 836 { "s2mps13-rtc", S2MPS13X }, 837 { "s2mps14-rtc", S2MPS14X }, 838 { "s2mps15-rtc", S2MPS15X }, 839 { }, 840 }; 841 MODULE_DEVICE_TABLE(platform, s5m_rtc_id); 842 843 static struct platform_driver s5m_rtc_driver = { 844 .driver = { 845 .name = "s5m-rtc", 846 .pm = &s5m_rtc_pm_ops, 847 }, 848 .probe = s5m_rtc_probe, 849 .remove = s5m_rtc_remove, 850 .id_table = s5m_rtc_id, 851 }; 852 853 module_platform_driver(s5m_rtc_driver); 854 855 /* Module information */ 856 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>"); 857 MODULE_DESCRIPTION("Samsung S5M/S2MPS14 RTC driver"); 858 MODULE_LICENSE("GPL"); 859 MODULE_ALIAS("platform:s5m-rtc"); 860