1 /* drivers/rtc/rtc-s3c.c 2 * 3 * Copyright (c) 2010 Samsung Electronics Co., Ltd. 4 * http://www.samsung.com/ 5 * 6 * Copyright (c) 2004,2006 Simtec Electronics 7 * Ben Dooks, <ben@simtec.co.uk> 8 * http://armlinux.simtec.co.uk/ 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 * 14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver 15 */ 16 17 #include <linux/module.h> 18 #include <linux/fs.h> 19 #include <linux/string.h> 20 #include <linux/init.h> 21 #include <linux/platform_device.h> 22 #include <linux/interrupt.h> 23 #include <linux/rtc.h> 24 #include <linux/bcd.h> 25 #include <linux/clk.h> 26 #include <linux/log2.h> 27 #include <linux/slab.h> 28 #include <linux/of.h> 29 #include <linux/uaccess.h> 30 #include <linux/io.h> 31 32 #include <asm/irq.h> 33 #include "rtc-s3c.h" 34 35 struct s3c_rtc { 36 struct device *dev; 37 struct rtc_device *rtc; 38 39 void __iomem *base; 40 struct clk *rtc_clk; 41 struct clk *rtc_src_clk; 42 bool clk_disabled; 43 44 const struct s3c_rtc_data *data; 45 46 int irq_alarm; 47 int irq_tick; 48 49 spinlock_t pie_lock; 50 spinlock_t alarm_clk_lock; 51 52 int ticnt_save; 53 int ticnt_en_save; 54 bool wake_en; 55 }; 56 57 struct s3c_rtc_data { 58 int max_user_freq; 59 bool needs_src_clk; 60 61 void (*irq_handler) (struct s3c_rtc *info, int mask); 62 void (*set_freq) (struct s3c_rtc *info, int freq); 63 void (*enable_tick) (struct s3c_rtc *info, struct seq_file *seq); 64 void (*select_tick_clk) (struct s3c_rtc *info); 65 void (*save_tick_cnt) (struct s3c_rtc *info); 66 void (*restore_tick_cnt) (struct s3c_rtc *info); 67 void (*enable) (struct s3c_rtc *info); 68 void (*disable) (struct s3c_rtc *info); 69 }; 70 71 static int s3c_rtc_enable_clk(struct s3c_rtc *info) 72 { 73 unsigned long irq_flags; 74 int ret = 0; 75 76 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags); 77 78 if (info->clk_disabled) { 79 ret = clk_enable(info->rtc_clk); 80 if (ret) 81 goto out; 82 83 if (info->data->needs_src_clk) { 84 ret = clk_enable(info->rtc_src_clk); 85 if (ret) { 86 clk_disable(info->rtc_clk); 87 goto out; 88 } 89 } 90 info->clk_disabled = false; 91 } 92 93 out: 94 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags); 95 96 return ret; 97 } 98 99 static void s3c_rtc_disable_clk(struct s3c_rtc *info) 100 { 101 unsigned long irq_flags; 102 103 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags); 104 if (!info->clk_disabled) { 105 if (info->data->needs_src_clk) 106 clk_disable(info->rtc_src_clk); 107 clk_disable(info->rtc_clk); 108 info->clk_disabled = true; 109 } 110 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags); 111 } 112 113 /* IRQ Handlers */ 114 static irqreturn_t s3c_rtc_tickirq(int irq, void *id) 115 { 116 struct s3c_rtc *info = (struct s3c_rtc *)id; 117 118 if (info->data->irq_handler) 119 info->data->irq_handler(info, S3C2410_INTP_TIC); 120 121 return IRQ_HANDLED; 122 } 123 124 static irqreturn_t s3c_rtc_alarmirq(int irq, void *id) 125 { 126 struct s3c_rtc *info = (struct s3c_rtc *)id; 127 128 if (info->data->irq_handler) 129 info->data->irq_handler(info, S3C2410_INTP_ALM); 130 131 return IRQ_HANDLED; 132 } 133 134 /* Update control registers */ 135 static int s3c_rtc_setaie(struct device *dev, unsigned int enabled) 136 { 137 struct s3c_rtc *info = dev_get_drvdata(dev); 138 unsigned int tmp; 139 int ret; 140 141 dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled); 142 143 ret = s3c_rtc_enable_clk(info); 144 if (ret) 145 return ret; 146 147 tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN; 148 149 if (enabled) 150 tmp |= S3C2410_RTCALM_ALMEN; 151 152 writeb(tmp, info->base + S3C2410_RTCALM); 153 154 s3c_rtc_disable_clk(info); 155 156 if (enabled) { 157 ret = s3c_rtc_enable_clk(info); 158 if (ret) 159 return ret; 160 } else { 161 s3c_rtc_disable_clk(info); 162 } 163 164 return 0; 165 } 166 167 /* Set RTC frequency */ 168 static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq) 169 { 170 int ret; 171 172 if (!is_power_of_2(freq)) 173 return -EINVAL; 174 175 ret = s3c_rtc_enable_clk(info); 176 if (ret) 177 return ret; 178 spin_lock_irq(&info->pie_lock); 179 180 if (info->data->set_freq) 181 info->data->set_freq(info, freq); 182 183 spin_unlock_irq(&info->pie_lock); 184 s3c_rtc_disable_clk(info); 185 186 return 0; 187 } 188 189 /* Time read/write */ 190 static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) 191 { 192 struct s3c_rtc *info = dev_get_drvdata(dev); 193 unsigned int have_retried = 0; 194 int ret; 195 196 ret = s3c_rtc_enable_clk(info); 197 if (ret) 198 return ret; 199 200 retry_get_time: 201 rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN); 202 rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR); 203 rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE); 204 rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON); 205 rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR); 206 rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC); 207 208 /* the only way to work out whether the system was mid-update 209 * when we read it is to check the second counter, and if it 210 * is zero, then we re-try the entire read 211 */ 212 213 if (rtc_tm->tm_sec == 0 && !have_retried) { 214 have_retried = 1; 215 goto retry_get_time; 216 } 217 218 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec); 219 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min); 220 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour); 221 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday); 222 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon); 223 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year); 224 225 s3c_rtc_disable_clk(info); 226 227 rtc_tm->tm_year += 100; 228 rtc_tm->tm_mon -= 1; 229 230 dev_dbg(dev, "read time %ptR\n", rtc_tm); 231 return 0; 232 } 233 234 static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm) 235 { 236 struct s3c_rtc *info = dev_get_drvdata(dev); 237 int year = tm->tm_year - 100; 238 int ret; 239 240 dev_dbg(dev, "set time %ptR\n", tm); 241 242 /* we get around y2k by simply not supporting it */ 243 244 if (year < 0 || year >= 100) { 245 dev_err(dev, "rtc only supports 100 years\n"); 246 return -EINVAL; 247 } 248 249 ret = s3c_rtc_enable_clk(info); 250 if (ret) 251 return ret; 252 253 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC); 254 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN); 255 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR); 256 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE); 257 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON); 258 writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR); 259 260 s3c_rtc_disable_clk(info); 261 262 return 0; 263 } 264 265 static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm) 266 { 267 struct s3c_rtc *info = dev_get_drvdata(dev); 268 struct rtc_time *alm_tm = &alrm->time; 269 unsigned int alm_en; 270 int ret; 271 272 ret = s3c_rtc_enable_clk(info); 273 if (ret) 274 return ret; 275 276 alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC); 277 alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN); 278 alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR); 279 alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON); 280 alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE); 281 alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR); 282 283 alm_en = readb(info->base + S3C2410_RTCALM); 284 285 s3c_rtc_disable_clk(info); 286 287 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0; 288 289 dev_dbg(dev, "read alarm %d, %ptR\n", alm_en, alm_tm); 290 291 /* decode the alarm enable field */ 292 if (alm_en & S3C2410_RTCALM_SECEN) 293 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec); 294 295 if (alm_en & S3C2410_RTCALM_MINEN) 296 alm_tm->tm_min = bcd2bin(alm_tm->tm_min); 297 298 if (alm_en & S3C2410_RTCALM_HOUREN) 299 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour); 300 301 if (alm_en & S3C2410_RTCALM_DAYEN) 302 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday); 303 304 if (alm_en & S3C2410_RTCALM_MONEN) { 305 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon); 306 alm_tm->tm_mon -= 1; 307 } 308 309 if (alm_en & S3C2410_RTCALM_YEAREN) 310 alm_tm->tm_year = bcd2bin(alm_tm->tm_year); 311 312 return 0; 313 } 314 315 static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) 316 { 317 struct s3c_rtc *info = dev_get_drvdata(dev); 318 struct rtc_time *tm = &alrm->time; 319 unsigned int alrm_en; 320 int ret; 321 322 dev_dbg(dev, "s3c_rtc_setalarm: %d, %ptR\n", alrm->enabled, tm); 323 324 ret = s3c_rtc_enable_clk(info); 325 if (ret) 326 return ret; 327 328 alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN; 329 writeb(0x00, info->base + S3C2410_RTCALM); 330 331 if (tm->tm_sec < 60 && tm->tm_sec >= 0) { 332 alrm_en |= S3C2410_RTCALM_SECEN; 333 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC); 334 } 335 336 if (tm->tm_min < 60 && tm->tm_min >= 0) { 337 alrm_en |= S3C2410_RTCALM_MINEN; 338 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN); 339 } 340 341 if (tm->tm_hour < 24 && tm->tm_hour >= 0) { 342 alrm_en |= S3C2410_RTCALM_HOUREN; 343 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR); 344 } 345 346 if (tm->tm_mon < 12 && tm->tm_mon >= 0) { 347 alrm_en |= S3C2410_RTCALM_MONEN; 348 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_ALMMON); 349 } 350 351 if (tm->tm_mday <= 31 && tm->tm_mday >= 1) { 352 alrm_en |= S3C2410_RTCALM_DAYEN; 353 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_ALMDATE); 354 } 355 356 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en); 357 358 writeb(alrm_en, info->base + S3C2410_RTCALM); 359 360 s3c_rtc_disable_clk(info); 361 362 s3c_rtc_setaie(dev, alrm->enabled); 363 364 return 0; 365 } 366 367 static int s3c_rtc_proc(struct device *dev, struct seq_file *seq) 368 { 369 struct s3c_rtc *info = dev_get_drvdata(dev); 370 int ret; 371 372 ret = s3c_rtc_enable_clk(info); 373 if (ret) 374 return ret; 375 376 if (info->data->enable_tick) 377 info->data->enable_tick(info, seq); 378 379 s3c_rtc_disable_clk(info); 380 381 return 0; 382 } 383 384 static const struct rtc_class_ops s3c_rtcops = { 385 .read_time = s3c_rtc_gettime, 386 .set_time = s3c_rtc_settime, 387 .read_alarm = s3c_rtc_getalarm, 388 .set_alarm = s3c_rtc_setalarm, 389 .proc = s3c_rtc_proc, 390 .alarm_irq_enable = s3c_rtc_setaie, 391 }; 392 393 static void s3c24xx_rtc_enable(struct s3c_rtc *info) 394 { 395 unsigned int con, tmp; 396 397 con = readw(info->base + S3C2410_RTCCON); 398 /* re-enable the device, and check it is ok */ 399 if ((con & S3C2410_RTCCON_RTCEN) == 0) { 400 dev_info(info->dev, "rtc disabled, re-enabling\n"); 401 402 tmp = readw(info->base + S3C2410_RTCCON); 403 writew(tmp | S3C2410_RTCCON_RTCEN, info->base + S3C2410_RTCCON); 404 } 405 406 if (con & S3C2410_RTCCON_CNTSEL) { 407 dev_info(info->dev, "removing RTCCON_CNTSEL\n"); 408 409 tmp = readw(info->base + S3C2410_RTCCON); 410 writew(tmp & ~S3C2410_RTCCON_CNTSEL, 411 info->base + S3C2410_RTCCON); 412 } 413 414 if (con & S3C2410_RTCCON_CLKRST) { 415 dev_info(info->dev, "removing RTCCON_CLKRST\n"); 416 417 tmp = readw(info->base + S3C2410_RTCCON); 418 writew(tmp & ~S3C2410_RTCCON_CLKRST, 419 info->base + S3C2410_RTCCON); 420 } 421 } 422 423 static void s3c24xx_rtc_disable(struct s3c_rtc *info) 424 { 425 unsigned int con; 426 427 con = readw(info->base + S3C2410_RTCCON); 428 con &= ~S3C2410_RTCCON_RTCEN; 429 writew(con, info->base + S3C2410_RTCCON); 430 431 con = readb(info->base + S3C2410_TICNT); 432 con &= ~S3C2410_TICNT_ENABLE; 433 writeb(con, info->base + S3C2410_TICNT); 434 } 435 436 static void s3c6410_rtc_disable(struct s3c_rtc *info) 437 { 438 unsigned int con; 439 440 con = readw(info->base + S3C2410_RTCCON); 441 con &= ~S3C64XX_RTCCON_TICEN; 442 con &= ~S3C2410_RTCCON_RTCEN; 443 writew(con, info->base + S3C2410_RTCCON); 444 } 445 446 static int s3c_rtc_remove(struct platform_device *pdev) 447 { 448 struct s3c_rtc *info = platform_get_drvdata(pdev); 449 450 s3c_rtc_setaie(info->dev, 0); 451 452 if (info->data->needs_src_clk) 453 clk_unprepare(info->rtc_src_clk); 454 clk_unprepare(info->rtc_clk); 455 456 return 0; 457 } 458 459 static const struct of_device_id s3c_rtc_dt_match[]; 460 461 static const struct s3c_rtc_data *s3c_rtc_get_data(struct platform_device *pdev) 462 { 463 const struct of_device_id *match; 464 465 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node); 466 return match->data; 467 } 468 469 static int s3c_rtc_probe(struct platform_device *pdev) 470 { 471 struct s3c_rtc *info = NULL; 472 struct rtc_time rtc_tm; 473 struct resource *res; 474 int ret; 475 476 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); 477 if (!info) 478 return -ENOMEM; 479 480 /* find the IRQs */ 481 info->irq_tick = platform_get_irq(pdev, 1); 482 if (info->irq_tick < 0) { 483 dev_err(&pdev->dev, "no irq for rtc tick\n"); 484 return info->irq_tick; 485 } 486 487 info->dev = &pdev->dev; 488 info->data = s3c_rtc_get_data(pdev); 489 if (!info->data) { 490 dev_err(&pdev->dev, "failed getting s3c_rtc_data\n"); 491 return -EINVAL; 492 } 493 spin_lock_init(&info->pie_lock); 494 spin_lock_init(&info->alarm_clk_lock); 495 496 platform_set_drvdata(pdev, info); 497 498 info->irq_alarm = platform_get_irq(pdev, 0); 499 if (info->irq_alarm < 0) { 500 dev_err(&pdev->dev, "no irq for alarm\n"); 501 return info->irq_alarm; 502 } 503 504 dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n", 505 info->irq_tick, info->irq_alarm); 506 507 /* get the memory region */ 508 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 509 info->base = devm_ioremap_resource(&pdev->dev, res); 510 if (IS_ERR(info->base)) 511 return PTR_ERR(info->base); 512 513 info->rtc_clk = devm_clk_get(&pdev->dev, "rtc"); 514 if (IS_ERR(info->rtc_clk)) { 515 ret = PTR_ERR(info->rtc_clk); 516 if (ret != -EPROBE_DEFER) 517 dev_err(&pdev->dev, "failed to find rtc clock\n"); 518 else 519 dev_dbg(&pdev->dev, "probe deferred due to missing rtc clk\n"); 520 return ret; 521 } 522 ret = clk_prepare_enable(info->rtc_clk); 523 if (ret) 524 return ret; 525 526 if (info->data->needs_src_clk) { 527 info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src"); 528 if (IS_ERR(info->rtc_src_clk)) { 529 ret = PTR_ERR(info->rtc_src_clk); 530 if (ret != -EPROBE_DEFER) 531 dev_err(&pdev->dev, 532 "failed to find rtc source clock\n"); 533 else 534 dev_dbg(&pdev->dev, 535 "probe deferred due to missing rtc src clk\n"); 536 goto err_src_clk; 537 } 538 ret = clk_prepare_enable(info->rtc_src_clk); 539 if (ret) 540 goto err_src_clk; 541 } 542 543 /* check to see if everything is setup correctly */ 544 if (info->data->enable) 545 info->data->enable(info); 546 547 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n", 548 readw(info->base + S3C2410_RTCCON)); 549 550 device_init_wakeup(&pdev->dev, 1); 551 552 /* Check RTC Time */ 553 if (s3c_rtc_gettime(&pdev->dev, &rtc_tm)) { 554 rtc_tm.tm_year = 100; 555 rtc_tm.tm_mon = 0; 556 rtc_tm.tm_mday = 1; 557 rtc_tm.tm_hour = 0; 558 rtc_tm.tm_min = 0; 559 rtc_tm.tm_sec = 0; 560 561 s3c_rtc_settime(&pdev->dev, &rtc_tm); 562 563 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n"); 564 } 565 566 /* register RTC and exit */ 567 info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops, 568 THIS_MODULE); 569 if (IS_ERR(info->rtc)) { 570 dev_err(&pdev->dev, "cannot attach rtc\n"); 571 ret = PTR_ERR(info->rtc); 572 goto err_nortc; 573 } 574 575 ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq, 576 0, "s3c2410-rtc alarm", info); 577 if (ret) { 578 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret); 579 goto err_nortc; 580 } 581 582 ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq, 583 0, "s3c2410-rtc tick", info); 584 if (ret) { 585 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret); 586 goto err_nortc; 587 } 588 589 if (info->data->select_tick_clk) 590 info->data->select_tick_clk(info); 591 592 s3c_rtc_setfreq(info, 1); 593 594 return 0; 595 596 err_nortc: 597 if (info->data->disable) 598 info->data->disable(info); 599 600 if (info->data->needs_src_clk) 601 clk_disable_unprepare(info->rtc_src_clk); 602 err_src_clk: 603 clk_disable_unprepare(info->rtc_clk); 604 605 return ret; 606 } 607 608 #ifdef CONFIG_PM_SLEEP 609 610 static int s3c_rtc_suspend(struct device *dev) 611 { 612 struct s3c_rtc *info = dev_get_drvdata(dev); 613 int ret; 614 615 ret = s3c_rtc_enable_clk(info); 616 if (ret) 617 return ret; 618 619 /* save TICNT for anyone using periodic interrupts */ 620 if (info->data->save_tick_cnt) 621 info->data->save_tick_cnt(info); 622 623 if (info->data->disable) 624 info->data->disable(info); 625 626 if (device_may_wakeup(dev) && !info->wake_en) { 627 if (enable_irq_wake(info->irq_alarm) == 0) 628 info->wake_en = true; 629 else 630 dev_err(dev, "enable_irq_wake failed\n"); 631 } 632 633 return 0; 634 } 635 636 static int s3c_rtc_resume(struct device *dev) 637 { 638 struct s3c_rtc *info = dev_get_drvdata(dev); 639 640 if (info->data->enable) 641 info->data->enable(info); 642 643 if (info->data->restore_tick_cnt) 644 info->data->restore_tick_cnt(info); 645 646 s3c_rtc_disable_clk(info); 647 648 if (device_may_wakeup(dev) && info->wake_en) { 649 disable_irq_wake(info->irq_alarm); 650 info->wake_en = false; 651 } 652 653 return 0; 654 } 655 #endif 656 static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume); 657 658 static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask) 659 { 660 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF); 661 } 662 663 static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask) 664 { 665 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF); 666 writeb(mask, info->base + S3C2410_INTP); 667 } 668 669 static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq) 670 { 671 unsigned int tmp = 0; 672 int val; 673 674 tmp = readb(info->base + S3C2410_TICNT); 675 tmp &= S3C2410_TICNT_ENABLE; 676 677 val = (info->rtc->max_user_freq / freq) - 1; 678 tmp |= val; 679 680 writel(tmp, info->base + S3C2410_TICNT); 681 } 682 683 static void s3c2416_rtc_setfreq(struct s3c_rtc *info, int freq) 684 { 685 unsigned int tmp = 0; 686 int val; 687 688 tmp = readb(info->base + S3C2410_TICNT); 689 tmp &= S3C2410_TICNT_ENABLE; 690 691 val = (info->rtc->max_user_freq / freq) - 1; 692 693 tmp |= S3C2443_TICNT_PART(val); 694 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1); 695 696 writel(S3C2416_TICNT2_PART(val), info->base + S3C2416_TICNT2); 697 698 writel(tmp, info->base + S3C2410_TICNT); 699 } 700 701 static void s3c2443_rtc_setfreq(struct s3c_rtc *info, int freq) 702 { 703 unsigned int tmp = 0; 704 int val; 705 706 tmp = readb(info->base + S3C2410_TICNT); 707 tmp &= S3C2410_TICNT_ENABLE; 708 709 val = (info->rtc->max_user_freq / freq) - 1; 710 711 tmp |= S3C2443_TICNT_PART(val); 712 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1); 713 714 writel(tmp, info->base + S3C2410_TICNT); 715 } 716 717 static void s3c6410_rtc_setfreq(struct s3c_rtc *info, int freq) 718 { 719 int val; 720 721 val = (info->rtc->max_user_freq / freq) - 1; 722 writel(val, info->base + S3C2410_TICNT); 723 } 724 725 static void s3c24xx_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq) 726 { 727 unsigned int ticnt; 728 729 ticnt = readb(info->base + S3C2410_TICNT); 730 ticnt &= S3C2410_TICNT_ENABLE; 731 732 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no"); 733 } 734 735 static void s3c2416_rtc_select_tick_clk(struct s3c_rtc *info) 736 { 737 unsigned int con; 738 739 con = readw(info->base + S3C2410_RTCCON); 740 con |= S3C2443_RTCCON_TICSEL; 741 writew(con, info->base + S3C2410_RTCCON); 742 } 743 744 static void s3c6410_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq) 745 { 746 unsigned int ticnt; 747 748 ticnt = readw(info->base + S3C2410_RTCCON); 749 ticnt &= S3C64XX_RTCCON_TICEN; 750 751 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no"); 752 } 753 754 static void s3c24xx_rtc_save_tick_cnt(struct s3c_rtc *info) 755 { 756 info->ticnt_save = readb(info->base + S3C2410_TICNT); 757 } 758 759 static void s3c24xx_rtc_restore_tick_cnt(struct s3c_rtc *info) 760 { 761 writeb(info->ticnt_save, info->base + S3C2410_TICNT); 762 } 763 764 static void s3c6410_rtc_save_tick_cnt(struct s3c_rtc *info) 765 { 766 info->ticnt_en_save = readw(info->base + S3C2410_RTCCON); 767 info->ticnt_en_save &= S3C64XX_RTCCON_TICEN; 768 info->ticnt_save = readl(info->base + S3C2410_TICNT); 769 } 770 771 static void s3c6410_rtc_restore_tick_cnt(struct s3c_rtc *info) 772 { 773 unsigned int con; 774 775 writel(info->ticnt_save, info->base + S3C2410_TICNT); 776 if (info->ticnt_en_save) { 777 con = readw(info->base + S3C2410_RTCCON); 778 writew(con | info->ticnt_en_save, info->base + S3C2410_RTCCON); 779 } 780 } 781 782 static struct s3c_rtc_data const s3c2410_rtc_data = { 783 .max_user_freq = 128, 784 .irq_handler = s3c24xx_rtc_irq, 785 .set_freq = s3c2410_rtc_setfreq, 786 .enable_tick = s3c24xx_rtc_enable_tick, 787 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt, 788 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt, 789 .enable = s3c24xx_rtc_enable, 790 .disable = s3c24xx_rtc_disable, 791 }; 792 793 static struct s3c_rtc_data const s3c2416_rtc_data = { 794 .max_user_freq = 32768, 795 .irq_handler = s3c24xx_rtc_irq, 796 .set_freq = s3c2416_rtc_setfreq, 797 .enable_tick = s3c24xx_rtc_enable_tick, 798 .select_tick_clk = s3c2416_rtc_select_tick_clk, 799 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt, 800 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt, 801 .enable = s3c24xx_rtc_enable, 802 .disable = s3c24xx_rtc_disable, 803 }; 804 805 static struct s3c_rtc_data const s3c2443_rtc_data = { 806 .max_user_freq = 32768, 807 .irq_handler = s3c24xx_rtc_irq, 808 .set_freq = s3c2443_rtc_setfreq, 809 .enable_tick = s3c24xx_rtc_enable_tick, 810 .select_tick_clk = s3c2416_rtc_select_tick_clk, 811 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt, 812 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt, 813 .enable = s3c24xx_rtc_enable, 814 .disable = s3c24xx_rtc_disable, 815 }; 816 817 static struct s3c_rtc_data const s3c6410_rtc_data = { 818 .max_user_freq = 32768, 819 .needs_src_clk = true, 820 .irq_handler = s3c6410_rtc_irq, 821 .set_freq = s3c6410_rtc_setfreq, 822 .enable_tick = s3c6410_rtc_enable_tick, 823 .save_tick_cnt = s3c6410_rtc_save_tick_cnt, 824 .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt, 825 .enable = s3c24xx_rtc_enable, 826 .disable = s3c6410_rtc_disable, 827 }; 828 829 static const struct of_device_id s3c_rtc_dt_match[] = { 830 { 831 .compatible = "samsung,s3c2410-rtc", 832 .data = &s3c2410_rtc_data, 833 }, { 834 .compatible = "samsung,s3c2416-rtc", 835 .data = &s3c2416_rtc_data, 836 }, { 837 .compatible = "samsung,s3c2443-rtc", 838 .data = &s3c2443_rtc_data, 839 }, { 840 .compatible = "samsung,s3c6410-rtc", 841 .data = &s3c6410_rtc_data, 842 }, { 843 .compatible = "samsung,exynos3250-rtc", 844 .data = &s3c6410_rtc_data, 845 }, 846 { /* sentinel */ }, 847 }; 848 MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match); 849 850 static struct platform_driver s3c_rtc_driver = { 851 .probe = s3c_rtc_probe, 852 .remove = s3c_rtc_remove, 853 .driver = { 854 .name = "s3c-rtc", 855 .pm = &s3c_rtc_pm_ops, 856 .of_match_table = of_match_ptr(s3c_rtc_dt_match), 857 }, 858 }; 859 module_platform_driver(s3c_rtc_driver); 860 861 MODULE_DESCRIPTION("Samsung S3C RTC Driver"); 862 MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); 863 MODULE_LICENSE("GPL"); 864 MODULE_ALIAS("platform:s3c2410-rtc"); 865