1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * RTC driver for the Micro Crystal RV3032 4 * 5 * Copyright (C) 2020 Micro Crystal SA 6 * 7 * Alexandre Belloni <alexandre.belloni@bootlin.com> 8 * 9 */ 10 11 #include <linux/clk.h> 12 #include <linux/clk-provider.h> 13 #include <linux/bcd.h> 14 #include <linux/bitfield.h> 15 #include <linux/bitops.h> 16 #include <linux/hwmon.h> 17 #include <linux/i2c.h> 18 #include <linux/interrupt.h> 19 #include <linux/kernel.h> 20 #include <linux/log2.h> 21 #include <linux/module.h> 22 #include <linux/of_device.h> 23 #include <linux/regmap.h> 24 #include <linux/rtc.h> 25 26 #define RV3032_SEC 0x01 27 #define RV3032_MIN 0x02 28 #define RV3032_HOUR 0x03 29 #define RV3032_WDAY 0x04 30 #define RV3032_DAY 0x05 31 #define RV3032_MONTH 0x06 32 #define RV3032_YEAR 0x07 33 #define RV3032_ALARM_MIN 0x08 34 #define RV3032_ALARM_HOUR 0x09 35 #define RV3032_ALARM_DAY 0x0A 36 #define RV3032_STATUS 0x0D 37 #define RV3032_TLSB 0x0E 38 #define RV3032_TMSB 0x0F 39 #define RV3032_CTRL1 0x10 40 #define RV3032_CTRL2 0x11 41 #define RV3032_CTRL3 0x12 42 #define RV3032_TS_CTRL 0x13 43 #define RV3032_CLK_IRQ 0x14 44 #define RV3032_EEPROM_ADDR 0x3D 45 #define RV3032_EEPROM_DATA 0x3E 46 #define RV3032_EEPROM_CMD 0x3F 47 #define RV3032_RAM1 0x40 48 #define RV3032_PMU 0xC0 49 #define RV3032_OFFSET 0xC1 50 #define RV3032_CLKOUT1 0xC2 51 #define RV3032_CLKOUT2 0xC3 52 #define RV3032_TREF0 0xC4 53 #define RV3032_TREF1 0xC5 54 55 #define RV3032_STATUS_VLF BIT(0) 56 #define RV3032_STATUS_PORF BIT(1) 57 #define RV3032_STATUS_EVF BIT(2) 58 #define RV3032_STATUS_AF BIT(3) 59 #define RV3032_STATUS_TF BIT(4) 60 #define RV3032_STATUS_UF BIT(5) 61 #define RV3032_STATUS_TLF BIT(6) 62 #define RV3032_STATUS_THF BIT(7) 63 64 #define RV3032_TLSB_CLKF BIT(1) 65 #define RV3032_TLSB_EEBUSY BIT(2) 66 #define RV3032_TLSB_TEMP GENMASK(7, 4) 67 68 #define RV3032_CLKOUT2_HFD_MSK GENMASK(4, 0) 69 #define RV3032_CLKOUT2_FD_MSK GENMASK(6, 5) 70 #define RV3032_CLKOUT2_OS BIT(7) 71 72 #define RV3032_CTRL1_EERD BIT(3) 73 #define RV3032_CTRL1_WADA BIT(5) 74 75 #define RV3032_CTRL2_STOP BIT(0) 76 #define RV3032_CTRL2_EIE BIT(2) 77 #define RV3032_CTRL2_AIE BIT(3) 78 #define RV3032_CTRL2_TIE BIT(4) 79 #define RV3032_CTRL2_UIE BIT(5) 80 #define RV3032_CTRL2_CLKIE BIT(6) 81 #define RV3032_CTRL2_TSE BIT(7) 82 83 #define RV3032_PMU_TCM GENMASK(1, 0) 84 #define RV3032_PMU_TCR GENMASK(3, 2) 85 #define RV3032_PMU_BSM GENMASK(5, 4) 86 #define RV3032_PMU_NCLKE BIT(6) 87 88 #define RV3032_PMU_BSM_DSM 1 89 #define RV3032_PMU_BSM_LSM 2 90 91 #define RV3032_OFFSET_MSK GENMASK(5, 0) 92 93 #define RV3032_EVT_CTRL_TSR BIT(2) 94 95 #define RV3032_EEPROM_CMD_UPDATE 0x11 96 #define RV3032_EEPROM_CMD_WRITE 0x21 97 #define RV3032_EEPROM_CMD_READ 0x22 98 99 #define RV3032_EEPROM_USER 0xCB 100 101 #define RV3032_EEBUSY_POLL 10000 102 #define RV3032_EEBUSY_TIMEOUT 100000 103 104 #define OFFSET_STEP_PPT 238419 105 106 struct rv3032_data { 107 struct regmap *regmap; 108 struct rtc_device *rtc; 109 bool trickle_charger_set; 110 #ifdef CONFIG_COMMON_CLK 111 struct clk_hw clkout_hw; 112 #endif 113 }; 114 115 static u16 rv3032_trickle_resistors[] = {1000, 2000, 7000, 11000}; 116 static u16 rv3032_trickle_voltages[] = {0, 1750, 3000, 4400}; 117 118 static int rv3032_exit_eerd(struct rv3032_data *rv3032, u32 eerd) 119 { 120 if (eerd) 121 return 0; 122 123 return regmap_update_bits(rv3032->regmap, RV3032_CTRL1, RV3032_CTRL1_EERD, 0); 124 } 125 126 static int rv3032_enter_eerd(struct rv3032_data *rv3032, u32 *eerd) 127 { 128 u32 ctrl1, status; 129 int ret; 130 131 ret = regmap_read(rv3032->regmap, RV3032_CTRL1, &ctrl1); 132 if (ret) 133 return ret; 134 135 *eerd = ctrl1 & RV3032_CTRL1_EERD; 136 if (*eerd) 137 return 0; 138 139 ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL1, 140 RV3032_CTRL1_EERD, RV3032_CTRL1_EERD); 141 if (ret) 142 return ret; 143 144 ret = regmap_read_poll_timeout(rv3032->regmap, RV3032_TLSB, status, 145 !(status & RV3032_TLSB_EEBUSY), 146 RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT); 147 if (ret) { 148 rv3032_exit_eerd(rv3032, *eerd); 149 150 return ret; 151 } 152 153 return 0; 154 } 155 156 static int rv3032_update_cfg(struct rv3032_data *rv3032, unsigned int reg, 157 unsigned int mask, unsigned int val) 158 { 159 u32 status, eerd; 160 int ret; 161 162 ret = rv3032_enter_eerd(rv3032, &eerd); 163 if (ret) 164 return ret; 165 166 ret = regmap_update_bits(rv3032->regmap, reg, mask, val); 167 if (ret) 168 goto exit_eerd; 169 170 ret = regmap_write(rv3032->regmap, RV3032_EEPROM_CMD, RV3032_EEPROM_CMD_UPDATE); 171 if (ret) 172 goto exit_eerd; 173 174 usleep_range(46000, RV3032_EEBUSY_TIMEOUT); 175 176 ret = regmap_read_poll_timeout(rv3032->regmap, RV3032_TLSB, status, 177 !(status & RV3032_TLSB_EEBUSY), 178 RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT); 179 180 exit_eerd: 181 rv3032_exit_eerd(rv3032, eerd); 182 183 return ret; 184 } 185 186 static irqreturn_t rv3032_handle_irq(int irq, void *dev_id) 187 { 188 struct rv3032_data *rv3032 = dev_id; 189 unsigned long events = 0; 190 u32 status = 0, ctrl = 0; 191 192 if (regmap_read(rv3032->regmap, RV3032_STATUS, &status) < 0 || 193 status == 0) { 194 return IRQ_NONE; 195 } 196 197 if (status & RV3032_STATUS_TF) { 198 status |= RV3032_STATUS_TF; 199 ctrl |= RV3032_CTRL2_TIE; 200 events |= RTC_PF; 201 } 202 203 if (status & RV3032_STATUS_AF) { 204 status |= RV3032_STATUS_AF; 205 ctrl |= RV3032_CTRL2_AIE; 206 events |= RTC_AF; 207 } 208 209 if (status & RV3032_STATUS_UF) { 210 status |= RV3032_STATUS_UF; 211 ctrl |= RV3032_CTRL2_UIE; 212 events |= RTC_UF; 213 } 214 215 if (events) { 216 rtc_update_irq(rv3032->rtc, 1, events); 217 regmap_update_bits(rv3032->regmap, RV3032_STATUS, status, 0); 218 regmap_update_bits(rv3032->regmap, RV3032_CTRL2, ctrl, 0); 219 } 220 221 return IRQ_HANDLED; 222 } 223 224 static int rv3032_get_time(struct device *dev, struct rtc_time *tm) 225 { 226 struct rv3032_data *rv3032 = dev_get_drvdata(dev); 227 u8 date[7]; 228 int ret, status; 229 230 ret = regmap_read(rv3032->regmap, RV3032_STATUS, &status); 231 if (ret < 0) 232 return ret; 233 234 if (status & (RV3032_STATUS_PORF | RV3032_STATUS_VLF)) 235 return -EINVAL; 236 237 ret = regmap_bulk_read(rv3032->regmap, RV3032_SEC, date, sizeof(date)); 238 if (ret) 239 return ret; 240 241 tm->tm_sec = bcd2bin(date[0] & 0x7f); 242 tm->tm_min = bcd2bin(date[1] & 0x7f); 243 tm->tm_hour = bcd2bin(date[2] & 0x3f); 244 tm->tm_wday = date[3] & 0x7; 245 tm->tm_mday = bcd2bin(date[4] & 0x3f); 246 tm->tm_mon = bcd2bin(date[5] & 0x1f) - 1; 247 tm->tm_year = bcd2bin(date[6]) + 100; 248 249 return 0; 250 } 251 252 static int rv3032_set_time(struct device *dev, struct rtc_time *tm) 253 { 254 struct rv3032_data *rv3032 = dev_get_drvdata(dev); 255 u8 date[7]; 256 int ret; 257 258 date[0] = bin2bcd(tm->tm_sec); 259 date[1] = bin2bcd(tm->tm_min); 260 date[2] = bin2bcd(tm->tm_hour); 261 date[3] = tm->tm_wday; 262 date[4] = bin2bcd(tm->tm_mday); 263 date[5] = bin2bcd(tm->tm_mon + 1); 264 date[6] = bin2bcd(tm->tm_year - 100); 265 266 ret = regmap_bulk_write(rv3032->regmap, RV3032_SEC, date, 267 sizeof(date)); 268 if (ret) 269 return ret; 270 271 ret = regmap_update_bits(rv3032->regmap, RV3032_STATUS, 272 RV3032_STATUS_PORF | RV3032_STATUS_VLF, 0); 273 274 return ret; 275 } 276 277 static int rv3032_get_alarm(struct device *dev, struct rtc_wkalrm *alrm) 278 { 279 struct rv3032_data *rv3032 = dev_get_drvdata(dev); 280 u8 alarmvals[3]; 281 int status, ctrl, ret; 282 283 ret = regmap_bulk_read(rv3032->regmap, RV3032_ALARM_MIN, alarmvals, 284 sizeof(alarmvals)); 285 if (ret) 286 return ret; 287 288 ret = regmap_read(rv3032->regmap, RV3032_STATUS, &status); 289 if (ret < 0) 290 return ret; 291 292 ret = regmap_read(rv3032->regmap, RV3032_CTRL2, &ctrl); 293 if (ret < 0) 294 return ret; 295 296 alrm->time.tm_sec = 0; 297 alrm->time.tm_min = bcd2bin(alarmvals[0] & 0x7f); 298 alrm->time.tm_hour = bcd2bin(alarmvals[1] & 0x3f); 299 alrm->time.tm_mday = bcd2bin(alarmvals[2] & 0x3f); 300 301 alrm->enabled = !!(ctrl & RV3032_CTRL2_AIE); 302 alrm->pending = (status & RV3032_STATUS_AF) && alrm->enabled; 303 304 return 0; 305 } 306 307 static int rv3032_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 308 { 309 struct rv3032_data *rv3032 = dev_get_drvdata(dev); 310 u8 alarmvals[3]; 311 u8 ctrl = 0; 312 int ret; 313 314 ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL2, 315 RV3032_CTRL2_AIE | RV3032_CTRL2_UIE, 0); 316 if (ret) 317 return ret; 318 319 alarmvals[0] = bin2bcd(alrm->time.tm_min); 320 alarmvals[1] = bin2bcd(alrm->time.tm_hour); 321 alarmvals[2] = bin2bcd(alrm->time.tm_mday); 322 323 ret = regmap_update_bits(rv3032->regmap, RV3032_STATUS, 324 RV3032_STATUS_AF, 0); 325 if (ret) 326 return ret; 327 328 ret = regmap_bulk_write(rv3032->regmap, RV3032_ALARM_MIN, alarmvals, 329 sizeof(alarmvals)); 330 if (ret) 331 return ret; 332 333 if (alrm->enabled) { 334 if (rv3032->rtc->uie_rtctimer.enabled) 335 ctrl |= RV3032_CTRL2_UIE; 336 if (rv3032->rtc->aie_timer.enabled) 337 ctrl |= RV3032_CTRL2_AIE; 338 } 339 340 ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL2, 341 RV3032_CTRL2_UIE | RV3032_CTRL2_AIE, ctrl); 342 343 return ret; 344 } 345 346 static int rv3032_alarm_irq_enable(struct device *dev, unsigned int enabled) 347 { 348 struct rv3032_data *rv3032 = dev_get_drvdata(dev); 349 int ctrl = 0, ret; 350 351 if (enabled) { 352 if (rv3032->rtc->uie_rtctimer.enabled) 353 ctrl |= RV3032_CTRL2_UIE; 354 if (rv3032->rtc->aie_timer.enabled) 355 ctrl |= RV3032_CTRL2_AIE; 356 } 357 358 ret = regmap_update_bits(rv3032->regmap, RV3032_STATUS, 359 RV3032_STATUS_AF | RV3032_STATUS_UF, 0); 360 if (ret) 361 return ret; 362 363 ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL2, 364 RV3032_CTRL2_UIE | RV3032_CTRL2_AIE, ctrl); 365 if (ret) 366 return ret; 367 368 return 0; 369 } 370 371 static int rv3032_read_offset(struct device *dev, long *offset) 372 { 373 struct rv3032_data *rv3032 = dev_get_drvdata(dev); 374 int ret, value, steps; 375 376 ret = regmap_read(rv3032->regmap, RV3032_OFFSET, &value); 377 if (ret < 0) 378 return ret; 379 380 steps = sign_extend32(FIELD_GET(RV3032_OFFSET_MSK, value), 5); 381 382 *offset = DIV_ROUND_CLOSEST(steps * OFFSET_STEP_PPT, 1000); 383 384 return 0; 385 } 386 387 static int rv3032_set_offset(struct device *dev, long offset) 388 { 389 struct rv3032_data *rv3032 = dev_get_drvdata(dev); 390 391 offset = clamp(offset, -7629L, 7391L) * 1000; 392 offset = DIV_ROUND_CLOSEST(offset, OFFSET_STEP_PPT); 393 394 return rv3032_update_cfg(rv3032, RV3032_OFFSET, RV3032_OFFSET_MSK, 395 FIELD_PREP(RV3032_OFFSET_MSK, offset)); 396 } 397 398 static int rv3032_param_get(struct device *dev, struct rtc_param *param) 399 { 400 struct rv3032_data *rv3032 = dev_get_drvdata(dev); 401 int ret; 402 403 switch(param->param) { 404 u32 value; 405 406 case RTC_PARAM_BACKUP_SWITCH_MODE: 407 ret = regmap_read(rv3032->regmap, RV3032_PMU, &value); 408 if (ret < 0) 409 return ret; 410 411 value = FIELD_GET(RV3032_PMU_BSM, value); 412 413 switch(value) { 414 case RV3032_PMU_BSM_DSM: 415 param->uvalue = RTC_BSM_DIRECT; 416 break; 417 case RV3032_PMU_BSM_LSM: 418 param->uvalue = RTC_BSM_LEVEL; 419 break; 420 default: 421 param->uvalue = RTC_BSM_DISABLED; 422 } 423 424 break; 425 426 default: 427 return -EINVAL; 428 } 429 430 return 0; 431 } 432 433 static int rv3032_param_set(struct device *dev, struct rtc_param *param) 434 { 435 struct rv3032_data *rv3032 = dev_get_drvdata(dev); 436 437 switch(param->param) { 438 u8 mode; 439 case RTC_PARAM_BACKUP_SWITCH_MODE: 440 if (rv3032->trickle_charger_set) 441 return -EINVAL; 442 443 switch (param->uvalue) { 444 case RTC_BSM_DISABLED: 445 mode = 0; 446 break; 447 case RTC_BSM_DIRECT: 448 mode = RV3032_PMU_BSM_DSM; 449 break; 450 case RTC_BSM_LEVEL: 451 mode = RV3032_PMU_BSM_LSM; 452 break; 453 default: 454 return -EINVAL; 455 } 456 457 return rv3032_update_cfg(rv3032, RV3032_PMU, RV3032_PMU_BSM, 458 FIELD_PREP(RV3032_PMU_BSM, mode)); 459 460 default: 461 return -EINVAL; 462 } 463 464 return 0; 465 } 466 467 static int rv3032_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) 468 { 469 struct rv3032_data *rv3032 = dev_get_drvdata(dev); 470 int status, val = 0, ret = 0; 471 472 switch (cmd) { 473 case RTC_VL_READ: 474 ret = regmap_read(rv3032->regmap, RV3032_STATUS, &status); 475 if (ret < 0) 476 return ret; 477 478 if (status & (RV3032_STATUS_PORF | RV3032_STATUS_VLF)) 479 val = RTC_VL_DATA_INVALID; 480 return put_user(val, (unsigned int __user *)arg); 481 482 default: 483 return -ENOIOCTLCMD; 484 } 485 } 486 487 static int rv3032_nvram_write(void *priv, unsigned int offset, void *val, size_t bytes) 488 { 489 return regmap_bulk_write(priv, RV3032_RAM1 + offset, val, bytes); 490 } 491 492 static int rv3032_nvram_read(void *priv, unsigned int offset, void *val, size_t bytes) 493 { 494 return regmap_bulk_read(priv, RV3032_RAM1 + offset, val, bytes); 495 } 496 497 static int rv3032_eeprom_write(void *priv, unsigned int offset, void *val, size_t bytes) 498 { 499 struct rv3032_data *rv3032 = priv; 500 u32 status, eerd; 501 int i, ret; 502 u8 *buf = val; 503 504 ret = rv3032_enter_eerd(rv3032, &eerd); 505 if (ret) 506 return ret; 507 508 for (i = 0; i < bytes; i++) { 509 ret = regmap_write(rv3032->regmap, RV3032_EEPROM_ADDR, 510 RV3032_EEPROM_USER + offset + i); 511 if (ret) 512 goto exit_eerd; 513 514 ret = regmap_write(rv3032->regmap, RV3032_EEPROM_DATA, buf[i]); 515 if (ret) 516 goto exit_eerd; 517 518 ret = regmap_write(rv3032->regmap, RV3032_EEPROM_CMD, 519 RV3032_EEPROM_CMD_WRITE); 520 if (ret) 521 goto exit_eerd; 522 523 usleep_range(RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT); 524 525 ret = regmap_read_poll_timeout(rv3032->regmap, RV3032_TLSB, status, 526 !(status & RV3032_TLSB_EEBUSY), 527 RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT); 528 if (ret) 529 goto exit_eerd; 530 } 531 532 exit_eerd: 533 rv3032_exit_eerd(rv3032, eerd); 534 535 return ret; 536 } 537 538 static int rv3032_eeprom_read(void *priv, unsigned int offset, void *val, size_t bytes) 539 { 540 struct rv3032_data *rv3032 = priv; 541 u32 status, eerd, data; 542 int i, ret; 543 u8 *buf = val; 544 545 ret = rv3032_enter_eerd(rv3032, &eerd); 546 if (ret) 547 return ret; 548 549 for (i = 0; i < bytes; i++) { 550 ret = regmap_write(rv3032->regmap, RV3032_EEPROM_ADDR, 551 RV3032_EEPROM_USER + offset + i); 552 if (ret) 553 goto exit_eerd; 554 555 ret = regmap_write(rv3032->regmap, RV3032_EEPROM_CMD, 556 RV3032_EEPROM_CMD_READ); 557 if (ret) 558 goto exit_eerd; 559 560 ret = regmap_read_poll_timeout(rv3032->regmap, RV3032_TLSB, status, 561 !(status & RV3032_TLSB_EEBUSY), 562 RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT); 563 if (ret) 564 goto exit_eerd; 565 566 ret = regmap_read(rv3032->regmap, RV3032_EEPROM_DATA, &data); 567 if (ret) 568 goto exit_eerd; 569 buf[i] = data; 570 } 571 572 exit_eerd: 573 rv3032_exit_eerd(rv3032, eerd); 574 575 return ret; 576 } 577 578 static int rv3032_trickle_charger_setup(struct device *dev, struct rv3032_data *rv3032) 579 { 580 u32 val, ohms, voltage; 581 int i; 582 583 val = FIELD_PREP(RV3032_PMU_TCM, 1) | FIELD_PREP(RV3032_PMU_BSM, RV3032_PMU_BSM_DSM); 584 if (!device_property_read_u32(dev, "trickle-voltage-millivolt", &voltage)) { 585 for (i = 0; i < ARRAY_SIZE(rv3032_trickle_voltages); i++) 586 if (voltage == rv3032_trickle_voltages[i]) 587 break; 588 if (i < ARRAY_SIZE(rv3032_trickle_voltages)) 589 val = FIELD_PREP(RV3032_PMU_TCM, i) | 590 FIELD_PREP(RV3032_PMU_BSM, RV3032_PMU_BSM_LSM); 591 } 592 593 if (device_property_read_u32(dev, "trickle-resistor-ohms", &ohms)) 594 return 0; 595 596 for (i = 0; i < ARRAY_SIZE(rv3032_trickle_resistors); i++) 597 if (ohms == rv3032_trickle_resistors[i]) 598 break; 599 600 if (i >= ARRAY_SIZE(rv3032_trickle_resistors)) { 601 dev_warn(dev, "invalid trickle resistor value\n"); 602 603 return 0; 604 } 605 606 rv3032->trickle_charger_set = true; 607 608 return rv3032_update_cfg(rv3032, RV3032_PMU, 609 RV3032_PMU_TCR | RV3032_PMU_TCM | RV3032_PMU_BSM, 610 val | FIELD_PREP(RV3032_PMU_TCR, i)); 611 } 612 613 #ifdef CONFIG_COMMON_CLK 614 #define clkout_hw_to_rv3032(hw) container_of(hw, struct rv3032_data, clkout_hw) 615 616 static int clkout_xtal_rates[] = { 617 32768, 618 1024, 619 64, 620 1, 621 }; 622 623 #define RV3032_HFD_STEP 8192 624 625 static unsigned long rv3032_clkout_recalc_rate(struct clk_hw *hw, 626 unsigned long parent_rate) 627 { 628 int clkout, ret; 629 struct rv3032_data *rv3032 = clkout_hw_to_rv3032(hw); 630 631 ret = regmap_read(rv3032->regmap, RV3032_CLKOUT2, &clkout); 632 if (ret < 0) 633 return 0; 634 635 if (clkout & RV3032_CLKOUT2_OS) { 636 unsigned long rate = FIELD_GET(RV3032_CLKOUT2_HFD_MSK, clkout) << 8; 637 638 ret = regmap_read(rv3032->regmap, RV3032_CLKOUT1, &clkout); 639 if (ret < 0) 640 return 0; 641 642 rate += clkout + 1; 643 644 return rate * RV3032_HFD_STEP; 645 } 646 647 return clkout_xtal_rates[FIELD_GET(RV3032_CLKOUT2_FD_MSK, clkout)]; 648 } 649 650 static long rv3032_clkout_round_rate(struct clk_hw *hw, unsigned long rate, 651 unsigned long *prate) 652 { 653 int i, hfd; 654 655 if (rate < RV3032_HFD_STEP) 656 for (i = 0; i < ARRAY_SIZE(clkout_xtal_rates); i++) 657 if (clkout_xtal_rates[i] <= rate) 658 return clkout_xtal_rates[i]; 659 660 hfd = DIV_ROUND_CLOSEST(rate, RV3032_HFD_STEP); 661 662 return RV3032_HFD_STEP * clamp(hfd, 0, 8192); 663 } 664 665 static int rv3032_clkout_set_rate(struct clk_hw *hw, unsigned long rate, 666 unsigned long parent_rate) 667 { 668 struct rv3032_data *rv3032 = clkout_hw_to_rv3032(hw); 669 u32 status, eerd; 670 int i, hfd, ret; 671 672 for (i = 0; i < ARRAY_SIZE(clkout_xtal_rates); i++) { 673 if (clkout_xtal_rates[i] == rate) { 674 return rv3032_update_cfg(rv3032, RV3032_CLKOUT2, 0xff, 675 FIELD_PREP(RV3032_CLKOUT2_FD_MSK, i)); 676 } 677 } 678 679 hfd = DIV_ROUND_CLOSEST(rate, RV3032_HFD_STEP); 680 hfd = clamp(hfd, 1, 8192) - 1; 681 682 ret = rv3032_enter_eerd(rv3032, &eerd); 683 if (ret) 684 return ret; 685 686 ret = regmap_write(rv3032->regmap, RV3032_CLKOUT1, hfd & 0xff); 687 if (ret) 688 goto exit_eerd; 689 690 ret = regmap_write(rv3032->regmap, RV3032_CLKOUT2, RV3032_CLKOUT2_OS | 691 FIELD_PREP(RV3032_CLKOUT2_HFD_MSK, hfd >> 8)); 692 if (ret) 693 goto exit_eerd; 694 695 ret = regmap_write(rv3032->regmap, RV3032_EEPROM_CMD, RV3032_EEPROM_CMD_UPDATE); 696 if (ret) 697 goto exit_eerd; 698 699 usleep_range(46000, RV3032_EEBUSY_TIMEOUT); 700 701 ret = regmap_read_poll_timeout(rv3032->regmap, RV3032_TLSB, status, 702 !(status & RV3032_TLSB_EEBUSY), 703 RV3032_EEBUSY_POLL, RV3032_EEBUSY_TIMEOUT); 704 705 exit_eerd: 706 rv3032_exit_eerd(rv3032, eerd); 707 708 return ret; 709 } 710 711 static int rv3032_clkout_prepare(struct clk_hw *hw) 712 { 713 struct rv3032_data *rv3032 = clkout_hw_to_rv3032(hw); 714 715 return rv3032_update_cfg(rv3032, RV3032_PMU, RV3032_PMU_NCLKE, 0); 716 } 717 718 static void rv3032_clkout_unprepare(struct clk_hw *hw) 719 { 720 struct rv3032_data *rv3032 = clkout_hw_to_rv3032(hw); 721 722 rv3032_update_cfg(rv3032, RV3032_PMU, RV3032_PMU_NCLKE, RV3032_PMU_NCLKE); 723 } 724 725 static int rv3032_clkout_is_prepared(struct clk_hw *hw) 726 { 727 int val, ret; 728 struct rv3032_data *rv3032 = clkout_hw_to_rv3032(hw); 729 730 ret = regmap_read(rv3032->regmap, RV3032_PMU, &val); 731 if (ret < 0) 732 return ret; 733 734 return !(val & RV3032_PMU_NCLKE); 735 } 736 737 static const struct clk_ops rv3032_clkout_ops = { 738 .prepare = rv3032_clkout_prepare, 739 .unprepare = rv3032_clkout_unprepare, 740 .is_prepared = rv3032_clkout_is_prepared, 741 .recalc_rate = rv3032_clkout_recalc_rate, 742 .round_rate = rv3032_clkout_round_rate, 743 .set_rate = rv3032_clkout_set_rate, 744 }; 745 746 static int rv3032_clkout_register_clk(struct rv3032_data *rv3032, 747 struct i2c_client *client) 748 { 749 int ret; 750 struct clk *clk; 751 struct clk_init_data init; 752 struct device_node *node = client->dev.of_node; 753 754 ret = regmap_update_bits(rv3032->regmap, RV3032_TLSB, RV3032_TLSB_CLKF, 0); 755 if (ret < 0) 756 return ret; 757 758 ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL2, RV3032_CTRL2_CLKIE, 0); 759 if (ret < 0) 760 return ret; 761 762 ret = regmap_write(rv3032->regmap, RV3032_CLK_IRQ, 0); 763 if (ret < 0) 764 return ret; 765 766 init.name = "rv3032-clkout"; 767 init.ops = &rv3032_clkout_ops; 768 init.flags = 0; 769 init.parent_names = NULL; 770 init.num_parents = 0; 771 rv3032->clkout_hw.init = &init; 772 773 of_property_read_string(node, "clock-output-names", &init.name); 774 775 clk = devm_clk_register(&client->dev, &rv3032->clkout_hw); 776 if (!IS_ERR(clk)) 777 of_clk_add_provider(node, of_clk_src_simple_get, clk); 778 779 return 0; 780 } 781 #endif 782 783 static int rv3032_hwmon_read_temp(struct device *dev, long *mC) 784 { 785 struct rv3032_data *rv3032 = dev_get_drvdata(dev); 786 u8 buf[2]; 787 int temp, prev = 0; 788 int ret; 789 790 ret = regmap_bulk_read(rv3032->regmap, RV3032_TLSB, buf, sizeof(buf)); 791 if (ret) 792 return ret; 793 794 temp = sign_extend32(buf[1], 7) << 4; 795 temp |= FIELD_GET(RV3032_TLSB_TEMP, buf[0]); 796 797 /* No blocking or shadowing on RV3032_TLSB and RV3032_TMSB */ 798 do { 799 prev = temp; 800 801 ret = regmap_bulk_read(rv3032->regmap, RV3032_TLSB, buf, sizeof(buf)); 802 if (ret) 803 return ret; 804 805 temp = sign_extend32(buf[1], 7) << 4; 806 temp |= FIELD_GET(RV3032_TLSB_TEMP, buf[0]); 807 } while (temp != prev); 808 809 *mC = (temp * 1000) / 16; 810 811 return 0; 812 } 813 814 static umode_t rv3032_hwmon_is_visible(const void *data, enum hwmon_sensor_types type, 815 u32 attr, int channel) 816 { 817 if (type != hwmon_temp) 818 return 0; 819 820 switch (attr) { 821 case hwmon_temp_input: 822 return 0444; 823 default: 824 return 0; 825 } 826 } 827 828 static int rv3032_hwmon_read(struct device *dev, enum hwmon_sensor_types type, 829 u32 attr, int channel, long *temp) 830 { 831 int err; 832 833 switch (attr) { 834 case hwmon_temp_input: 835 err = rv3032_hwmon_read_temp(dev, temp); 836 break; 837 default: 838 err = -EOPNOTSUPP; 839 break; 840 } 841 842 return err; 843 } 844 845 static const struct hwmon_channel_info *rv3032_hwmon_info[] = { 846 HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ), 847 HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST), 848 NULL 849 }; 850 851 static const struct hwmon_ops rv3032_hwmon_hwmon_ops = { 852 .is_visible = rv3032_hwmon_is_visible, 853 .read = rv3032_hwmon_read, 854 }; 855 856 static const struct hwmon_chip_info rv3032_hwmon_chip_info = { 857 .ops = &rv3032_hwmon_hwmon_ops, 858 .info = rv3032_hwmon_info, 859 }; 860 861 static void rv3032_hwmon_register(struct device *dev) 862 { 863 struct rv3032_data *rv3032 = dev_get_drvdata(dev); 864 865 if (!IS_REACHABLE(CONFIG_HWMON)) 866 return; 867 868 devm_hwmon_device_register_with_info(dev, "rv3032", rv3032, &rv3032_hwmon_chip_info, NULL); 869 } 870 871 static const struct rtc_class_ops rv3032_rtc_ops = { 872 .read_time = rv3032_get_time, 873 .set_time = rv3032_set_time, 874 .read_offset = rv3032_read_offset, 875 .set_offset = rv3032_set_offset, 876 .ioctl = rv3032_ioctl, 877 .read_alarm = rv3032_get_alarm, 878 .set_alarm = rv3032_set_alarm, 879 .alarm_irq_enable = rv3032_alarm_irq_enable, 880 .param_get = rv3032_param_get, 881 .param_set = rv3032_param_set, 882 }; 883 884 static const struct regmap_config regmap_config = { 885 .reg_bits = 8, 886 .val_bits = 8, 887 .max_register = 0xCA, 888 }; 889 890 static int rv3032_probe(struct i2c_client *client) 891 { 892 struct rv3032_data *rv3032; 893 int ret, status; 894 struct nvmem_config nvmem_cfg = { 895 .name = "rv3032_nvram", 896 .word_size = 1, 897 .stride = 1, 898 .size = 16, 899 .type = NVMEM_TYPE_BATTERY_BACKED, 900 .reg_read = rv3032_nvram_read, 901 .reg_write = rv3032_nvram_write, 902 }; 903 struct nvmem_config eeprom_cfg = { 904 .name = "rv3032_eeprom", 905 .word_size = 1, 906 .stride = 1, 907 .size = 32, 908 .type = NVMEM_TYPE_EEPROM, 909 .reg_read = rv3032_eeprom_read, 910 .reg_write = rv3032_eeprom_write, 911 }; 912 913 rv3032 = devm_kzalloc(&client->dev, sizeof(struct rv3032_data), 914 GFP_KERNEL); 915 if (!rv3032) 916 return -ENOMEM; 917 918 rv3032->regmap = devm_regmap_init_i2c(client, ®map_config); 919 if (IS_ERR(rv3032->regmap)) 920 return PTR_ERR(rv3032->regmap); 921 922 i2c_set_clientdata(client, rv3032); 923 924 ret = regmap_read(rv3032->regmap, RV3032_STATUS, &status); 925 if (ret < 0) 926 return ret; 927 928 rv3032->rtc = devm_rtc_allocate_device(&client->dev); 929 if (IS_ERR(rv3032->rtc)) 930 return PTR_ERR(rv3032->rtc); 931 932 if (client->irq > 0) { 933 ret = devm_request_threaded_irq(&client->dev, client->irq, 934 NULL, rv3032_handle_irq, 935 IRQF_TRIGGER_LOW | IRQF_ONESHOT, 936 "rv3032", rv3032); 937 if (ret) { 938 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); 939 client->irq = 0; 940 } 941 } 942 if (!client->irq) 943 clear_bit(RTC_FEATURE_ALARM, rv3032->rtc->features); 944 945 ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL1, 946 RV3032_CTRL1_WADA, RV3032_CTRL1_WADA); 947 if (ret) 948 return ret; 949 950 rv3032_trickle_charger_setup(&client->dev, rv3032); 951 952 set_bit(RTC_FEATURE_BACKUP_SWITCH_MODE, rv3032->rtc->features); 953 set_bit(RTC_FEATURE_ALARM_RES_MINUTE, rv3032->rtc->features); 954 955 rv3032->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; 956 rv3032->rtc->range_max = RTC_TIMESTAMP_END_2099; 957 rv3032->rtc->ops = &rv3032_rtc_ops; 958 ret = devm_rtc_register_device(rv3032->rtc); 959 if (ret) 960 return ret; 961 962 nvmem_cfg.priv = rv3032->regmap; 963 devm_rtc_nvmem_register(rv3032->rtc, &nvmem_cfg); 964 eeprom_cfg.priv = rv3032; 965 devm_rtc_nvmem_register(rv3032->rtc, &eeprom_cfg); 966 967 rv3032->rtc->max_user_freq = 1; 968 969 #ifdef CONFIG_COMMON_CLK 970 rv3032_clkout_register_clk(rv3032, client); 971 #endif 972 973 rv3032_hwmon_register(&client->dev); 974 975 return 0; 976 } 977 978 static const __maybe_unused struct of_device_id rv3032_of_match[] = { 979 { .compatible = "microcrystal,rv3032", }, 980 { } 981 }; 982 MODULE_DEVICE_TABLE(of, rv3032_of_match); 983 984 static struct i2c_driver rv3032_driver = { 985 .driver = { 986 .name = "rtc-rv3032", 987 .of_match_table = of_match_ptr(rv3032_of_match), 988 }, 989 .probe_new = rv3032_probe, 990 }; 991 module_i2c_driver(rv3032_driver); 992 993 MODULE_AUTHOR("Alexandre Belloni <alexandre.belloni@bootlin.com>"); 994 MODULE_DESCRIPTION("Micro Crystal RV3032 RTC driver"); 995 MODULE_LICENSE("GPL v2"); 996