1 /* 2 * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs 3 * 4 * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net> 5 * Copyright (C) 2006 Tower Technologies 6 * Copyright (C) 2008 Paul Mundt 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/i2c.h> 14 #include <linux/rtc.h> 15 #include <linux/bcd.h> 16 #include <linux/slab.h> 17 #include <linux/module.h> 18 #include <linux/of_device.h> 19 20 /* 21 * Ricoh has a family of I2C based RTCs, which differ only slightly from 22 * each other. Differences center on pinout (e.g. how many interrupts, 23 * output clock, etc) and how the control registers are used. The '372 24 * is significant only because that's the one this driver first supported. 25 */ 26 #define RS5C372_REG_SECS 0 27 #define RS5C372_REG_MINS 1 28 #define RS5C372_REG_HOURS 2 29 #define RS5C372_REG_WDAY 3 30 #define RS5C372_REG_DAY 4 31 #define RS5C372_REG_MONTH 5 32 #define RS5C372_REG_YEAR 6 33 #define RS5C372_REG_TRIM 7 34 # define RS5C372_TRIM_XSL 0x80 35 # define RS5C372_TRIM_MASK 0x7F 36 37 #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */ 38 #define RS5C_REG_ALARM_A_HOURS 9 39 #define RS5C_REG_ALARM_A_WDAY 10 40 41 #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */ 42 #define RS5C_REG_ALARM_B_HOURS 12 43 #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */ 44 45 #define RS5C_REG_CTRL1 14 46 # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */ 47 # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */ 48 # define RV5C387_CTRL1_24 (1 << 5) 49 # define RS5C372A_CTRL1_SL1 (1 << 5) 50 # define RS5C_CTRL1_CT_MASK (7 << 0) 51 # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */ 52 # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */ 53 #define RS5C_REG_CTRL2 15 54 # define RS5C372_CTRL2_24 (1 << 5) 55 # define R2025_CTRL2_XST (1 << 5) 56 # define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2025S/D */ 57 # define RS5C_CTRL2_CTFG (1 << 2) 58 # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */ 59 # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */ 60 61 62 /* to read (style 1) or write registers starting at R */ 63 #define RS5C_ADDR(R) (((R) << 4) | 0) 64 65 66 enum rtc_type { 67 rtc_undef = 0, 68 rtc_r2025sd, 69 rtc_r2221tl, 70 rtc_rs5c372a, 71 rtc_rs5c372b, 72 rtc_rv5c386, 73 rtc_rv5c387a, 74 }; 75 76 static const struct i2c_device_id rs5c372_id[] = { 77 { "r2025sd", rtc_r2025sd }, 78 { "r2221tl", rtc_r2221tl }, 79 { "rs5c372a", rtc_rs5c372a }, 80 { "rs5c372b", rtc_rs5c372b }, 81 { "rv5c386", rtc_rv5c386 }, 82 { "rv5c387a", rtc_rv5c387a }, 83 { } 84 }; 85 MODULE_DEVICE_TABLE(i2c, rs5c372_id); 86 87 static const struct of_device_id rs5c372_of_match[] = { 88 { 89 .compatible = "ricoh,r2025sd", 90 .data = (void *)rtc_r2025sd 91 }, 92 { 93 .compatible = "ricoh,r2221tl", 94 .data = (void *)rtc_r2221tl 95 }, 96 { 97 .compatible = "ricoh,rs5c372a", 98 .data = (void *)rtc_rs5c372a 99 }, 100 { 101 .compatible = "ricoh,rs5c372b", 102 .data = (void *)rtc_rs5c372b 103 }, 104 { 105 .compatible = "ricoh,rv5c386", 106 .data = (void *)rtc_rv5c386 107 }, 108 { 109 .compatible = "ricoh,rv5c387a", 110 .data = (void *)rtc_rv5c387a 111 }, 112 { } 113 }; 114 MODULE_DEVICE_TABLE(of, rs5c372_of_match); 115 116 /* REVISIT: this assumes that: 117 * - we're in the 21st century, so it's safe to ignore the century 118 * bit for rv5c38[67] (REG_MONTH bit 7); 119 * - we should use ALARM_A not ALARM_B (may be wrong on some boards) 120 */ 121 struct rs5c372 { 122 struct i2c_client *client; 123 struct rtc_device *rtc; 124 enum rtc_type type; 125 unsigned time24:1; 126 unsigned has_irq:1; 127 unsigned smbus:1; 128 char buf[17]; 129 char *regs; 130 }; 131 132 static int rs5c_get_regs(struct rs5c372 *rs5c) 133 { 134 struct i2c_client *client = rs5c->client; 135 struct i2c_msg msgs[] = { 136 { 137 .addr = client->addr, 138 .flags = I2C_M_RD, 139 .len = sizeof(rs5c->buf), 140 .buf = rs5c->buf 141 }, 142 }; 143 144 /* This implements the third reading method from the datasheet, using 145 * an internal address that's reset after each transaction (by STOP) 146 * to 0x0f ... so we read extra registers, and skip the first one. 147 * 148 * The first method doesn't work with the iop3xx adapter driver, on at 149 * least 80219 chips; this works around that bug. 150 * 151 * The third method on the other hand doesn't work for the SMBus-only 152 * configurations, so we use the the first method there, stripping off 153 * the extra register in the process. 154 */ 155 if (rs5c->smbus) { 156 int addr = RS5C_ADDR(RS5C372_REG_SECS); 157 int size = sizeof(rs5c->buf) - 1; 158 159 if (i2c_smbus_read_i2c_block_data(client, addr, size, 160 rs5c->buf + 1) != size) { 161 dev_warn(&client->dev, "can't read registers\n"); 162 return -EIO; 163 } 164 } else { 165 if ((i2c_transfer(client->adapter, msgs, 1)) != 1) { 166 dev_warn(&client->dev, "can't read registers\n"); 167 return -EIO; 168 } 169 } 170 171 dev_dbg(&client->dev, 172 "%3ph (%02x) %3ph (%02x), %3ph, %3ph; %02x %02x\n", 173 rs5c->regs + 0, rs5c->regs[3], 174 rs5c->regs + 4, rs5c->regs[7], 175 rs5c->regs + 8, rs5c->regs + 11, 176 rs5c->regs[14], rs5c->regs[15]); 177 178 return 0; 179 } 180 181 static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg) 182 { 183 unsigned hour; 184 185 if (rs5c->time24) 186 return bcd2bin(reg & 0x3f); 187 188 hour = bcd2bin(reg & 0x1f); 189 if (hour == 12) 190 hour = 0; 191 if (reg & 0x20) 192 hour += 12; 193 return hour; 194 } 195 196 static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour) 197 { 198 if (rs5c->time24) 199 return bin2bcd(hour); 200 201 if (hour > 12) 202 return 0x20 | bin2bcd(hour - 12); 203 if (hour == 12) 204 return 0x20 | bin2bcd(12); 205 if (hour == 0) 206 return bin2bcd(12); 207 return bin2bcd(hour); 208 } 209 210 static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm) 211 { 212 struct i2c_client *client = to_i2c_client(dev); 213 struct rs5c372 *rs5c = i2c_get_clientdata(client); 214 int status = rs5c_get_regs(rs5c); 215 216 if (status < 0) 217 return status; 218 219 tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f); 220 tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f); 221 tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]); 222 223 tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07); 224 tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f); 225 226 /* tm->tm_mon is zero-based */ 227 tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1; 228 229 /* year is 1900 + tm->tm_year */ 230 tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100; 231 232 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, " 233 "mday=%d, mon=%d, year=%d, wday=%d\n", 234 __func__, 235 tm->tm_sec, tm->tm_min, tm->tm_hour, 236 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); 237 238 return 0; 239 } 240 241 static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm) 242 { 243 struct i2c_client *client = to_i2c_client(dev); 244 struct rs5c372 *rs5c = i2c_get_clientdata(client); 245 unsigned char buf[7]; 246 int addr; 247 248 dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d " 249 "mday=%d, mon=%d, year=%d, wday=%d\n", 250 __func__, 251 tm->tm_sec, tm->tm_min, tm->tm_hour, 252 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); 253 254 addr = RS5C_ADDR(RS5C372_REG_SECS); 255 buf[0] = bin2bcd(tm->tm_sec); 256 buf[1] = bin2bcd(tm->tm_min); 257 buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour); 258 buf[3] = bin2bcd(tm->tm_wday); 259 buf[4] = bin2bcd(tm->tm_mday); 260 buf[5] = bin2bcd(tm->tm_mon + 1); 261 buf[6] = bin2bcd(tm->tm_year - 100); 262 263 if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) { 264 dev_err(&client->dev, "%s: write error\n", __func__); 265 return -EIO; 266 } 267 268 return 0; 269 } 270 271 #if IS_ENABLED(CONFIG_RTC_INTF_PROC) 272 #define NEED_TRIM 273 #endif 274 275 #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS) 276 #define NEED_TRIM 277 #endif 278 279 #ifdef NEED_TRIM 280 static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim) 281 { 282 struct rs5c372 *rs5c372 = i2c_get_clientdata(client); 283 u8 tmp = rs5c372->regs[RS5C372_REG_TRIM]; 284 285 if (osc) 286 *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768; 287 288 if (trim) { 289 dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp); 290 tmp &= RS5C372_TRIM_MASK; 291 if (tmp & 0x3e) { 292 int t = tmp & 0x3f; 293 294 if (tmp & 0x40) 295 t = (~t | (s8)0xc0) + 1; 296 else 297 t = t - 1; 298 299 tmp = t * 2; 300 } else 301 tmp = 0; 302 *trim = tmp; 303 } 304 305 return 0; 306 } 307 #endif 308 309 static int rs5c_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) 310 { 311 struct i2c_client *client = to_i2c_client(dev); 312 struct rs5c372 *rs5c = i2c_get_clientdata(client); 313 unsigned char buf; 314 int status, addr; 315 316 buf = rs5c->regs[RS5C_REG_CTRL1]; 317 318 if (!rs5c->has_irq) 319 return -EINVAL; 320 321 status = rs5c_get_regs(rs5c); 322 if (status < 0) 323 return status; 324 325 addr = RS5C_ADDR(RS5C_REG_CTRL1); 326 if (enabled) 327 buf |= RS5C_CTRL1_AALE; 328 else 329 buf &= ~RS5C_CTRL1_AALE; 330 331 if (i2c_smbus_write_byte_data(client, addr, buf) < 0) { 332 dev_warn(dev, "can't update alarm\n"); 333 status = -EIO; 334 } else 335 rs5c->regs[RS5C_REG_CTRL1] = buf; 336 337 return status; 338 } 339 340 341 /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI, 342 * which only exposes a polled programming interface; and since 343 * these calls map directly to those EFI requests; we don't demand 344 * we have an IRQ for this chip when we go through this API. 345 * 346 * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs 347 * though, managed through RTC_AIE_{ON,OFF} requests. 348 */ 349 350 static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t) 351 { 352 struct i2c_client *client = to_i2c_client(dev); 353 struct rs5c372 *rs5c = i2c_get_clientdata(client); 354 int status; 355 356 status = rs5c_get_regs(rs5c); 357 if (status < 0) 358 return status; 359 360 /* report alarm time */ 361 t->time.tm_sec = 0; 362 t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f); 363 t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]); 364 365 /* ... and status */ 366 t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE); 367 t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG); 368 369 return 0; 370 } 371 372 static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t) 373 { 374 struct i2c_client *client = to_i2c_client(dev); 375 struct rs5c372 *rs5c = i2c_get_clientdata(client); 376 int status, addr, i; 377 unsigned char buf[3]; 378 379 /* only handle up to 24 hours in the future, like RTC_ALM_SET */ 380 if (t->time.tm_mday != -1 381 || t->time.tm_mon != -1 382 || t->time.tm_year != -1) 383 return -EINVAL; 384 385 /* REVISIT: round up tm_sec */ 386 387 /* if needed, disable irq (clears pending status) */ 388 status = rs5c_get_regs(rs5c); 389 if (status < 0) 390 return status; 391 if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) { 392 addr = RS5C_ADDR(RS5C_REG_CTRL1); 393 buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE; 394 if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) { 395 dev_dbg(dev, "can't disable alarm\n"); 396 return -EIO; 397 } 398 rs5c->regs[RS5C_REG_CTRL1] = buf[0]; 399 } 400 401 /* set alarm */ 402 buf[0] = bin2bcd(t->time.tm_min); 403 buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour); 404 buf[2] = 0x7f; /* any/all days */ 405 406 for (i = 0; i < sizeof(buf); i++) { 407 addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i); 408 if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) { 409 dev_dbg(dev, "can't set alarm time\n"); 410 return -EIO; 411 } 412 } 413 414 /* ... and maybe enable its irq */ 415 if (t->enabled) { 416 addr = RS5C_ADDR(RS5C_REG_CTRL1); 417 buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE; 418 if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) 419 dev_warn(dev, "can't enable alarm\n"); 420 rs5c->regs[RS5C_REG_CTRL1] = buf[0]; 421 } 422 423 return 0; 424 } 425 426 #if IS_ENABLED(CONFIG_RTC_INTF_PROC) 427 428 static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq) 429 { 430 int err, osc, trim; 431 432 err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim); 433 if (err == 0) { 434 seq_printf(seq, "crystal\t\t: %d.%03d KHz\n", 435 osc / 1000, osc % 1000); 436 seq_printf(seq, "trim\t\t: %d\n", trim); 437 } 438 439 return 0; 440 } 441 442 #else 443 #define rs5c372_rtc_proc NULL 444 #endif 445 446 static const struct rtc_class_ops rs5c372_rtc_ops = { 447 .proc = rs5c372_rtc_proc, 448 .read_time = rs5c372_rtc_read_time, 449 .set_time = rs5c372_rtc_set_time, 450 .read_alarm = rs5c_read_alarm, 451 .set_alarm = rs5c_set_alarm, 452 .alarm_irq_enable = rs5c_rtc_alarm_irq_enable, 453 }; 454 455 #if IS_ENABLED(CONFIG_RTC_INTF_SYSFS) 456 457 static ssize_t rs5c372_sysfs_show_trim(struct device *dev, 458 struct device_attribute *attr, char *buf) 459 { 460 int err, trim; 461 462 err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim); 463 if (err) 464 return err; 465 466 return sprintf(buf, "%d\n", trim); 467 } 468 static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL); 469 470 static ssize_t rs5c372_sysfs_show_osc(struct device *dev, 471 struct device_attribute *attr, char *buf) 472 { 473 int err, osc; 474 475 err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL); 476 if (err) 477 return err; 478 479 return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000); 480 } 481 static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL); 482 483 static int rs5c_sysfs_register(struct device *dev) 484 { 485 int err; 486 487 err = device_create_file(dev, &dev_attr_trim); 488 if (err) 489 return err; 490 err = device_create_file(dev, &dev_attr_osc); 491 if (err) 492 device_remove_file(dev, &dev_attr_trim); 493 494 return err; 495 } 496 497 static void rs5c_sysfs_unregister(struct device *dev) 498 { 499 device_remove_file(dev, &dev_attr_trim); 500 device_remove_file(dev, &dev_attr_osc); 501 } 502 503 #else 504 static int rs5c_sysfs_register(struct device *dev) 505 { 506 return 0; 507 } 508 509 static void rs5c_sysfs_unregister(struct device *dev) 510 { 511 /* nothing */ 512 } 513 #endif /* SYSFS */ 514 515 static struct i2c_driver rs5c372_driver; 516 517 static int rs5c_oscillator_setup(struct rs5c372 *rs5c372) 518 { 519 unsigned char buf[2]; 520 int addr, i, ret = 0; 521 522 if (rs5c372->type == rtc_r2025sd) { 523 if (rs5c372->regs[RS5C_REG_CTRL2] & R2025_CTRL2_XST) 524 return ret; 525 rs5c372->regs[RS5C_REG_CTRL2] |= R2025_CTRL2_XST; 526 } else { 527 if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP)) 528 return ret; 529 rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP; 530 } 531 532 addr = RS5C_ADDR(RS5C_REG_CTRL1); 533 buf[0] = rs5c372->regs[RS5C_REG_CTRL1]; 534 buf[1] = rs5c372->regs[RS5C_REG_CTRL2]; 535 536 /* use 24hr mode */ 537 switch (rs5c372->type) { 538 case rtc_rs5c372a: 539 case rtc_rs5c372b: 540 buf[1] |= RS5C372_CTRL2_24; 541 rs5c372->time24 = 1; 542 break; 543 case rtc_r2025sd: 544 case rtc_r2221tl: 545 case rtc_rv5c386: 546 case rtc_rv5c387a: 547 buf[0] |= RV5C387_CTRL1_24; 548 rs5c372->time24 = 1; 549 break; 550 default: 551 /* impossible */ 552 break; 553 } 554 555 for (i = 0; i < sizeof(buf); i++) { 556 addr = RS5C_ADDR(RS5C_REG_CTRL1 + i); 557 ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]); 558 if (unlikely(ret < 0)) 559 return ret; 560 } 561 562 rs5c372->regs[RS5C_REG_CTRL1] = buf[0]; 563 rs5c372->regs[RS5C_REG_CTRL2] = buf[1]; 564 565 return 0; 566 } 567 568 static int rs5c372_probe(struct i2c_client *client, 569 const struct i2c_device_id *id) 570 { 571 int err = 0; 572 int smbus_mode = 0; 573 struct rs5c372 *rs5c372; 574 575 dev_dbg(&client->dev, "%s\n", __func__); 576 577 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C | 578 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) { 579 /* 580 * If we don't have any master mode adapter, try breaking 581 * it down in to the barest of capabilities. 582 */ 583 if (i2c_check_functionality(client->adapter, 584 I2C_FUNC_SMBUS_BYTE_DATA | 585 I2C_FUNC_SMBUS_I2C_BLOCK)) 586 smbus_mode = 1; 587 else { 588 /* Still no good, give up */ 589 err = -ENODEV; 590 goto exit; 591 } 592 } 593 594 rs5c372 = devm_kzalloc(&client->dev, sizeof(struct rs5c372), 595 GFP_KERNEL); 596 if (!rs5c372) { 597 err = -ENOMEM; 598 goto exit; 599 } 600 601 rs5c372->client = client; 602 i2c_set_clientdata(client, rs5c372); 603 if (client->dev.of_node) 604 rs5c372->type = (enum rtc_type) 605 of_device_get_match_data(&client->dev); 606 else 607 rs5c372->type = id->driver_data; 608 609 /* we read registers 0x0f then 0x00-0x0f; skip the first one */ 610 rs5c372->regs = &rs5c372->buf[1]; 611 rs5c372->smbus = smbus_mode; 612 613 err = rs5c_get_regs(rs5c372); 614 if (err < 0) 615 goto exit; 616 617 /* clock may be set for am/pm or 24 hr time */ 618 switch (rs5c372->type) { 619 case rtc_rs5c372a: 620 case rtc_rs5c372b: 621 /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b. 622 * so does periodic irq, except some 327a modes. 623 */ 624 if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24) 625 rs5c372->time24 = 1; 626 break; 627 case rtc_r2025sd: 628 case rtc_r2221tl: 629 case rtc_rv5c386: 630 case rtc_rv5c387a: 631 if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24) 632 rs5c372->time24 = 1; 633 /* alarm uses ALARM_W; and nINTRB for alarm and periodic 634 * irq, on both 386 and 387 635 */ 636 break; 637 default: 638 dev_err(&client->dev, "unknown RTC type\n"); 639 goto exit; 640 } 641 642 /* if the oscillator lost power and no other software (like 643 * the bootloader) set it up, do it here. 644 * 645 * The R2025S/D does this a little differently than the other 646 * parts, so we special case that.. 647 */ 648 err = rs5c_oscillator_setup(rs5c372); 649 if (unlikely(err < 0)) { 650 dev_err(&client->dev, "setup error\n"); 651 goto exit; 652 } 653 654 dev_info(&client->dev, "%s found, %s\n", 655 ({ char *s; switch (rs5c372->type) { 656 case rtc_r2025sd: s = "r2025sd"; break; 657 case rtc_r2221tl: s = "r2221tl"; break; 658 case rtc_rs5c372a: s = "rs5c372a"; break; 659 case rtc_rs5c372b: s = "rs5c372b"; break; 660 case rtc_rv5c386: s = "rv5c386"; break; 661 case rtc_rv5c387a: s = "rv5c387a"; break; 662 default: s = "chip"; break; 663 }; s;}), 664 rs5c372->time24 ? "24hr" : "am/pm" 665 ); 666 667 /* REVISIT use client->irq to register alarm irq ... */ 668 rs5c372->rtc = devm_rtc_device_register(&client->dev, 669 rs5c372_driver.driver.name, 670 &rs5c372_rtc_ops, THIS_MODULE); 671 672 if (IS_ERR(rs5c372->rtc)) { 673 err = PTR_ERR(rs5c372->rtc); 674 goto exit; 675 } 676 677 err = rs5c_sysfs_register(&client->dev); 678 if (err) 679 goto exit; 680 681 return 0; 682 683 exit: 684 return err; 685 } 686 687 static int rs5c372_remove(struct i2c_client *client) 688 { 689 rs5c_sysfs_unregister(&client->dev); 690 return 0; 691 } 692 693 static struct i2c_driver rs5c372_driver = { 694 .driver = { 695 .name = "rtc-rs5c372", 696 .of_match_table = of_match_ptr(rs5c372_of_match), 697 }, 698 .probe = rs5c372_probe, 699 .remove = rs5c372_remove, 700 .id_table = rs5c372_id, 701 }; 702 703 module_i2c_driver(rs5c372_driver); 704 705 MODULE_AUTHOR( 706 "Pavel Mironchik <pmironchik@optifacio.net>, " 707 "Alessandro Zummo <a.zummo@towertech.it>, " 708 "Paul Mundt <lethal@linux-sh.org>"); 709 MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver"); 710 MODULE_LICENSE("GPL"); 711