1 /* 2 * EPSON TOYOCOM RTC-7301SF/DG Driver 3 * 4 * Copyright (c) 2016 Akinobu Mita <akinobu.mita@gmail.com> 5 * 6 * Based on rtc-rp5c01.c 7 * 8 * Datasheet: http://www5.epsondevice.com/en/products/parallel/rtc7301sf.html 9 */ 10 11 #include <linux/io.h> 12 #include <linux/kernel.h> 13 #include <linux/module.h> 14 #include <linux/mod_devicetable.h> 15 #include <linux/delay.h> 16 #include <linux/regmap.h> 17 #include <linux/platform_device.h> 18 #include <linux/rtc.h> 19 20 #define DRV_NAME "rtc-r7301" 21 22 #define RTC7301_1_SEC 0x0 /* Bank 0 and Band 1 */ 23 #define RTC7301_10_SEC 0x1 /* Bank 0 and Band 1 */ 24 #define RTC7301_AE BIT(3) 25 #define RTC7301_1_MIN 0x2 /* Bank 0 and Band 1 */ 26 #define RTC7301_10_MIN 0x3 /* Bank 0 and Band 1 */ 27 #define RTC7301_1_HOUR 0x4 /* Bank 0 and Band 1 */ 28 #define RTC7301_10_HOUR 0x5 /* Bank 0 and Band 1 */ 29 #define RTC7301_DAY_OF_WEEK 0x6 /* Bank 0 and Band 1 */ 30 #define RTC7301_1_DAY 0x7 /* Bank 0 and Band 1 */ 31 #define RTC7301_10_DAY 0x8 /* Bank 0 and Band 1 */ 32 #define RTC7301_1_MONTH 0x9 /* Bank 0 */ 33 #define RTC7301_10_MONTH 0xa /* Bank 0 */ 34 #define RTC7301_1_YEAR 0xb /* Bank 0 */ 35 #define RTC7301_10_YEAR 0xc /* Bank 0 */ 36 #define RTC7301_100_YEAR 0xd /* Bank 0 */ 37 #define RTC7301_1000_YEAR 0xe /* Bank 0 */ 38 #define RTC7301_ALARM_CONTROL 0xe /* Bank 1 */ 39 #define RTC7301_ALARM_CONTROL_AIE BIT(0) 40 #define RTC7301_ALARM_CONTROL_AF BIT(1) 41 #define RTC7301_TIMER_CONTROL 0xe /* Bank 2 */ 42 #define RTC7301_TIMER_CONTROL_TIE BIT(0) 43 #define RTC7301_TIMER_CONTROL_TF BIT(1) 44 #define RTC7301_CONTROL 0xf /* All banks */ 45 #define RTC7301_CONTROL_BUSY BIT(0) 46 #define RTC7301_CONTROL_STOP BIT(1) 47 #define RTC7301_CONTROL_BANK_SEL_0 BIT(2) 48 #define RTC7301_CONTROL_BANK_SEL_1 BIT(3) 49 50 struct rtc7301_priv { 51 struct regmap *regmap; 52 int irq; 53 spinlock_t lock; 54 u8 bank; 55 }; 56 57 static const struct regmap_config rtc7301_regmap_config = { 58 .reg_bits = 32, 59 .val_bits = 8, 60 .reg_stride = 4, 61 }; 62 63 static u8 rtc7301_read(struct rtc7301_priv *priv, unsigned int reg) 64 { 65 int reg_stride = regmap_get_reg_stride(priv->regmap); 66 unsigned int val; 67 68 regmap_read(priv->regmap, reg_stride * reg, &val); 69 70 return val & 0xf; 71 } 72 73 static void rtc7301_write(struct rtc7301_priv *priv, u8 val, unsigned int reg) 74 { 75 int reg_stride = regmap_get_reg_stride(priv->regmap); 76 77 regmap_write(priv->regmap, reg_stride * reg, val); 78 } 79 80 static void rtc7301_update_bits(struct rtc7301_priv *priv, unsigned int reg, 81 u8 mask, u8 val) 82 { 83 int reg_stride = regmap_get_reg_stride(priv->regmap); 84 85 regmap_update_bits(priv->regmap, reg_stride * reg, mask, val); 86 } 87 88 static int rtc7301_wait_while_busy(struct rtc7301_priv *priv) 89 { 90 int retries = 100; 91 92 while (retries-- > 0) { 93 u8 val; 94 95 val = rtc7301_read(priv, RTC7301_CONTROL); 96 if (!(val & RTC7301_CONTROL_BUSY)) 97 return 0; 98 99 udelay(300); 100 } 101 102 return -ETIMEDOUT; 103 } 104 105 static void rtc7301_stop(struct rtc7301_priv *priv) 106 { 107 rtc7301_update_bits(priv, RTC7301_CONTROL, RTC7301_CONTROL_STOP, 108 RTC7301_CONTROL_STOP); 109 } 110 111 static void rtc7301_start(struct rtc7301_priv *priv) 112 { 113 rtc7301_update_bits(priv, RTC7301_CONTROL, RTC7301_CONTROL_STOP, 0); 114 } 115 116 static void rtc7301_select_bank(struct rtc7301_priv *priv, u8 bank) 117 { 118 u8 val = 0; 119 120 if (bank == priv->bank) 121 return; 122 123 if (bank & BIT(0)) 124 val |= RTC7301_CONTROL_BANK_SEL_0; 125 if (bank & BIT(1)) 126 val |= RTC7301_CONTROL_BANK_SEL_1; 127 128 rtc7301_update_bits(priv, RTC7301_CONTROL, 129 RTC7301_CONTROL_BANK_SEL_0 | 130 RTC7301_CONTROL_BANK_SEL_1, val); 131 132 priv->bank = bank; 133 } 134 135 static void rtc7301_get_time(struct rtc7301_priv *priv, struct rtc_time *tm, 136 bool alarm) 137 { 138 int year; 139 140 tm->tm_sec = rtc7301_read(priv, RTC7301_1_SEC); 141 tm->tm_sec += (rtc7301_read(priv, RTC7301_10_SEC) & ~RTC7301_AE) * 10; 142 tm->tm_min = rtc7301_read(priv, RTC7301_1_MIN); 143 tm->tm_min += (rtc7301_read(priv, RTC7301_10_MIN) & ~RTC7301_AE) * 10; 144 tm->tm_hour = rtc7301_read(priv, RTC7301_1_HOUR); 145 tm->tm_hour += (rtc7301_read(priv, RTC7301_10_HOUR) & ~RTC7301_AE) * 10; 146 tm->tm_mday = rtc7301_read(priv, RTC7301_1_DAY); 147 tm->tm_mday += (rtc7301_read(priv, RTC7301_10_DAY) & ~RTC7301_AE) * 10; 148 149 if (alarm) { 150 tm->tm_wday = -1; 151 tm->tm_mon = -1; 152 tm->tm_year = -1; 153 tm->tm_yday = -1; 154 tm->tm_isdst = -1; 155 return; 156 } 157 158 tm->tm_wday = (rtc7301_read(priv, RTC7301_DAY_OF_WEEK) & ~RTC7301_AE); 159 tm->tm_mon = rtc7301_read(priv, RTC7301_10_MONTH) * 10 + 160 rtc7301_read(priv, RTC7301_1_MONTH) - 1; 161 year = rtc7301_read(priv, RTC7301_1000_YEAR) * 1000 + 162 rtc7301_read(priv, RTC7301_100_YEAR) * 100 + 163 rtc7301_read(priv, RTC7301_10_YEAR) * 10 + 164 rtc7301_read(priv, RTC7301_1_YEAR); 165 166 tm->tm_year = year - 1900; 167 } 168 169 static void rtc7301_write_time(struct rtc7301_priv *priv, struct rtc_time *tm, 170 bool alarm) 171 { 172 int year; 173 174 rtc7301_write(priv, tm->tm_sec % 10, RTC7301_1_SEC); 175 rtc7301_write(priv, tm->tm_sec / 10, RTC7301_10_SEC); 176 177 rtc7301_write(priv, tm->tm_min % 10, RTC7301_1_MIN); 178 rtc7301_write(priv, tm->tm_min / 10, RTC7301_10_MIN); 179 180 rtc7301_write(priv, tm->tm_hour % 10, RTC7301_1_HOUR); 181 rtc7301_write(priv, tm->tm_hour / 10, RTC7301_10_HOUR); 182 183 rtc7301_write(priv, tm->tm_mday % 10, RTC7301_1_DAY); 184 rtc7301_write(priv, tm->tm_mday / 10, RTC7301_10_DAY); 185 186 /* Don't care for alarm register */ 187 rtc7301_write(priv, alarm ? RTC7301_AE : tm->tm_wday, 188 RTC7301_DAY_OF_WEEK); 189 190 if (alarm) 191 return; 192 193 rtc7301_write(priv, (tm->tm_mon + 1) % 10, RTC7301_1_MONTH); 194 rtc7301_write(priv, (tm->tm_mon + 1) / 10, RTC7301_10_MONTH); 195 196 year = tm->tm_year + 1900; 197 198 rtc7301_write(priv, year % 10, RTC7301_1_YEAR); 199 rtc7301_write(priv, (year / 10) % 10, RTC7301_10_YEAR); 200 rtc7301_write(priv, (year / 100) % 10, RTC7301_100_YEAR); 201 rtc7301_write(priv, year / 1000, RTC7301_1000_YEAR); 202 } 203 204 static void rtc7301_alarm_irq(struct rtc7301_priv *priv, unsigned int enabled) 205 { 206 rtc7301_update_bits(priv, RTC7301_ALARM_CONTROL, 207 RTC7301_ALARM_CONTROL_AF | 208 RTC7301_ALARM_CONTROL_AIE, 209 enabled ? RTC7301_ALARM_CONTROL_AIE : 0); 210 } 211 212 static int rtc7301_read_time(struct device *dev, struct rtc_time *tm) 213 { 214 struct rtc7301_priv *priv = dev_get_drvdata(dev); 215 unsigned long flags; 216 int err; 217 218 spin_lock_irqsave(&priv->lock, flags); 219 220 rtc7301_select_bank(priv, 0); 221 222 err = rtc7301_wait_while_busy(priv); 223 if (!err) 224 rtc7301_get_time(priv, tm, false); 225 226 spin_unlock_irqrestore(&priv->lock, flags); 227 228 return err; 229 } 230 231 static int rtc7301_set_time(struct device *dev, struct rtc_time *tm) 232 { 233 struct rtc7301_priv *priv = dev_get_drvdata(dev); 234 unsigned long flags; 235 236 spin_lock_irqsave(&priv->lock, flags); 237 238 rtc7301_stop(priv); 239 udelay(300); 240 rtc7301_select_bank(priv, 0); 241 rtc7301_write_time(priv, tm, false); 242 rtc7301_start(priv); 243 244 spin_unlock_irqrestore(&priv->lock, flags); 245 246 return 0; 247 } 248 249 static int rtc7301_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) 250 { 251 struct rtc7301_priv *priv = dev_get_drvdata(dev); 252 unsigned long flags; 253 u8 alrm_ctrl; 254 255 if (priv->irq <= 0) 256 return -EINVAL; 257 258 spin_lock_irqsave(&priv->lock, flags); 259 260 rtc7301_select_bank(priv, 1); 261 rtc7301_get_time(priv, &alarm->time, true); 262 263 alrm_ctrl = rtc7301_read(priv, RTC7301_ALARM_CONTROL); 264 265 alarm->enabled = !!(alrm_ctrl & RTC7301_ALARM_CONTROL_AIE); 266 alarm->pending = !!(alrm_ctrl & RTC7301_ALARM_CONTROL_AF); 267 268 spin_unlock_irqrestore(&priv->lock, flags); 269 270 return 0; 271 } 272 273 static int rtc7301_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) 274 { 275 struct rtc7301_priv *priv = dev_get_drvdata(dev); 276 unsigned long flags; 277 278 if (priv->irq <= 0) 279 return -EINVAL; 280 281 spin_lock_irqsave(&priv->lock, flags); 282 283 rtc7301_select_bank(priv, 1); 284 rtc7301_write_time(priv, &alarm->time, true); 285 rtc7301_alarm_irq(priv, alarm->enabled); 286 287 spin_unlock_irqrestore(&priv->lock, flags); 288 289 return 0; 290 } 291 292 static int rtc7301_alarm_irq_enable(struct device *dev, unsigned int enabled) 293 { 294 struct rtc7301_priv *priv = dev_get_drvdata(dev); 295 unsigned long flags; 296 297 if (priv->irq <= 0) 298 return -EINVAL; 299 300 spin_lock_irqsave(&priv->lock, flags); 301 302 rtc7301_select_bank(priv, 1); 303 rtc7301_alarm_irq(priv, enabled); 304 305 spin_unlock_irqrestore(&priv->lock, flags); 306 307 return 0; 308 } 309 310 static const struct rtc_class_ops rtc7301_rtc_ops = { 311 .read_time = rtc7301_read_time, 312 .set_time = rtc7301_set_time, 313 .read_alarm = rtc7301_read_alarm, 314 .set_alarm = rtc7301_set_alarm, 315 .alarm_irq_enable = rtc7301_alarm_irq_enable, 316 }; 317 318 static irqreturn_t rtc7301_irq_handler(int irq, void *dev_id) 319 { 320 struct rtc_device *rtc = dev_id; 321 struct rtc7301_priv *priv = dev_get_drvdata(rtc->dev.parent); 322 unsigned long flags; 323 irqreturn_t ret = IRQ_NONE; 324 u8 alrm_ctrl; 325 326 spin_lock_irqsave(&priv->lock, flags); 327 328 rtc7301_select_bank(priv, 1); 329 330 alrm_ctrl = rtc7301_read(priv, RTC7301_ALARM_CONTROL); 331 if (alrm_ctrl & RTC7301_ALARM_CONTROL_AF) { 332 ret = IRQ_HANDLED; 333 rtc7301_alarm_irq(priv, false); 334 rtc_update_irq(rtc, 1, RTC_IRQF | RTC_AF); 335 } 336 337 spin_unlock_irqrestore(&priv->lock, flags); 338 339 return ret; 340 } 341 342 static void rtc7301_init(struct rtc7301_priv *priv) 343 { 344 unsigned long flags; 345 346 spin_lock_irqsave(&priv->lock, flags); 347 348 rtc7301_select_bank(priv, 2); 349 rtc7301_write(priv, 0, RTC7301_TIMER_CONTROL); 350 351 spin_unlock_irqrestore(&priv->lock, flags); 352 } 353 354 static int __init rtc7301_rtc_probe(struct platform_device *dev) 355 { 356 struct resource *res; 357 void __iomem *regs; 358 struct rtc7301_priv *priv; 359 struct rtc_device *rtc; 360 int ret; 361 362 res = platform_get_resource(dev, IORESOURCE_MEM, 0); 363 if (!res) 364 return -ENODEV; 365 366 priv = devm_kzalloc(&dev->dev, sizeof(*priv), GFP_KERNEL); 367 if (!priv) 368 return -ENOMEM; 369 370 regs = devm_ioremap_resource(&dev->dev, res); 371 if (IS_ERR(regs)) 372 return PTR_ERR(regs); 373 374 priv->regmap = devm_regmap_init_mmio(&dev->dev, regs, 375 &rtc7301_regmap_config); 376 if (IS_ERR(priv->regmap)) 377 return PTR_ERR(priv->regmap); 378 379 priv->irq = platform_get_irq(dev, 0); 380 381 spin_lock_init(&priv->lock); 382 priv->bank = -1; 383 384 rtc7301_init(priv); 385 386 platform_set_drvdata(dev, priv); 387 388 rtc = devm_rtc_device_register(&dev->dev, DRV_NAME, &rtc7301_rtc_ops, 389 THIS_MODULE); 390 if (IS_ERR(rtc)) 391 return PTR_ERR(rtc); 392 393 if (priv->irq > 0) { 394 ret = devm_request_irq(&dev->dev, priv->irq, 395 rtc7301_irq_handler, IRQF_SHARED, 396 dev_name(&dev->dev), rtc); 397 if (ret) { 398 priv->irq = 0; 399 dev_err(&dev->dev, "unable to request IRQ\n"); 400 } else { 401 device_set_wakeup_capable(&dev->dev, true); 402 } 403 } 404 405 return 0; 406 } 407 408 #ifdef CONFIG_PM_SLEEP 409 410 static int rtc7301_suspend(struct device *dev) 411 { 412 struct rtc7301_priv *priv = dev_get_drvdata(dev); 413 414 if (device_may_wakeup(dev)) 415 enable_irq_wake(priv->irq); 416 417 return 0; 418 } 419 420 static int rtc7301_resume(struct device *dev) 421 { 422 struct rtc7301_priv *priv = dev_get_drvdata(dev); 423 424 if (device_may_wakeup(dev)) 425 disable_irq_wake(priv->irq); 426 427 return 0; 428 } 429 430 #endif 431 432 static SIMPLE_DEV_PM_OPS(rtc7301_pm_ops, rtc7301_suspend, rtc7301_resume); 433 434 static const struct of_device_id rtc7301_dt_match[] = { 435 { .compatible = "epson,rtc7301sf" }, 436 { .compatible = "epson,rtc7301dg" }, 437 {} 438 }; 439 MODULE_DEVICE_TABLE(of, rtc7301_dt_match); 440 441 static struct platform_driver rtc7301_rtc_driver = { 442 .driver = { 443 .name = DRV_NAME, 444 .of_match_table = rtc7301_dt_match, 445 .pm = &rtc7301_pm_ops, 446 }, 447 }; 448 449 module_platform_driver_probe(rtc7301_rtc_driver, rtc7301_rtc_probe); 450 451 MODULE_AUTHOR("Akinobu Mita <akinobu.mita@gmail.com>"); 452 MODULE_LICENSE("GPL"); 453 MODULE_DESCRIPTION("EPSON TOYOCOM RTC-7301SF/DG Driver"); 454 MODULE_ALIAS("platform:rtc-r7301"); 455