1 /* 2 * drivers/rtc/rtc-pcf85363.c 3 * 4 * Driver for NXP PCF85363 real-time clock. 5 * 6 * Copyright (C) 2017 Eric Nelson 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 * 12 * Based loosely on rtc-8583 by Russell King, Wolfram Sang and Juergen Beisert 13 */ 14 #include <linux/module.h> 15 #include <linux/i2c.h> 16 #include <linux/slab.h> 17 #include <linux/rtc.h> 18 #include <linux/init.h> 19 #include <linux/err.h> 20 #include <linux/errno.h> 21 #include <linux/bcd.h> 22 #include <linux/of.h> 23 #include <linux/of_device.h> 24 #include <linux/regmap.h> 25 26 /* 27 * Date/Time registers 28 */ 29 #define DT_100THS 0x00 30 #define DT_SECS 0x01 31 #define DT_MINUTES 0x02 32 #define DT_HOURS 0x03 33 #define DT_DAYS 0x04 34 #define DT_WEEKDAYS 0x05 35 #define DT_MONTHS 0x06 36 #define DT_YEARS 0x07 37 38 /* 39 * Alarm registers 40 */ 41 #define DT_SECOND_ALM1 0x08 42 #define DT_MINUTE_ALM1 0x09 43 #define DT_HOUR_ALM1 0x0a 44 #define DT_DAY_ALM1 0x0b 45 #define DT_MONTH_ALM1 0x0c 46 #define DT_MINUTE_ALM2 0x0d 47 #define DT_HOUR_ALM2 0x0e 48 #define DT_WEEKDAY_ALM2 0x0f 49 #define DT_ALARM_EN 0x10 50 51 /* 52 * Time stamp registers 53 */ 54 #define DT_TIMESTAMP1 0x11 55 #define DT_TIMESTAMP2 0x17 56 #define DT_TIMESTAMP3 0x1d 57 #define DT_TS_MODE 0x23 58 59 /* 60 * control registers 61 */ 62 #define CTRL_OFFSET 0x24 63 #define CTRL_OSCILLATOR 0x25 64 #define CTRL_BATTERY 0x26 65 #define CTRL_PIN_IO 0x27 66 #define CTRL_FUNCTION 0x28 67 #define CTRL_INTA_EN 0x29 68 #define CTRL_INTB_EN 0x2a 69 #define CTRL_FLAGS 0x2b 70 #define CTRL_RAMBYTE 0x2c 71 #define CTRL_WDOG 0x2d 72 #define CTRL_STOP_EN 0x2e 73 #define CTRL_RESETS 0x2f 74 #define CTRL_RAM 0x40 75 76 #define ALRM_SEC_A1E BIT(0) 77 #define ALRM_MIN_A1E BIT(1) 78 #define ALRM_HR_A1E BIT(2) 79 #define ALRM_DAY_A1E BIT(3) 80 #define ALRM_MON_A1E BIT(4) 81 #define ALRM_MIN_A2E BIT(5) 82 #define ALRM_HR_A2E BIT(6) 83 #define ALRM_DAY_A2E BIT(7) 84 85 #define INT_WDIE BIT(0) 86 #define INT_BSIE BIT(1) 87 #define INT_TSRIE BIT(2) 88 #define INT_A2IE BIT(3) 89 #define INT_A1IE BIT(4) 90 #define INT_OIE BIT(5) 91 #define INT_PIE BIT(6) 92 #define INT_ILP BIT(7) 93 94 #define FLAGS_TSR1F BIT(0) 95 #define FLAGS_TSR2F BIT(1) 96 #define FLAGS_TSR3F BIT(2) 97 #define FLAGS_BSF BIT(3) 98 #define FLAGS_WDF BIT(4) 99 #define FLAGS_A1F BIT(5) 100 #define FLAGS_A2F BIT(6) 101 #define FLAGS_PIF BIT(7) 102 103 #define PIN_IO_INTAPM GENMASK(1, 0) 104 #define PIN_IO_INTA_CLK 0 105 #define PIN_IO_INTA_BAT 1 106 #define PIN_IO_INTA_OUT 2 107 #define PIN_IO_INTA_HIZ 3 108 109 #define STOP_EN_STOP BIT(0) 110 111 #define RESET_CPR 0xa4 112 113 #define NVRAM_SIZE 0x40 114 115 static struct i2c_driver pcf85363_driver; 116 117 struct pcf85363 { 118 struct device *dev; 119 struct rtc_device *rtc; 120 struct regmap *regmap; 121 }; 122 123 struct pcf85x63_config { 124 struct regmap_config regmap; 125 unsigned int num_nvram; 126 }; 127 128 static int pcf85363_rtc_read_time(struct device *dev, struct rtc_time *tm) 129 { 130 struct pcf85363 *pcf85363 = dev_get_drvdata(dev); 131 unsigned char buf[DT_YEARS + 1]; 132 int ret, len = sizeof(buf); 133 134 /* read the RTC date and time registers all at once */ 135 ret = regmap_bulk_read(pcf85363->regmap, DT_100THS, buf, len); 136 if (ret) { 137 dev_err(dev, "%s: error %d\n", __func__, ret); 138 return ret; 139 } 140 141 tm->tm_year = bcd2bin(buf[DT_YEARS]); 142 /* adjust for 1900 base of rtc_time */ 143 tm->tm_year += 100; 144 145 tm->tm_wday = buf[DT_WEEKDAYS] & 7; 146 buf[DT_SECS] &= 0x7F; 147 tm->tm_sec = bcd2bin(buf[DT_SECS]); 148 buf[DT_MINUTES] &= 0x7F; 149 tm->tm_min = bcd2bin(buf[DT_MINUTES]); 150 tm->tm_hour = bcd2bin(buf[DT_HOURS]); 151 tm->tm_mday = bcd2bin(buf[DT_DAYS]); 152 tm->tm_mon = bcd2bin(buf[DT_MONTHS]) - 1; 153 154 return 0; 155 } 156 157 static int pcf85363_rtc_set_time(struct device *dev, struct rtc_time *tm) 158 { 159 struct pcf85363 *pcf85363 = dev_get_drvdata(dev); 160 unsigned char tmp[11]; 161 unsigned char *buf = &tmp[2]; 162 int ret; 163 164 tmp[0] = STOP_EN_STOP; 165 tmp[1] = RESET_CPR; 166 167 buf[DT_100THS] = 0; 168 buf[DT_SECS] = bin2bcd(tm->tm_sec); 169 buf[DT_MINUTES] = bin2bcd(tm->tm_min); 170 buf[DT_HOURS] = bin2bcd(tm->tm_hour); 171 buf[DT_DAYS] = bin2bcd(tm->tm_mday); 172 buf[DT_WEEKDAYS] = tm->tm_wday; 173 buf[DT_MONTHS] = bin2bcd(tm->tm_mon + 1); 174 buf[DT_YEARS] = bin2bcd(tm->tm_year % 100); 175 176 ret = regmap_bulk_write(pcf85363->regmap, CTRL_STOP_EN, 177 tmp, sizeof(tmp)); 178 if (ret) 179 return ret; 180 181 return regmap_write(pcf85363->regmap, CTRL_STOP_EN, 0); 182 } 183 184 static int pcf85363_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 185 { 186 struct pcf85363 *pcf85363 = dev_get_drvdata(dev); 187 unsigned char buf[DT_MONTH_ALM1 - DT_SECOND_ALM1 + 1]; 188 unsigned int val; 189 int ret; 190 191 ret = regmap_bulk_read(pcf85363->regmap, DT_SECOND_ALM1, buf, 192 sizeof(buf)); 193 if (ret) 194 return ret; 195 196 alrm->time.tm_sec = bcd2bin(buf[0]); 197 alrm->time.tm_min = bcd2bin(buf[1]); 198 alrm->time.tm_hour = bcd2bin(buf[2]); 199 alrm->time.tm_mday = bcd2bin(buf[3]); 200 alrm->time.tm_mon = bcd2bin(buf[4]) - 1; 201 202 ret = regmap_read(pcf85363->regmap, CTRL_INTA_EN, &val); 203 if (ret) 204 return ret; 205 206 alrm->enabled = !!(val & INT_A1IE); 207 208 return 0; 209 } 210 211 static int _pcf85363_rtc_alarm_irq_enable(struct pcf85363 *pcf85363, unsigned 212 int enabled) 213 { 214 unsigned int alarm_flags = ALRM_SEC_A1E | ALRM_MIN_A1E | ALRM_HR_A1E | 215 ALRM_DAY_A1E | ALRM_MON_A1E; 216 int ret; 217 218 ret = regmap_update_bits(pcf85363->regmap, DT_ALARM_EN, alarm_flags, 219 enabled ? alarm_flags : 0); 220 if (ret) 221 return ret; 222 223 ret = regmap_update_bits(pcf85363->regmap, CTRL_INTA_EN, 224 INT_A1IE, enabled ? INT_A1IE : 0); 225 226 if (ret || enabled) 227 return ret; 228 229 /* clear current flags */ 230 return regmap_update_bits(pcf85363->regmap, CTRL_FLAGS, FLAGS_A1F, 0); 231 } 232 233 static int pcf85363_rtc_alarm_irq_enable(struct device *dev, 234 unsigned int enabled) 235 { 236 struct pcf85363 *pcf85363 = dev_get_drvdata(dev); 237 238 return _pcf85363_rtc_alarm_irq_enable(pcf85363, enabled); 239 } 240 241 static int pcf85363_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 242 { 243 struct pcf85363 *pcf85363 = dev_get_drvdata(dev); 244 unsigned char buf[DT_MONTH_ALM1 - DT_SECOND_ALM1 + 1]; 245 int ret; 246 247 buf[0] = bin2bcd(alrm->time.tm_sec); 248 buf[1] = bin2bcd(alrm->time.tm_min); 249 buf[2] = bin2bcd(alrm->time.tm_hour); 250 buf[3] = bin2bcd(alrm->time.tm_mday); 251 buf[4] = bin2bcd(alrm->time.tm_mon + 1); 252 253 /* 254 * Disable the alarm interrupt before changing the value to avoid 255 * spurious interrupts 256 */ 257 ret = _pcf85363_rtc_alarm_irq_enable(pcf85363, 0); 258 if (ret) 259 return ret; 260 261 ret = regmap_bulk_write(pcf85363->regmap, DT_SECOND_ALM1, buf, 262 sizeof(buf)); 263 if (ret) 264 return ret; 265 266 return _pcf85363_rtc_alarm_irq_enable(pcf85363, alrm->enabled); 267 } 268 269 static irqreturn_t pcf85363_rtc_handle_irq(int irq, void *dev_id) 270 { 271 struct pcf85363 *pcf85363 = i2c_get_clientdata(dev_id); 272 unsigned int flags; 273 int err; 274 275 err = regmap_read(pcf85363->regmap, CTRL_FLAGS, &flags); 276 if (err) 277 return IRQ_NONE; 278 279 if (flags & FLAGS_A1F) { 280 rtc_update_irq(pcf85363->rtc, 1, RTC_IRQF | RTC_AF); 281 regmap_update_bits(pcf85363->regmap, CTRL_FLAGS, FLAGS_A1F, 0); 282 return IRQ_HANDLED; 283 } 284 285 return IRQ_NONE; 286 } 287 288 static const struct rtc_class_ops rtc_ops = { 289 .read_time = pcf85363_rtc_read_time, 290 .set_time = pcf85363_rtc_set_time, 291 }; 292 293 static const struct rtc_class_ops rtc_ops_alarm = { 294 .read_time = pcf85363_rtc_read_time, 295 .set_time = pcf85363_rtc_set_time, 296 .read_alarm = pcf85363_rtc_read_alarm, 297 .set_alarm = pcf85363_rtc_set_alarm, 298 .alarm_irq_enable = pcf85363_rtc_alarm_irq_enable, 299 }; 300 301 static int pcf85363_nvram_read(void *priv, unsigned int offset, void *val, 302 size_t bytes) 303 { 304 struct pcf85363 *pcf85363 = priv; 305 306 return regmap_bulk_read(pcf85363->regmap, CTRL_RAM + offset, 307 val, bytes); 308 } 309 310 static int pcf85363_nvram_write(void *priv, unsigned int offset, void *val, 311 size_t bytes) 312 { 313 struct pcf85363 *pcf85363 = priv; 314 315 return regmap_bulk_write(pcf85363->regmap, CTRL_RAM + offset, 316 val, bytes); 317 } 318 319 static int pcf85x63_nvram_read(void *priv, unsigned int offset, void *val, 320 size_t bytes) 321 { 322 struct pcf85363 *pcf85363 = priv; 323 unsigned int tmp_val; 324 int ret; 325 326 ret = regmap_read(pcf85363->regmap, CTRL_RAMBYTE, &tmp_val); 327 (*(unsigned char *) val) = (unsigned char) tmp_val; 328 329 return ret; 330 } 331 332 static int pcf85x63_nvram_write(void *priv, unsigned int offset, void *val, 333 size_t bytes) 334 { 335 struct pcf85363 *pcf85363 = priv; 336 unsigned char tmp_val; 337 338 tmp_val = *((unsigned char *)val); 339 return regmap_write(pcf85363->regmap, CTRL_RAMBYTE, 340 (unsigned int)tmp_val); 341 } 342 343 static const struct pcf85x63_config pcf_85263_config = { 344 .regmap = { 345 .reg_bits = 8, 346 .val_bits = 8, 347 .max_register = 0x2f, 348 }, 349 .num_nvram = 1 350 }; 351 352 static const struct pcf85x63_config pcf_85363_config = { 353 .regmap = { 354 .reg_bits = 8, 355 .val_bits = 8, 356 .max_register = 0x7f, 357 }, 358 .num_nvram = 2 359 }; 360 361 static int pcf85363_probe(struct i2c_client *client, 362 const struct i2c_device_id *id) 363 { 364 struct pcf85363 *pcf85363; 365 const struct pcf85x63_config *config = &pcf_85363_config; 366 const void *data = of_device_get_match_data(&client->dev); 367 static struct nvmem_config nvmem_cfg[] = { 368 { 369 .name = "pcf85x63-", 370 .word_size = 1, 371 .stride = 1, 372 .size = 1, 373 .reg_read = pcf85x63_nvram_read, 374 .reg_write = pcf85x63_nvram_write, 375 }, { 376 .name = "pcf85363-", 377 .word_size = 1, 378 .stride = 1, 379 .size = NVRAM_SIZE, 380 .reg_read = pcf85363_nvram_read, 381 .reg_write = pcf85363_nvram_write, 382 }, 383 }; 384 int ret, i; 385 386 if (data) 387 config = data; 388 389 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 390 return -ENODEV; 391 392 pcf85363 = devm_kzalloc(&client->dev, sizeof(struct pcf85363), 393 GFP_KERNEL); 394 if (!pcf85363) 395 return -ENOMEM; 396 397 pcf85363->regmap = devm_regmap_init_i2c(client, &config->regmap); 398 if (IS_ERR(pcf85363->regmap)) { 399 dev_err(&client->dev, "regmap allocation failed\n"); 400 return PTR_ERR(pcf85363->regmap); 401 } 402 403 pcf85363->dev = &client->dev; 404 i2c_set_clientdata(client, pcf85363); 405 406 pcf85363->rtc = devm_rtc_allocate_device(pcf85363->dev); 407 if (IS_ERR(pcf85363->rtc)) 408 return PTR_ERR(pcf85363->rtc); 409 410 pcf85363->rtc->ops = &rtc_ops; 411 412 if (client->irq > 0) { 413 regmap_write(pcf85363->regmap, CTRL_FLAGS, 0); 414 regmap_update_bits(pcf85363->regmap, CTRL_PIN_IO, 415 PIN_IO_INTA_OUT, PIN_IO_INTAPM); 416 ret = devm_request_threaded_irq(pcf85363->dev, client->irq, 417 NULL, pcf85363_rtc_handle_irq, 418 IRQF_TRIGGER_LOW | IRQF_ONESHOT, 419 "pcf85363", client); 420 if (ret) 421 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); 422 else 423 pcf85363->rtc->ops = &rtc_ops_alarm; 424 } 425 426 ret = rtc_register_device(pcf85363->rtc); 427 428 for (i = 0; i < config->num_nvram; i++) { 429 nvmem_cfg[i].priv = pcf85363; 430 rtc_nvmem_register(pcf85363->rtc, &nvmem_cfg[i]); 431 } 432 433 return ret; 434 } 435 436 static const struct of_device_id dev_ids[] = { 437 { .compatible = "nxp,pcf85263", .data = &pcf_85263_config }, 438 { .compatible = "nxp,pcf85363", .data = &pcf_85363_config }, 439 { /* sentinel */ } 440 }; 441 MODULE_DEVICE_TABLE(of, dev_ids); 442 443 static struct i2c_driver pcf85363_driver = { 444 .driver = { 445 .name = "pcf85363", 446 .of_match_table = of_match_ptr(dev_ids), 447 }, 448 .probe = pcf85363_probe, 449 }; 450 451 module_i2c_driver(pcf85363_driver); 452 453 MODULE_AUTHOR("Eric Nelson"); 454 MODULE_DESCRIPTION("pcf85263/pcf85363 I2C RTC driver"); 455 MODULE_LICENSE("GPL"); 456