1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * An I2C and SPI driver for the NXP PCF2127/29 RTC 4 * Copyright 2013 Til-Technologies 5 * 6 * Author: Renaud Cerrato <r.cerrato@til-technologies.fr> 7 * 8 * Watchdog and tamper functions 9 * Author: Bruno Thomsen <bruno.thomsen@gmail.com> 10 * 11 * based on the other drivers in this same directory. 12 * 13 * Datasheet: http://cache.nxp.com/documents/data_sheet/PCF2127.pdf 14 */ 15 16 #include <linux/i2c.h> 17 #include <linux/spi/spi.h> 18 #include <linux/bcd.h> 19 #include <linux/rtc.h> 20 #include <linux/slab.h> 21 #include <linux/module.h> 22 #include <linux/of.h> 23 #include <linux/regmap.h> 24 #include <linux/watchdog.h> 25 26 /* Control register 1 */ 27 #define PCF2127_REG_CTRL1 0x00 28 #define PCF2127_BIT_CTRL1_TSF1 BIT(4) 29 /* Control register 2 */ 30 #define PCF2127_REG_CTRL2 0x01 31 #define PCF2127_BIT_CTRL2_TSIE BIT(2) 32 #define PCF2127_BIT_CTRL2_TSF2 BIT(5) 33 /* Control register 3 */ 34 #define PCF2127_REG_CTRL3 0x02 35 #define PCF2127_BIT_CTRL3_BLIE BIT(0) 36 #define PCF2127_BIT_CTRL3_BIE BIT(1) 37 #define PCF2127_BIT_CTRL3_BLF BIT(2) 38 #define PCF2127_BIT_CTRL3_BF BIT(3) 39 #define PCF2127_BIT_CTRL3_BTSE BIT(4) 40 /* Time and date registers */ 41 #define PCF2127_REG_SC 0x03 42 #define PCF2127_BIT_SC_OSF BIT(7) 43 #define PCF2127_REG_MN 0x04 44 #define PCF2127_REG_HR 0x05 45 #define PCF2127_REG_DM 0x06 46 #define PCF2127_REG_DW 0x07 47 #define PCF2127_REG_MO 0x08 48 #define PCF2127_REG_YR 0x09 49 /* Watchdog registers */ 50 #define PCF2127_REG_WD_CTL 0x10 51 #define PCF2127_BIT_WD_CTL_TF0 BIT(0) 52 #define PCF2127_BIT_WD_CTL_TF1 BIT(1) 53 #define PCF2127_BIT_WD_CTL_CD0 BIT(6) 54 #define PCF2127_BIT_WD_CTL_CD1 BIT(7) 55 #define PCF2127_REG_WD_VAL 0x11 56 /* Tamper timestamp registers */ 57 #define PCF2127_REG_TS_CTRL 0x12 58 #define PCF2127_BIT_TS_CTRL_TSOFF BIT(6) 59 #define PCF2127_BIT_TS_CTRL_TSM BIT(7) 60 #define PCF2127_REG_TS_SC 0x13 61 #define PCF2127_REG_TS_MN 0x14 62 #define PCF2127_REG_TS_HR 0x15 63 #define PCF2127_REG_TS_DM 0x16 64 #define PCF2127_REG_TS_MO 0x17 65 #define PCF2127_REG_TS_YR 0x18 66 /* 67 * RAM registers 68 * PCF2127 has 512 bytes general-purpose static RAM (SRAM) that is 69 * battery backed and can survive a power outage. 70 * PCF2129 doesn't have this feature. 71 */ 72 #define PCF2127_REG_RAM_ADDR_MSB 0x1A 73 #define PCF2127_REG_RAM_WRT_CMD 0x1C 74 #define PCF2127_REG_RAM_RD_CMD 0x1D 75 76 /* Watchdog timer value constants */ 77 #define PCF2127_WD_VAL_STOP 0 78 #define PCF2127_WD_VAL_MIN 2 79 #define PCF2127_WD_VAL_MAX 255 80 #define PCF2127_WD_VAL_DEFAULT 60 81 82 struct pcf2127 { 83 struct rtc_device *rtc; 84 struct watchdog_device wdd; 85 struct regmap *regmap; 86 }; 87 88 /* 89 * In the routines that deal directly with the pcf2127 hardware, we use 90 * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch. 91 */ 92 static int pcf2127_rtc_read_time(struct device *dev, struct rtc_time *tm) 93 { 94 struct pcf2127 *pcf2127 = dev_get_drvdata(dev); 95 unsigned char buf[10]; 96 int ret; 97 98 /* 99 * Avoid reading CTRL2 register as it causes WD_VAL register 100 * value to reset to 0 which means watchdog is stopped. 101 */ 102 ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL3, 103 (buf + PCF2127_REG_CTRL3), 104 ARRAY_SIZE(buf) - PCF2127_REG_CTRL3); 105 if (ret) { 106 dev_err(dev, "%s: read error\n", __func__); 107 return ret; 108 } 109 110 if (buf[PCF2127_REG_CTRL3] & PCF2127_BIT_CTRL3_BLF) 111 dev_info(dev, 112 "low voltage detected, check/replace RTC battery.\n"); 113 114 /* Clock integrity is not guaranteed when OSF flag is set. */ 115 if (buf[PCF2127_REG_SC] & PCF2127_BIT_SC_OSF) { 116 /* 117 * no need clear the flag here, 118 * it will be cleared once the new date is saved 119 */ 120 dev_warn(dev, 121 "oscillator stop detected, date/time is not reliable\n"); 122 return -EINVAL; 123 } 124 125 dev_dbg(dev, 126 "%s: raw data is cr3=%02x, sec=%02x, min=%02x, hr=%02x, " 127 "mday=%02x, wday=%02x, mon=%02x, year=%02x\n", 128 __func__, buf[PCF2127_REG_CTRL3], buf[PCF2127_REG_SC], 129 buf[PCF2127_REG_MN], buf[PCF2127_REG_HR], 130 buf[PCF2127_REG_DM], buf[PCF2127_REG_DW], 131 buf[PCF2127_REG_MO], buf[PCF2127_REG_YR]); 132 133 tm->tm_sec = bcd2bin(buf[PCF2127_REG_SC] & 0x7F); 134 tm->tm_min = bcd2bin(buf[PCF2127_REG_MN] & 0x7F); 135 tm->tm_hour = bcd2bin(buf[PCF2127_REG_HR] & 0x3F); /* rtc hr 0-23 */ 136 tm->tm_mday = bcd2bin(buf[PCF2127_REG_DM] & 0x3F); 137 tm->tm_wday = buf[PCF2127_REG_DW] & 0x07; 138 tm->tm_mon = bcd2bin(buf[PCF2127_REG_MO] & 0x1F) - 1; /* rtc mn 1-12 */ 139 tm->tm_year = bcd2bin(buf[PCF2127_REG_YR]); 140 if (tm->tm_year < 70) 141 tm->tm_year += 100; /* assume we are in 1970...2069 */ 142 143 dev_dbg(dev, "%s: tm is secs=%d, mins=%d, hours=%d, " 144 "mday=%d, mon=%d, year=%d, wday=%d\n", 145 __func__, 146 tm->tm_sec, tm->tm_min, tm->tm_hour, 147 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); 148 149 return 0; 150 } 151 152 static int pcf2127_rtc_set_time(struct device *dev, struct rtc_time *tm) 153 { 154 struct pcf2127 *pcf2127 = dev_get_drvdata(dev); 155 unsigned char buf[7]; 156 int i = 0, err; 157 158 dev_dbg(dev, "%s: secs=%d, mins=%d, hours=%d, " 159 "mday=%d, mon=%d, year=%d, wday=%d\n", 160 __func__, 161 tm->tm_sec, tm->tm_min, tm->tm_hour, 162 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); 163 164 /* hours, minutes and seconds */ 165 buf[i++] = bin2bcd(tm->tm_sec); /* this will also clear OSF flag */ 166 buf[i++] = bin2bcd(tm->tm_min); 167 buf[i++] = bin2bcd(tm->tm_hour); 168 buf[i++] = bin2bcd(tm->tm_mday); 169 buf[i++] = tm->tm_wday & 0x07; 170 171 /* month, 1 - 12 */ 172 buf[i++] = bin2bcd(tm->tm_mon + 1); 173 174 /* year */ 175 buf[i++] = bin2bcd(tm->tm_year % 100); 176 177 /* write register's data */ 178 err = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_SC, buf, i); 179 if (err) { 180 dev_err(dev, 181 "%s: err=%d", __func__, err); 182 return err; 183 } 184 185 return 0; 186 } 187 188 #ifdef CONFIG_RTC_INTF_DEV 189 static int pcf2127_rtc_ioctl(struct device *dev, 190 unsigned int cmd, unsigned long arg) 191 { 192 struct pcf2127 *pcf2127 = dev_get_drvdata(dev); 193 int touser; 194 int ret; 195 196 switch (cmd) { 197 case RTC_VL_READ: 198 ret = regmap_read(pcf2127->regmap, PCF2127_REG_CTRL3, &touser); 199 if (ret) 200 return ret; 201 202 touser = touser & PCF2127_BIT_CTRL3_BLF ? RTC_VL_BACKUP_LOW : 0; 203 204 return put_user(touser, (unsigned int __user *)arg); 205 default: 206 return -ENOIOCTLCMD; 207 } 208 } 209 #else 210 #define pcf2127_rtc_ioctl NULL 211 #endif 212 213 static const struct rtc_class_ops pcf2127_rtc_ops = { 214 .ioctl = pcf2127_rtc_ioctl, 215 .read_time = pcf2127_rtc_read_time, 216 .set_time = pcf2127_rtc_set_time, 217 }; 218 219 static int pcf2127_nvmem_read(void *priv, unsigned int offset, 220 void *val, size_t bytes) 221 { 222 struct pcf2127 *pcf2127 = priv; 223 int ret; 224 unsigned char offsetbuf[] = { offset >> 8, offset }; 225 226 ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB, 227 offsetbuf, 2); 228 if (ret) 229 return ret; 230 231 ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_RAM_RD_CMD, 232 val, bytes); 233 234 return ret ?: bytes; 235 } 236 237 static int pcf2127_nvmem_write(void *priv, unsigned int offset, 238 void *val, size_t bytes) 239 { 240 struct pcf2127 *pcf2127 = priv; 241 int ret; 242 unsigned char offsetbuf[] = { offset >> 8, offset }; 243 244 ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_ADDR_MSB, 245 offsetbuf, 2); 246 if (ret) 247 return ret; 248 249 ret = regmap_bulk_write(pcf2127->regmap, PCF2127_REG_RAM_WRT_CMD, 250 val, bytes); 251 252 return ret ?: bytes; 253 } 254 255 /* watchdog driver */ 256 257 static int pcf2127_wdt_ping(struct watchdog_device *wdd) 258 { 259 struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd); 260 261 return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL, wdd->timeout); 262 } 263 264 /* 265 * Restart watchdog timer if feature is active. 266 * 267 * Note: Reading CTRL2 register causes watchdog to stop which is unfortunate, 268 * since register also contain control/status flags for other features. 269 * Always call this function after reading CTRL2 register. 270 */ 271 static int pcf2127_wdt_active_ping(struct watchdog_device *wdd) 272 { 273 int ret = 0; 274 275 if (watchdog_active(wdd)) { 276 ret = pcf2127_wdt_ping(wdd); 277 if (ret) 278 dev_err(wdd->parent, 279 "%s: watchdog restart failed, ret=%d\n", 280 __func__, ret); 281 } 282 283 return ret; 284 } 285 286 static int pcf2127_wdt_start(struct watchdog_device *wdd) 287 { 288 return pcf2127_wdt_ping(wdd); 289 } 290 291 static int pcf2127_wdt_stop(struct watchdog_device *wdd) 292 { 293 struct pcf2127 *pcf2127 = watchdog_get_drvdata(wdd); 294 295 return regmap_write(pcf2127->regmap, PCF2127_REG_WD_VAL, 296 PCF2127_WD_VAL_STOP); 297 } 298 299 static int pcf2127_wdt_set_timeout(struct watchdog_device *wdd, 300 unsigned int new_timeout) 301 { 302 dev_dbg(wdd->parent, "new watchdog timeout: %is (old: %is)\n", 303 new_timeout, wdd->timeout); 304 305 wdd->timeout = new_timeout; 306 307 return pcf2127_wdt_active_ping(wdd); 308 } 309 310 static const struct watchdog_info pcf2127_wdt_info = { 311 .identity = "NXP PCF2127/PCF2129 Watchdog", 312 .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT, 313 }; 314 315 static const struct watchdog_ops pcf2127_watchdog_ops = { 316 .owner = THIS_MODULE, 317 .start = pcf2127_wdt_start, 318 .stop = pcf2127_wdt_stop, 319 .ping = pcf2127_wdt_ping, 320 .set_timeout = pcf2127_wdt_set_timeout, 321 }; 322 323 /* sysfs interface */ 324 325 static ssize_t timestamp0_store(struct device *dev, 326 struct device_attribute *attr, 327 const char *buf, size_t count) 328 { 329 struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent); 330 int ret; 331 332 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL1, 333 PCF2127_BIT_CTRL1_TSF1, 0); 334 if (ret) { 335 dev_err(dev, "%s: update ctrl1 ret=%d\n", __func__, ret); 336 return ret; 337 } 338 339 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2, 340 PCF2127_BIT_CTRL2_TSF2, 0); 341 if (ret) { 342 dev_err(dev, "%s: update ctrl2 ret=%d\n", __func__, ret); 343 return ret; 344 } 345 346 ret = pcf2127_wdt_active_ping(&pcf2127->wdd); 347 if (ret) 348 return ret; 349 350 return count; 351 }; 352 353 static ssize_t timestamp0_show(struct device *dev, 354 struct device_attribute *attr, char *buf) 355 { 356 struct pcf2127 *pcf2127 = dev_get_drvdata(dev->parent); 357 struct rtc_time tm; 358 int ret; 359 unsigned char data[25]; 360 361 ret = regmap_bulk_read(pcf2127->regmap, PCF2127_REG_CTRL1, data, 362 sizeof(data)); 363 if (ret) { 364 dev_err(dev, "%s: read error ret=%d\n", __func__, ret); 365 return ret; 366 } 367 368 dev_dbg(dev, 369 "%s: raw data is cr1=%02x, cr2=%02x, cr3=%02x, ts_sc=%02x, " 370 "ts_mn=%02x, ts_hr=%02x, ts_dm=%02x, ts_mo=%02x, ts_yr=%02x\n", 371 __func__, data[PCF2127_REG_CTRL1], data[PCF2127_REG_CTRL2], 372 data[PCF2127_REG_CTRL3], data[PCF2127_REG_TS_SC], 373 data[PCF2127_REG_TS_MN], data[PCF2127_REG_TS_HR], 374 data[PCF2127_REG_TS_DM], data[PCF2127_REG_TS_MO], 375 data[PCF2127_REG_TS_YR]); 376 377 ret = pcf2127_wdt_active_ping(&pcf2127->wdd); 378 if (ret) 379 return ret; 380 381 if (!(data[PCF2127_REG_CTRL1] & PCF2127_BIT_CTRL1_TSF1) && 382 !(data[PCF2127_REG_CTRL2] & PCF2127_BIT_CTRL2_TSF2)) 383 return 0; 384 385 tm.tm_sec = bcd2bin(data[PCF2127_REG_TS_SC] & 0x7F); 386 tm.tm_min = bcd2bin(data[PCF2127_REG_TS_MN] & 0x7F); 387 tm.tm_hour = bcd2bin(data[PCF2127_REG_TS_HR] & 0x3F); 388 tm.tm_mday = bcd2bin(data[PCF2127_REG_TS_DM] & 0x3F); 389 /* TS_MO register (month) value range: 1-12 */ 390 tm.tm_mon = bcd2bin(data[PCF2127_REG_TS_MO] & 0x1F) - 1; 391 tm.tm_year = bcd2bin(data[PCF2127_REG_TS_YR]); 392 if (tm.tm_year < 70) 393 tm.tm_year += 100; /* assume we are in 1970...2069 */ 394 395 ret = rtc_valid_tm(&tm); 396 if (ret) 397 return ret; 398 399 return sprintf(buf, "%llu\n", 400 (unsigned long long)rtc_tm_to_time64(&tm)); 401 }; 402 403 static DEVICE_ATTR_RW(timestamp0); 404 405 static struct attribute *pcf2127_attrs[] = { 406 &dev_attr_timestamp0.attr, 407 NULL 408 }; 409 410 static const struct attribute_group pcf2127_attr_group = { 411 .attrs = pcf2127_attrs, 412 }; 413 414 static int pcf2127_probe(struct device *dev, struct regmap *regmap, 415 const char *name, bool has_nvmem) 416 { 417 struct pcf2127 *pcf2127; 418 u32 wdd_timeout; 419 int ret = 0; 420 421 dev_dbg(dev, "%s\n", __func__); 422 423 pcf2127 = devm_kzalloc(dev, sizeof(*pcf2127), GFP_KERNEL); 424 if (!pcf2127) 425 return -ENOMEM; 426 427 pcf2127->regmap = regmap; 428 429 dev_set_drvdata(dev, pcf2127); 430 431 pcf2127->rtc = devm_rtc_allocate_device(dev); 432 if (IS_ERR(pcf2127->rtc)) 433 return PTR_ERR(pcf2127->rtc); 434 435 pcf2127->rtc->ops = &pcf2127_rtc_ops; 436 437 pcf2127->wdd.parent = dev; 438 pcf2127->wdd.info = &pcf2127_wdt_info; 439 pcf2127->wdd.ops = &pcf2127_watchdog_ops; 440 pcf2127->wdd.min_timeout = PCF2127_WD_VAL_MIN; 441 pcf2127->wdd.max_timeout = PCF2127_WD_VAL_MAX; 442 pcf2127->wdd.timeout = PCF2127_WD_VAL_DEFAULT; 443 pcf2127->wdd.min_hw_heartbeat_ms = 500; 444 445 watchdog_set_drvdata(&pcf2127->wdd, pcf2127); 446 447 if (has_nvmem) { 448 struct nvmem_config nvmem_cfg = { 449 .priv = pcf2127, 450 .reg_read = pcf2127_nvmem_read, 451 .reg_write = pcf2127_nvmem_write, 452 .size = 512, 453 }; 454 455 ret = rtc_nvmem_register(pcf2127->rtc, &nvmem_cfg); 456 } 457 458 /* 459 * Watchdog timer enabled and reset pin /RST activated when timed out. 460 * Select 1Hz clock source for watchdog timer. 461 * Note: Countdown timer disabled and not available. 462 */ 463 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_WD_CTL, 464 PCF2127_BIT_WD_CTL_CD1 | 465 PCF2127_BIT_WD_CTL_CD0 | 466 PCF2127_BIT_WD_CTL_TF1 | 467 PCF2127_BIT_WD_CTL_TF0, 468 PCF2127_BIT_WD_CTL_CD1 | 469 PCF2127_BIT_WD_CTL_CD0 | 470 PCF2127_BIT_WD_CTL_TF1); 471 if (ret) { 472 dev_err(dev, "%s: watchdog config (wd_ctl) failed\n", __func__); 473 return ret; 474 } 475 476 /* Test if watchdog timer is started by bootloader */ 477 ret = regmap_read(pcf2127->regmap, PCF2127_REG_WD_VAL, &wdd_timeout); 478 if (ret) 479 return ret; 480 481 if (wdd_timeout) 482 set_bit(WDOG_HW_RUNNING, &pcf2127->wdd.status); 483 484 #ifdef CONFIG_WATCHDOG 485 ret = devm_watchdog_register_device(dev, &pcf2127->wdd); 486 if (ret) 487 return ret; 488 #endif /* CONFIG_WATCHDOG */ 489 490 /* 491 * Disable battery low/switch-over timestamp and interrupts. 492 * Clear battery interrupt flags which can block new trigger events. 493 * Note: This is the default chip behaviour but added to ensure 494 * correct tamper timestamp and interrupt function. 495 */ 496 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL3, 497 PCF2127_BIT_CTRL3_BTSE | 498 PCF2127_BIT_CTRL3_BF | 499 PCF2127_BIT_CTRL3_BIE | 500 PCF2127_BIT_CTRL3_BLIE, 0); 501 if (ret) { 502 dev_err(dev, "%s: interrupt config (ctrl3) failed\n", 503 __func__); 504 return ret; 505 } 506 507 /* 508 * Enable timestamp function and store timestamp of first trigger 509 * event until TSF1 and TFS2 interrupt flags are cleared. 510 */ 511 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_TS_CTRL, 512 PCF2127_BIT_TS_CTRL_TSOFF | 513 PCF2127_BIT_TS_CTRL_TSM, 514 PCF2127_BIT_TS_CTRL_TSM); 515 if (ret) { 516 dev_err(dev, "%s: tamper detection config (ts_ctrl) failed\n", 517 __func__); 518 return ret; 519 } 520 521 /* 522 * Enable interrupt generation when TSF1 or TSF2 timestamp flags 523 * are set. Interrupt signal is an open-drain output and can be 524 * left floating if unused. 525 */ 526 ret = regmap_update_bits(pcf2127->regmap, PCF2127_REG_CTRL2, 527 PCF2127_BIT_CTRL2_TSIE, 528 PCF2127_BIT_CTRL2_TSIE); 529 if (ret) { 530 dev_err(dev, "%s: tamper detection config (ctrl2) failed\n", 531 __func__); 532 return ret; 533 } 534 535 ret = rtc_add_group(pcf2127->rtc, &pcf2127_attr_group); 536 if (ret) { 537 dev_err(dev, "%s: tamper sysfs registering failed\n", 538 __func__); 539 return ret; 540 } 541 542 return rtc_register_device(pcf2127->rtc); 543 } 544 545 #ifdef CONFIG_OF 546 static const struct of_device_id pcf2127_of_match[] = { 547 { .compatible = "nxp,pcf2127" }, 548 { .compatible = "nxp,pcf2129" }, 549 {} 550 }; 551 MODULE_DEVICE_TABLE(of, pcf2127_of_match); 552 #endif 553 554 #if IS_ENABLED(CONFIG_I2C) 555 556 static int pcf2127_i2c_write(void *context, const void *data, size_t count) 557 { 558 struct device *dev = context; 559 struct i2c_client *client = to_i2c_client(dev); 560 int ret; 561 562 ret = i2c_master_send(client, data, count); 563 if (ret != count) 564 return ret < 0 ? ret : -EIO; 565 566 return 0; 567 } 568 569 static int pcf2127_i2c_gather_write(void *context, 570 const void *reg, size_t reg_size, 571 const void *val, size_t val_size) 572 { 573 struct device *dev = context; 574 struct i2c_client *client = to_i2c_client(dev); 575 int ret; 576 void *buf; 577 578 if (WARN_ON(reg_size != 1)) 579 return -EINVAL; 580 581 buf = kmalloc(val_size + 1, GFP_KERNEL); 582 if (!buf) 583 return -ENOMEM; 584 585 memcpy(buf, reg, 1); 586 memcpy(buf + 1, val, val_size); 587 588 ret = i2c_master_send(client, buf, val_size + 1); 589 590 kfree(buf); 591 592 if (ret != val_size + 1) 593 return ret < 0 ? ret : -EIO; 594 595 return 0; 596 } 597 598 static int pcf2127_i2c_read(void *context, const void *reg, size_t reg_size, 599 void *val, size_t val_size) 600 { 601 struct device *dev = context; 602 struct i2c_client *client = to_i2c_client(dev); 603 int ret; 604 605 if (WARN_ON(reg_size != 1)) 606 return -EINVAL; 607 608 ret = i2c_master_send(client, reg, 1); 609 if (ret != 1) 610 return ret < 0 ? ret : -EIO; 611 612 ret = i2c_master_recv(client, val, val_size); 613 if (ret != val_size) 614 return ret < 0 ? ret : -EIO; 615 616 return 0; 617 } 618 619 /* 620 * The reason we need this custom regmap_bus instead of using regmap_init_i2c() 621 * is that the STOP condition is required between set register address and 622 * read register data when reading from registers. 623 */ 624 static const struct regmap_bus pcf2127_i2c_regmap = { 625 .write = pcf2127_i2c_write, 626 .gather_write = pcf2127_i2c_gather_write, 627 .read = pcf2127_i2c_read, 628 }; 629 630 static struct i2c_driver pcf2127_i2c_driver; 631 632 static int pcf2127_i2c_probe(struct i2c_client *client, 633 const struct i2c_device_id *id) 634 { 635 struct regmap *regmap; 636 static const struct regmap_config config = { 637 .reg_bits = 8, 638 .val_bits = 8, 639 }; 640 641 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) 642 return -ENODEV; 643 644 regmap = devm_regmap_init(&client->dev, &pcf2127_i2c_regmap, 645 &client->dev, &config); 646 if (IS_ERR(regmap)) { 647 dev_err(&client->dev, "%s: regmap allocation failed: %ld\n", 648 __func__, PTR_ERR(regmap)); 649 return PTR_ERR(regmap); 650 } 651 652 return pcf2127_probe(&client->dev, regmap, 653 pcf2127_i2c_driver.driver.name, id->driver_data); 654 } 655 656 static const struct i2c_device_id pcf2127_i2c_id[] = { 657 { "pcf2127", 1 }, 658 { "pcf2129", 0 }, 659 { } 660 }; 661 MODULE_DEVICE_TABLE(i2c, pcf2127_i2c_id); 662 663 static struct i2c_driver pcf2127_i2c_driver = { 664 .driver = { 665 .name = "rtc-pcf2127-i2c", 666 .of_match_table = of_match_ptr(pcf2127_of_match), 667 }, 668 .probe = pcf2127_i2c_probe, 669 .id_table = pcf2127_i2c_id, 670 }; 671 672 static int pcf2127_i2c_register_driver(void) 673 { 674 return i2c_add_driver(&pcf2127_i2c_driver); 675 } 676 677 static void pcf2127_i2c_unregister_driver(void) 678 { 679 i2c_del_driver(&pcf2127_i2c_driver); 680 } 681 682 #else 683 684 static int pcf2127_i2c_register_driver(void) 685 { 686 return 0; 687 } 688 689 static void pcf2127_i2c_unregister_driver(void) 690 { 691 } 692 693 #endif 694 695 #if IS_ENABLED(CONFIG_SPI_MASTER) 696 697 static struct spi_driver pcf2127_spi_driver; 698 699 static int pcf2127_spi_probe(struct spi_device *spi) 700 { 701 static const struct regmap_config config = { 702 .reg_bits = 8, 703 .val_bits = 8, 704 .read_flag_mask = 0xa0, 705 .write_flag_mask = 0x20, 706 }; 707 struct regmap *regmap; 708 709 regmap = devm_regmap_init_spi(spi, &config); 710 if (IS_ERR(regmap)) { 711 dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n", 712 __func__, PTR_ERR(regmap)); 713 return PTR_ERR(regmap); 714 } 715 716 return pcf2127_probe(&spi->dev, regmap, pcf2127_spi_driver.driver.name, 717 spi_get_device_id(spi)->driver_data); 718 } 719 720 static const struct spi_device_id pcf2127_spi_id[] = { 721 { "pcf2127", 1 }, 722 { "pcf2129", 0 }, 723 { } 724 }; 725 MODULE_DEVICE_TABLE(spi, pcf2127_spi_id); 726 727 static struct spi_driver pcf2127_spi_driver = { 728 .driver = { 729 .name = "rtc-pcf2127-spi", 730 .of_match_table = of_match_ptr(pcf2127_of_match), 731 }, 732 .probe = pcf2127_spi_probe, 733 .id_table = pcf2127_spi_id, 734 }; 735 736 static int pcf2127_spi_register_driver(void) 737 { 738 return spi_register_driver(&pcf2127_spi_driver); 739 } 740 741 static void pcf2127_spi_unregister_driver(void) 742 { 743 spi_unregister_driver(&pcf2127_spi_driver); 744 } 745 746 #else 747 748 static int pcf2127_spi_register_driver(void) 749 { 750 return 0; 751 } 752 753 static void pcf2127_spi_unregister_driver(void) 754 { 755 } 756 757 #endif 758 759 static int __init pcf2127_init(void) 760 { 761 int ret; 762 763 ret = pcf2127_i2c_register_driver(); 764 if (ret) { 765 pr_err("Failed to register pcf2127 i2c driver: %d\n", ret); 766 return ret; 767 } 768 769 ret = pcf2127_spi_register_driver(); 770 if (ret) { 771 pr_err("Failed to register pcf2127 spi driver: %d\n", ret); 772 pcf2127_i2c_unregister_driver(); 773 } 774 775 return ret; 776 } 777 module_init(pcf2127_init) 778 779 static void __exit pcf2127_exit(void) 780 { 781 pcf2127_spi_unregister_driver(); 782 pcf2127_i2c_unregister_driver(); 783 } 784 module_exit(pcf2127_exit) 785 786 MODULE_AUTHOR("Renaud Cerrato <r.cerrato@til-technologies.fr>"); 787 MODULE_DESCRIPTION("NXP PCF2127/29 RTC driver"); 788 MODULE_LICENSE("GPL v2"); 789