1 /* 2 * TI OMAP1 Real Time Clock interface for Linux 3 * 4 * Copyright (C) 2003 MontaVista Software, Inc. 5 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com> 6 * 7 * Copyright (C) 2006 David Brownell (new RTC framework) 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 12 * 2 of the License, or (at your option) any later version. 13 */ 14 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 #include <linux/module.h> 18 #include <linux/ioport.h> 19 #include <linux/delay.h> 20 #include <linux/rtc.h> 21 #include <linux/bcd.h> 22 #include <linux/platform_device.h> 23 24 #include <asm/io.h> 25 26 27 /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock 28 * with century-range alarm matching, driven by the 32kHz clock. 29 * 30 * The main user-visible ways it differs from PC RTCs are by omitting 31 * "don't care" alarm fields and sub-second periodic IRQs, and having 32 * an autoadjust mechanism to calibrate to the true oscillator rate. 33 * 34 * Board-specific wiring options include using split power mode with 35 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset), 36 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from 37 * low power modes) for OMAP1 boards (OMAP-L138 has this built into 38 * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment. 39 */ 40 41 #define OMAP_RTC_BASE 0xfffb4800 42 43 /* RTC registers */ 44 #define OMAP_RTC_SECONDS_REG 0x00 45 #define OMAP_RTC_MINUTES_REG 0x04 46 #define OMAP_RTC_HOURS_REG 0x08 47 #define OMAP_RTC_DAYS_REG 0x0C 48 #define OMAP_RTC_MONTHS_REG 0x10 49 #define OMAP_RTC_YEARS_REG 0x14 50 #define OMAP_RTC_WEEKS_REG 0x18 51 52 #define OMAP_RTC_ALARM_SECONDS_REG 0x20 53 #define OMAP_RTC_ALARM_MINUTES_REG 0x24 54 #define OMAP_RTC_ALARM_HOURS_REG 0x28 55 #define OMAP_RTC_ALARM_DAYS_REG 0x2c 56 #define OMAP_RTC_ALARM_MONTHS_REG 0x30 57 #define OMAP_RTC_ALARM_YEARS_REG 0x34 58 59 #define OMAP_RTC_CTRL_REG 0x40 60 #define OMAP_RTC_STATUS_REG 0x44 61 #define OMAP_RTC_INTERRUPTS_REG 0x48 62 63 #define OMAP_RTC_COMP_LSB_REG 0x4c 64 #define OMAP_RTC_COMP_MSB_REG 0x50 65 #define OMAP_RTC_OSC_REG 0x54 66 67 /* OMAP_RTC_CTRL_REG bit fields: */ 68 #define OMAP_RTC_CTRL_SPLIT (1<<7) 69 #define OMAP_RTC_CTRL_DISABLE (1<<6) 70 #define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5) 71 #define OMAP_RTC_CTRL_TEST (1<<4) 72 #define OMAP_RTC_CTRL_MODE_12_24 (1<<3) 73 #define OMAP_RTC_CTRL_AUTO_COMP (1<<2) 74 #define OMAP_RTC_CTRL_ROUND_30S (1<<1) 75 #define OMAP_RTC_CTRL_STOP (1<<0) 76 77 /* OMAP_RTC_STATUS_REG bit fields: */ 78 #define OMAP_RTC_STATUS_POWER_UP (1<<7) 79 #define OMAP_RTC_STATUS_ALARM (1<<6) 80 #define OMAP_RTC_STATUS_1D_EVENT (1<<5) 81 #define OMAP_RTC_STATUS_1H_EVENT (1<<4) 82 #define OMAP_RTC_STATUS_1M_EVENT (1<<3) 83 #define OMAP_RTC_STATUS_1S_EVENT (1<<2) 84 #define OMAP_RTC_STATUS_RUN (1<<1) 85 #define OMAP_RTC_STATUS_BUSY (1<<0) 86 87 /* OMAP_RTC_INTERRUPTS_REG bit fields: */ 88 #define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3) 89 #define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2) 90 91 static void __iomem *rtc_base; 92 93 #define rtc_read(addr) __raw_readb(rtc_base + (addr)) 94 #define rtc_write(val, addr) __raw_writeb(val, rtc_base + (addr)) 95 96 97 /* we rely on the rtc framework to handle locking (rtc->ops_lock), 98 * so the only other requirement is that register accesses which 99 * require BUSY to be clear are made with IRQs locally disabled 100 */ 101 static void rtc_wait_not_busy(void) 102 { 103 int count = 0; 104 u8 status; 105 106 /* BUSY may stay active for 1/32768 second (~30 usec) */ 107 for (count = 0; count < 50; count++) { 108 status = rtc_read(OMAP_RTC_STATUS_REG); 109 if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0) 110 break; 111 udelay(1); 112 } 113 /* now we have ~15 usec to read/write various registers */ 114 } 115 116 static irqreturn_t rtc_irq(int irq, void *rtc) 117 { 118 unsigned long events = 0; 119 u8 irq_data; 120 121 irq_data = rtc_read(OMAP_RTC_STATUS_REG); 122 123 /* alarm irq? */ 124 if (irq_data & OMAP_RTC_STATUS_ALARM) { 125 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG); 126 events |= RTC_IRQF | RTC_AF; 127 } 128 129 /* 1/sec periodic/update irq? */ 130 if (irq_data & OMAP_RTC_STATUS_1S_EVENT) 131 events |= RTC_IRQF | RTC_UF; 132 133 rtc_update_irq(rtc, 1, events); 134 135 return IRQ_HANDLED; 136 } 137 138 #ifdef CONFIG_RTC_INTF_DEV 139 140 static int 141 omap_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) 142 { 143 u8 reg; 144 145 switch (cmd) { 146 case RTC_UIE_OFF: 147 case RTC_UIE_ON: 148 break; 149 default: 150 return -ENOIOCTLCMD; 151 } 152 153 local_irq_disable(); 154 rtc_wait_not_busy(); 155 reg = rtc_read(OMAP_RTC_INTERRUPTS_REG); 156 switch (cmd) { 157 /* UIE = Update Interrupt Enable (1/second) */ 158 case RTC_UIE_OFF: 159 reg &= ~OMAP_RTC_INTERRUPTS_IT_TIMER; 160 break; 161 case RTC_UIE_ON: 162 reg |= OMAP_RTC_INTERRUPTS_IT_TIMER; 163 break; 164 } 165 rtc_wait_not_busy(); 166 rtc_write(reg, OMAP_RTC_INTERRUPTS_REG); 167 local_irq_enable(); 168 169 return 0; 170 } 171 172 #else 173 #define omap_rtc_ioctl NULL 174 #endif 175 176 static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) 177 { 178 u8 reg; 179 180 local_irq_disable(); 181 rtc_wait_not_busy(); 182 reg = rtc_read(OMAP_RTC_INTERRUPTS_REG); 183 if (enabled) 184 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM; 185 else 186 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM; 187 rtc_wait_not_busy(); 188 rtc_write(reg, OMAP_RTC_INTERRUPTS_REG); 189 local_irq_enable(); 190 191 return 0; 192 } 193 194 /* this hardware doesn't support "don't care" alarm fields */ 195 static int tm2bcd(struct rtc_time *tm) 196 { 197 if (rtc_valid_tm(tm) != 0) 198 return -EINVAL; 199 200 tm->tm_sec = bin2bcd(tm->tm_sec); 201 tm->tm_min = bin2bcd(tm->tm_min); 202 tm->tm_hour = bin2bcd(tm->tm_hour); 203 tm->tm_mday = bin2bcd(tm->tm_mday); 204 205 tm->tm_mon = bin2bcd(tm->tm_mon + 1); 206 207 /* epoch == 1900 */ 208 if (tm->tm_year < 100 || tm->tm_year > 199) 209 return -EINVAL; 210 tm->tm_year = bin2bcd(tm->tm_year - 100); 211 212 return 0; 213 } 214 215 static void bcd2tm(struct rtc_time *tm) 216 { 217 tm->tm_sec = bcd2bin(tm->tm_sec); 218 tm->tm_min = bcd2bin(tm->tm_min); 219 tm->tm_hour = bcd2bin(tm->tm_hour); 220 tm->tm_mday = bcd2bin(tm->tm_mday); 221 tm->tm_mon = bcd2bin(tm->tm_mon) - 1; 222 /* epoch == 1900 */ 223 tm->tm_year = bcd2bin(tm->tm_year) + 100; 224 } 225 226 227 static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm) 228 { 229 /* we don't report wday/yday/isdst ... */ 230 local_irq_disable(); 231 rtc_wait_not_busy(); 232 233 tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG); 234 tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG); 235 tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG); 236 tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG); 237 tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG); 238 tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG); 239 240 local_irq_enable(); 241 242 bcd2tm(tm); 243 return 0; 244 } 245 246 static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm) 247 { 248 if (tm2bcd(tm) < 0) 249 return -EINVAL; 250 local_irq_disable(); 251 rtc_wait_not_busy(); 252 253 rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG); 254 rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG); 255 rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG); 256 rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG); 257 rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG); 258 rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG); 259 260 local_irq_enable(); 261 262 return 0; 263 } 264 265 static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) 266 { 267 local_irq_disable(); 268 rtc_wait_not_busy(); 269 270 alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG); 271 alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG); 272 alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG); 273 alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG); 274 alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG); 275 alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG); 276 277 local_irq_enable(); 278 279 bcd2tm(&alm->time); 280 alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG) 281 & OMAP_RTC_INTERRUPTS_IT_ALARM); 282 283 return 0; 284 } 285 286 static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) 287 { 288 u8 reg; 289 290 if (tm2bcd(&alm->time) < 0) 291 return -EINVAL; 292 293 local_irq_disable(); 294 rtc_wait_not_busy(); 295 296 rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG); 297 rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG); 298 rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG); 299 rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG); 300 rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG); 301 rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG); 302 303 reg = rtc_read(OMAP_RTC_INTERRUPTS_REG); 304 if (alm->enabled) 305 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM; 306 else 307 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM; 308 rtc_write(reg, OMAP_RTC_INTERRUPTS_REG); 309 310 local_irq_enable(); 311 312 return 0; 313 } 314 315 static struct rtc_class_ops omap_rtc_ops = { 316 .ioctl = omap_rtc_ioctl, 317 .read_time = omap_rtc_read_time, 318 .set_time = omap_rtc_set_time, 319 .read_alarm = omap_rtc_read_alarm, 320 .set_alarm = omap_rtc_set_alarm, 321 .alarm_irq_enable = omap_rtc_alarm_irq_enable, 322 }; 323 324 static int omap_rtc_alarm; 325 static int omap_rtc_timer; 326 327 static int __init omap_rtc_probe(struct platform_device *pdev) 328 { 329 struct resource *res, *mem; 330 struct rtc_device *rtc; 331 u8 reg, new_ctrl; 332 333 omap_rtc_timer = platform_get_irq(pdev, 0); 334 if (omap_rtc_timer <= 0) { 335 pr_debug("%s: no update irq?\n", pdev->name); 336 return -ENOENT; 337 } 338 339 omap_rtc_alarm = platform_get_irq(pdev, 1); 340 if (omap_rtc_alarm <= 0) { 341 pr_debug("%s: no alarm irq?\n", pdev->name); 342 return -ENOENT; 343 } 344 345 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 346 if (!res) { 347 pr_debug("%s: RTC resource data missing\n", pdev->name); 348 return -ENOENT; 349 } 350 351 mem = request_mem_region(res->start, resource_size(res), pdev->name); 352 if (!mem) { 353 pr_debug("%s: RTC registers at %08x are not free\n", 354 pdev->name, res->start); 355 return -EBUSY; 356 } 357 358 rtc_base = ioremap(res->start, resource_size(res)); 359 if (!rtc_base) { 360 pr_debug("%s: RTC registers can't be mapped\n", pdev->name); 361 goto fail; 362 } 363 364 rtc = rtc_device_register(pdev->name, &pdev->dev, 365 &omap_rtc_ops, THIS_MODULE); 366 if (IS_ERR(rtc)) { 367 pr_debug("%s: can't register RTC device, err %ld\n", 368 pdev->name, PTR_ERR(rtc)); 369 goto fail0; 370 } 371 platform_set_drvdata(pdev, rtc); 372 dev_set_drvdata(&rtc->dev, mem); 373 374 /* clear pending irqs, and set 1/second periodic, 375 * which we'll use instead of update irqs 376 */ 377 rtc_write(0, OMAP_RTC_INTERRUPTS_REG); 378 379 /* clear old status */ 380 reg = rtc_read(OMAP_RTC_STATUS_REG); 381 if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) { 382 pr_info("%s: RTC power up reset detected\n", 383 pdev->name); 384 rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG); 385 } 386 if (reg & (u8) OMAP_RTC_STATUS_ALARM) 387 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG); 388 389 /* handle periodic and alarm irqs */ 390 if (request_irq(omap_rtc_timer, rtc_irq, IRQF_DISABLED, 391 dev_name(&rtc->dev), rtc)) { 392 pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n", 393 pdev->name, omap_rtc_timer); 394 goto fail1; 395 } 396 if ((omap_rtc_timer != omap_rtc_alarm) && 397 (request_irq(omap_rtc_alarm, rtc_irq, IRQF_DISABLED, 398 dev_name(&rtc->dev), rtc))) { 399 pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n", 400 pdev->name, omap_rtc_alarm); 401 goto fail2; 402 } 403 404 /* On boards with split power, RTC_ON_NOFF won't reset the RTC */ 405 reg = rtc_read(OMAP_RTC_CTRL_REG); 406 if (reg & (u8) OMAP_RTC_CTRL_STOP) 407 pr_info("%s: already running\n", pdev->name); 408 409 /* force to 24 hour mode */ 410 new_ctrl = reg & ~(OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP); 411 new_ctrl |= OMAP_RTC_CTRL_STOP; 412 413 /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE: 414 * 415 * - Device wake-up capability setting should come through chip 416 * init logic. OMAP1 boards should initialize the "wakeup capable" 417 * flag in the platform device if the board is wired right for 418 * being woken up by RTC alarm. For OMAP-L138, this capability 419 * is built into the SoC by the "Deep Sleep" capability. 420 * 421 * - Boards wired so RTC_ON_nOFF is used as the reset signal, 422 * rather than nPWRON_RESET, should forcibly enable split 423 * power mode. (Some chip errata report that RTC_CTRL_SPLIT 424 * is write-only, and always reads as zero...) 425 */ 426 427 if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT) 428 pr_info("%s: split power mode\n", pdev->name); 429 430 if (reg != new_ctrl) 431 rtc_write(new_ctrl, OMAP_RTC_CTRL_REG); 432 433 return 0; 434 435 fail2: 436 free_irq(omap_rtc_timer, NULL); 437 fail1: 438 rtc_device_unregister(rtc); 439 fail0: 440 iounmap(rtc_base); 441 fail: 442 release_mem_region(mem->start, resource_size(mem)); 443 return -EIO; 444 } 445 446 static int __exit omap_rtc_remove(struct platform_device *pdev) 447 { 448 struct rtc_device *rtc = platform_get_drvdata(pdev); 449 struct resource *mem = dev_get_drvdata(&rtc->dev); 450 451 device_init_wakeup(&pdev->dev, 0); 452 453 /* leave rtc running, but disable irqs */ 454 rtc_write(0, OMAP_RTC_INTERRUPTS_REG); 455 456 free_irq(omap_rtc_timer, rtc); 457 458 if (omap_rtc_timer != omap_rtc_alarm) 459 free_irq(omap_rtc_alarm, rtc); 460 461 rtc_device_unregister(rtc); 462 iounmap(rtc_base); 463 release_mem_region(mem->start, resource_size(mem)); 464 return 0; 465 } 466 467 #ifdef CONFIG_PM 468 469 static u8 irqstat; 470 471 static int omap_rtc_suspend(struct platform_device *pdev, pm_message_t state) 472 { 473 irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG); 474 475 /* FIXME the RTC alarm is not currently acting as a wakeup event 476 * source, and in fact this enable() call is just saving a flag 477 * that's never used... 478 */ 479 if (device_may_wakeup(&pdev->dev)) 480 enable_irq_wake(omap_rtc_alarm); 481 else 482 rtc_write(0, OMAP_RTC_INTERRUPTS_REG); 483 484 return 0; 485 } 486 487 static int omap_rtc_resume(struct platform_device *pdev) 488 { 489 if (device_may_wakeup(&pdev->dev)) 490 disable_irq_wake(omap_rtc_alarm); 491 else 492 rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG); 493 return 0; 494 } 495 496 #else 497 #define omap_rtc_suspend NULL 498 #define omap_rtc_resume NULL 499 #endif 500 501 static void omap_rtc_shutdown(struct platform_device *pdev) 502 { 503 rtc_write(0, OMAP_RTC_INTERRUPTS_REG); 504 } 505 506 MODULE_ALIAS("platform:omap_rtc"); 507 static struct platform_driver omap_rtc_driver = { 508 .remove = __exit_p(omap_rtc_remove), 509 .suspend = omap_rtc_suspend, 510 .resume = omap_rtc_resume, 511 .shutdown = omap_rtc_shutdown, 512 .driver = { 513 .name = "omap_rtc", 514 .owner = THIS_MODULE, 515 }, 516 }; 517 518 static int __init rtc_init(void) 519 { 520 return platform_driver_probe(&omap_rtc_driver, omap_rtc_probe); 521 } 522 module_init(rtc_init); 523 524 static void __exit rtc_exit(void) 525 { 526 platform_driver_unregister(&omap_rtc_driver); 527 } 528 module_exit(rtc_exit); 529 530 MODULE_AUTHOR("George G. Davis (and others)"); 531 MODULE_LICENSE("GPL"); 532