1 /* 2 * TI OMAP1 Real Time Clock interface for Linux 3 * 4 * Copyright (C) 2003 MontaVista Software, Inc. 5 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com> 6 * 7 * Copyright (C) 2006 David Brownell (new RTC framework) 8 * 9 * This program is free software; you can redistribute it and/or 10 * modify it under the terms of the GNU General Public License 11 * as published by the Free Software Foundation; either version 12 * 2 of the License, or (at your option) any later version. 13 */ 14 15 #include <linux/kernel.h> 16 #include <linux/init.h> 17 #include <linux/module.h> 18 #include <linux/ioport.h> 19 #include <linux/delay.h> 20 #include <linux/rtc.h> 21 #include <linux/bcd.h> 22 #include <linux/platform_device.h> 23 24 #include <asm/io.h> 25 26 27 /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock 28 * with century-range alarm matching, driven by the 32kHz clock. 29 * 30 * The main user-visible ways it differs from PC RTCs are by omitting 31 * "don't care" alarm fields and sub-second periodic IRQs, and having 32 * an autoadjust mechanism to calibrate to the true oscillator rate. 33 * 34 * Board-specific wiring options include using split power mode with 35 * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset), 36 * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from 37 * low power modes) for OMAP1 boards (OMAP-L138 has this built into 38 * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment. 39 */ 40 41 #define OMAP_RTC_BASE 0xfffb4800 42 43 /* RTC registers */ 44 #define OMAP_RTC_SECONDS_REG 0x00 45 #define OMAP_RTC_MINUTES_REG 0x04 46 #define OMAP_RTC_HOURS_REG 0x08 47 #define OMAP_RTC_DAYS_REG 0x0C 48 #define OMAP_RTC_MONTHS_REG 0x10 49 #define OMAP_RTC_YEARS_REG 0x14 50 #define OMAP_RTC_WEEKS_REG 0x18 51 52 #define OMAP_RTC_ALARM_SECONDS_REG 0x20 53 #define OMAP_RTC_ALARM_MINUTES_REG 0x24 54 #define OMAP_RTC_ALARM_HOURS_REG 0x28 55 #define OMAP_RTC_ALARM_DAYS_REG 0x2c 56 #define OMAP_RTC_ALARM_MONTHS_REG 0x30 57 #define OMAP_RTC_ALARM_YEARS_REG 0x34 58 59 #define OMAP_RTC_CTRL_REG 0x40 60 #define OMAP_RTC_STATUS_REG 0x44 61 #define OMAP_RTC_INTERRUPTS_REG 0x48 62 63 #define OMAP_RTC_COMP_LSB_REG 0x4c 64 #define OMAP_RTC_COMP_MSB_REG 0x50 65 #define OMAP_RTC_OSC_REG 0x54 66 67 /* OMAP_RTC_CTRL_REG bit fields: */ 68 #define OMAP_RTC_CTRL_SPLIT (1<<7) 69 #define OMAP_RTC_CTRL_DISABLE (1<<6) 70 #define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5) 71 #define OMAP_RTC_CTRL_TEST (1<<4) 72 #define OMAP_RTC_CTRL_MODE_12_24 (1<<3) 73 #define OMAP_RTC_CTRL_AUTO_COMP (1<<2) 74 #define OMAP_RTC_CTRL_ROUND_30S (1<<1) 75 #define OMAP_RTC_CTRL_STOP (1<<0) 76 77 /* OMAP_RTC_STATUS_REG bit fields: */ 78 #define OMAP_RTC_STATUS_POWER_UP (1<<7) 79 #define OMAP_RTC_STATUS_ALARM (1<<6) 80 #define OMAP_RTC_STATUS_1D_EVENT (1<<5) 81 #define OMAP_RTC_STATUS_1H_EVENT (1<<4) 82 #define OMAP_RTC_STATUS_1M_EVENT (1<<3) 83 #define OMAP_RTC_STATUS_1S_EVENT (1<<2) 84 #define OMAP_RTC_STATUS_RUN (1<<1) 85 #define OMAP_RTC_STATUS_BUSY (1<<0) 86 87 /* OMAP_RTC_INTERRUPTS_REG bit fields: */ 88 #define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3) 89 #define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2) 90 91 static void __iomem *rtc_base; 92 93 #define rtc_read(addr) __raw_readb(rtc_base + (addr)) 94 #define rtc_write(val, addr) __raw_writeb(val, rtc_base + (addr)) 95 96 97 /* we rely on the rtc framework to handle locking (rtc->ops_lock), 98 * so the only other requirement is that register accesses which 99 * require BUSY to be clear are made with IRQs locally disabled 100 */ 101 static void rtc_wait_not_busy(void) 102 { 103 int count = 0; 104 u8 status; 105 106 /* BUSY may stay active for 1/32768 second (~30 usec) */ 107 for (count = 0; count < 50; count++) { 108 status = rtc_read(OMAP_RTC_STATUS_REG); 109 if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0) 110 break; 111 udelay(1); 112 } 113 /* now we have ~15 usec to read/write various registers */ 114 } 115 116 static irqreturn_t rtc_irq(int irq, void *rtc) 117 { 118 unsigned long events = 0; 119 u8 irq_data; 120 121 irq_data = rtc_read(OMAP_RTC_STATUS_REG); 122 123 /* alarm irq? */ 124 if (irq_data & OMAP_RTC_STATUS_ALARM) { 125 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG); 126 events |= RTC_IRQF | RTC_AF; 127 } 128 129 /* 1/sec periodic/update irq? */ 130 if (irq_data & OMAP_RTC_STATUS_1S_EVENT) 131 events |= RTC_IRQF | RTC_UF; 132 133 rtc_update_irq(rtc, 1, events); 134 135 return IRQ_HANDLED; 136 } 137 138 #ifdef CONFIG_RTC_INTF_DEV 139 140 static int 141 omap_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) 142 { 143 u8 reg; 144 145 switch (cmd) { 146 case RTC_AIE_OFF: 147 case RTC_AIE_ON: 148 case RTC_UIE_OFF: 149 case RTC_UIE_ON: 150 break; 151 default: 152 return -ENOIOCTLCMD; 153 } 154 155 local_irq_disable(); 156 rtc_wait_not_busy(); 157 reg = rtc_read(OMAP_RTC_INTERRUPTS_REG); 158 switch (cmd) { 159 /* AIE = Alarm Interrupt Enable */ 160 case RTC_AIE_OFF: 161 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM; 162 break; 163 case RTC_AIE_ON: 164 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM; 165 break; 166 /* UIE = Update Interrupt Enable (1/second) */ 167 case RTC_UIE_OFF: 168 reg &= ~OMAP_RTC_INTERRUPTS_IT_TIMER; 169 break; 170 case RTC_UIE_ON: 171 reg |= OMAP_RTC_INTERRUPTS_IT_TIMER; 172 break; 173 } 174 rtc_wait_not_busy(); 175 rtc_write(reg, OMAP_RTC_INTERRUPTS_REG); 176 local_irq_enable(); 177 178 return 0; 179 } 180 181 #else 182 #define omap_rtc_ioctl NULL 183 #endif 184 185 /* this hardware doesn't support "don't care" alarm fields */ 186 static int tm2bcd(struct rtc_time *tm) 187 { 188 if (rtc_valid_tm(tm) != 0) 189 return -EINVAL; 190 191 tm->tm_sec = bin2bcd(tm->tm_sec); 192 tm->tm_min = bin2bcd(tm->tm_min); 193 tm->tm_hour = bin2bcd(tm->tm_hour); 194 tm->tm_mday = bin2bcd(tm->tm_mday); 195 196 tm->tm_mon = bin2bcd(tm->tm_mon + 1); 197 198 /* epoch == 1900 */ 199 if (tm->tm_year < 100 || tm->tm_year > 199) 200 return -EINVAL; 201 tm->tm_year = bin2bcd(tm->tm_year - 100); 202 203 return 0; 204 } 205 206 static void bcd2tm(struct rtc_time *tm) 207 { 208 tm->tm_sec = bcd2bin(tm->tm_sec); 209 tm->tm_min = bcd2bin(tm->tm_min); 210 tm->tm_hour = bcd2bin(tm->tm_hour); 211 tm->tm_mday = bcd2bin(tm->tm_mday); 212 tm->tm_mon = bcd2bin(tm->tm_mon) - 1; 213 /* epoch == 1900 */ 214 tm->tm_year = bcd2bin(tm->tm_year) + 100; 215 } 216 217 218 static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm) 219 { 220 /* we don't report wday/yday/isdst ... */ 221 local_irq_disable(); 222 rtc_wait_not_busy(); 223 224 tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG); 225 tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG); 226 tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG); 227 tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG); 228 tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG); 229 tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG); 230 231 local_irq_enable(); 232 233 bcd2tm(tm); 234 return 0; 235 } 236 237 static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm) 238 { 239 if (tm2bcd(tm) < 0) 240 return -EINVAL; 241 local_irq_disable(); 242 rtc_wait_not_busy(); 243 244 rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG); 245 rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG); 246 rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG); 247 rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG); 248 rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG); 249 rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG); 250 251 local_irq_enable(); 252 253 return 0; 254 } 255 256 static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) 257 { 258 local_irq_disable(); 259 rtc_wait_not_busy(); 260 261 alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG); 262 alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG); 263 alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG); 264 alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG); 265 alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG); 266 alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG); 267 268 local_irq_enable(); 269 270 bcd2tm(&alm->time); 271 alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG) 272 & OMAP_RTC_INTERRUPTS_IT_ALARM); 273 274 return 0; 275 } 276 277 static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) 278 { 279 u8 reg; 280 281 if (tm2bcd(&alm->time) < 0) 282 return -EINVAL; 283 284 local_irq_disable(); 285 rtc_wait_not_busy(); 286 287 rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG); 288 rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG); 289 rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG); 290 rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG); 291 rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG); 292 rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG); 293 294 reg = rtc_read(OMAP_RTC_INTERRUPTS_REG); 295 if (alm->enabled) 296 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM; 297 else 298 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM; 299 rtc_write(reg, OMAP_RTC_INTERRUPTS_REG); 300 301 local_irq_enable(); 302 303 return 0; 304 } 305 306 static struct rtc_class_ops omap_rtc_ops = { 307 .ioctl = omap_rtc_ioctl, 308 .read_time = omap_rtc_read_time, 309 .set_time = omap_rtc_set_time, 310 .read_alarm = omap_rtc_read_alarm, 311 .set_alarm = omap_rtc_set_alarm, 312 }; 313 314 static int omap_rtc_alarm; 315 static int omap_rtc_timer; 316 317 static int __init omap_rtc_probe(struct platform_device *pdev) 318 { 319 struct resource *res, *mem; 320 struct rtc_device *rtc; 321 u8 reg, new_ctrl; 322 323 omap_rtc_timer = platform_get_irq(pdev, 0); 324 if (omap_rtc_timer <= 0) { 325 pr_debug("%s: no update irq?\n", pdev->name); 326 return -ENOENT; 327 } 328 329 omap_rtc_alarm = platform_get_irq(pdev, 1); 330 if (omap_rtc_alarm <= 0) { 331 pr_debug("%s: no alarm irq?\n", pdev->name); 332 return -ENOENT; 333 } 334 335 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 336 if (!res) { 337 pr_debug("%s: RTC resource data missing\n", pdev->name); 338 return -ENOENT; 339 } 340 341 mem = request_mem_region(res->start, resource_size(res), pdev->name); 342 if (!mem) { 343 pr_debug("%s: RTC registers at %08x are not free\n", 344 pdev->name, res->start); 345 return -EBUSY; 346 } 347 348 rtc_base = ioremap(res->start, resource_size(res)); 349 if (!rtc_base) { 350 pr_debug("%s: RTC registers can't be mapped\n", pdev->name); 351 goto fail; 352 } 353 354 rtc = rtc_device_register(pdev->name, &pdev->dev, 355 &omap_rtc_ops, THIS_MODULE); 356 if (IS_ERR(rtc)) { 357 pr_debug("%s: can't register RTC device, err %ld\n", 358 pdev->name, PTR_ERR(rtc)); 359 goto fail0; 360 } 361 platform_set_drvdata(pdev, rtc); 362 dev_set_drvdata(&rtc->dev, mem); 363 364 /* clear pending irqs, and set 1/second periodic, 365 * which we'll use instead of update irqs 366 */ 367 rtc_write(0, OMAP_RTC_INTERRUPTS_REG); 368 369 /* clear old status */ 370 reg = rtc_read(OMAP_RTC_STATUS_REG); 371 if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) { 372 pr_info("%s: RTC power up reset detected\n", 373 pdev->name); 374 rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG); 375 } 376 if (reg & (u8) OMAP_RTC_STATUS_ALARM) 377 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG); 378 379 /* handle periodic and alarm irqs */ 380 if (request_irq(omap_rtc_timer, rtc_irq, IRQF_DISABLED, 381 dev_name(&rtc->dev), rtc)) { 382 pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n", 383 pdev->name, omap_rtc_timer); 384 goto fail1; 385 } 386 if ((omap_rtc_timer != omap_rtc_alarm) && 387 (request_irq(omap_rtc_alarm, rtc_irq, IRQF_DISABLED, 388 dev_name(&rtc->dev), rtc))) { 389 pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n", 390 pdev->name, omap_rtc_alarm); 391 goto fail2; 392 } 393 394 /* On boards with split power, RTC_ON_NOFF won't reset the RTC */ 395 reg = rtc_read(OMAP_RTC_CTRL_REG); 396 if (reg & (u8) OMAP_RTC_CTRL_STOP) 397 pr_info("%s: already running\n", pdev->name); 398 399 /* force to 24 hour mode */ 400 new_ctrl = reg & ~(OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP); 401 new_ctrl |= OMAP_RTC_CTRL_STOP; 402 403 /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE: 404 * 405 * - Device wake-up capability setting should come through chip 406 * init logic. OMAP1 boards should initialize the "wakeup capable" 407 * flag in the platform device if the board is wired right for 408 * being woken up by RTC alarm. For OMAP-L138, this capability 409 * is built into the SoC by the "Deep Sleep" capability. 410 * 411 * - Boards wired so RTC_ON_nOFF is used as the reset signal, 412 * rather than nPWRON_RESET, should forcibly enable split 413 * power mode. (Some chip errata report that RTC_CTRL_SPLIT 414 * is write-only, and always reads as zero...) 415 */ 416 417 if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT) 418 pr_info("%s: split power mode\n", pdev->name); 419 420 if (reg != new_ctrl) 421 rtc_write(new_ctrl, OMAP_RTC_CTRL_REG); 422 423 return 0; 424 425 fail2: 426 free_irq(omap_rtc_timer, NULL); 427 fail1: 428 rtc_device_unregister(rtc); 429 fail0: 430 iounmap(rtc_base); 431 fail: 432 release_resource(mem); 433 return -EIO; 434 } 435 436 static int __exit omap_rtc_remove(struct platform_device *pdev) 437 { 438 struct rtc_device *rtc = platform_get_drvdata(pdev); 439 440 device_init_wakeup(&pdev->dev, 0); 441 442 /* leave rtc running, but disable irqs */ 443 rtc_write(0, OMAP_RTC_INTERRUPTS_REG); 444 445 free_irq(omap_rtc_timer, rtc); 446 447 if (omap_rtc_timer != omap_rtc_alarm) 448 free_irq(omap_rtc_alarm, rtc); 449 450 release_resource(dev_get_drvdata(&rtc->dev)); 451 rtc_device_unregister(rtc); 452 return 0; 453 } 454 455 #ifdef CONFIG_PM 456 457 static u8 irqstat; 458 459 static int omap_rtc_suspend(struct platform_device *pdev, pm_message_t state) 460 { 461 irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG); 462 463 /* FIXME the RTC alarm is not currently acting as a wakeup event 464 * source, and in fact this enable() call is just saving a flag 465 * that's never used... 466 */ 467 if (device_may_wakeup(&pdev->dev)) 468 enable_irq_wake(omap_rtc_alarm); 469 else 470 rtc_write(0, OMAP_RTC_INTERRUPTS_REG); 471 472 return 0; 473 } 474 475 static int omap_rtc_resume(struct platform_device *pdev) 476 { 477 if (device_may_wakeup(&pdev->dev)) 478 disable_irq_wake(omap_rtc_alarm); 479 else 480 rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG); 481 return 0; 482 } 483 484 #else 485 #define omap_rtc_suspend NULL 486 #define omap_rtc_resume NULL 487 #endif 488 489 static void omap_rtc_shutdown(struct platform_device *pdev) 490 { 491 rtc_write(0, OMAP_RTC_INTERRUPTS_REG); 492 } 493 494 MODULE_ALIAS("platform:omap_rtc"); 495 static struct platform_driver omap_rtc_driver = { 496 .remove = __exit_p(omap_rtc_remove), 497 .suspend = omap_rtc_suspend, 498 .resume = omap_rtc_resume, 499 .shutdown = omap_rtc_shutdown, 500 .driver = { 501 .name = "omap_rtc", 502 .owner = THIS_MODULE, 503 }, 504 }; 505 506 static int __init rtc_init(void) 507 { 508 return platform_driver_probe(&omap_rtc_driver, omap_rtc_probe); 509 } 510 module_init(rtc_init); 511 512 static void __exit rtc_exit(void) 513 { 514 platform_driver_unregister(&omap_rtc_driver); 515 } 516 module_exit(rtc_exit); 517 518 MODULE_AUTHOR("George G. Davis (and others)"); 519 MODULE_LICENSE("GPL"); 520