1 // SPDX-License-Identifier: GPL-2.0+ 2 // 3 // Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved. 4 5 #include <linux/io.h> 6 #include <linux/rtc.h> 7 #include <linux/module.h> 8 #include <linux/slab.h> 9 #include <linux/interrupt.h> 10 #include <linux/platform_device.h> 11 #include <linux/pm_wakeirq.h> 12 #include <linux/clk.h> 13 #include <linux/of.h> 14 #include <linux/of_device.h> 15 16 #define RTC_INPUT_CLK_32768HZ (0x00 << 5) 17 #define RTC_INPUT_CLK_32000HZ (0x01 << 5) 18 #define RTC_INPUT_CLK_38400HZ (0x02 << 5) 19 20 #define RTC_SW_BIT (1 << 0) 21 #define RTC_ALM_BIT (1 << 2) 22 #define RTC_1HZ_BIT (1 << 4) 23 #define RTC_2HZ_BIT (1 << 7) 24 #define RTC_SAM0_BIT (1 << 8) 25 #define RTC_SAM1_BIT (1 << 9) 26 #define RTC_SAM2_BIT (1 << 10) 27 #define RTC_SAM3_BIT (1 << 11) 28 #define RTC_SAM4_BIT (1 << 12) 29 #define RTC_SAM5_BIT (1 << 13) 30 #define RTC_SAM6_BIT (1 << 14) 31 #define RTC_SAM7_BIT (1 << 15) 32 #define PIT_ALL_ON (RTC_2HZ_BIT | RTC_SAM0_BIT | RTC_SAM1_BIT | \ 33 RTC_SAM2_BIT | RTC_SAM3_BIT | RTC_SAM4_BIT | \ 34 RTC_SAM5_BIT | RTC_SAM6_BIT | RTC_SAM7_BIT) 35 36 #define RTC_ENABLE_BIT (1 << 7) 37 38 #define MAX_PIE_NUM 9 39 #define MAX_PIE_FREQ 512 40 41 #define MXC_RTC_TIME 0 42 #define MXC_RTC_ALARM 1 43 44 #define RTC_HOURMIN 0x00 /* 32bit rtc hour/min counter reg */ 45 #define RTC_SECOND 0x04 /* 32bit rtc seconds counter reg */ 46 #define RTC_ALRM_HM 0x08 /* 32bit rtc alarm hour/min reg */ 47 #define RTC_ALRM_SEC 0x0C /* 32bit rtc alarm seconds reg */ 48 #define RTC_RTCCTL 0x10 /* 32bit rtc control reg */ 49 #define RTC_RTCISR 0x14 /* 32bit rtc interrupt status reg */ 50 #define RTC_RTCIENR 0x18 /* 32bit rtc interrupt enable reg */ 51 #define RTC_STPWCH 0x1C /* 32bit rtc stopwatch min reg */ 52 #define RTC_DAYR 0x20 /* 32bit rtc days counter reg */ 53 #define RTC_DAYALARM 0x24 /* 32bit rtc day alarm reg */ 54 #define RTC_TEST1 0x28 /* 32bit rtc test reg 1 */ 55 #define RTC_TEST2 0x2C /* 32bit rtc test reg 2 */ 56 #define RTC_TEST3 0x30 /* 32bit rtc test reg 3 */ 57 58 enum imx_rtc_type { 59 IMX1_RTC, 60 IMX21_RTC, 61 }; 62 63 struct rtc_plat_data { 64 struct rtc_device *rtc; 65 void __iomem *ioaddr; 66 int irq; 67 struct clk *clk_ref; 68 struct clk *clk_ipg; 69 struct rtc_time g_rtc_alarm; 70 enum imx_rtc_type devtype; 71 }; 72 73 static const struct platform_device_id imx_rtc_devtype[] = { 74 { 75 .name = "imx1-rtc", 76 .driver_data = IMX1_RTC, 77 }, { 78 .name = "imx21-rtc", 79 .driver_data = IMX21_RTC, 80 }, { 81 /* sentinel */ 82 } 83 }; 84 MODULE_DEVICE_TABLE(platform, imx_rtc_devtype); 85 86 #ifdef CONFIG_OF 87 static const struct of_device_id imx_rtc_dt_ids[] = { 88 { .compatible = "fsl,imx1-rtc", .data = (const void *)IMX1_RTC }, 89 { .compatible = "fsl,imx21-rtc", .data = (const void *)IMX21_RTC }, 90 {} 91 }; 92 MODULE_DEVICE_TABLE(of, imx_rtc_dt_ids); 93 #endif 94 95 static inline int is_imx1_rtc(struct rtc_plat_data *data) 96 { 97 return data->devtype == IMX1_RTC; 98 } 99 100 /* 101 * This function is used to obtain the RTC time or the alarm value in 102 * second. 103 */ 104 static time64_t get_alarm_or_time(struct device *dev, int time_alarm) 105 { 106 struct rtc_plat_data *pdata = dev_get_drvdata(dev); 107 void __iomem *ioaddr = pdata->ioaddr; 108 u32 day = 0, hr = 0, min = 0, sec = 0, hr_min = 0; 109 110 switch (time_alarm) { 111 case MXC_RTC_TIME: 112 day = readw(ioaddr + RTC_DAYR); 113 hr_min = readw(ioaddr + RTC_HOURMIN); 114 sec = readw(ioaddr + RTC_SECOND); 115 break; 116 case MXC_RTC_ALARM: 117 day = readw(ioaddr + RTC_DAYALARM); 118 hr_min = readw(ioaddr + RTC_ALRM_HM) & 0xffff; 119 sec = readw(ioaddr + RTC_ALRM_SEC); 120 break; 121 } 122 123 hr = hr_min >> 8; 124 min = hr_min & 0xff; 125 126 return ((((time64_t)day * 24 + hr) * 60) + min) * 60 + sec; 127 } 128 129 /* 130 * This function sets the RTC alarm value or the time value. 131 */ 132 static void set_alarm_or_time(struct device *dev, int time_alarm, time64_t time) 133 { 134 u32 tod, day, hr, min, sec, temp; 135 struct rtc_plat_data *pdata = dev_get_drvdata(dev); 136 void __iomem *ioaddr = pdata->ioaddr; 137 138 day = div_s64_rem(time, 86400, &tod); 139 140 /* time is within a day now */ 141 hr = tod / 3600; 142 tod -= hr * 3600; 143 144 /* time is within an hour now */ 145 min = tod / 60; 146 sec = tod - min * 60; 147 148 temp = (hr << 8) + min; 149 150 switch (time_alarm) { 151 case MXC_RTC_TIME: 152 writew(day, ioaddr + RTC_DAYR); 153 writew(sec, ioaddr + RTC_SECOND); 154 writew(temp, ioaddr + RTC_HOURMIN); 155 break; 156 case MXC_RTC_ALARM: 157 writew(day, ioaddr + RTC_DAYALARM); 158 writew(sec, ioaddr + RTC_ALRM_SEC); 159 writew(temp, ioaddr + RTC_ALRM_HM); 160 break; 161 } 162 } 163 164 /* 165 * This function updates the RTC alarm registers and then clears all the 166 * interrupt status bits. 167 */ 168 static void rtc_update_alarm(struct device *dev, struct rtc_time *alrm) 169 { 170 time64_t time; 171 struct rtc_plat_data *pdata = dev_get_drvdata(dev); 172 void __iomem *ioaddr = pdata->ioaddr; 173 174 time = rtc_tm_to_time64(alrm); 175 176 /* clear all the interrupt status bits */ 177 writew(readw(ioaddr + RTC_RTCISR), ioaddr + RTC_RTCISR); 178 set_alarm_or_time(dev, MXC_RTC_ALARM, time); 179 } 180 181 static void mxc_rtc_irq_enable(struct device *dev, unsigned int bit, 182 unsigned int enabled) 183 { 184 struct rtc_plat_data *pdata = dev_get_drvdata(dev); 185 void __iomem *ioaddr = pdata->ioaddr; 186 u32 reg; 187 188 spin_lock_irq(&pdata->rtc->irq_lock); 189 reg = readw(ioaddr + RTC_RTCIENR); 190 191 if (enabled) 192 reg |= bit; 193 else 194 reg &= ~bit; 195 196 writew(reg, ioaddr + RTC_RTCIENR); 197 spin_unlock_irq(&pdata->rtc->irq_lock); 198 } 199 200 /* This function is the RTC interrupt service routine. */ 201 static irqreturn_t mxc_rtc_interrupt(int irq, void *dev_id) 202 { 203 struct platform_device *pdev = dev_id; 204 struct rtc_plat_data *pdata = platform_get_drvdata(pdev); 205 void __iomem *ioaddr = pdata->ioaddr; 206 unsigned long flags; 207 u32 status; 208 u32 events = 0; 209 210 spin_lock_irqsave(&pdata->rtc->irq_lock, flags); 211 status = readw(ioaddr + RTC_RTCISR) & readw(ioaddr + RTC_RTCIENR); 212 /* clear interrupt sources */ 213 writew(status, ioaddr + RTC_RTCISR); 214 215 /* update irq data & counter */ 216 if (status & RTC_ALM_BIT) { 217 events |= (RTC_AF | RTC_IRQF); 218 /* RTC alarm should be one-shot */ 219 mxc_rtc_irq_enable(&pdev->dev, RTC_ALM_BIT, 0); 220 } 221 222 if (status & PIT_ALL_ON) 223 events |= (RTC_PF | RTC_IRQF); 224 225 rtc_update_irq(pdata->rtc, 1, events); 226 spin_unlock_irqrestore(&pdata->rtc->irq_lock, flags); 227 228 return IRQ_HANDLED; 229 } 230 231 static int mxc_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) 232 { 233 mxc_rtc_irq_enable(dev, RTC_ALM_BIT, enabled); 234 return 0; 235 } 236 237 /* 238 * This function reads the current RTC time into tm in Gregorian date. 239 */ 240 static int mxc_rtc_read_time(struct device *dev, struct rtc_time *tm) 241 { 242 time64_t val; 243 244 /* Avoid roll-over from reading the different registers */ 245 do { 246 val = get_alarm_or_time(dev, MXC_RTC_TIME); 247 } while (val != get_alarm_or_time(dev, MXC_RTC_TIME)); 248 249 rtc_time64_to_tm(val, tm); 250 251 return 0; 252 } 253 254 /* 255 * This function sets the internal RTC time based on tm in Gregorian date. 256 */ 257 static int mxc_rtc_set_time(struct device *dev, struct rtc_time *tm) 258 { 259 time64_t time = rtc_tm_to_time64(tm); 260 261 /* Avoid roll-over from reading the different registers */ 262 do { 263 set_alarm_or_time(dev, MXC_RTC_TIME, time); 264 } while (time != get_alarm_or_time(dev, MXC_RTC_TIME)); 265 266 return 0; 267 } 268 269 /* 270 * This function reads the current alarm value into the passed in 'alrm' 271 * argument. It updates the alrm's pending field value based on the whether 272 * an alarm interrupt occurs or not. 273 */ 274 static int mxc_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 275 { 276 struct rtc_plat_data *pdata = dev_get_drvdata(dev); 277 void __iomem *ioaddr = pdata->ioaddr; 278 279 rtc_time64_to_tm(get_alarm_or_time(dev, MXC_RTC_ALARM), &alrm->time); 280 alrm->pending = ((readw(ioaddr + RTC_RTCISR) & RTC_ALM_BIT)) ? 1 : 0; 281 282 return 0; 283 } 284 285 /* 286 * This function sets the RTC alarm based on passed in alrm. 287 */ 288 static int mxc_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 289 { 290 struct rtc_plat_data *pdata = dev_get_drvdata(dev); 291 292 rtc_update_alarm(dev, &alrm->time); 293 294 memcpy(&pdata->g_rtc_alarm, &alrm->time, sizeof(struct rtc_time)); 295 mxc_rtc_irq_enable(dev, RTC_ALM_BIT, alrm->enabled); 296 297 return 0; 298 } 299 300 /* RTC layer */ 301 static const struct rtc_class_ops mxc_rtc_ops = { 302 .read_time = mxc_rtc_read_time, 303 .set_time = mxc_rtc_set_time, 304 .read_alarm = mxc_rtc_read_alarm, 305 .set_alarm = mxc_rtc_set_alarm, 306 .alarm_irq_enable = mxc_rtc_alarm_irq_enable, 307 }; 308 309 static int mxc_rtc_probe(struct platform_device *pdev) 310 { 311 struct rtc_device *rtc; 312 struct rtc_plat_data *pdata = NULL; 313 u32 reg; 314 unsigned long rate; 315 int ret; 316 const struct of_device_id *of_id; 317 318 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 319 if (!pdata) 320 return -ENOMEM; 321 322 of_id = of_match_device(imx_rtc_dt_ids, &pdev->dev); 323 if (of_id) 324 pdata->devtype = (enum imx_rtc_type)of_id->data; 325 else 326 pdata->devtype = pdev->id_entry->driver_data; 327 328 pdata->ioaddr = devm_platform_ioremap_resource(pdev, 0); 329 if (IS_ERR(pdata->ioaddr)) 330 return PTR_ERR(pdata->ioaddr); 331 332 rtc = devm_rtc_allocate_device(&pdev->dev); 333 if (IS_ERR(rtc)) 334 return PTR_ERR(rtc); 335 336 pdata->rtc = rtc; 337 rtc->ops = &mxc_rtc_ops; 338 if (is_imx1_rtc(pdata)) { 339 struct rtc_time tm; 340 341 /* 9bit days + hours minutes seconds */ 342 rtc->range_max = (1 << 9) * 86400 - 1; 343 344 /* 345 * Set the start date as beginning of the current year. This can 346 * be overridden using device tree. 347 */ 348 rtc_time64_to_tm(ktime_get_real_seconds(), &tm); 349 rtc->start_secs = mktime64(tm.tm_year, 1, 1, 0, 0, 0); 350 rtc->set_start_time = true; 351 } else { 352 /* 16bit days + hours minutes seconds */ 353 rtc->range_max = (1 << 16) * 86400ULL - 1; 354 } 355 356 pdata->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); 357 if (IS_ERR(pdata->clk_ipg)) { 358 dev_err(&pdev->dev, "unable to get ipg clock!\n"); 359 return PTR_ERR(pdata->clk_ipg); 360 } 361 362 ret = clk_prepare_enable(pdata->clk_ipg); 363 if (ret) 364 return ret; 365 366 pdata->clk_ref = devm_clk_get(&pdev->dev, "ref"); 367 if (IS_ERR(pdata->clk_ref)) { 368 dev_err(&pdev->dev, "unable to get ref clock!\n"); 369 ret = PTR_ERR(pdata->clk_ref); 370 goto exit_put_clk_ipg; 371 } 372 373 ret = clk_prepare_enable(pdata->clk_ref); 374 if (ret) 375 goto exit_put_clk_ipg; 376 377 rate = clk_get_rate(pdata->clk_ref); 378 379 if (rate == 32768) 380 reg = RTC_INPUT_CLK_32768HZ; 381 else if (rate == 32000) 382 reg = RTC_INPUT_CLK_32000HZ; 383 else if (rate == 38400) 384 reg = RTC_INPUT_CLK_38400HZ; 385 else { 386 dev_err(&pdev->dev, "rtc clock is not valid (%lu)\n", rate); 387 ret = -EINVAL; 388 goto exit_put_clk_ref; 389 } 390 391 reg |= RTC_ENABLE_BIT; 392 writew(reg, (pdata->ioaddr + RTC_RTCCTL)); 393 if (((readw(pdata->ioaddr + RTC_RTCCTL)) & RTC_ENABLE_BIT) == 0) { 394 dev_err(&pdev->dev, "hardware module can't be enabled!\n"); 395 ret = -EIO; 396 goto exit_put_clk_ref; 397 } 398 399 platform_set_drvdata(pdev, pdata); 400 401 /* Configure and enable the RTC */ 402 pdata->irq = platform_get_irq(pdev, 0); 403 404 if (pdata->irq >= 0 && 405 devm_request_irq(&pdev->dev, pdata->irq, mxc_rtc_interrupt, 406 IRQF_SHARED, pdev->name, pdev) < 0) { 407 dev_warn(&pdev->dev, "interrupt not available.\n"); 408 pdata->irq = -1; 409 } 410 411 if (pdata->irq >= 0) { 412 device_init_wakeup(&pdev->dev, 1); 413 ret = dev_pm_set_wake_irq(&pdev->dev, pdata->irq); 414 if (ret) 415 dev_err(&pdev->dev, "failed to enable irq wake\n"); 416 } 417 418 ret = rtc_register_device(rtc); 419 if (ret) 420 goto exit_put_clk_ref; 421 422 return 0; 423 424 exit_put_clk_ref: 425 clk_disable_unprepare(pdata->clk_ref); 426 exit_put_clk_ipg: 427 clk_disable_unprepare(pdata->clk_ipg); 428 429 return ret; 430 } 431 432 static int mxc_rtc_remove(struct platform_device *pdev) 433 { 434 struct rtc_plat_data *pdata = platform_get_drvdata(pdev); 435 436 clk_disable_unprepare(pdata->clk_ref); 437 clk_disable_unprepare(pdata->clk_ipg); 438 439 return 0; 440 } 441 442 static struct platform_driver mxc_rtc_driver = { 443 .driver = { 444 .name = "mxc_rtc", 445 .of_match_table = of_match_ptr(imx_rtc_dt_ids), 446 }, 447 .id_table = imx_rtc_devtype, 448 .probe = mxc_rtc_probe, 449 .remove = mxc_rtc_remove, 450 }; 451 452 module_platform_driver(mxc_rtc_driver) 453 454 MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>"); 455 MODULE_DESCRIPTION("RTC driver for Freescale MXC"); 456 MODULE_LICENSE("GPL"); 457 458