1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2014-2015 MediaTek Inc. 4 * Author: Tianping.Fang <tianping.fang@mediatek.com> 5 */ 6 7 #include <linux/err.h> 8 #include <linux/interrupt.h> 9 #include <linux/mfd/mt6397/core.h> 10 #include <linux/module.h> 11 #include <linux/mutex.h> 12 #include <linux/platform_device.h> 13 #include <linux/regmap.h> 14 #include <linux/rtc.h> 15 #include <linux/mfd/mt6397/rtc.h> 16 #include <linux/mod_devicetable.h> 17 18 static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc) 19 { 20 int ret; 21 u32 data; 22 23 ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_WRTGR, 1); 24 if (ret < 0) 25 return ret; 26 27 ret = regmap_read_poll_timeout(rtc->regmap, 28 rtc->addr_base + RTC_BBPU, data, 29 !(data & RTC_BBPU_CBUSY), 30 MTK_RTC_POLL_DELAY_US, 31 MTK_RTC_POLL_TIMEOUT); 32 if (ret < 0) 33 dev_err(rtc->dev, "failed to write WRTGE: %d\n", ret); 34 35 return ret; 36 } 37 38 static irqreturn_t mtk_rtc_irq_handler_thread(int irq, void *data) 39 { 40 struct mt6397_rtc *rtc = data; 41 u32 irqsta, irqen; 42 int ret; 43 44 ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_STA, &irqsta); 45 if ((ret >= 0) && (irqsta & RTC_IRQ_STA_AL)) { 46 rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF); 47 irqen = irqsta & ~RTC_IRQ_EN_AL; 48 mutex_lock(&rtc->lock); 49 if (regmap_write(rtc->regmap, rtc->addr_base + RTC_IRQ_EN, 50 irqen) == 0) 51 mtk_rtc_write_trigger(rtc); 52 mutex_unlock(&rtc->lock); 53 54 return IRQ_HANDLED; 55 } 56 57 return IRQ_NONE; 58 } 59 60 static int __mtk_rtc_read_time(struct mt6397_rtc *rtc, 61 struct rtc_time *tm, int *sec) 62 { 63 int ret; 64 u16 data[RTC_OFFSET_COUNT]; 65 66 mutex_lock(&rtc->lock); 67 ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC, 68 data, RTC_OFFSET_COUNT); 69 if (ret < 0) 70 goto exit; 71 72 tm->tm_sec = data[RTC_OFFSET_SEC]; 73 tm->tm_min = data[RTC_OFFSET_MIN]; 74 tm->tm_hour = data[RTC_OFFSET_HOUR]; 75 tm->tm_mday = data[RTC_OFFSET_DOM]; 76 tm->tm_mon = data[RTC_OFFSET_MTH]; 77 tm->tm_year = data[RTC_OFFSET_YEAR]; 78 79 ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC, sec); 80 exit: 81 mutex_unlock(&rtc->lock); 82 return ret; 83 } 84 85 static int mtk_rtc_read_time(struct device *dev, struct rtc_time *tm) 86 { 87 time64_t time; 88 struct mt6397_rtc *rtc = dev_get_drvdata(dev); 89 int days, sec, ret; 90 91 do { 92 ret = __mtk_rtc_read_time(rtc, tm, &sec); 93 if (ret < 0) 94 goto exit; 95 } while (sec < tm->tm_sec); 96 97 /* HW register use 7 bits to store year data, minus 98 * RTC_MIN_YEAR_OFFSET before write year data to register, and plus 99 * RTC_MIN_YEAR_OFFSET back after read year from register 100 */ 101 tm->tm_year += RTC_MIN_YEAR_OFFSET; 102 103 /* HW register start mon from one, but tm_mon start from zero. */ 104 tm->tm_mon--; 105 time = rtc_tm_to_time64(tm); 106 107 /* rtc_tm_to_time64 covert Gregorian date to seconds since 108 * 01-01-1970 00:00:00, and this date is Thursday. 109 */ 110 days = div_s64(time, 86400); 111 tm->tm_wday = (days + 4) % 7; 112 113 exit: 114 return ret; 115 } 116 117 static int mtk_rtc_set_time(struct device *dev, struct rtc_time *tm) 118 { 119 struct mt6397_rtc *rtc = dev_get_drvdata(dev); 120 int ret; 121 u16 data[RTC_OFFSET_COUNT]; 122 123 tm->tm_year -= RTC_MIN_YEAR_OFFSET; 124 tm->tm_mon++; 125 126 data[RTC_OFFSET_SEC] = tm->tm_sec; 127 data[RTC_OFFSET_MIN] = tm->tm_min; 128 data[RTC_OFFSET_HOUR] = tm->tm_hour; 129 data[RTC_OFFSET_DOM] = tm->tm_mday; 130 data[RTC_OFFSET_MTH] = tm->tm_mon; 131 data[RTC_OFFSET_YEAR] = tm->tm_year; 132 133 mutex_lock(&rtc->lock); 134 ret = regmap_bulk_write(rtc->regmap, rtc->addr_base + RTC_TC_SEC, 135 data, RTC_OFFSET_COUNT); 136 if (ret < 0) 137 goto exit; 138 139 /* Time register write to hardware after call trigger function */ 140 ret = mtk_rtc_write_trigger(rtc); 141 142 exit: 143 mutex_unlock(&rtc->lock); 144 return ret; 145 } 146 147 static int mtk_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm) 148 { 149 struct rtc_time *tm = &alm->time; 150 struct mt6397_rtc *rtc = dev_get_drvdata(dev); 151 u32 irqen, pdn2; 152 int ret; 153 u16 data[RTC_OFFSET_COUNT]; 154 155 mutex_lock(&rtc->lock); 156 ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_EN, &irqen); 157 if (ret < 0) 158 goto err_exit; 159 ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_PDN2, &pdn2); 160 if (ret < 0) 161 goto err_exit; 162 163 ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_AL_SEC, 164 data, RTC_OFFSET_COUNT); 165 if (ret < 0) 166 goto err_exit; 167 168 alm->enabled = !!(irqen & RTC_IRQ_EN_AL); 169 alm->pending = !!(pdn2 & RTC_PDN2_PWRON_ALARM); 170 mutex_unlock(&rtc->lock); 171 172 tm->tm_sec = data[RTC_OFFSET_SEC] & RTC_AL_SEC_MASK; 173 tm->tm_min = data[RTC_OFFSET_MIN] & RTC_AL_MIN_MASK; 174 tm->tm_hour = data[RTC_OFFSET_HOUR] & RTC_AL_HOU_MASK; 175 tm->tm_mday = data[RTC_OFFSET_DOM] & RTC_AL_DOM_MASK; 176 tm->tm_mon = data[RTC_OFFSET_MTH] & RTC_AL_MTH_MASK; 177 tm->tm_year = data[RTC_OFFSET_YEAR] & RTC_AL_YEA_MASK; 178 179 tm->tm_year += RTC_MIN_YEAR_OFFSET; 180 tm->tm_mon--; 181 182 return 0; 183 err_exit: 184 mutex_unlock(&rtc->lock); 185 return ret; 186 } 187 188 static int mtk_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) 189 { 190 struct rtc_time *tm = &alm->time; 191 struct mt6397_rtc *rtc = dev_get_drvdata(dev); 192 int ret; 193 u16 data[RTC_OFFSET_COUNT]; 194 195 tm->tm_year -= RTC_MIN_YEAR_OFFSET; 196 tm->tm_mon++; 197 198 mutex_lock(&rtc->lock); 199 ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_AL_SEC, 200 data, RTC_OFFSET_COUNT); 201 if (ret < 0) 202 goto exit; 203 204 data[RTC_OFFSET_SEC] = ((data[RTC_OFFSET_SEC] & ~(RTC_AL_SEC_MASK)) | 205 (tm->tm_sec & RTC_AL_SEC_MASK)); 206 data[RTC_OFFSET_MIN] = ((data[RTC_OFFSET_MIN] & ~(RTC_AL_MIN_MASK)) | 207 (tm->tm_min & RTC_AL_MIN_MASK)); 208 data[RTC_OFFSET_HOUR] = ((data[RTC_OFFSET_HOUR] & ~(RTC_AL_HOU_MASK)) | 209 (tm->tm_hour & RTC_AL_HOU_MASK)); 210 data[RTC_OFFSET_DOM] = ((data[RTC_OFFSET_DOM] & ~(RTC_AL_DOM_MASK)) | 211 (tm->tm_mday & RTC_AL_DOM_MASK)); 212 data[RTC_OFFSET_MTH] = ((data[RTC_OFFSET_MTH] & ~(RTC_AL_MTH_MASK)) | 213 (tm->tm_mon & RTC_AL_MTH_MASK)); 214 data[RTC_OFFSET_YEAR] = ((data[RTC_OFFSET_YEAR] & ~(RTC_AL_YEA_MASK)) | 215 (tm->tm_year & RTC_AL_YEA_MASK)); 216 217 if (alm->enabled) { 218 ret = regmap_bulk_write(rtc->regmap, 219 rtc->addr_base + RTC_AL_SEC, 220 data, RTC_OFFSET_COUNT); 221 if (ret < 0) 222 goto exit; 223 ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_AL_MASK, 224 RTC_AL_MASK_DOW); 225 if (ret < 0) 226 goto exit; 227 ret = regmap_update_bits(rtc->regmap, 228 rtc->addr_base + RTC_IRQ_EN, 229 RTC_IRQ_EN_ONESHOT_AL, 230 RTC_IRQ_EN_ONESHOT_AL); 231 if (ret < 0) 232 goto exit; 233 } else { 234 ret = regmap_update_bits(rtc->regmap, 235 rtc->addr_base + RTC_IRQ_EN, 236 RTC_IRQ_EN_ONESHOT_AL, 0); 237 if (ret < 0) 238 goto exit; 239 } 240 241 /* All alarm time register write to hardware after calling 242 * mtk_rtc_write_trigger. This can avoid race condition if alarm 243 * occur happen during writing alarm time register. 244 */ 245 ret = mtk_rtc_write_trigger(rtc); 246 exit: 247 mutex_unlock(&rtc->lock); 248 return ret; 249 } 250 251 static const struct rtc_class_ops mtk_rtc_ops = { 252 .read_time = mtk_rtc_read_time, 253 .set_time = mtk_rtc_set_time, 254 .read_alarm = mtk_rtc_read_alarm, 255 .set_alarm = mtk_rtc_set_alarm, 256 }; 257 258 static int mtk_rtc_probe(struct platform_device *pdev) 259 { 260 struct resource *res; 261 struct mt6397_chip *mt6397_chip = dev_get_drvdata(pdev->dev.parent); 262 struct mt6397_rtc *rtc; 263 int ret; 264 265 rtc = devm_kzalloc(&pdev->dev, sizeof(struct mt6397_rtc), GFP_KERNEL); 266 if (!rtc) 267 return -ENOMEM; 268 269 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 270 rtc->addr_base = res->start; 271 272 rtc->irq = platform_get_irq(pdev, 0); 273 if (rtc->irq < 0) 274 return rtc->irq; 275 276 rtc->regmap = mt6397_chip->regmap; 277 mutex_init(&rtc->lock); 278 279 platform_set_drvdata(pdev, rtc); 280 281 rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev); 282 if (IS_ERR(rtc->rtc_dev)) 283 return PTR_ERR(rtc->rtc_dev); 284 285 ret = devm_request_threaded_irq(&pdev->dev, rtc->irq, NULL, 286 mtk_rtc_irq_handler_thread, 287 IRQF_ONESHOT | IRQF_TRIGGER_HIGH, 288 "mt6397-rtc", rtc); 289 290 if (ret) { 291 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n", 292 rtc->irq, ret); 293 return ret; 294 } 295 296 device_init_wakeup(&pdev->dev, 1); 297 298 rtc->rtc_dev->ops = &mtk_rtc_ops; 299 300 return rtc_register_device(rtc->rtc_dev); 301 } 302 303 #ifdef CONFIG_PM_SLEEP 304 static int mt6397_rtc_suspend(struct device *dev) 305 { 306 struct mt6397_rtc *rtc = dev_get_drvdata(dev); 307 308 if (device_may_wakeup(dev)) 309 enable_irq_wake(rtc->irq); 310 311 return 0; 312 } 313 314 static int mt6397_rtc_resume(struct device *dev) 315 { 316 struct mt6397_rtc *rtc = dev_get_drvdata(dev); 317 318 if (device_may_wakeup(dev)) 319 disable_irq_wake(rtc->irq); 320 321 return 0; 322 } 323 #endif 324 325 static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_rtc_suspend, 326 mt6397_rtc_resume); 327 328 static const struct of_device_id mt6397_rtc_of_match[] = { 329 { .compatible = "mediatek,mt6323-rtc", }, 330 { .compatible = "mediatek,mt6397-rtc", }, 331 { } 332 }; 333 MODULE_DEVICE_TABLE(of, mt6397_rtc_of_match); 334 335 static struct platform_driver mtk_rtc_driver = { 336 .driver = { 337 .name = "mt6397-rtc", 338 .of_match_table = mt6397_rtc_of_match, 339 .pm = &mt6397_pm_ops, 340 }, 341 .probe = mtk_rtc_probe, 342 }; 343 344 module_platform_driver(mtk_rtc_driver); 345 346 MODULE_LICENSE("GPL v2"); 347 MODULE_AUTHOR("Tianping Fang <tianping.fang@mediatek.com>"); 348 MODULE_DESCRIPTION("RTC Driver for MediaTek MT6397 PMIC"); 349