1 // SPDX-License-Identifier: GPL-2.0+ 2 // 3 // RTC driver for Maxim MAX77686 and MAX77802 4 // 5 // Copyright (C) 2012 Samsung Electronics Co.Ltd 6 // 7 // based on rtc-max8997.c 8 9 #include <linux/i2c.h> 10 #include <linux/slab.h> 11 #include <linux/rtc.h> 12 #include <linux/delay.h> 13 #include <linux/mutex.h> 14 #include <linux/module.h> 15 #include <linux/platform_device.h> 16 #include <linux/mfd/max77686-private.h> 17 #include <linux/irqdomain.h> 18 #include <linux/regmap.h> 19 20 #define MAX77686_I2C_ADDR_RTC (0x0C >> 1) 21 #define MAX77620_I2C_ADDR_RTC 0x68 22 #define MAX77686_INVALID_I2C_ADDR (-1) 23 24 /* Define non existing register */ 25 #define MAX77686_INVALID_REG (-1) 26 27 /* RTC Control Register */ 28 #define BCD_EN_SHIFT 0 29 #define BCD_EN_MASK BIT(BCD_EN_SHIFT) 30 #define MODEL24_SHIFT 1 31 #define MODEL24_MASK BIT(MODEL24_SHIFT) 32 /* RTC Update Register1 */ 33 #define RTC_UDR_SHIFT 0 34 #define RTC_UDR_MASK BIT(RTC_UDR_SHIFT) 35 #define RTC_RBUDR_SHIFT 4 36 #define RTC_RBUDR_MASK BIT(RTC_RBUDR_SHIFT) 37 /* RTC Hour register */ 38 #define HOUR_PM_SHIFT 6 39 #define HOUR_PM_MASK BIT(HOUR_PM_SHIFT) 40 /* RTC Alarm Enable */ 41 #define ALARM_ENABLE_SHIFT 7 42 #define ALARM_ENABLE_MASK BIT(ALARM_ENABLE_SHIFT) 43 44 #define REG_RTC_NONE 0xdeadbeef 45 46 /* 47 * MAX77802 has separate register (RTCAE1) for alarm enable instead 48 * using 1 bit from registers RTC{SEC,MIN,HOUR,DAY,MONTH,YEAR,DATE} 49 * as in done in MAX77686. 50 */ 51 #define MAX77802_ALARM_ENABLE_VALUE 0x77 52 53 enum { 54 RTC_SEC = 0, 55 RTC_MIN, 56 RTC_HOUR, 57 RTC_WEEKDAY, 58 RTC_MONTH, 59 RTC_YEAR, 60 RTC_DATE, 61 RTC_NR_TIME 62 }; 63 64 struct max77686_rtc_driver_data { 65 /* Minimum usecs needed for a RTC update */ 66 unsigned long delay; 67 /* Mask used to read RTC registers value */ 68 u8 mask; 69 /* Registers offset to I2C addresses map */ 70 const unsigned int *map; 71 /* Has a separate alarm enable register? */ 72 bool alarm_enable_reg; 73 /* I2C address for RTC block */ 74 int rtc_i2c_addr; 75 /* RTC interrupt via platform resource */ 76 bool rtc_irq_from_platform; 77 /* Pending alarm status register */ 78 int alarm_pending_status_reg; 79 /* RTC IRQ CHIP for regmap */ 80 const struct regmap_irq_chip *rtc_irq_chip; 81 /* regmap configuration for the chip */ 82 const struct regmap_config *regmap_config; 83 }; 84 85 struct max77686_rtc_info { 86 struct device *dev; 87 struct i2c_client *rtc; 88 struct rtc_device *rtc_dev; 89 struct mutex lock; 90 91 struct regmap *regmap; 92 struct regmap *rtc_regmap; 93 94 const struct max77686_rtc_driver_data *drv_data; 95 struct regmap_irq_chip_data *rtc_irq_data; 96 97 int rtc_irq; 98 int virq; 99 int rtc_24hr_mode; 100 }; 101 102 enum MAX77686_RTC_OP { 103 MAX77686_RTC_WRITE, 104 MAX77686_RTC_READ, 105 }; 106 107 /* These are not registers but just offsets that are mapped to addresses */ 108 enum max77686_rtc_reg_offset { 109 REG_RTC_CONTROLM = 0, 110 REG_RTC_CONTROL, 111 REG_RTC_UPDATE0, 112 REG_WTSR_SMPL_CNTL, 113 REG_RTC_SEC, 114 REG_RTC_MIN, 115 REG_RTC_HOUR, 116 REG_RTC_WEEKDAY, 117 REG_RTC_MONTH, 118 REG_RTC_YEAR, 119 REG_RTC_DATE, 120 REG_ALARM1_SEC, 121 REG_ALARM1_MIN, 122 REG_ALARM1_HOUR, 123 REG_ALARM1_WEEKDAY, 124 REG_ALARM1_MONTH, 125 REG_ALARM1_YEAR, 126 REG_ALARM1_DATE, 127 REG_ALARM2_SEC, 128 REG_ALARM2_MIN, 129 REG_ALARM2_HOUR, 130 REG_ALARM2_WEEKDAY, 131 REG_ALARM2_MONTH, 132 REG_ALARM2_YEAR, 133 REG_ALARM2_DATE, 134 REG_RTC_AE1, 135 REG_RTC_END, 136 }; 137 138 /* Maps RTC registers offset to the MAX77686 register addresses */ 139 static const unsigned int max77686_map[REG_RTC_END] = { 140 [REG_RTC_CONTROLM] = MAX77686_RTC_CONTROLM, 141 [REG_RTC_CONTROL] = MAX77686_RTC_CONTROL, 142 [REG_RTC_UPDATE0] = MAX77686_RTC_UPDATE0, 143 [REG_WTSR_SMPL_CNTL] = MAX77686_WTSR_SMPL_CNTL, 144 [REG_RTC_SEC] = MAX77686_RTC_SEC, 145 [REG_RTC_MIN] = MAX77686_RTC_MIN, 146 [REG_RTC_HOUR] = MAX77686_RTC_HOUR, 147 [REG_RTC_WEEKDAY] = MAX77686_RTC_WEEKDAY, 148 [REG_RTC_MONTH] = MAX77686_RTC_MONTH, 149 [REG_RTC_YEAR] = MAX77686_RTC_YEAR, 150 [REG_RTC_DATE] = MAX77686_RTC_DATE, 151 [REG_ALARM1_SEC] = MAX77686_ALARM1_SEC, 152 [REG_ALARM1_MIN] = MAX77686_ALARM1_MIN, 153 [REG_ALARM1_HOUR] = MAX77686_ALARM1_HOUR, 154 [REG_ALARM1_WEEKDAY] = MAX77686_ALARM1_WEEKDAY, 155 [REG_ALARM1_MONTH] = MAX77686_ALARM1_MONTH, 156 [REG_ALARM1_YEAR] = MAX77686_ALARM1_YEAR, 157 [REG_ALARM1_DATE] = MAX77686_ALARM1_DATE, 158 [REG_ALARM2_SEC] = MAX77686_ALARM2_SEC, 159 [REG_ALARM2_MIN] = MAX77686_ALARM2_MIN, 160 [REG_ALARM2_HOUR] = MAX77686_ALARM2_HOUR, 161 [REG_ALARM2_WEEKDAY] = MAX77686_ALARM2_WEEKDAY, 162 [REG_ALARM2_MONTH] = MAX77686_ALARM2_MONTH, 163 [REG_ALARM2_YEAR] = MAX77686_ALARM2_YEAR, 164 [REG_ALARM2_DATE] = MAX77686_ALARM2_DATE, 165 [REG_RTC_AE1] = REG_RTC_NONE, 166 }; 167 168 static const struct regmap_irq max77686_rtc_irqs[] = { 169 /* RTC interrupts */ 170 REGMAP_IRQ_REG(0, 0, MAX77686_RTCINT_RTC60S_MSK), 171 REGMAP_IRQ_REG(1, 0, MAX77686_RTCINT_RTCA1_MSK), 172 REGMAP_IRQ_REG(2, 0, MAX77686_RTCINT_RTCA2_MSK), 173 REGMAP_IRQ_REG(3, 0, MAX77686_RTCINT_SMPL_MSK), 174 REGMAP_IRQ_REG(4, 0, MAX77686_RTCINT_RTC1S_MSK), 175 REGMAP_IRQ_REG(5, 0, MAX77686_RTCINT_WTSR_MSK), 176 }; 177 178 static const struct regmap_irq_chip max77686_rtc_irq_chip = { 179 .name = "max77686-rtc", 180 .status_base = MAX77686_RTC_INT, 181 .mask_base = MAX77686_RTC_INTM, 182 .num_regs = 1, 183 .irqs = max77686_rtc_irqs, 184 .num_irqs = ARRAY_SIZE(max77686_rtc_irqs), 185 }; 186 187 static const struct regmap_config max77686_rtc_regmap_config = { 188 .reg_bits = 8, 189 .val_bits = 8, 190 }; 191 192 static const struct max77686_rtc_driver_data max77686_drv_data = { 193 .delay = 16000, 194 .mask = 0x7f, 195 .map = max77686_map, 196 .alarm_enable_reg = false, 197 .rtc_irq_from_platform = false, 198 .alarm_pending_status_reg = MAX77686_REG_STATUS2, 199 .rtc_i2c_addr = MAX77686_I2C_ADDR_RTC, 200 .rtc_irq_chip = &max77686_rtc_irq_chip, 201 .regmap_config = &max77686_rtc_regmap_config, 202 }; 203 204 static const struct regmap_config max77620_rtc_regmap_config = { 205 .reg_bits = 8, 206 .val_bits = 8, 207 .use_single_write = true, 208 }; 209 210 static const struct max77686_rtc_driver_data max77620_drv_data = { 211 .delay = 16000, 212 .mask = 0x7f, 213 .map = max77686_map, 214 .alarm_enable_reg = false, 215 .rtc_irq_from_platform = true, 216 .alarm_pending_status_reg = MAX77686_INVALID_REG, 217 .rtc_i2c_addr = MAX77620_I2C_ADDR_RTC, 218 .rtc_irq_chip = &max77686_rtc_irq_chip, 219 .regmap_config = &max77620_rtc_regmap_config, 220 }; 221 222 static const unsigned int max77802_map[REG_RTC_END] = { 223 [REG_RTC_CONTROLM] = MAX77802_RTC_CONTROLM, 224 [REG_RTC_CONTROL] = MAX77802_RTC_CONTROL, 225 [REG_RTC_UPDATE0] = MAX77802_RTC_UPDATE0, 226 [REG_WTSR_SMPL_CNTL] = MAX77802_WTSR_SMPL_CNTL, 227 [REG_RTC_SEC] = MAX77802_RTC_SEC, 228 [REG_RTC_MIN] = MAX77802_RTC_MIN, 229 [REG_RTC_HOUR] = MAX77802_RTC_HOUR, 230 [REG_RTC_WEEKDAY] = MAX77802_RTC_WEEKDAY, 231 [REG_RTC_MONTH] = MAX77802_RTC_MONTH, 232 [REG_RTC_YEAR] = MAX77802_RTC_YEAR, 233 [REG_RTC_DATE] = MAX77802_RTC_DATE, 234 [REG_ALARM1_SEC] = MAX77802_ALARM1_SEC, 235 [REG_ALARM1_MIN] = MAX77802_ALARM1_MIN, 236 [REG_ALARM1_HOUR] = MAX77802_ALARM1_HOUR, 237 [REG_ALARM1_WEEKDAY] = MAX77802_ALARM1_WEEKDAY, 238 [REG_ALARM1_MONTH] = MAX77802_ALARM1_MONTH, 239 [REG_ALARM1_YEAR] = MAX77802_ALARM1_YEAR, 240 [REG_ALARM1_DATE] = MAX77802_ALARM1_DATE, 241 [REG_ALARM2_SEC] = MAX77802_ALARM2_SEC, 242 [REG_ALARM2_MIN] = MAX77802_ALARM2_MIN, 243 [REG_ALARM2_HOUR] = MAX77802_ALARM2_HOUR, 244 [REG_ALARM2_WEEKDAY] = MAX77802_ALARM2_WEEKDAY, 245 [REG_ALARM2_MONTH] = MAX77802_ALARM2_MONTH, 246 [REG_ALARM2_YEAR] = MAX77802_ALARM2_YEAR, 247 [REG_ALARM2_DATE] = MAX77802_ALARM2_DATE, 248 [REG_RTC_AE1] = MAX77802_RTC_AE1, 249 }; 250 251 static const struct regmap_irq_chip max77802_rtc_irq_chip = { 252 .name = "max77802-rtc", 253 .status_base = MAX77802_RTC_INT, 254 .mask_base = MAX77802_RTC_INTM, 255 .num_regs = 1, 256 .irqs = max77686_rtc_irqs, /* same masks as 77686 */ 257 .num_irqs = ARRAY_SIZE(max77686_rtc_irqs), 258 }; 259 260 static const struct max77686_rtc_driver_data max77802_drv_data = { 261 .delay = 200, 262 .mask = 0xff, 263 .map = max77802_map, 264 .alarm_enable_reg = true, 265 .rtc_irq_from_platform = false, 266 .alarm_pending_status_reg = MAX77686_REG_STATUS2, 267 .rtc_i2c_addr = MAX77686_INVALID_I2C_ADDR, 268 .rtc_irq_chip = &max77802_rtc_irq_chip, 269 }; 270 271 static void max77686_rtc_data_to_tm(u8 *data, struct rtc_time *tm, 272 struct max77686_rtc_info *info) 273 { 274 u8 mask = info->drv_data->mask; 275 276 tm->tm_sec = data[RTC_SEC] & mask; 277 tm->tm_min = data[RTC_MIN] & mask; 278 if (info->rtc_24hr_mode) { 279 tm->tm_hour = data[RTC_HOUR] & 0x1f; 280 } else { 281 tm->tm_hour = data[RTC_HOUR] & 0x0f; 282 if (data[RTC_HOUR] & HOUR_PM_MASK) 283 tm->tm_hour += 12; 284 } 285 286 /* Only a single bit is set in data[], so fls() would be equivalent */ 287 tm->tm_wday = ffs(data[RTC_WEEKDAY] & mask) - 1; 288 tm->tm_mday = data[RTC_DATE] & 0x1f; 289 tm->tm_mon = (data[RTC_MONTH] & 0x0f) - 1; 290 tm->tm_year = data[RTC_YEAR] & mask; 291 tm->tm_yday = 0; 292 tm->tm_isdst = 0; 293 294 /* 295 * MAX77686 uses 1 bit from sec/min/hour/etc RTC registers and the 296 * year values are just 0..99 so add 100 to support up to 2099. 297 */ 298 if (!info->drv_data->alarm_enable_reg) 299 tm->tm_year += 100; 300 } 301 302 static int max77686_rtc_tm_to_data(struct rtc_time *tm, u8 *data, 303 struct max77686_rtc_info *info) 304 { 305 data[RTC_SEC] = tm->tm_sec; 306 data[RTC_MIN] = tm->tm_min; 307 data[RTC_HOUR] = tm->tm_hour; 308 data[RTC_WEEKDAY] = 1 << tm->tm_wday; 309 data[RTC_DATE] = tm->tm_mday; 310 data[RTC_MONTH] = tm->tm_mon + 1; 311 312 if (info->drv_data->alarm_enable_reg) { 313 data[RTC_YEAR] = tm->tm_year; 314 return 0; 315 } 316 317 data[RTC_YEAR] = tm->tm_year > 100 ? (tm->tm_year - 100) : 0; 318 319 if (tm->tm_year < 100) { 320 dev_err(info->dev, "RTC cannot handle the year %d.\n", 321 1900 + tm->tm_year); 322 return -EINVAL; 323 } 324 325 return 0; 326 } 327 328 static int max77686_rtc_update(struct max77686_rtc_info *info, 329 enum MAX77686_RTC_OP op) 330 { 331 int ret; 332 unsigned int data; 333 unsigned long delay = info->drv_data->delay; 334 335 if (op == MAX77686_RTC_WRITE) 336 data = 1 << RTC_UDR_SHIFT; 337 else 338 data = 1 << RTC_RBUDR_SHIFT; 339 340 ret = regmap_update_bits(info->rtc_regmap, 341 info->drv_data->map[REG_RTC_UPDATE0], 342 data, data); 343 if (ret < 0) 344 dev_err(info->dev, "Fail to write update reg(ret=%d, data=0x%x)\n", 345 ret, data); 346 else { 347 /* Minimum delay required before RTC update. */ 348 usleep_range(delay, delay * 2); 349 } 350 351 return ret; 352 } 353 354 static int max77686_rtc_read_time(struct device *dev, struct rtc_time *tm) 355 { 356 struct max77686_rtc_info *info = dev_get_drvdata(dev); 357 u8 data[RTC_NR_TIME]; 358 int ret; 359 360 mutex_lock(&info->lock); 361 362 ret = max77686_rtc_update(info, MAX77686_RTC_READ); 363 if (ret < 0) 364 goto out; 365 366 ret = regmap_bulk_read(info->rtc_regmap, 367 info->drv_data->map[REG_RTC_SEC], 368 data, ARRAY_SIZE(data)); 369 if (ret < 0) { 370 dev_err(info->dev, "Fail to read time reg(%d)\n", ret); 371 goto out; 372 } 373 374 max77686_rtc_data_to_tm(data, tm, info); 375 376 out: 377 mutex_unlock(&info->lock); 378 return ret; 379 } 380 381 static int max77686_rtc_set_time(struct device *dev, struct rtc_time *tm) 382 { 383 struct max77686_rtc_info *info = dev_get_drvdata(dev); 384 u8 data[RTC_NR_TIME]; 385 int ret; 386 387 ret = max77686_rtc_tm_to_data(tm, data, info); 388 if (ret < 0) 389 return ret; 390 391 mutex_lock(&info->lock); 392 393 ret = regmap_bulk_write(info->rtc_regmap, 394 info->drv_data->map[REG_RTC_SEC], 395 data, ARRAY_SIZE(data)); 396 if (ret < 0) { 397 dev_err(info->dev, "Fail to write time reg(%d)\n", ret); 398 goto out; 399 } 400 401 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); 402 403 out: 404 mutex_unlock(&info->lock); 405 return ret; 406 } 407 408 static int max77686_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 409 { 410 struct max77686_rtc_info *info = dev_get_drvdata(dev); 411 u8 data[RTC_NR_TIME]; 412 unsigned int val; 413 const unsigned int *map = info->drv_data->map; 414 int i, ret; 415 416 mutex_lock(&info->lock); 417 418 ret = max77686_rtc_update(info, MAX77686_RTC_READ); 419 if (ret < 0) 420 goto out; 421 422 ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC], 423 data, ARRAY_SIZE(data)); 424 if (ret < 0) { 425 dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret); 426 goto out; 427 } 428 429 max77686_rtc_data_to_tm(data, &alrm->time, info); 430 431 alrm->enabled = 0; 432 433 if (info->drv_data->alarm_enable_reg) { 434 if (map[REG_RTC_AE1] == REG_RTC_NONE) { 435 ret = -EINVAL; 436 dev_err(info->dev, 437 "alarm enable register not set(%d)\n", ret); 438 goto out; 439 } 440 441 ret = regmap_read(info->rtc_regmap, map[REG_RTC_AE1], &val); 442 if (ret < 0) { 443 dev_err(info->dev, 444 "fail to read alarm enable(%d)\n", ret); 445 goto out; 446 } 447 448 if (val) 449 alrm->enabled = 1; 450 } else { 451 for (i = 0; i < ARRAY_SIZE(data); i++) { 452 if (data[i] & ALARM_ENABLE_MASK) { 453 alrm->enabled = 1; 454 break; 455 } 456 } 457 } 458 459 alrm->pending = 0; 460 461 if (info->drv_data->alarm_pending_status_reg == MAX77686_INVALID_REG) 462 goto out; 463 464 ret = regmap_read(info->regmap, 465 info->drv_data->alarm_pending_status_reg, &val); 466 if (ret < 0) { 467 dev_err(info->dev, 468 "Fail to read alarm pending status reg(%d)\n", ret); 469 goto out; 470 } 471 472 if (val & (1 << 4)) /* RTCA1 */ 473 alrm->pending = 1; 474 475 out: 476 mutex_unlock(&info->lock); 477 return ret; 478 } 479 480 static int max77686_rtc_stop_alarm(struct max77686_rtc_info *info) 481 { 482 u8 data[RTC_NR_TIME]; 483 int ret, i; 484 struct rtc_time tm; 485 const unsigned int *map = info->drv_data->map; 486 487 if (!mutex_is_locked(&info->lock)) 488 dev_warn(info->dev, "%s: should have mutex locked\n", __func__); 489 490 ret = max77686_rtc_update(info, MAX77686_RTC_READ); 491 if (ret < 0) 492 goto out; 493 494 if (info->drv_data->alarm_enable_reg) { 495 if (map[REG_RTC_AE1] == REG_RTC_NONE) { 496 ret = -EINVAL; 497 dev_err(info->dev, 498 "alarm enable register not set(%d)\n", ret); 499 goto out; 500 } 501 502 ret = regmap_write(info->rtc_regmap, map[REG_RTC_AE1], 0); 503 } else { 504 ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC], 505 data, ARRAY_SIZE(data)); 506 if (ret < 0) { 507 dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret); 508 goto out; 509 } 510 511 max77686_rtc_data_to_tm(data, &tm, info); 512 513 for (i = 0; i < ARRAY_SIZE(data); i++) 514 data[i] &= ~ALARM_ENABLE_MASK; 515 516 ret = regmap_bulk_write(info->rtc_regmap, map[REG_ALARM1_SEC], 517 data, ARRAY_SIZE(data)); 518 } 519 520 if (ret < 0) { 521 dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret); 522 goto out; 523 } 524 525 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); 526 out: 527 return ret; 528 } 529 530 static int max77686_rtc_start_alarm(struct max77686_rtc_info *info) 531 { 532 u8 data[RTC_NR_TIME]; 533 int ret; 534 struct rtc_time tm; 535 const unsigned int *map = info->drv_data->map; 536 537 if (!mutex_is_locked(&info->lock)) 538 dev_warn(info->dev, "%s: should have mutex locked\n", __func__); 539 540 ret = max77686_rtc_update(info, MAX77686_RTC_READ); 541 if (ret < 0) 542 goto out; 543 544 if (info->drv_data->alarm_enable_reg) { 545 ret = regmap_write(info->rtc_regmap, map[REG_RTC_AE1], 546 MAX77802_ALARM_ENABLE_VALUE); 547 } else { 548 ret = regmap_bulk_read(info->rtc_regmap, map[REG_ALARM1_SEC], 549 data, ARRAY_SIZE(data)); 550 if (ret < 0) { 551 dev_err(info->dev, "Fail to read alarm reg(%d)\n", ret); 552 goto out; 553 } 554 555 max77686_rtc_data_to_tm(data, &tm, info); 556 557 data[RTC_SEC] |= (1 << ALARM_ENABLE_SHIFT); 558 data[RTC_MIN] |= (1 << ALARM_ENABLE_SHIFT); 559 data[RTC_HOUR] |= (1 << ALARM_ENABLE_SHIFT); 560 data[RTC_WEEKDAY] &= ~ALARM_ENABLE_MASK; 561 if (data[RTC_MONTH] & 0xf) 562 data[RTC_MONTH] |= (1 << ALARM_ENABLE_SHIFT); 563 if (data[RTC_YEAR] & info->drv_data->mask) 564 data[RTC_YEAR] |= (1 << ALARM_ENABLE_SHIFT); 565 if (data[RTC_DATE] & 0x1f) 566 data[RTC_DATE] |= (1 << ALARM_ENABLE_SHIFT); 567 568 ret = regmap_bulk_write(info->rtc_regmap, map[REG_ALARM1_SEC], 569 data, ARRAY_SIZE(data)); 570 } 571 572 if (ret < 0) { 573 dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret); 574 goto out; 575 } 576 577 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); 578 out: 579 return ret; 580 } 581 582 static int max77686_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 583 { 584 struct max77686_rtc_info *info = dev_get_drvdata(dev); 585 u8 data[RTC_NR_TIME]; 586 int ret; 587 588 ret = max77686_rtc_tm_to_data(&alrm->time, data, info); 589 if (ret < 0) 590 return ret; 591 592 mutex_lock(&info->lock); 593 594 ret = max77686_rtc_stop_alarm(info); 595 if (ret < 0) 596 goto out; 597 598 ret = regmap_bulk_write(info->rtc_regmap, 599 info->drv_data->map[REG_ALARM1_SEC], 600 data, ARRAY_SIZE(data)); 601 602 if (ret < 0) { 603 dev_err(info->dev, "Fail to write alarm reg(%d)\n", ret); 604 goto out; 605 } 606 607 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); 608 if (ret < 0) 609 goto out; 610 611 if (alrm->enabled) 612 ret = max77686_rtc_start_alarm(info); 613 out: 614 mutex_unlock(&info->lock); 615 return ret; 616 } 617 618 static int max77686_rtc_alarm_irq_enable(struct device *dev, 619 unsigned int enabled) 620 { 621 struct max77686_rtc_info *info = dev_get_drvdata(dev); 622 int ret; 623 624 mutex_lock(&info->lock); 625 if (enabled) 626 ret = max77686_rtc_start_alarm(info); 627 else 628 ret = max77686_rtc_stop_alarm(info); 629 mutex_unlock(&info->lock); 630 631 return ret; 632 } 633 634 static irqreturn_t max77686_rtc_alarm_irq(int irq, void *data) 635 { 636 struct max77686_rtc_info *info = data; 637 638 dev_dbg(info->dev, "RTC alarm IRQ: %d\n", irq); 639 640 rtc_update_irq(info->rtc_dev, 1, RTC_IRQF | RTC_AF); 641 642 return IRQ_HANDLED; 643 } 644 645 static const struct rtc_class_ops max77686_rtc_ops = { 646 .read_time = max77686_rtc_read_time, 647 .set_time = max77686_rtc_set_time, 648 .read_alarm = max77686_rtc_read_alarm, 649 .set_alarm = max77686_rtc_set_alarm, 650 .alarm_irq_enable = max77686_rtc_alarm_irq_enable, 651 }; 652 653 static int max77686_rtc_init_reg(struct max77686_rtc_info *info) 654 { 655 u8 data[2]; 656 int ret; 657 658 /* Set RTC control register : Binary mode, 24hour mdoe */ 659 data[0] = (1 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); 660 data[1] = (0 << BCD_EN_SHIFT) | (1 << MODEL24_SHIFT); 661 662 info->rtc_24hr_mode = 1; 663 664 ret = regmap_bulk_write(info->rtc_regmap, 665 info->drv_data->map[REG_RTC_CONTROLM], 666 data, ARRAY_SIZE(data)); 667 if (ret < 0) { 668 dev_err(info->dev, "Fail to write controlm reg(%d)\n", ret); 669 return ret; 670 } 671 672 ret = max77686_rtc_update(info, MAX77686_RTC_WRITE); 673 return ret; 674 } 675 676 static int max77686_init_rtc_regmap(struct max77686_rtc_info *info) 677 { 678 struct device *parent = info->dev->parent; 679 struct i2c_client *parent_i2c = to_i2c_client(parent); 680 int ret; 681 682 if (info->drv_data->rtc_irq_from_platform) { 683 struct platform_device *pdev = to_platform_device(info->dev); 684 685 info->rtc_irq = platform_get_irq(pdev, 0); 686 if (info->rtc_irq < 0) 687 return info->rtc_irq; 688 } else { 689 info->rtc_irq = parent_i2c->irq; 690 } 691 692 info->regmap = dev_get_regmap(parent, NULL); 693 if (!info->regmap) { 694 dev_err(info->dev, "Failed to get rtc regmap\n"); 695 return -ENODEV; 696 } 697 698 if (info->drv_data->rtc_i2c_addr == MAX77686_INVALID_I2C_ADDR) { 699 info->rtc_regmap = info->regmap; 700 goto add_rtc_irq; 701 } 702 703 info->rtc = devm_i2c_new_dummy_device(info->dev, parent_i2c->adapter, 704 info->drv_data->rtc_i2c_addr); 705 if (IS_ERR(info->rtc)) { 706 dev_err(info->dev, "Failed to allocate I2C device for RTC\n"); 707 return PTR_ERR(info->rtc); 708 } 709 710 info->rtc_regmap = devm_regmap_init_i2c(info->rtc, 711 info->drv_data->regmap_config); 712 if (IS_ERR(info->rtc_regmap)) { 713 ret = PTR_ERR(info->rtc_regmap); 714 dev_err(info->dev, "Failed to allocate RTC regmap: %d\n", ret); 715 return ret; 716 } 717 718 add_rtc_irq: 719 ret = regmap_add_irq_chip(info->rtc_regmap, info->rtc_irq, 720 IRQF_ONESHOT | IRQF_SHARED, 721 0, info->drv_data->rtc_irq_chip, 722 &info->rtc_irq_data); 723 if (ret < 0) { 724 dev_err(info->dev, "Failed to add RTC irq chip: %d\n", ret); 725 return ret; 726 } 727 728 return 0; 729 } 730 731 static int max77686_rtc_probe(struct platform_device *pdev) 732 { 733 struct max77686_rtc_info *info; 734 const struct platform_device_id *id = platform_get_device_id(pdev); 735 int ret; 736 737 info = devm_kzalloc(&pdev->dev, sizeof(struct max77686_rtc_info), 738 GFP_KERNEL); 739 if (!info) 740 return -ENOMEM; 741 742 mutex_init(&info->lock); 743 info->dev = &pdev->dev; 744 info->drv_data = (const struct max77686_rtc_driver_data *) 745 id->driver_data; 746 747 ret = max77686_init_rtc_regmap(info); 748 if (ret < 0) 749 return ret; 750 751 platform_set_drvdata(pdev, info); 752 753 ret = max77686_rtc_init_reg(info); 754 if (ret < 0) { 755 dev_err(&pdev->dev, "Failed to initialize RTC reg:%d\n", ret); 756 goto err_rtc; 757 } 758 759 device_init_wakeup(&pdev->dev, 1); 760 761 info->rtc_dev = devm_rtc_device_register(&pdev->dev, id->name, 762 &max77686_rtc_ops, THIS_MODULE); 763 764 if (IS_ERR(info->rtc_dev)) { 765 ret = PTR_ERR(info->rtc_dev); 766 dev_err(&pdev->dev, "Failed to register RTC device: %d\n", ret); 767 if (ret == 0) 768 ret = -EINVAL; 769 goto err_rtc; 770 } 771 772 info->virq = regmap_irq_get_virq(info->rtc_irq_data, 773 MAX77686_RTCIRQ_RTCA1); 774 if (info->virq <= 0) { 775 ret = -ENXIO; 776 goto err_rtc; 777 } 778 779 ret = request_threaded_irq(info->virq, NULL, max77686_rtc_alarm_irq, 0, 780 "rtc-alarm1", info); 781 if (ret < 0) { 782 dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n", 783 info->virq, ret); 784 goto err_rtc; 785 } 786 787 return 0; 788 789 err_rtc: 790 regmap_del_irq_chip(info->rtc_irq, info->rtc_irq_data); 791 792 return ret; 793 } 794 795 static int max77686_rtc_remove(struct platform_device *pdev) 796 { 797 struct max77686_rtc_info *info = platform_get_drvdata(pdev); 798 799 free_irq(info->virq, info); 800 regmap_del_irq_chip(info->rtc_irq, info->rtc_irq_data); 801 802 return 0; 803 } 804 805 #ifdef CONFIG_PM_SLEEP 806 static int max77686_rtc_suspend(struct device *dev) 807 { 808 struct max77686_rtc_info *info = dev_get_drvdata(dev); 809 int ret = 0; 810 811 if (device_may_wakeup(dev)) { 812 struct max77686_rtc_info *info = dev_get_drvdata(dev); 813 814 ret = enable_irq_wake(info->virq); 815 } 816 817 /* 818 * If the main IRQ (not virtual) is the parent IRQ, then it must be 819 * disabled during suspend because if it happens while suspended it 820 * will be handled before resuming I2C. 821 * 822 * Since Main IRQ is shared, all its users should disable it to be sure 823 * it won't fire while one of them is still suspended. 824 */ 825 if (!info->drv_data->rtc_irq_from_platform) 826 disable_irq(info->rtc_irq); 827 828 return ret; 829 } 830 831 static int max77686_rtc_resume(struct device *dev) 832 { 833 struct max77686_rtc_info *info = dev_get_drvdata(dev); 834 835 if (!info->drv_data->rtc_irq_from_platform) 836 enable_irq(info->rtc_irq); 837 838 if (device_may_wakeup(dev)) { 839 struct max77686_rtc_info *info = dev_get_drvdata(dev); 840 841 return disable_irq_wake(info->virq); 842 } 843 844 return 0; 845 } 846 #endif 847 848 static SIMPLE_DEV_PM_OPS(max77686_rtc_pm_ops, 849 max77686_rtc_suspend, max77686_rtc_resume); 850 851 static const struct platform_device_id rtc_id[] = { 852 { "max77686-rtc", .driver_data = (kernel_ulong_t)&max77686_drv_data, }, 853 { "max77802-rtc", .driver_data = (kernel_ulong_t)&max77802_drv_data, }, 854 { "max77620-rtc", .driver_data = (kernel_ulong_t)&max77620_drv_data, }, 855 {}, 856 }; 857 MODULE_DEVICE_TABLE(platform, rtc_id); 858 859 static struct platform_driver max77686_rtc_driver = { 860 .driver = { 861 .name = "max77686-rtc", 862 .pm = &max77686_rtc_pm_ops, 863 }, 864 .probe = max77686_rtc_probe, 865 .remove = max77686_rtc_remove, 866 .id_table = rtc_id, 867 }; 868 869 module_platform_driver(max77686_rtc_driver); 870 871 MODULE_DESCRIPTION("Maxim MAX77686 RTC driver"); 872 MODULE_AUTHOR("Chiwoong Byun <woong.byun@samsung.com>"); 873 MODULE_LICENSE("GPL"); 874