1 /* 2 * ST M48T59 RTC driver 3 * 4 * Copyright (c) 2007 Wind River Systems, Inc. 5 * 6 * Author: Mark Zhan <rongkai.zhan@windriver.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/init.h> 16 #include <linux/io.h> 17 #include <linux/device.h> 18 #include <linux/platform_device.h> 19 #include <linux/rtc.h> 20 #include <linux/rtc/m48t59.h> 21 #include <linux/bcd.h> 22 #include <linux/slab.h> 23 24 #ifndef NO_IRQ 25 #define NO_IRQ (-1) 26 #endif 27 28 #define M48T59_READ(reg) (pdata->read_byte(dev, pdata->offset + reg)) 29 #define M48T59_WRITE(val, reg) \ 30 (pdata->write_byte(dev, pdata->offset + reg, val)) 31 32 #define M48T59_SET_BITS(mask, reg) \ 33 M48T59_WRITE((M48T59_READ(reg) | (mask)), (reg)) 34 #define M48T59_CLEAR_BITS(mask, reg) \ 35 M48T59_WRITE((M48T59_READ(reg) & ~(mask)), (reg)) 36 37 struct m48t59_private { 38 void __iomem *ioaddr; 39 int irq; 40 struct rtc_device *rtc; 41 spinlock_t lock; /* serialize the NVRAM and RTC access */ 42 }; 43 44 /* 45 * This is the generic access method when the chip is memory-mapped 46 */ 47 static void 48 m48t59_mem_writeb(struct device *dev, u32 ofs, u8 val) 49 { 50 struct m48t59_private *m48t59 = dev_get_drvdata(dev); 51 52 writeb(val, m48t59->ioaddr+ofs); 53 } 54 55 static u8 56 m48t59_mem_readb(struct device *dev, u32 ofs) 57 { 58 struct m48t59_private *m48t59 = dev_get_drvdata(dev); 59 60 return readb(m48t59->ioaddr+ofs); 61 } 62 63 /* 64 * NOTE: M48T59 only uses BCD mode 65 */ 66 static int m48t59_rtc_read_time(struct device *dev, struct rtc_time *tm) 67 { 68 struct m48t59_plat_data *pdata = dev_get_platdata(dev); 69 struct m48t59_private *m48t59 = dev_get_drvdata(dev); 70 unsigned long flags; 71 u8 val; 72 73 spin_lock_irqsave(&m48t59->lock, flags); 74 /* Issue the READ command */ 75 M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL); 76 77 tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR)); 78 /* tm_mon is 0-11 */ 79 tm->tm_mon = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1; 80 tm->tm_mday = bcd2bin(M48T59_READ(M48T59_MDAY)); 81 82 val = M48T59_READ(M48T59_WDAY); 83 if ((pdata->type == M48T59RTC_TYPE_M48T59) && 84 (val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB)) { 85 dev_dbg(dev, "Century bit is enabled\n"); 86 tm->tm_year += 100; /* one century */ 87 } 88 #ifdef CONFIG_SPARC 89 /* Sun SPARC machines count years since 1968 */ 90 tm->tm_year += 68; 91 #endif 92 93 tm->tm_wday = bcd2bin(val & 0x07); 94 tm->tm_hour = bcd2bin(M48T59_READ(M48T59_HOUR) & 0x3F); 95 tm->tm_min = bcd2bin(M48T59_READ(M48T59_MIN) & 0x7F); 96 tm->tm_sec = bcd2bin(M48T59_READ(M48T59_SEC) & 0x7F); 97 98 /* Clear the READ bit */ 99 M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL); 100 spin_unlock_irqrestore(&m48t59->lock, flags); 101 102 dev_dbg(dev, "RTC read time %ptR\n", tm); 103 return 0; 104 } 105 106 static int m48t59_rtc_set_time(struct device *dev, struct rtc_time *tm) 107 { 108 struct m48t59_plat_data *pdata = dev_get_platdata(dev); 109 struct m48t59_private *m48t59 = dev_get_drvdata(dev); 110 unsigned long flags; 111 u8 val = 0; 112 int year = tm->tm_year; 113 114 #ifdef CONFIG_SPARC 115 /* Sun SPARC machines count years since 1968 */ 116 year -= 68; 117 #endif 118 119 dev_dbg(dev, "RTC set time %04d-%02d-%02d %02d/%02d/%02d\n", 120 year + 1900, tm->tm_mon, tm->tm_mday, 121 tm->tm_hour, tm->tm_min, tm->tm_sec); 122 123 if (year < 0) 124 return -EINVAL; 125 126 spin_lock_irqsave(&m48t59->lock, flags); 127 /* Issue the WRITE command */ 128 M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); 129 130 M48T59_WRITE((bin2bcd(tm->tm_sec) & 0x7F), M48T59_SEC); 131 M48T59_WRITE((bin2bcd(tm->tm_min) & 0x7F), M48T59_MIN); 132 M48T59_WRITE((bin2bcd(tm->tm_hour) & 0x3F), M48T59_HOUR); 133 M48T59_WRITE((bin2bcd(tm->tm_mday) & 0x3F), M48T59_MDAY); 134 /* tm_mon is 0-11 */ 135 M48T59_WRITE((bin2bcd(tm->tm_mon + 1) & 0x1F), M48T59_MONTH); 136 M48T59_WRITE(bin2bcd(year % 100), M48T59_YEAR); 137 138 if (pdata->type == M48T59RTC_TYPE_M48T59 && (year / 100)) 139 val = (M48T59_WDAY_CEB | M48T59_WDAY_CB); 140 val |= (bin2bcd(tm->tm_wday) & 0x07); 141 M48T59_WRITE(val, M48T59_WDAY); 142 143 /* Clear the WRITE bit */ 144 M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); 145 spin_unlock_irqrestore(&m48t59->lock, flags); 146 return 0; 147 } 148 149 /* 150 * Read alarm time and date in RTC 151 */ 152 static int m48t59_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm) 153 { 154 struct m48t59_plat_data *pdata = dev_get_platdata(dev); 155 struct m48t59_private *m48t59 = dev_get_drvdata(dev); 156 struct rtc_time *tm = &alrm->time; 157 unsigned long flags; 158 u8 val; 159 160 /* If no irq, we don't support ALARM */ 161 if (m48t59->irq == NO_IRQ) 162 return -EIO; 163 164 spin_lock_irqsave(&m48t59->lock, flags); 165 /* Issue the READ command */ 166 M48T59_SET_BITS(M48T59_CNTL_READ, M48T59_CNTL); 167 168 tm->tm_year = bcd2bin(M48T59_READ(M48T59_YEAR)); 169 #ifdef CONFIG_SPARC 170 /* Sun SPARC machines count years since 1968 */ 171 tm->tm_year += 68; 172 #endif 173 /* tm_mon is 0-11 */ 174 tm->tm_mon = bcd2bin(M48T59_READ(M48T59_MONTH)) - 1; 175 176 val = M48T59_READ(M48T59_WDAY); 177 if ((val & M48T59_WDAY_CEB) && (val & M48T59_WDAY_CB)) 178 tm->tm_year += 100; /* one century */ 179 180 tm->tm_mday = bcd2bin(M48T59_READ(M48T59_ALARM_DATE)); 181 tm->tm_hour = bcd2bin(M48T59_READ(M48T59_ALARM_HOUR)); 182 tm->tm_min = bcd2bin(M48T59_READ(M48T59_ALARM_MIN)); 183 tm->tm_sec = bcd2bin(M48T59_READ(M48T59_ALARM_SEC)); 184 185 /* Clear the READ bit */ 186 M48T59_CLEAR_BITS(M48T59_CNTL_READ, M48T59_CNTL); 187 spin_unlock_irqrestore(&m48t59->lock, flags); 188 189 dev_dbg(dev, "RTC read alarm time %ptR\n", tm); 190 return rtc_valid_tm(tm); 191 } 192 193 /* 194 * Set alarm time and date in RTC 195 */ 196 static int m48t59_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) 197 { 198 struct m48t59_plat_data *pdata = dev_get_platdata(dev); 199 struct m48t59_private *m48t59 = dev_get_drvdata(dev); 200 struct rtc_time *tm = &alrm->time; 201 u8 mday, hour, min, sec; 202 unsigned long flags; 203 int year = tm->tm_year; 204 205 #ifdef CONFIG_SPARC 206 /* Sun SPARC machines count years since 1968 */ 207 year -= 68; 208 #endif 209 210 /* If no irq, we don't support ALARM */ 211 if (m48t59->irq == NO_IRQ) 212 return -EIO; 213 214 if (year < 0) 215 return -EINVAL; 216 217 /* 218 * 0xff means "always match" 219 */ 220 mday = tm->tm_mday; 221 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff; 222 if (mday == 0xff) 223 mday = M48T59_READ(M48T59_MDAY); 224 225 hour = tm->tm_hour; 226 hour = (hour < 24) ? bin2bcd(hour) : 0x00; 227 228 min = tm->tm_min; 229 min = (min < 60) ? bin2bcd(min) : 0x00; 230 231 sec = tm->tm_sec; 232 sec = (sec < 60) ? bin2bcd(sec) : 0x00; 233 234 spin_lock_irqsave(&m48t59->lock, flags); 235 /* Issue the WRITE command */ 236 M48T59_SET_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); 237 238 M48T59_WRITE(mday, M48T59_ALARM_DATE); 239 M48T59_WRITE(hour, M48T59_ALARM_HOUR); 240 M48T59_WRITE(min, M48T59_ALARM_MIN); 241 M48T59_WRITE(sec, M48T59_ALARM_SEC); 242 243 /* Clear the WRITE bit */ 244 M48T59_CLEAR_BITS(M48T59_CNTL_WRITE, M48T59_CNTL); 245 spin_unlock_irqrestore(&m48t59->lock, flags); 246 247 dev_dbg(dev, "RTC set alarm time %04d-%02d-%02d %02d/%02d/%02d\n", 248 year + 1900, tm->tm_mon, tm->tm_mday, 249 tm->tm_hour, tm->tm_min, tm->tm_sec); 250 return 0; 251 } 252 253 /* 254 * Handle commands from user-space 255 */ 256 static int m48t59_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) 257 { 258 struct m48t59_plat_data *pdata = dev_get_platdata(dev); 259 struct m48t59_private *m48t59 = dev_get_drvdata(dev); 260 unsigned long flags; 261 262 spin_lock_irqsave(&m48t59->lock, flags); 263 if (enabled) 264 M48T59_WRITE(M48T59_INTR_AFE, M48T59_INTR); 265 else 266 M48T59_WRITE(0x00, M48T59_INTR); 267 spin_unlock_irqrestore(&m48t59->lock, flags); 268 269 return 0; 270 } 271 272 static int m48t59_rtc_proc(struct device *dev, struct seq_file *seq) 273 { 274 struct m48t59_plat_data *pdata = dev_get_platdata(dev); 275 struct m48t59_private *m48t59 = dev_get_drvdata(dev); 276 unsigned long flags; 277 u8 val; 278 279 spin_lock_irqsave(&m48t59->lock, flags); 280 val = M48T59_READ(M48T59_FLAGS); 281 spin_unlock_irqrestore(&m48t59->lock, flags); 282 283 seq_printf(seq, "battery\t\t: %s\n", 284 (val & M48T59_FLAGS_BF) ? "low" : "normal"); 285 return 0; 286 } 287 288 /* 289 * IRQ handler for the RTC 290 */ 291 static irqreturn_t m48t59_rtc_interrupt(int irq, void *dev_id) 292 { 293 struct device *dev = (struct device *)dev_id; 294 struct m48t59_plat_data *pdata = dev_get_platdata(dev); 295 struct m48t59_private *m48t59 = dev_get_drvdata(dev); 296 u8 event; 297 298 spin_lock(&m48t59->lock); 299 event = M48T59_READ(M48T59_FLAGS); 300 spin_unlock(&m48t59->lock); 301 302 if (event & M48T59_FLAGS_AF) { 303 rtc_update_irq(m48t59->rtc, 1, (RTC_AF | RTC_IRQF)); 304 return IRQ_HANDLED; 305 } 306 307 return IRQ_NONE; 308 } 309 310 static const struct rtc_class_ops m48t59_rtc_ops = { 311 .read_time = m48t59_rtc_read_time, 312 .set_time = m48t59_rtc_set_time, 313 .read_alarm = m48t59_rtc_readalarm, 314 .set_alarm = m48t59_rtc_setalarm, 315 .proc = m48t59_rtc_proc, 316 .alarm_irq_enable = m48t59_rtc_alarm_irq_enable, 317 }; 318 319 static const struct rtc_class_ops m48t02_rtc_ops = { 320 .read_time = m48t59_rtc_read_time, 321 .set_time = m48t59_rtc_set_time, 322 }; 323 324 static int m48t59_nvram_read(void *priv, unsigned int offset, void *val, 325 size_t size) 326 { 327 struct platform_device *pdev = priv; 328 struct device *dev = &pdev->dev; 329 struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev); 330 struct m48t59_private *m48t59 = platform_get_drvdata(pdev); 331 ssize_t cnt = 0; 332 unsigned long flags; 333 u8 *buf = val; 334 335 spin_lock_irqsave(&m48t59->lock, flags); 336 337 for (; cnt < size; cnt++) 338 *buf++ = M48T59_READ(cnt); 339 340 spin_unlock_irqrestore(&m48t59->lock, flags); 341 342 return 0; 343 } 344 345 static int m48t59_nvram_write(void *priv, unsigned int offset, void *val, 346 size_t size) 347 { 348 struct platform_device *pdev = priv; 349 struct device *dev = &pdev->dev; 350 struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev); 351 struct m48t59_private *m48t59 = platform_get_drvdata(pdev); 352 ssize_t cnt = 0; 353 unsigned long flags; 354 u8 *buf = val; 355 356 spin_lock_irqsave(&m48t59->lock, flags); 357 358 for (; cnt < size; cnt++) 359 M48T59_WRITE(*buf++, cnt); 360 361 spin_unlock_irqrestore(&m48t59->lock, flags); 362 363 return 0; 364 } 365 366 static int m48t59_rtc_probe(struct platform_device *pdev) 367 { 368 struct m48t59_plat_data *pdata = dev_get_platdata(&pdev->dev); 369 struct m48t59_private *m48t59 = NULL; 370 struct resource *res; 371 int ret = -ENOMEM; 372 const struct rtc_class_ops *ops; 373 struct nvmem_config nvmem_cfg = { 374 .name = "m48t59-", 375 .word_size = 1, 376 .stride = 1, 377 .reg_read = m48t59_nvram_read, 378 .reg_write = m48t59_nvram_write, 379 .priv = pdev, 380 }; 381 382 /* This chip could be memory-mapped or I/O-mapped */ 383 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 384 if (!res) { 385 res = platform_get_resource(pdev, IORESOURCE_IO, 0); 386 if (!res) 387 return -EINVAL; 388 } 389 390 if (res->flags & IORESOURCE_IO) { 391 /* If we are I/O-mapped, the platform should provide 392 * the operations accessing chip registers. 393 */ 394 if (!pdata || !pdata->write_byte || !pdata->read_byte) 395 return -EINVAL; 396 } else if (res->flags & IORESOURCE_MEM) { 397 /* we are memory-mapped */ 398 if (!pdata) { 399 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), 400 GFP_KERNEL); 401 if (!pdata) 402 return -ENOMEM; 403 /* Ensure we only kmalloc platform data once */ 404 pdev->dev.platform_data = pdata; 405 } 406 if (!pdata->type) 407 pdata->type = M48T59RTC_TYPE_M48T59; 408 409 /* Try to use the generic memory read/write ops */ 410 if (!pdata->write_byte) 411 pdata->write_byte = m48t59_mem_writeb; 412 if (!pdata->read_byte) 413 pdata->read_byte = m48t59_mem_readb; 414 } 415 416 m48t59 = devm_kzalloc(&pdev->dev, sizeof(*m48t59), GFP_KERNEL); 417 if (!m48t59) 418 return -ENOMEM; 419 420 m48t59->ioaddr = pdata->ioaddr; 421 422 if (!m48t59->ioaddr) { 423 /* ioaddr not mapped externally */ 424 m48t59->ioaddr = devm_ioremap(&pdev->dev, res->start, 425 resource_size(res)); 426 if (!m48t59->ioaddr) 427 return ret; 428 } 429 430 /* Try to get irq number. We also can work in 431 * the mode without IRQ. 432 */ 433 m48t59->irq = platform_get_irq(pdev, 0); 434 if (m48t59->irq <= 0) 435 m48t59->irq = NO_IRQ; 436 437 if (m48t59->irq != NO_IRQ) { 438 ret = devm_request_irq(&pdev->dev, m48t59->irq, 439 m48t59_rtc_interrupt, IRQF_SHARED, 440 "rtc-m48t59", &pdev->dev); 441 if (ret) 442 return ret; 443 } 444 switch (pdata->type) { 445 case M48T59RTC_TYPE_M48T59: 446 ops = &m48t59_rtc_ops; 447 pdata->offset = 0x1ff0; 448 break; 449 case M48T59RTC_TYPE_M48T02: 450 ops = &m48t02_rtc_ops; 451 pdata->offset = 0x7f0; 452 break; 453 case M48T59RTC_TYPE_M48T08: 454 ops = &m48t02_rtc_ops; 455 pdata->offset = 0x1ff0; 456 break; 457 default: 458 dev_err(&pdev->dev, "Unknown RTC type\n"); 459 return -ENODEV; 460 } 461 462 spin_lock_init(&m48t59->lock); 463 platform_set_drvdata(pdev, m48t59); 464 465 m48t59->rtc = devm_rtc_allocate_device(&pdev->dev); 466 if (IS_ERR(m48t59->rtc)) 467 return PTR_ERR(m48t59->rtc); 468 469 m48t59->rtc->nvram_old_abi = true; 470 m48t59->rtc->ops = ops; 471 472 nvmem_cfg.size = pdata->offset; 473 ret = rtc_nvmem_register(m48t59->rtc, &nvmem_cfg); 474 if (ret) 475 return ret; 476 477 ret = rtc_register_device(m48t59->rtc); 478 if (ret) 479 return ret; 480 481 return 0; 482 } 483 484 /* work with hotplug and coldplug */ 485 MODULE_ALIAS("platform:rtc-m48t59"); 486 487 static struct platform_driver m48t59_rtc_driver = { 488 .driver = { 489 .name = "rtc-m48t59", 490 }, 491 .probe = m48t59_rtc_probe, 492 }; 493 494 module_platform_driver(m48t59_rtc_driver); 495 496 MODULE_AUTHOR("Mark Zhan <rongkai.zhan@windriver.com>"); 497 MODULE_DESCRIPTION("M48T59/M48T02/M48T08 RTC driver"); 498 MODULE_LICENSE("GPL"); 499