1 /* 2 * I2C client/driver for the ST M41T80 family of i2c rtc chips. 3 * 4 * Author: Alexander Bigga <ab@mycable.de> 5 * 6 * Based on m41t00.c by Mark A. Greer <mgreer@mvista.com> 7 * 8 * 2006 (c) mycable GmbH 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 * 14 */ 15 16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 17 18 #include <linux/bcd.h> 19 #include <linux/clk-provider.h> 20 #include <linux/i2c.h> 21 #include <linux/init.h> 22 #include <linux/kernel.h> 23 #include <linux/module.h> 24 #include <linux/of_device.h> 25 #include <linux/rtc.h> 26 #include <linux/slab.h> 27 #include <linux/mutex.h> 28 #include <linux/string.h> 29 #ifdef CONFIG_RTC_DRV_M41T80_WDT 30 #include <linux/fs.h> 31 #include <linux/ioctl.h> 32 #include <linux/miscdevice.h> 33 #include <linux/reboot.h> 34 #include <linux/watchdog.h> 35 #endif 36 37 #define M41T80_REG_SSEC 0x00 38 #define M41T80_REG_SEC 0x01 39 #define M41T80_REG_MIN 0x02 40 #define M41T80_REG_HOUR 0x03 41 #define M41T80_REG_WDAY 0x04 42 #define M41T80_REG_DAY 0x05 43 #define M41T80_REG_MON 0x06 44 #define M41T80_REG_YEAR 0x07 45 #define M41T80_REG_ALARM_MON 0x0a 46 #define M41T80_REG_ALARM_DAY 0x0b 47 #define M41T80_REG_ALARM_HOUR 0x0c 48 #define M41T80_REG_ALARM_MIN 0x0d 49 #define M41T80_REG_ALARM_SEC 0x0e 50 #define M41T80_REG_FLAGS 0x0f 51 #define M41T80_REG_SQW 0x13 52 53 #define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1) 54 #define M41T80_ALARM_REG_SIZE \ 55 (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON) 56 57 #define M41T80_SQW_MAX_FREQ 32768 58 59 #define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */ 60 #define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */ 61 #define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */ 62 #define M41T80_ALHOUR_HT BIT(6) /* HT: Halt Update Bit */ 63 #define M41T80_FLAGS_OF BIT(2) /* OF: Oscillator Failure Bit */ 64 #define M41T80_FLAGS_AF BIT(6) /* AF: Alarm Flag Bit */ 65 #define M41T80_FLAGS_BATT_LOW BIT(4) /* BL: Battery Low Bit */ 66 #define M41T80_WATCHDOG_RB2 BIT(7) /* RB: Watchdog resolution */ 67 #define M41T80_WATCHDOG_RB1 BIT(1) /* RB: Watchdog resolution */ 68 #define M41T80_WATCHDOG_RB0 BIT(0) /* RB: Watchdog resolution */ 69 70 #define M41T80_FEATURE_HT BIT(0) /* Halt feature */ 71 #define M41T80_FEATURE_BL BIT(1) /* Battery low indicator */ 72 #define M41T80_FEATURE_SQ BIT(2) /* Squarewave feature */ 73 #define M41T80_FEATURE_WD BIT(3) /* Extra watchdog resolution */ 74 #define M41T80_FEATURE_SQ_ALT BIT(4) /* RSx bits are in reg 4 */ 75 76 static const struct i2c_device_id m41t80_id[] = { 77 { "m41t62", M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT }, 78 { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD }, 79 { "m41t80", M41T80_FEATURE_SQ }, 80 { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ}, 81 { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 82 { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 83 { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 84 { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 85 { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 86 { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 87 { "rv4162", M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT }, 88 { } 89 }; 90 MODULE_DEVICE_TABLE(i2c, m41t80_id); 91 92 static const struct of_device_id m41t80_of_match[] = { 93 { 94 .compatible = "st,m41t62", 95 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT) 96 }, 97 { 98 .compatible = "st,m41t65", 99 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_WD) 100 }, 101 { 102 .compatible = "st,m41t80", 103 .data = (void *)(M41T80_FEATURE_SQ) 104 }, 105 { 106 .compatible = "st,m41t81", 107 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_SQ) 108 }, 109 { 110 .compatible = "st,m41t81s", 111 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 112 }, 113 { 114 .compatible = "st,m41t82", 115 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 116 }, 117 { 118 .compatible = "st,m41t83", 119 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 120 }, 121 { 122 .compatible = "st,m41t84", 123 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 124 }, 125 { 126 .compatible = "st,m41t85", 127 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 128 }, 129 { 130 .compatible = "st,m41t87", 131 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 132 }, 133 { 134 .compatible = "microcrystal,rv4162", 135 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) 136 }, 137 /* DT compatibility only, do not use compatibles below: */ 138 { 139 .compatible = "st,rv4162", 140 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) 141 }, 142 { 143 .compatible = "rv4162", 144 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) 145 }, 146 { } 147 }; 148 MODULE_DEVICE_TABLE(of, m41t80_of_match); 149 150 struct m41t80_data { 151 unsigned long features; 152 struct i2c_client *client; 153 struct rtc_device *rtc; 154 #ifdef CONFIG_COMMON_CLK 155 struct clk_hw sqw; 156 unsigned long freq; 157 unsigned int sqwe; 158 #endif 159 }; 160 161 static irqreturn_t m41t80_handle_irq(int irq, void *dev_id) 162 { 163 struct i2c_client *client = dev_id; 164 struct m41t80_data *m41t80 = i2c_get_clientdata(client); 165 struct mutex *lock = &m41t80->rtc->ops_lock; 166 unsigned long events = 0; 167 int flags, flags_afe; 168 169 mutex_lock(lock); 170 171 flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 172 if (flags_afe < 0) { 173 mutex_unlock(lock); 174 return IRQ_NONE; 175 } 176 177 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 178 if (flags <= 0) { 179 mutex_unlock(lock); 180 return IRQ_NONE; 181 } 182 183 if (flags & M41T80_FLAGS_AF) { 184 flags &= ~M41T80_FLAGS_AF; 185 flags_afe &= ~M41T80_ALMON_AFE; 186 events |= RTC_AF; 187 } 188 189 if (events) { 190 rtc_update_irq(m41t80->rtc, 1, events); 191 i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags); 192 i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 193 flags_afe); 194 } 195 196 mutex_unlock(lock); 197 198 return IRQ_HANDLED; 199 } 200 201 static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm) 202 { 203 struct i2c_client *client = to_i2c_client(dev); 204 unsigned char buf[8]; 205 int err, flags; 206 207 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 208 if (flags < 0) 209 return flags; 210 211 if (flags & M41T80_FLAGS_OF) { 212 dev_err(&client->dev, "Oscillator failure, data is invalid.\n"); 213 return -EINVAL; 214 } 215 216 err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC, 217 sizeof(buf), buf); 218 if (err < 0) { 219 dev_err(&client->dev, "Unable to read date\n"); 220 return -EIO; 221 } 222 223 tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f); 224 tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f); 225 tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f); 226 tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f); 227 tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07; 228 tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1; 229 230 /* assume 20YY not 19YY, and ignore the Century Bit */ 231 tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100; 232 return 0; 233 } 234 235 static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm) 236 { 237 struct i2c_client *client = to_i2c_client(dev); 238 struct m41t80_data *clientdata = i2c_get_clientdata(client); 239 unsigned char buf[8]; 240 int err, flags; 241 242 if (tm->tm_year < 100 || tm->tm_year > 199) 243 return -EINVAL; 244 245 buf[M41T80_REG_SSEC] = 0; 246 buf[M41T80_REG_SEC] = bin2bcd(tm->tm_sec); 247 buf[M41T80_REG_MIN] = bin2bcd(tm->tm_min); 248 buf[M41T80_REG_HOUR] = bin2bcd(tm->tm_hour); 249 buf[M41T80_REG_DAY] = bin2bcd(tm->tm_mday); 250 buf[M41T80_REG_MON] = bin2bcd(tm->tm_mon + 1); 251 buf[M41T80_REG_YEAR] = bin2bcd(tm->tm_year - 100); 252 buf[M41T80_REG_WDAY] = tm->tm_wday; 253 254 /* If the square wave output is controlled in the weekday register */ 255 if (clientdata->features & M41T80_FEATURE_SQ_ALT) { 256 int val; 257 258 val = i2c_smbus_read_byte_data(client, M41T80_REG_WDAY); 259 if (val < 0) 260 return val; 261 262 buf[M41T80_REG_WDAY] |= (val & 0xf0); 263 } 264 265 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC, 266 sizeof(buf), buf); 267 if (err < 0) { 268 dev_err(&client->dev, "Unable to write to date registers\n"); 269 return err; 270 } 271 272 /* Clear the OF bit of Flags Register */ 273 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 274 if (flags < 0) 275 return flags; 276 277 if (i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, 278 flags & ~M41T80_FLAGS_OF)) { 279 dev_err(&client->dev, "Unable to write flags register\n"); 280 return -EIO; 281 } 282 283 return err; 284 } 285 286 static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq) 287 { 288 struct i2c_client *client = to_i2c_client(dev); 289 struct m41t80_data *clientdata = i2c_get_clientdata(client); 290 u8 reg; 291 292 if (clientdata->features & M41T80_FEATURE_BL) { 293 reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 294 seq_printf(seq, "battery\t\t: %s\n", 295 (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok"); 296 } 297 return 0; 298 } 299 300 static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled) 301 { 302 struct i2c_client *client = to_i2c_client(dev); 303 int flags, retval; 304 305 flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 306 if (flags < 0) 307 return flags; 308 309 if (enabled) 310 flags |= M41T80_ALMON_AFE; 311 else 312 flags &= ~M41T80_ALMON_AFE; 313 314 retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, flags); 315 if (retval < 0) { 316 dev_err(dev, "Unable to enable alarm IRQ %d\n", retval); 317 return retval; 318 } 319 return 0; 320 } 321 322 static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 323 { 324 struct i2c_client *client = to_i2c_client(dev); 325 u8 alarmvals[5]; 326 int ret, err; 327 328 alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1); 329 alarmvals[1] = bin2bcd(alrm->time.tm_mday); 330 alarmvals[2] = bin2bcd(alrm->time.tm_hour); 331 alarmvals[3] = bin2bcd(alrm->time.tm_min); 332 alarmvals[4] = bin2bcd(alrm->time.tm_sec); 333 334 /* Clear AF and AFE flags */ 335 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 336 if (ret < 0) 337 return ret; 338 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 339 ret & ~(M41T80_ALMON_AFE)); 340 if (err < 0) { 341 dev_err(dev, "Unable to clear AFE bit\n"); 342 return err; 343 } 344 345 /* Keep SQWE bit value */ 346 alarmvals[0] |= (ret & M41T80_ALMON_SQWE); 347 348 ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 349 if (ret < 0) 350 return ret; 351 352 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, 353 ret & ~(M41T80_FLAGS_AF)); 354 if (err < 0) { 355 dev_err(dev, "Unable to clear AF bit\n"); 356 return err; 357 } 358 359 /* Write the alarm */ 360 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON, 361 5, alarmvals); 362 if (err) 363 return err; 364 365 /* Enable the alarm interrupt */ 366 if (alrm->enabled) { 367 alarmvals[0] |= M41T80_ALMON_AFE; 368 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 369 alarmvals[0]); 370 if (err) 371 return err; 372 } 373 374 return 0; 375 } 376 377 static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 378 { 379 struct i2c_client *client = to_i2c_client(dev); 380 u8 alarmvals[5]; 381 int flags, ret; 382 383 ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON, 384 5, alarmvals); 385 if (ret != 5) 386 return ret < 0 ? ret : -EIO; 387 388 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 389 if (flags < 0) 390 return flags; 391 392 alrm->time.tm_sec = bcd2bin(alarmvals[4] & 0x7f); 393 alrm->time.tm_min = bcd2bin(alarmvals[3] & 0x7f); 394 alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f); 395 alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f); 396 alrm->time.tm_mon = bcd2bin(alarmvals[0] & 0x3f); 397 398 alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE); 399 alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled; 400 401 return 0; 402 } 403 404 static struct rtc_class_ops m41t80_rtc_ops = { 405 .read_time = m41t80_rtc_read_time, 406 .set_time = m41t80_rtc_set_time, 407 .proc = m41t80_rtc_proc, 408 }; 409 410 #ifdef CONFIG_PM_SLEEP 411 static int m41t80_suspend(struct device *dev) 412 { 413 struct i2c_client *client = to_i2c_client(dev); 414 415 if (client->irq >= 0 && device_may_wakeup(dev)) 416 enable_irq_wake(client->irq); 417 418 return 0; 419 } 420 421 static int m41t80_resume(struct device *dev) 422 { 423 struct i2c_client *client = to_i2c_client(dev); 424 425 if (client->irq >= 0 && device_may_wakeup(dev)) 426 disable_irq_wake(client->irq); 427 428 return 0; 429 } 430 #endif 431 432 static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume); 433 434 #ifdef CONFIG_COMMON_CLK 435 #define sqw_to_m41t80_data(_hw) container_of(_hw, struct m41t80_data, sqw) 436 437 static unsigned long m41t80_decode_freq(int setting) 438 { 439 return (setting == 0) ? 0 : (setting == 1) ? M41T80_SQW_MAX_FREQ : 440 M41T80_SQW_MAX_FREQ >> setting; 441 } 442 443 static unsigned long m41t80_get_freq(struct m41t80_data *m41t80) 444 { 445 struct i2c_client *client = m41t80->client; 446 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ? 447 M41T80_REG_WDAY : M41T80_REG_SQW; 448 int ret = i2c_smbus_read_byte_data(client, reg_sqw); 449 450 if (ret < 0) 451 return 0; 452 return m41t80_decode_freq(ret >> 4); 453 } 454 455 static unsigned long m41t80_sqw_recalc_rate(struct clk_hw *hw, 456 unsigned long parent_rate) 457 { 458 return sqw_to_m41t80_data(hw)->freq; 459 } 460 461 static long m41t80_sqw_round_rate(struct clk_hw *hw, unsigned long rate, 462 unsigned long *prate) 463 { 464 if (rate >= M41T80_SQW_MAX_FREQ) 465 return M41T80_SQW_MAX_FREQ; 466 if (rate >= M41T80_SQW_MAX_FREQ / 4) 467 return M41T80_SQW_MAX_FREQ / 4; 468 if (!rate) 469 return 0; 470 return 1 << ilog2(rate); 471 } 472 473 static int m41t80_sqw_set_rate(struct clk_hw *hw, unsigned long rate, 474 unsigned long parent_rate) 475 { 476 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw); 477 struct i2c_client *client = m41t80->client; 478 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ? 479 M41T80_REG_WDAY : M41T80_REG_SQW; 480 int reg, ret, val = 0; 481 482 if (rate >= M41T80_SQW_MAX_FREQ) 483 val = 1; 484 else if (rate >= M41T80_SQW_MAX_FREQ / 4) 485 val = 2; 486 else if (rate) 487 val = 15 - ilog2(rate); 488 489 reg = i2c_smbus_read_byte_data(client, reg_sqw); 490 if (reg < 0) 491 return reg; 492 493 reg = (reg & 0x0f) | (val << 4); 494 495 ret = i2c_smbus_write_byte_data(client, reg_sqw, reg); 496 if (!ret) 497 m41t80->freq = m41t80_decode_freq(val); 498 return ret; 499 } 500 501 static int m41t80_sqw_control(struct clk_hw *hw, bool enable) 502 { 503 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw); 504 struct i2c_client *client = m41t80->client; 505 int ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 506 507 if (ret < 0) 508 return ret; 509 510 if (enable) 511 ret |= M41T80_ALMON_SQWE; 512 else 513 ret &= ~M41T80_ALMON_SQWE; 514 515 ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, ret); 516 if (!ret) 517 m41t80->sqwe = enable; 518 return ret; 519 } 520 521 static int m41t80_sqw_prepare(struct clk_hw *hw) 522 { 523 return m41t80_sqw_control(hw, 1); 524 } 525 526 static void m41t80_sqw_unprepare(struct clk_hw *hw) 527 { 528 m41t80_sqw_control(hw, 0); 529 } 530 531 static int m41t80_sqw_is_prepared(struct clk_hw *hw) 532 { 533 return sqw_to_m41t80_data(hw)->sqwe; 534 } 535 536 static const struct clk_ops m41t80_sqw_ops = { 537 .prepare = m41t80_sqw_prepare, 538 .unprepare = m41t80_sqw_unprepare, 539 .is_prepared = m41t80_sqw_is_prepared, 540 .recalc_rate = m41t80_sqw_recalc_rate, 541 .round_rate = m41t80_sqw_round_rate, 542 .set_rate = m41t80_sqw_set_rate, 543 }; 544 545 static struct clk *m41t80_sqw_register_clk(struct m41t80_data *m41t80) 546 { 547 struct i2c_client *client = m41t80->client; 548 struct device_node *node = client->dev.of_node; 549 struct clk *clk; 550 struct clk_init_data init; 551 int ret; 552 553 /* First disable the clock */ 554 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 555 if (ret < 0) 556 return ERR_PTR(ret); 557 ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 558 ret & ~(M41T80_ALMON_SQWE)); 559 if (ret < 0) 560 return ERR_PTR(ret); 561 562 init.name = "m41t80-sqw"; 563 init.ops = &m41t80_sqw_ops; 564 init.flags = 0; 565 init.parent_names = NULL; 566 init.num_parents = 0; 567 m41t80->sqw.init = &init; 568 m41t80->freq = m41t80_get_freq(m41t80); 569 570 /* optional override of the clockname */ 571 of_property_read_string(node, "clock-output-names", &init.name); 572 573 /* register the clock */ 574 clk = clk_register(&client->dev, &m41t80->sqw); 575 if (!IS_ERR(clk)) 576 of_clk_add_provider(node, of_clk_src_simple_get, clk); 577 578 return clk; 579 } 580 #endif 581 582 #ifdef CONFIG_RTC_DRV_M41T80_WDT 583 /* 584 ***************************************************************************** 585 * 586 * Watchdog Driver 587 * 588 ***************************************************************************** 589 */ 590 static DEFINE_MUTEX(m41t80_rtc_mutex); 591 static struct i2c_client *save_client; 592 593 /* Default margin */ 594 #define WD_TIMO 60 /* 1..31 seconds */ 595 596 static int wdt_margin = WD_TIMO; 597 module_param(wdt_margin, int, 0); 598 MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)"); 599 600 static unsigned long wdt_is_open; 601 static int boot_flag; 602 603 /** 604 * wdt_ping: 605 * 606 * Reload counter one with the watchdog timeout. We don't bother reloading 607 * the cascade counter. 608 */ 609 static void wdt_ping(void) 610 { 611 unsigned char i2c_data[2]; 612 struct i2c_msg msgs1[1] = { 613 { 614 .addr = save_client->addr, 615 .flags = 0, 616 .len = 2, 617 .buf = i2c_data, 618 }, 619 }; 620 struct m41t80_data *clientdata = i2c_get_clientdata(save_client); 621 622 i2c_data[0] = 0x09; /* watchdog register */ 623 624 if (wdt_margin > 31) 625 i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */ 626 else 627 /* 628 * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02) 629 */ 630 i2c_data[1] = wdt_margin << 2 | 0x82; 631 632 /* 633 * M41T65 has three bits for watchdog resolution. Don't set bit 7, as 634 * that would be an invalid resolution. 635 */ 636 if (clientdata->features & M41T80_FEATURE_WD) 637 i2c_data[1] &= ~M41T80_WATCHDOG_RB2; 638 639 i2c_transfer(save_client->adapter, msgs1, 1); 640 } 641 642 /** 643 * wdt_disable: 644 * 645 * disables watchdog. 646 */ 647 static void wdt_disable(void) 648 { 649 unsigned char i2c_data[2], i2c_buf[0x10]; 650 struct i2c_msg msgs0[2] = { 651 { 652 .addr = save_client->addr, 653 .flags = 0, 654 .len = 1, 655 .buf = i2c_data, 656 }, 657 { 658 .addr = save_client->addr, 659 .flags = I2C_M_RD, 660 .len = 1, 661 .buf = i2c_buf, 662 }, 663 }; 664 struct i2c_msg msgs1[1] = { 665 { 666 .addr = save_client->addr, 667 .flags = 0, 668 .len = 2, 669 .buf = i2c_data, 670 }, 671 }; 672 673 i2c_data[0] = 0x09; 674 i2c_transfer(save_client->adapter, msgs0, 2); 675 676 i2c_data[0] = 0x09; 677 i2c_data[1] = 0x00; 678 i2c_transfer(save_client->adapter, msgs1, 1); 679 } 680 681 /** 682 * wdt_write: 683 * @file: file handle to the watchdog 684 * @buf: buffer to write (unused as data does not matter here 685 * @count: count of bytes 686 * @ppos: pointer to the position to write. No seeks allowed 687 * 688 * A write to a watchdog device is defined as a keepalive signal. Any 689 * write of data will do, as we we don't define content meaning. 690 */ 691 static ssize_t wdt_write(struct file *file, const char __user *buf, 692 size_t count, loff_t *ppos) 693 { 694 if (count) { 695 wdt_ping(); 696 return 1; 697 } 698 return 0; 699 } 700 701 static ssize_t wdt_read(struct file *file, char __user *buf, 702 size_t count, loff_t *ppos) 703 { 704 return 0; 705 } 706 707 /** 708 * wdt_ioctl: 709 * @inode: inode of the device 710 * @file: file handle to the device 711 * @cmd: watchdog command 712 * @arg: argument pointer 713 * 714 * The watchdog API defines a common set of functions for all watchdogs 715 * according to their available features. We only actually usefully support 716 * querying capabilities and current status. 717 */ 718 static int wdt_ioctl(struct file *file, unsigned int cmd, 719 unsigned long arg) 720 { 721 int new_margin, rv; 722 static struct watchdog_info ident = { 723 .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING | 724 WDIOF_SETTIMEOUT, 725 .firmware_version = 1, 726 .identity = "M41T80 WTD" 727 }; 728 729 switch (cmd) { 730 case WDIOC_GETSUPPORT: 731 return copy_to_user((struct watchdog_info __user *)arg, &ident, 732 sizeof(ident)) ? -EFAULT : 0; 733 734 case WDIOC_GETSTATUS: 735 case WDIOC_GETBOOTSTATUS: 736 return put_user(boot_flag, (int __user *)arg); 737 case WDIOC_KEEPALIVE: 738 wdt_ping(); 739 return 0; 740 case WDIOC_SETTIMEOUT: 741 if (get_user(new_margin, (int __user *)arg)) 742 return -EFAULT; 743 /* Arbitrary, can't find the card's limits */ 744 if (new_margin < 1 || new_margin > 124) 745 return -EINVAL; 746 wdt_margin = new_margin; 747 wdt_ping(); 748 /* Fall through */ 749 case WDIOC_GETTIMEOUT: 750 return put_user(wdt_margin, (int __user *)arg); 751 752 case WDIOC_SETOPTIONS: 753 if (copy_from_user(&rv, (int __user *)arg, sizeof(int))) 754 return -EFAULT; 755 756 if (rv & WDIOS_DISABLECARD) { 757 pr_info("disable watchdog\n"); 758 wdt_disable(); 759 } 760 761 if (rv & WDIOS_ENABLECARD) { 762 pr_info("enable watchdog\n"); 763 wdt_ping(); 764 } 765 766 return -EINVAL; 767 } 768 return -ENOTTY; 769 } 770 771 static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd, 772 unsigned long arg) 773 { 774 int ret; 775 776 mutex_lock(&m41t80_rtc_mutex); 777 ret = wdt_ioctl(file, cmd, arg); 778 mutex_unlock(&m41t80_rtc_mutex); 779 780 return ret; 781 } 782 783 /** 784 * wdt_open: 785 * @inode: inode of device 786 * @file: file handle to device 787 * 788 */ 789 static int wdt_open(struct inode *inode, struct file *file) 790 { 791 if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) { 792 mutex_lock(&m41t80_rtc_mutex); 793 if (test_and_set_bit(0, &wdt_is_open)) { 794 mutex_unlock(&m41t80_rtc_mutex); 795 return -EBUSY; 796 } 797 /* 798 * Activate 799 */ 800 wdt_is_open = 1; 801 mutex_unlock(&m41t80_rtc_mutex); 802 return nonseekable_open(inode, file); 803 } 804 return -ENODEV; 805 } 806 807 /** 808 * wdt_close: 809 * @inode: inode to board 810 * @file: file handle to board 811 * 812 */ 813 static int wdt_release(struct inode *inode, struct file *file) 814 { 815 if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) 816 clear_bit(0, &wdt_is_open); 817 return 0; 818 } 819 820 /** 821 * notify_sys: 822 * @this: our notifier block 823 * @code: the event being reported 824 * @unused: unused 825 * 826 * Our notifier is called on system shutdowns. We want to turn the card 827 * off at reboot otherwise the machine will reboot again during memory 828 * test or worse yet during the following fsck. This would suck, in fact 829 * trust me - if it happens it does suck. 830 */ 831 static int wdt_notify_sys(struct notifier_block *this, unsigned long code, 832 void *unused) 833 { 834 if (code == SYS_DOWN || code == SYS_HALT) 835 /* Disable Watchdog */ 836 wdt_disable(); 837 return NOTIFY_DONE; 838 } 839 840 static const struct file_operations wdt_fops = { 841 .owner = THIS_MODULE, 842 .read = wdt_read, 843 .unlocked_ioctl = wdt_unlocked_ioctl, 844 .write = wdt_write, 845 .open = wdt_open, 846 .release = wdt_release, 847 .llseek = no_llseek, 848 }; 849 850 static struct miscdevice wdt_dev = { 851 .minor = WATCHDOG_MINOR, 852 .name = "watchdog", 853 .fops = &wdt_fops, 854 }; 855 856 /* 857 * The WDT card needs to learn about soft shutdowns in order to 858 * turn the timebomb registers off. 859 */ 860 static struct notifier_block wdt_notifier = { 861 .notifier_call = wdt_notify_sys, 862 }; 863 #endif /* CONFIG_RTC_DRV_M41T80_WDT */ 864 865 /* 866 ***************************************************************************** 867 * 868 * Driver Interface 869 * 870 ***************************************************************************** 871 */ 872 873 static int m41t80_probe(struct i2c_client *client, 874 const struct i2c_device_id *id) 875 { 876 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); 877 int rc = 0; 878 struct rtc_time tm; 879 struct m41t80_data *m41t80_data = NULL; 880 bool wakeup_source = false; 881 882 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK | 883 I2C_FUNC_SMBUS_BYTE_DATA)) { 884 dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n"); 885 return -ENODEV; 886 } 887 888 m41t80_data = devm_kzalloc(&client->dev, sizeof(*m41t80_data), 889 GFP_KERNEL); 890 if (!m41t80_data) 891 return -ENOMEM; 892 893 m41t80_data->client = client; 894 if (client->dev.of_node) 895 m41t80_data->features = (unsigned long) 896 of_device_get_match_data(&client->dev); 897 else 898 m41t80_data->features = id->driver_data; 899 i2c_set_clientdata(client, m41t80_data); 900 901 m41t80_data->rtc = devm_rtc_allocate_device(&client->dev); 902 if (IS_ERR(m41t80_data->rtc)) 903 return PTR_ERR(m41t80_data->rtc); 904 905 #ifdef CONFIG_OF 906 wakeup_source = of_property_read_bool(client->dev.of_node, 907 "wakeup-source"); 908 #endif 909 if (client->irq > 0) { 910 rc = devm_request_threaded_irq(&client->dev, client->irq, 911 NULL, m41t80_handle_irq, 912 IRQF_TRIGGER_LOW | IRQF_ONESHOT, 913 "m41t80", client); 914 if (rc) { 915 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); 916 client->irq = 0; 917 wakeup_source = false; 918 } 919 } 920 if (client->irq > 0 || wakeup_source) { 921 m41t80_rtc_ops.read_alarm = m41t80_read_alarm; 922 m41t80_rtc_ops.set_alarm = m41t80_set_alarm; 923 m41t80_rtc_ops.alarm_irq_enable = m41t80_alarm_irq_enable; 924 /* Enable the wakealarm */ 925 device_init_wakeup(&client->dev, true); 926 } 927 928 m41t80_data->rtc->ops = &m41t80_rtc_ops; 929 930 if (client->irq <= 0) { 931 /* We cannot support UIE mode if we do not have an IRQ line */ 932 m41t80_data->rtc->uie_unsupported = 1; 933 } 934 935 /* Make sure HT (Halt Update) bit is cleared */ 936 rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR); 937 938 if (rc >= 0 && rc & M41T80_ALHOUR_HT) { 939 if (m41t80_data->features & M41T80_FEATURE_HT) { 940 m41t80_rtc_read_time(&client->dev, &tm); 941 dev_info(&client->dev, "HT bit was set!\n"); 942 dev_info(&client->dev, 943 "Power Down at %04i-%02i-%02i %02i:%02i:%02i\n", 944 tm.tm_year + 1900, 945 tm.tm_mon + 1, tm.tm_mday, tm.tm_hour, 946 tm.tm_min, tm.tm_sec); 947 } 948 rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR, 949 rc & ~M41T80_ALHOUR_HT); 950 } 951 952 if (rc < 0) { 953 dev_err(&client->dev, "Can't clear HT bit\n"); 954 return rc; 955 } 956 957 /* Make sure ST (stop) bit is cleared */ 958 rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC); 959 960 if (rc >= 0 && rc & M41T80_SEC_ST) 961 rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC, 962 rc & ~M41T80_SEC_ST); 963 if (rc < 0) { 964 dev_err(&client->dev, "Can't clear ST bit\n"); 965 return rc; 966 } 967 968 #ifdef CONFIG_RTC_DRV_M41T80_WDT 969 if (m41t80_data->features & M41T80_FEATURE_HT) { 970 save_client = client; 971 rc = misc_register(&wdt_dev); 972 if (rc) 973 return rc; 974 rc = register_reboot_notifier(&wdt_notifier); 975 if (rc) { 976 misc_deregister(&wdt_dev); 977 return rc; 978 } 979 } 980 #endif 981 #ifdef CONFIG_COMMON_CLK 982 if (m41t80_data->features & M41T80_FEATURE_SQ) 983 m41t80_sqw_register_clk(m41t80_data); 984 #endif 985 986 rc = rtc_register_device(m41t80_data->rtc); 987 if (rc) 988 return rc; 989 990 return 0; 991 } 992 993 static int m41t80_remove(struct i2c_client *client) 994 { 995 #ifdef CONFIG_RTC_DRV_M41T80_WDT 996 struct m41t80_data *clientdata = i2c_get_clientdata(client); 997 998 if (clientdata->features & M41T80_FEATURE_HT) { 999 misc_deregister(&wdt_dev); 1000 unregister_reboot_notifier(&wdt_notifier); 1001 } 1002 #endif 1003 1004 return 0; 1005 } 1006 1007 static struct i2c_driver m41t80_driver = { 1008 .driver = { 1009 .name = "rtc-m41t80", 1010 .of_match_table = of_match_ptr(m41t80_of_match), 1011 .pm = &m41t80_pm, 1012 }, 1013 .probe = m41t80_probe, 1014 .remove = m41t80_remove, 1015 .id_table = m41t80_id, 1016 }; 1017 1018 module_i2c_driver(m41t80_driver); 1019 1020 MODULE_AUTHOR("Alexander Bigga <ab@mycable.de>"); 1021 MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver"); 1022 MODULE_LICENSE("GPL"); 1023