1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * I2C client/driver for the ST M41T80 family of i2c rtc chips. 4 * 5 * Author: Alexander Bigga <ab@mycable.de> 6 * 7 * Based on m41t00.c by Mark A. Greer <mgreer@mvista.com> 8 * 9 * 2006 (c) mycable GmbH 10 */ 11 12 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 13 14 #include <linux/bcd.h> 15 #include <linux/clk-provider.h> 16 #include <linux/i2c.h> 17 #include <linux/init.h> 18 #include <linux/kernel.h> 19 #include <linux/module.h> 20 #include <linux/of_device.h> 21 #include <linux/rtc.h> 22 #include <linux/slab.h> 23 #include <linux/mutex.h> 24 #include <linux/string.h> 25 #ifdef CONFIG_RTC_DRV_M41T80_WDT 26 #include <linux/fs.h> 27 #include <linux/ioctl.h> 28 #include <linux/miscdevice.h> 29 #include <linux/reboot.h> 30 #include <linux/watchdog.h> 31 #endif 32 33 #define M41T80_REG_SSEC 0x00 34 #define M41T80_REG_SEC 0x01 35 #define M41T80_REG_MIN 0x02 36 #define M41T80_REG_HOUR 0x03 37 #define M41T80_REG_WDAY 0x04 38 #define M41T80_REG_DAY 0x05 39 #define M41T80_REG_MON 0x06 40 #define M41T80_REG_YEAR 0x07 41 #define M41T80_REG_ALARM_MON 0x0a 42 #define M41T80_REG_ALARM_DAY 0x0b 43 #define M41T80_REG_ALARM_HOUR 0x0c 44 #define M41T80_REG_ALARM_MIN 0x0d 45 #define M41T80_REG_ALARM_SEC 0x0e 46 #define M41T80_REG_FLAGS 0x0f 47 #define M41T80_REG_SQW 0x13 48 49 #define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1) 50 #define M41T80_ALARM_REG_SIZE \ 51 (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON) 52 53 #define M41T80_SQW_MAX_FREQ 32768 54 55 #define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */ 56 #define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */ 57 #define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */ 58 #define M41T80_ALHOUR_HT BIT(6) /* HT: Halt Update Bit */ 59 #define M41T80_FLAGS_OF BIT(2) /* OF: Oscillator Failure Bit */ 60 #define M41T80_FLAGS_AF BIT(6) /* AF: Alarm Flag Bit */ 61 #define M41T80_FLAGS_BATT_LOW BIT(4) /* BL: Battery Low Bit */ 62 #define M41T80_WATCHDOG_RB2 BIT(7) /* RB: Watchdog resolution */ 63 #define M41T80_WATCHDOG_RB1 BIT(1) /* RB: Watchdog resolution */ 64 #define M41T80_WATCHDOG_RB0 BIT(0) /* RB: Watchdog resolution */ 65 66 #define M41T80_FEATURE_HT BIT(0) /* Halt feature */ 67 #define M41T80_FEATURE_BL BIT(1) /* Battery low indicator */ 68 #define M41T80_FEATURE_SQ BIT(2) /* Squarewave feature */ 69 #define M41T80_FEATURE_WD BIT(3) /* Extra watchdog resolution */ 70 #define M41T80_FEATURE_SQ_ALT BIT(4) /* RSx bits are in reg 4 */ 71 72 static const struct i2c_device_id m41t80_id[] = { 73 { "m41t62", M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT }, 74 { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD }, 75 { "m41t80", M41T80_FEATURE_SQ }, 76 { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ}, 77 { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 78 { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 79 { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 80 { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 81 { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 82 { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 83 { "rv4162", M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT }, 84 { } 85 }; 86 MODULE_DEVICE_TABLE(i2c, m41t80_id); 87 88 static const struct of_device_id m41t80_of_match[] = { 89 { 90 .compatible = "st,m41t62", 91 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT) 92 }, 93 { 94 .compatible = "st,m41t65", 95 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_WD) 96 }, 97 { 98 .compatible = "st,m41t80", 99 .data = (void *)(M41T80_FEATURE_SQ) 100 }, 101 { 102 .compatible = "st,m41t81", 103 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_SQ) 104 }, 105 { 106 .compatible = "st,m41t81s", 107 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 108 }, 109 { 110 .compatible = "st,m41t82", 111 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 112 }, 113 { 114 .compatible = "st,m41t83", 115 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 116 }, 117 { 118 .compatible = "st,m41t84", 119 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 120 }, 121 { 122 .compatible = "st,m41t85", 123 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 124 }, 125 { 126 .compatible = "st,m41t87", 127 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 128 }, 129 { 130 .compatible = "microcrystal,rv4162", 131 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) 132 }, 133 /* DT compatibility only, do not use compatibles below: */ 134 { 135 .compatible = "st,rv4162", 136 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) 137 }, 138 { 139 .compatible = "rv4162", 140 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) 141 }, 142 { } 143 }; 144 MODULE_DEVICE_TABLE(of, m41t80_of_match); 145 146 struct m41t80_data { 147 unsigned long features; 148 struct i2c_client *client; 149 struct rtc_device *rtc; 150 #ifdef CONFIG_COMMON_CLK 151 struct clk_hw sqw; 152 unsigned long freq; 153 unsigned int sqwe; 154 #endif 155 }; 156 157 static irqreturn_t m41t80_handle_irq(int irq, void *dev_id) 158 { 159 struct i2c_client *client = dev_id; 160 struct m41t80_data *m41t80 = i2c_get_clientdata(client); 161 struct mutex *lock = &m41t80->rtc->ops_lock; 162 unsigned long events = 0; 163 int flags, flags_afe; 164 165 mutex_lock(lock); 166 167 flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 168 if (flags_afe < 0) { 169 mutex_unlock(lock); 170 return IRQ_NONE; 171 } 172 173 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 174 if (flags <= 0) { 175 mutex_unlock(lock); 176 return IRQ_NONE; 177 } 178 179 if (flags & M41T80_FLAGS_AF) { 180 flags &= ~M41T80_FLAGS_AF; 181 flags_afe &= ~M41T80_ALMON_AFE; 182 events |= RTC_AF; 183 } 184 185 if (events) { 186 rtc_update_irq(m41t80->rtc, 1, events); 187 i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags); 188 i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 189 flags_afe); 190 } 191 192 mutex_unlock(lock); 193 194 return IRQ_HANDLED; 195 } 196 197 static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm) 198 { 199 struct i2c_client *client = to_i2c_client(dev); 200 unsigned char buf[8]; 201 int err, flags; 202 203 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 204 if (flags < 0) 205 return flags; 206 207 if (flags & M41T80_FLAGS_OF) { 208 dev_err(&client->dev, "Oscillator failure, data is invalid.\n"); 209 return -EINVAL; 210 } 211 212 err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC, 213 sizeof(buf), buf); 214 if (err < 0) { 215 dev_err(&client->dev, "Unable to read date\n"); 216 return err; 217 } 218 219 tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f); 220 tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f); 221 tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f); 222 tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f); 223 tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07; 224 tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1; 225 226 /* assume 20YY not 19YY, and ignore the Century Bit */ 227 tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100; 228 return 0; 229 } 230 231 static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm) 232 { 233 struct i2c_client *client = to_i2c_client(dev); 234 struct m41t80_data *clientdata = i2c_get_clientdata(client); 235 unsigned char buf[8]; 236 int err, flags; 237 238 if (tm->tm_year < 100 || tm->tm_year > 199) 239 return -EINVAL; 240 241 buf[M41T80_REG_SSEC] = 0; 242 buf[M41T80_REG_SEC] = bin2bcd(tm->tm_sec); 243 buf[M41T80_REG_MIN] = bin2bcd(tm->tm_min); 244 buf[M41T80_REG_HOUR] = bin2bcd(tm->tm_hour); 245 buf[M41T80_REG_DAY] = bin2bcd(tm->tm_mday); 246 buf[M41T80_REG_MON] = bin2bcd(tm->tm_mon + 1); 247 buf[M41T80_REG_YEAR] = bin2bcd(tm->tm_year - 100); 248 buf[M41T80_REG_WDAY] = tm->tm_wday; 249 250 /* If the square wave output is controlled in the weekday register */ 251 if (clientdata->features & M41T80_FEATURE_SQ_ALT) { 252 int val; 253 254 val = i2c_smbus_read_byte_data(client, M41T80_REG_WDAY); 255 if (val < 0) 256 return val; 257 258 buf[M41T80_REG_WDAY] |= (val & 0xf0); 259 } 260 261 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC, 262 sizeof(buf), buf); 263 if (err < 0) { 264 dev_err(&client->dev, "Unable to write to date registers\n"); 265 return err; 266 } 267 268 /* Clear the OF bit of Flags Register */ 269 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 270 if (flags < 0) 271 return flags; 272 273 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, 274 flags & ~M41T80_FLAGS_OF); 275 if (err < 0) { 276 dev_err(&client->dev, "Unable to write flags register\n"); 277 return err; 278 } 279 280 return err; 281 } 282 283 static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq) 284 { 285 struct i2c_client *client = to_i2c_client(dev); 286 struct m41t80_data *clientdata = i2c_get_clientdata(client); 287 int reg; 288 289 if (clientdata->features & M41T80_FEATURE_BL) { 290 reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 291 if (reg < 0) 292 return reg; 293 seq_printf(seq, "battery\t\t: %s\n", 294 (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok"); 295 } 296 return 0; 297 } 298 299 static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled) 300 { 301 struct i2c_client *client = to_i2c_client(dev); 302 int flags, retval; 303 304 flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 305 if (flags < 0) 306 return flags; 307 308 if (enabled) 309 flags |= M41T80_ALMON_AFE; 310 else 311 flags &= ~M41T80_ALMON_AFE; 312 313 retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, flags); 314 if (retval < 0) { 315 dev_err(dev, "Unable to enable alarm IRQ %d\n", retval); 316 return retval; 317 } 318 return 0; 319 } 320 321 static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 322 { 323 struct i2c_client *client = to_i2c_client(dev); 324 u8 alarmvals[5]; 325 int ret, err; 326 327 alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1); 328 alarmvals[1] = bin2bcd(alrm->time.tm_mday); 329 alarmvals[2] = bin2bcd(alrm->time.tm_hour); 330 alarmvals[3] = bin2bcd(alrm->time.tm_min); 331 alarmvals[4] = bin2bcd(alrm->time.tm_sec); 332 333 /* Clear AF and AFE flags */ 334 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 335 if (ret < 0) 336 return ret; 337 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 338 ret & ~(M41T80_ALMON_AFE)); 339 if (err < 0) { 340 dev_err(dev, "Unable to clear AFE bit\n"); 341 return err; 342 } 343 344 /* Keep SQWE bit value */ 345 alarmvals[0] |= (ret & M41T80_ALMON_SQWE); 346 347 ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 348 if (ret < 0) 349 return ret; 350 351 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, 352 ret & ~(M41T80_FLAGS_AF)); 353 if (err < 0) { 354 dev_err(dev, "Unable to clear AF bit\n"); 355 return err; 356 } 357 358 /* Write the alarm */ 359 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON, 360 5, alarmvals); 361 if (err) 362 return err; 363 364 /* Enable the alarm interrupt */ 365 if (alrm->enabled) { 366 alarmvals[0] |= M41T80_ALMON_AFE; 367 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 368 alarmvals[0]); 369 if (err) 370 return err; 371 } 372 373 return 0; 374 } 375 376 static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 377 { 378 struct i2c_client *client = to_i2c_client(dev); 379 u8 alarmvals[5]; 380 int flags, ret; 381 382 ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON, 383 5, alarmvals); 384 if (ret != 5) 385 return ret < 0 ? ret : -EIO; 386 387 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 388 if (flags < 0) 389 return flags; 390 391 alrm->time.tm_sec = bcd2bin(alarmvals[4] & 0x7f); 392 alrm->time.tm_min = bcd2bin(alarmvals[3] & 0x7f); 393 alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f); 394 alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f); 395 alrm->time.tm_mon = bcd2bin(alarmvals[0] & 0x3f) - 1; 396 397 alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE); 398 alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled; 399 400 return 0; 401 } 402 403 static struct rtc_class_ops m41t80_rtc_ops = { 404 .read_time = m41t80_rtc_read_time, 405 .set_time = m41t80_rtc_set_time, 406 .proc = m41t80_rtc_proc, 407 }; 408 409 #ifdef CONFIG_PM_SLEEP 410 static int m41t80_suspend(struct device *dev) 411 { 412 struct i2c_client *client = to_i2c_client(dev); 413 414 if (client->irq >= 0 && device_may_wakeup(dev)) 415 enable_irq_wake(client->irq); 416 417 return 0; 418 } 419 420 static int m41t80_resume(struct device *dev) 421 { 422 struct i2c_client *client = to_i2c_client(dev); 423 424 if (client->irq >= 0 && device_may_wakeup(dev)) 425 disable_irq_wake(client->irq); 426 427 return 0; 428 } 429 #endif 430 431 static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume); 432 433 #ifdef CONFIG_COMMON_CLK 434 #define sqw_to_m41t80_data(_hw) container_of(_hw, struct m41t80_data, sqw) 435 436 static unsigned long m41t80_decode_freq(int setting) 437 { 438 return (setting == 0) ? 0 : (setting == 1) ? M41T80_SQW_MAX_FREQ : 439 M41T80_SQW_MAX_FREQ >> setting; 440 } 441 442 static unsigned long m41t80_get_freq(struct m41t80_data *m41t80) 443 { 444 struct i2c_client *client = m41t80->client; 445 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ? 446 M41T80_REG_WDAY : M41T80_REG_SQW; 447 int ret = i2c_smbus_read_byte_data(client, reg_sqw); 448 449 if (ret < 0) 450 return 0; 451 return m41t80_decode_freq(ret >> 4); 452 } 453 454 static unsigned long m41t80_sqw_recalc_rate(struct clk_hw *hw, 455 unsigned long parent_rate) 456 { 457 return sqw_to_m41t80_data(hw)->freq; 458 } 459 460 static long m41t80_sqw_round_rate(struct clk_hw *hw, unsigned long rate, 461 unsigned long *prate) 462 { 463 if (rate >= M41T80_SQW_MAX_FREQ) 464 return M41T80_SQW_MAX_FREQ; 465 if (rate >= M41T80_SQW_MAX_FREQ / 4) 466 return M41T80_SQW_MAX_FREQ / 4; 467 if (!rate) 468 return 0; 469 return 1 << ilog2(rate); 470 } 471 472 static int m41t80_sqw_set_rate(struct clk_hw *hw, unsigned long rate, 473 unsigned long parent_rate) 474 { 475 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw); 476 struct i2c_client *client = m41t80->client; 477 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ? 478 M41T80_REG_WDAY : M41T80_REG_SQW; 479 int reg, ret, val = 0; 480 481 if (rate >= M41T80_SQW_MAX_FREQ) 482 val = 1; 483 else if (rate >= M41T80_SQW_MAX_FREQ / 4) 484 val = 2; 485 else if (rate) 486 val = 15 - ilog2(rate); 487 488 reg = i2c_smbus_read_byte_data(client, reg_sqw); 489 if (reg < 0) 490 return reg; 491 492 reg = (reg & 0x0f) | (val << 4); 493 494 ret = i2c_smbus_write_byte_data(client, reg_sqw, reg); 495 if (!ret) 496 m41t80->freq = m41t80_decode_freq(val); 497 return ret; 498 } 499 500 static int m41t80_sqw_control(struct clk_hw *hw, bool enable) 501 { 502 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw); 503 struct i2c_client *client = m41t80->client; 504 int ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 505 506 if (ret < 0) 507 return ret; 508 509 if (enable) 510 ret |= M41T80_ALMON_SQWE; 511 else 512 ret &= ~M41T80_ALMON_SQWE; 513 514 ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, ret); 515 if (!ret) 516 m41t80->sqwe = enable; 517 return ret; 518 } 519 520 static int m41t80_sqw_prepare(struct clk_hw *hw) 521 { 522 return m41t80_sqw_control(hw, 1); 523 } 524 525 static void m41t80_sqw_unprepare(struct clk_hw *hw) 526 { 527 m41t80_sqw_control(hw, 0); 528 } 529 530 static int m41t80_sqw_is_prepared(struct clk_hw *hw) 531 { 532 return sqw_to_m41t80_data(hw)->sqwe; 533 } 534 535 static const struct clk_ops m41t80_sqw_ops = { 536 .prepare = m41t80_sqw_prepare, 537 .unprepare = m41t80_sqw_unprepare, 538 .is_prepared = m41t80_sqw_is_prepared, 539 .recalc_rate = m41t80_sqw_recalc_rate, 540 .round_rate = m41t80_sqw_round_rate, 541 .set_rate = m41t80_sqw_set_rate, 542 }; 543 544 static struct clk *m41t80_sqw_register_clk(struct m41t80_data *m41t80) 545 { 546 struct i2c_client *client = m41t80->client; 547 struct device_node *node = client->dev.of_node; 548 struct clk *clk; 549 struct clk_init_data init; 550 int ret; 551 552 /* First disable the clock */ 553 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 554 if (ret < 0) 555 return ERR_PTR(ret); 556 ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 557 ret & ~(M41T80_ALMON_SQWE)); 558 if (ret < 0) 559 return ERR_PTR(ret); 560 561 init.name = "m41t80-sqw"; 562 init.ops = &m41t80_sqw_ops; 563 init.flags = 0; 564 init.parent_names = NULL; 565 init.num_parents = 0; 566 m41t80->sqw.init = &init; 567 m41t80->freq = m41t80_get_freq(m41t80); 568 569 /* optional override of the clockname */ 570 of_property_read_string(node, "clock-output-names", &init.name); 571 572 /* register the clock */ 573 clk = clk_register(&client->dev, &m41t80->sqw); 574 if (!IS_ERR(clk)) 575 of_clk_add_provider(node, of_clk_src_simple_get, clk); 576 577 return clk; 578 } 579 #endif 580 581 #ifdef CONFIG_RTC_DRV_M41T80_WDT 582 /* 583 ***************************************************************************** 584 * 585 * Watchdog Driver 586 * 587 ***************************************************************************** 588 */ 589 static DEFINE_MUTEX(m41t80_rtc_mutex); 590 static struct i2c_client *save_client; 591 592 /* Default margin */ 593 #define WD_TIMO 60 /* 1..31 seconds */ 594 595 static int wdt_margin = WD_TIMO; 596 module_param(wdt_margin, int, 0); 597 MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)"); 598 599 static unsigned long wdt_is_open; 600 static int boot_flag; 601 602 /** 603 * wdt_ping: 604 * 605 * Reload counter one with the watchdog timeout. We don't bother reloading 606 * the cascade counter. 607 */ 608 static void wdt_ping(void) 609 { 610 unsigned char i2c_data[2]; 611 struct i2c_msg msgs1[1] = { 612 { 613 .addr = save_client->addr, 614 .flags = 0, 615 .len = 2, 616 .buf = i2c_data, 617 }, 618 }; 619 struct m41t80_data *clientdata = i2c_get_clientdata(save_client); 620 621 i2c_data[0] = 0x09; /* watchdog register */ 622 623 if (wdt_margin > 31) 624 i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */ 625 else 626 /* 627 * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02) 628 */ 629 i2c_data[1] = wdt_margin << 2 | 0x82; 630 631 /* 632 * M41T65 has three bits for watchdog resolution. Don't set bit 7, as 633 * that would be an invalid resolution. 634 */ 635 if (clientdata->features & M41T80_FEATURE_WD) 636 i2c_data[1] &= ~M41T80_WATCHDOG_RB2; 637 638 i2c_transfer(save_client->adapter, msgs1, 1); 639 } 640 641 /** 642 * wdt_disable: 643 * 644 * disables watchdog. 645 */ 646 static void wdt_disable(void) 647 { 648 unsigned char i2c_data[2], i2c_buf[0x10]; 649 struct i2c_msg msgs0[2] = { 650 { 651 .addr = save_client->addr, 652 .flags = 0, 653 .len = 1, 654 .buf = i2c_data, 655 }, 656 { 657 .addr = save_client->addr, 658 .flags = I2C_M_RD, 659 .len = 1, 660 .buf = i2c_buf, 661 }, 662 }; 663 struct i2c_msg msgs1[1] = { 664 { 665 .addr = save_client->addr, 666 .flags = 0, 667 .len = 2, 668 .buf = i2c_data, 669 }, 670 }; 671 672 i2c_data[0] = 0x09; 673 i2c_transfer(save_client->adapter, msgs0, 2); 674 675 i2c_data[0] = 0x09; 676 i2c_data[1] = 0x00; 677 i2c_transfer(save_client->adapter, msgs1, 1); 678 } 679 680 /** 681 * wdt_write: 682 * @file: file handle to the watchdog 683 * @buf: buffer to write (unused as data does not matter here 684 * @count: count of bytes 685 * @ppos: pointer to the position to write. No seeks allowed 686 * 687 * A write to a watchdog device is defined as a keepalive signal. Any 688 * write of data will do, as we we don't define content meaning. 689 */ 690 static ssize_t wdt_write(struct file *file, const char __user *buf, 691 size_t count, loff_t *ppos) 692 { 693 if (count) { 694 wdt_ping(); 695 return 1; 696 } 697 return 0; 698 } 699 700 static ssize_t wdt_read(struct file *file, char __user *buf, 701 size_t count, loff_t *ppos) 702 { 703 return 0; 704 } 705 706 /** 707 * wdt_ioctl: 708 * @inode: inode of the device 709 * @file: file handle to the device 710 * @cmd: watchdog command 711 * @arg: argument pointer 712 * 713 * The watchdog API defines a common set of functions for all watchdogs 714 * according to their available features. We only actually usefully support 715 * querying capabilities and current status. 716 */ 717 static int wdt_ioctl(struct file *file, unsigned int cmd, 718 unsigned long arg) 719 { 720 int new_margin, rv; 721 static struct watchdog_info ident = { 722 .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING | 723 WDIOF_SETTIMEOUT, 724 .firmware_version = 1, 725 .identity = "M41T80 WTD" 726 }; 727 728 switch (cmd) { 729 case WDIOC_GETSUPPORT: 730 return copy_to_user((struct watchdog_info __user *)arg, &ident, 731 sizeof(ident)) ? -EFAULT : 0; 732 733 case WDIOC_GETSTATUS: 734 case WDIOC_GETBOOTSTATUS: 735 return put_user(boot_flag, (int __user *)arg); 736 case WDIOC_KEEPALIVE: 737 wdt_ping(); 738 return 0; 739 case WDIOC_SETTIMEOUT: 740 if (get_user(new_margin, (int __user *)arg)) 741 return -EFAULT; 742 /* Arbitrary, can't find the card's limits */ 743 if (new_margin < 1 || new_margin > 124) 744 return -EINVAL; 745 wdt_margin = new_margin; 746 wdt_ping(); 747 /* Fall through */ 748 case WDIOC_GETTIMEOUT: 749 return put_user(wdt_margin, (int __user *)arg); 750 751 case WDIOC_SETOPTIONS: 752 if (copy_from_user(&rv, (int __user *)arg, sizeof(int))) 753 return -EFAULT; 754 755 if (rv & WDIOS_DISABLECARD) { 756 pr_info("disable watchdog\n"); 757 wdt_disable(); 758 } 759 760 if (rv & WDIOS_ENABLECARD) { 761 pr_info("enable watchdog\n"); 762 wdt_ping(); 763 } 764 765 return -EINVAL; 766 } 767 return -ENOTTY; 768 } 769 770 static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd, 771 unsigned long arg) 772 { 773 int ret; 774 775 mutex_lock(&m41t80_rtc_mutex); 776 ret = wdt_ioctl(file, cmd, arg); 777 mutex_unlock(&m41t80_rtc_mutex); 778 779 return ret; 780 } 781 782 /** 783 * wdt_open: 784 * @inode: inode of device 785 * @file: file handle to device 786 * 787 */ 788 static int wdt_open(struct inode *inode, struct file *file) 789 { 790 if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) { 791 mutex_lock(&m41t80_rtc_mutex); 792 if (test_and_set_bit(0, &wdt_is_open)) { 793 mutex_unlock(&m41t80_rtc_mutex); 794 return -EBUSY; 795 } 796 /* 797 * Activate 798 */ 799 wdt_is_open = 1; 800 mutex_unlock(&m41t80_rtc_mutex); 801 return stream_open(inode, file); 802 } 803 return -ENODEV; 804 } 805 806 /** 807 * wdt_close: 808 * @inode: inode to board 809 * @file: file handle to board 810 * 811 */ 812 static int wdt_release(struct inode *inode, struct file *file) 813 { 814 if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) 815 clear_bit(0, &wdt_is_open); 816 return 0; 817 } 818 819 /** 820 * notify_sys: 821 * @this: our notifier block 822 * @code: the event being reported 823 * @unused: unused 824 * 825 * Our notifier is called on system shutdowns. We want to turn the card 826 * off at reboot otherwise the machine will reboot again during memory 827 * test or worse yet during the following fsck. This would suck, in fact 828 * trust me - if it happens it does suck. 829 */ 830 static int wdt_notify_sys(struct notifier_block *this, unsigned long code, 831 void *unused) 832 { 833 if (code == SYS_DOWN || code == SYS_HALT) 834 /* Disable Watchdog */ 835 wdt_disable(); 836 return NOTIFY_DONE; 837 } 838 839 static const struct file_operations wdt_fops = { 840 .owner = THIS_MODULE, 841 .read = wdt_read, 842 .unlocked_ioctl = wdt_unlocked_ioctl, 843 .write = wdt_write, 844 .open = wdt_open, 845 .release = wdt_release, 846 .llseek = no_llseek, 847 }; 848 849 static struct miscdevice wdt_dev = { 850 .minor = WATCHDOG_MINOR, 851 .name = "watchdog", 852 .fops = &wdt_fops, 853 }; 854 855 /* 856 * The WDT card needs to learn about soft shutdowns in order to 857 * turn the timebomb registers off. 858 */ 859 static struct notifier_block wdt_notifier = { 860 .notifier_call = wdt_notify_sys, 861 }; 862 #endif /* CONFIG_RTC_DRV_M41T80_WDT */ 863 864 /* 865 ***************************************************************************** 866 * 867 * Driver Interface 868 * 869 ***************************************************************************** 870 */ 871 872 static int m41t80_probe(struct i2c_client *client, 873 const struct i2c_device_id *id) 874 { 875 struct i2c_adapter *adapter = client->adapter; 876 int rc = 0; 877 struct rtc_time tm; 878 struct m41t80_data *m41t80_data = NULL; 879 bool wakeup_source = false; 880 881 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK | 882 I2C_FUNC_SMBUS_BYTE_DATA)) { 883 dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n"); 884 return -ENODEV; 885 } 886 887 m41t80_data = devm_kzalloc(&client->dev, sizeof(*m41t80_data), 888 GFP_KERNEL); 889 if (!m41t80_data) 890 return -ENOMEM; 891 892 m41t80_data->client = client; 893 if (client->dev.of_node) 894 m41t80_data->features = (unsigned long) 895 of_device_get_match_data(&client->dev); 896 else 897 m41t80_data->features = id->driver_data; 898 i2c_set_clientdata(client, m41t80_data); 899 900 m41t80_data->rtc = devm_rtc_allocate_device(&client->dev); 901 if (IS_ERR(m41t80_data->rtc)) 902 return PTR_ERR(m41t80_data->rtc); 903 904 #ifdef CONFIG_OF 905 wakeup_source = of_property_read_bool(client->dev.of_node, 906 "wakeup-source"); 907 #endif 908 if (client->irq > 0) { 909 rc = devm_request_threaded_irq(&client->dev, client->irq, 910 NULL, m41t80_handle_irq, 911 IRQF_TRIGGER_LOW | IRQF_ONESHOT, 912 "m41t80", client); 913 if (rc) { 914 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); 915 client->irq = 0; 916 wakeup_source = false; 917 } 918 } 919 if (client->irq > 0 || wakeup_source) { 920 m41t80_rtc_ops.read_alarm = m41t80_read_alarm; 921 m41t80_rtc_ops.set_alarm = m41t80_set_alarm; 922 m41t80_rtc_ops.alarm_irq_enable = m41t80_alarm_irq_enable; 923 /* Enable the wakealarm */ 924 device_init_wakeup(&client->dev, true); 925 } 926 927 m41t80_data->rtc->ops = &m41t80_rtc_ops; 928 929 if (client->irq <= 0) { 930 /* We cannot support UIE mode if we do not have an IRQ line */ 931 m41t80_data->rtc->uie_unsupported = 1; 932 } 933 934 /* Make sure HT (Halt Update) bit is cleared */ 935 rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR); 936 937 if (rc >= 0 && rc & M41T80_ALHOUR_HT) { 938 if (m41t80_data->features & M41T80_FEATURE_HT) { 939 m41t80_rtc_read_time(&client->dev, &tm); 940 dev_info(&client->dev, "HT bit was set!\n"); 941 dev_info(&client->dev, "Power Down at %ptR\n", &tm); 942 } 943 rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR, 944 rc & ~M41T80_ALHOUR_HT); 945 } 946 947 if (rc < 0) { 948 dev_err(&client->dev, "Can't clear HT bit\n"); 949 return rc; 950 } 951 952 /* Make sure ST (stop) bit is cleared */ 953 rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC); 954 955 if (rc >= 0 && rc & M41T80_SEC_ST) 956 rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC, 957 rc & ~M41T80_SEC_ST); 958 if (rc < 0) { 959 dev_err(&client->dev, "Can't clear ST bit\n"); 960 return rc; 961 } 962 963 #ifdef CONFIG_RTC_DRV_M41T80_WDT 964 if (m41t80_data->features & M41T80_FEATURE_HT) { 965 save_client = client; 966 rc = misc_register(&wdt_dev); 967 if (rc) 968 return rc; 969 rc = register_reboot_notifier(&wdt_notifier); 970 if (rc) { 971 misc_deregister(&wdt_dev); 972 return rc; 973 } 974 } 975 #endif 976 #ifdef CONFIG_COMMON_CLK 977 if (m41t80_data->features & M41T80_FEATURE_SQ) 978 m41t80_sqw_register_clk(m41t80_data); 979 #endif 980 981 rc = rtc_register_device(m41t80_data->rtc); 982 if (rc) 983 return rc; 984 985 return 0; 986 } 987 988 static int m41t80_remove(struct i2c_client *client) 989 { 990 #ifdef CONFIG_RTC_DRV_M41T80_WDT 991 struct m41t80_data *clientdata = i2c_get_clientdata(client); 992 993 if (clientdata->features & M41T80_FEATURE_HT) { 994 misc_deregister(&wdt_dev); 995 unregister_reboot_notifier(&wdt_notifier); 996 } 997 #endif 998 999 return 0; 1000 } 1001 1002 static struct i2c_driver m41t80_driver = { 1003 .driver = { 1004 .name = "rtc-m41t80", 1005 .of_match_table = of_match_ptr(m41t80_of_match), 1006 .pm = &m41t80_pm, 1007 }, 1008 .probe = m41t80_probe, 1009 .remove = m41t80_remove, 1010 .id_table = m41t80_id, 1011 }; 1012 1013 module_i2c_driver(m41t80_driver); 1014 1015 MODULE_AUTHOR("Alexander Bigga <ab@mycable.de>"); 1016 MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver"); 1017 MODULE_LICENSE("GPL"); 1018