1 /* 2 * I2C client/driver for the ST M41T80 family of i2c rtc chips. 3 * 4 * Author: Alexander Bigga <ab@mycable.de> 5 * 6 * Based on m41t00.c by Mark A. Greer <mgreer@mvista.com> 7 * 8 * 2006 (c) mycable GmbH 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 * 14 */ 15 16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 17 18 #include <linux/bcd.h> 19 #include <linux/clk-provider.h> 20 #include <linux/i2c.h> 21 #include <linux/init.h> 22 #include <linux/kernel.h> 23 #include <linux/module.h> 24 #include <linux/of_device.h> 25 #include <linux/rtc.h> 26 #include <linux/slab.h> 27 #include <linux/mutex.h> 28 #include <linux/string.h> 29 #ifdef CONFIG_RTC_DRV_M41T80_WDT 30 #include <linux/fs.h> 31 #include <linux/ioctl.h> 32 #include <linux/miscdevice.h> 33 #include <linux/reboot.h> 34 #include <linux/watchdog.h> 35 #endif 36 37 #define M41T80_REG_SSEC 0x00 38 #define M41T80_REG_SEC 0x01 39 #define M41T80_REG_MIN 0x02 40 #define M41T80_REG_HOUR 0x03 41 #define M41T80_REG_WDAY 0x04 42 #define M41T80_REG_DAY 0x05 43 #define M41T80_REG_MON 0x06 44 #define M41T80_REG_YEAR 0x07 45 #define M41T80_REG_ALARM_MON 0x0a 46 #define M41T80_REG_ALARM_DAY 0x0b 47 #define M41T80_REG_ALARM_HOUR 0x0c 48 #define M41T80_REG_ALARM_MIN 0x0d 49 #define M41T80_REG_ALARM_SEC 0x0e 50 #define M41T80_REG_FLAGS 0x0f 51 #define M41T80_REG_SQW 0x13 52 53 #define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1) 54 #define M41T80_ALARM_REG_SIZE \ 55 (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON) 56 57 #define M41T80_SQW_MAX_FREQ 32768 58 59 #define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */ 60 #define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */ 61 #define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */ 62 #define M41T80_ALHOUR_HT BIT(6) /* HT: Halt Update Bit */ 63 #define M41T80_FLAGS_OF BIT(2) /* OF: Oscillator Failure Bit */ 64 #define M41T80_FLAGS_AF BIT(6) /* AF: Alarm Flag Bit */ 65 #define M41T80_FLAGS_BATT_LOW BIT(4) /* BL: Battery Low Bit */ 66 #define M41T80_WATCHDOG_RB2 BIT(7) /* RB: Watchdog resolution */ 67 #define M41T80_WATCHDOG_RB1 BIT(1) /* RB: Watchdog resolution */ 68 #define M41T80_WATCHDOG_RB0 BIT(0) /* RB: Watchdog resolution */ 69 70 #define M41T80_FEATURE_HT BIT(0) /* Halt feature */ 71 #define M41T80_FEATURE_BL BIT(1) /* Battery low indicator */ 72 #define M41T80_FEATURE_SQ BIT(2) /* Squarewave feature */ 73 #define M41T80_FEATURE_WD BIT(3) /* Extra watchdog resolution */ 74 #define M41T80_FEATURE_SQ_ALT BIT(4) /* RSx bits are in reg 4 */ 75 76 static DEFINE_MUTEX(m41t80_rtc_mutex); 77 static const struct i2c_device_id m41t80_id[] = { 78 { "m41t62", M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT }, 79 { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD }, 80 { "m41t80", M41T80_FEATURE_SQ }, 81 { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ}, 82 { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 83 { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 84 { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 85 { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 86 { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 87 { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 88 { "rv4162", M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT }, 89 { } 90 }; 91 MODULE_DEVICE_TABLE(i2c, m41t80_id); 92 93 static const struct of_device_id m41t80_of_match[] = { 94 { 95 .compatible = "st,m41t62", 96 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT) 97 }, 98 { 99 .compatible = "st,m41t65", 100 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_WD) 101 }, 102 { 103 .compatible = "st,m41t80", 104 .data = (void *)(M41T80_FEATURE_SQ) 105 }, 106 { 107 .compatible = "st,m41t81", 108 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_SQ) 109 }, 110 { 111 .compatible = "st,m41t81s", 112 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 113 }, 114 { 115 .compatible = "st,m41t82", 116 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 117 }, 118 { 119 .compatible = "st,m41t83", 120 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 121 }, 122 { 123 .compatible = "st,m41t84", 124 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 125 }, 126 { 127 .compatible = "st,m41t85", 128 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 129 }, 130 { 131 .compatible = "st,m41t87", 132 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 133 }, 134 { 135 .compatible = "microcrystal,rv4162", 136 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) 137 }, 138 /* DT compatibility only, do not use compatibles below: */ 139 { 140 .compatible = "st,rv4162", 141 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) 142 }, 143 { 144 .compatible = "rv4162", 145 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) 146 }, 147 { } 148 }; 149 MODULE_DEVICE_TABLE(of, m41t80_of_match); 150 151 struct m41t80_data { 152 unsigned long features; 153 struct i2c_client *client; 154 struct rtc_device *rtc; 155 #ifdef CONFIG_COMMON_CLK 156 struct clk_hw sqw; 157 #endif 158 }; 159 160 static irqreturn_t m41t80_handle_irq(int irq, void *dev_id) 161 { 162 struct i2c_client *client = dev_id; 163 struct m41t80_data *m41t80 = i2c_get_clientdata(client); 164 struct mutex *lock = &m41t80->rtc->ops_lock; 165 unsigned long events = 0; 166 int flags, flags_afe; 167 168 mutex_lock(lock); 169 170 flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 171 if (flags_afe < 0) { 172 mutex_unlock(lock); 173 return IRQ_NONE; 174 } 175 176 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 177 if (flags <= 0) { 178 mutex_unlock(lock); 179 return IRQ_NONE; 180 } 181 182 if (flags & M41T80_FLAGS_AF) { 183 flags &= ~M41T80_FLAGS_AF; 184 flags_afe &= ~M41T80_ALMON_AFE; 185 events |= RTC_AF; 186 } 187 188 if (events) { 189 rtc_update_irq(m41t80->rtc, 1, events); 190 i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags); 191 i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 192 flags_afe); 193 } 194 195 mutex_unlock(lock); 196 197 return IRQ_HANDLED; 198 } 199 200 static int m41t80_get_datetime(struct i2c_client *client, 201 struct rtc_time *tm) 202 { 203 unsigned char buf[8]; 204 int err, flags; 205 206 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 207 if (flags < 0) 208 return flags; 209 210 if (flags & M41T80_FLAGS_OF) { 211 dev_err(&client->dev, "Oscillator failure, data is invalid.\n"); 212 return -EINVAL; 213 } 214 215 err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC, 216 sizeof(buf), buf); 217 if (err < 0) { 218 dev_err(&client->dev, "Unable to read date\n"); 219 return -EIO; 220 } 221 222 tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f); 223 tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f); 224 tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f); 225 tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f); 226 tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07; 227 tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1; 228 229 /* assume 20YY not 19YY, and ignore the Century Bit */ 230 tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100; 231 return rtc_valid_tm(tm); 232 } 233 234 /* Sets the given date and time to the real time clock. */ 235 static int m41t80_set_datetime(struct i2c_client *client, struct rtc_time *tm) 236 { 237 struct m41t80_data *clientdata = i2c_get_clientdata(client); 238 unsigned char buf[8]; 239 int err, flags; 240 241 if (tm->tm_year < 100 || tm->tm_year > 199) 242 return -EINVAL; 243 244 buf[M41T80_REG_SSEC] = 0; 245 buf[M41T80_REG_SEC] = bin2bcd(tm->tm_sec); 246 buf[M41T80_REG_MIN] = bin2bcd(tm->tm_min); 247 buf[M41T80_REG_HOUR] = bin2bcd(tm->tm_hour); 248 buf[M41T80_REG_DAY] = bin2bcd(tm->tm_mday); 249 buf[M41T80_REG_MON] = bin2bcd(tm->tm_mon + 1); 250 buf[M41T80_REG_YEAR] = bin2bcd(tm->tm_year - 100); 251 buf[M41T80_REG_WDAY] = tm->tm_wday; 252 253 /* If the square wave output is controlled in the weekday register */ 254 if (clientdata->features & M41T80_FEATURE_SQ_ALT) { 255 int val; 256 257 val = i2c_smbus_read_byte_data(client, M41T80_REG_WDAY); 258 if (val < 0) 259 return val; 260 261 buf[M41T80_REG_WDAY] |= (val & 0xf0); 262 } 263 264 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC, 265 sizeof(buf), buf); 266 if (err < 0) { 267 dev_err(&client->dev, "Unable to write to date registers\n"); 268 return err; 269 } 270 271 /* Clear the OF bit of Flags Register */ 272 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 273 if (flags < 0) 274 return flags; 275 276 if (i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, 277 flags & ~M41T80_FLAGS_OF)) { 278 dev_err(&client->dev, "Unable to write flags register\n"); 279 return -EIO; 280 } 281 282 return err; 283 } 284 285 static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq) 286 { 287 struct i2c_client *client = to_i2c_client(dev); 288 struct m41t80_data *clientdata = i2c_get_clientdata(client); 289 u8 reg; 290 291 if (clientdata->features & M41T80_FEATURE_BL) { 292 reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 293 seq_printf(seq, "battery\t\t: %s\n", 294 (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok"); 295 } 296 return 0; 297 } 298 299 static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm) 300 { 301 return m41t80_get_datetime(to_i2c_client(dev), tm); 302 } 303 304 static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm) 305 { 306 return m41t80_set_datetime(to_i2c_client(dev), tm); 307 } 308 309 static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled) 310 { 311 struct i2c_client *client = to_i2c_client(dev); 312 int flags, retval; 313 314 flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 315 if (flags < 0) 316 return flags; 317 318 if (enabled) 319 flags |= M41T80_ALMON_AFE; 320 else 321 flags &= ~M41T80_ALMON_AFE; 322 323 retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, flags); 324 if (retval < 0) { 325 dev_err(dev, "Unable to enable alarm IRQ %d\n", retval); 326 return retval; 327 } 328 return 0; 329 } 330 331 static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 332 { 333 struct i2c_client *client = to_i2c_client(dev); 334 u8 alarmvals[5]; 335 int ret, err; 336 337 alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1); 338 alarmvals[1] = bin2bcd(alrm->time.tm_mday); 339 alarmvals[2] = bin2bcd(alrm->time.tm_hour); 340 alarmvals[3] = bin2bcd(alrm->time.tm_min); 341 alarmvals[4] = bin2bcd(alrm->time.tm_sec); 342 343 /* Clear AF and AFE flags */ 344 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 345 if (ret < 0) 346 return ret; 347 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 348 ret & ~(M41T80_ALMON_AFE)); 349 if (err < 0) { 350 dev_err(dev, "Unable to clear AFE bit\n"); 351 return err; 352 } 353 354 /* Keep SQWE bit value */ 355 alarmvals[0] |= (ret & M41T80_ALMON_SQWE); 356 357 ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 358 if (ret < 0) 359 return ret; 360 361 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, 362 ret & ~(M41T80_FLAGS_AF)); 363 if (err < 0) { 364 dev_err(dev, "Unable to clear AF bit\n"); 365 return err; 366 } 367 368 /* Write the alarm */ 369 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON, 370 5, alarmvals); 371 if (err) 372 return err; 373 374 /* Enable the alarm interrupt */ 375 if (alrm->enabled) { 376 alarmvals[0] |= M41T80_ALMON_AFE; 377 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 378 alarmvals[0]); 379 if (err) 380 return err; 381 } 382 383 return 0; 384 } 385 386 static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 387 { 388 struct i2c_client *client = to_i2c_client(dev); 389 u8 alarmvals[5]; 390 int flags, ret; 391 392 ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON, 393 5, alarmvals); 394 if (ret != 5) 395 return ret < 0 ? ret : -EIO; 396 397 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 398 if (flags < 0) 399 return flags; 400 401 alrm->time.tm_sec = bcd2bin(alarmvals[4] & 0x7f); 402 alrm->time.tm_min = bcd2bin(alarmvals[3] & 0x7f); 403 alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f); 404 alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f); 405 alrm->time.tm_mon = bcd2bin(alarmvals[0] & 0x3f); 406 407 alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE); 408 alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled; 409 410 return 0; 411 } 412 413 static struct rtc_class_ops m41t80_rtc_ops = { 414 .read_time = m41t80_rtc_read_time, 415 .set_time = m41t80_rtc_set_time, 416 .proc = m41t80_rtc_proc, 417 }; 418 419 #ifdef CONFIG_PM_SLEEP 420 static int m41t80_suspend(struct device *dev) 421 { 422 struct i2c_client *client = to_i2c_client(dev); 423 424 if (client->irq >= 0 && device_may_wakeup(dev)) 425 enable_irq_wake(client->irq); 426 427 return 0; 428 } 429 430 static int m41t80_resume(struct device *dev) 431 { 432 struct i2c_client *client = to_i2c_client(dev); 433 434 if (client->irq >= 0 && device_may_wakeup(dev)) 435 disable_irq_wake(client->irq); 436 437 return 0; 438 } 439 #endif 440 441 static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume); 442 443 #ifdef CONFIG_COMMON_CLK 444 #define sqw_to_m41t80_data(_hw) container_of(_hw, struct m41t80_data, sqw) 445 446 static unsigned long m41t80_sqw_recalc_rate(struct clk_hw *hw, 447 unsigned long parent_rate) 448 { 449 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw); 450 struct i2c_client *client = m41t80->client; 451 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ? 452 M41T80_REG_WDAY : M41T80_REG_SQW; 453 int ret = i2c_smbus_read_byte_data(client, reg_sqw); 454 unsigned long val = M41T80_SQW_MAX_FREQ; 455 456 if (ret < 0) 457 return 0; 458 459 ret >>= 4; 460 if (ret == 0) 461 val = 0; 462 else if (ret > 1) 463 val = val / (1 << ret); 464 465 return val; 466 } 467 468 static long m41t80_sqw_round_rate(struct clk_hw *hw, unsigned long rate, 469 unsigned long *prate) 470 { 471 int i, freq = M41T80_SQW_MAX_FREQ; 472 473 if (freq <= rate) 474 return freq; 475 476 for (i = 2; i <= ilog2(M41T80_SQW_MAX_FREQ); i++) { 477 freq /= 1 << i; 478 if (freq <= rate) 479 return freq; 480 } 481 482 return 0; 483 } 484 485 static int m41t80_sqw_set_rate(struct clk_hw *hw, unsigned long rate, 486 unsigned long parent_rate) 487 { 488 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw); 489 struct i2c_client *client = m41t80->client; 490 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ? 491 M41T80_REG_WDAY : M41T80_REG_SQW; 492 int reg, ret, val = 0; 493 494 if (rate) { 495 if (!is_power_of_2(rate)) 496 return -EINVAL; 497 val = ilog2(rate); 498 if (val == ilog2(M41T80_SQW_MAX_FREQ)) 499 val = 1; 500 else if (val < (ilog2(M41T80_SQW_MAX_FREQ) - 1)) 501 val = ilog2(M41T80_SQW_MAX_FREQ) - val; 502 else 503 return -EINVAL; 504 } 505 506 reg = i2c_smbus_read_byte_data(client, reg_sqw); 507 if (reg < 0) 508 return reg; 509 510 reg = (reg & 0x0f) | (val << 4); 511 512 ret = i2c_smbus_write_byte_data(client, reg_sqw, reg); 513 if (ret < 0) 514 return ret; 515 516 return -EINVAL; 517 } 518 519 static int m41t80_sqw_control(struct clk_hw *hw, bool enable) 520 { 521 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw); 522 struct i2c_client *client = m41t80->client; 523 int ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 524 525 if (ret < 0) 526 return ret; 527 528 if (enable) 529 ret |= M41T80_ALMON_SQWE; 530 else 531 ret &= ~M41T80_ALMON_SQWE; 532 533 return i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, ret); 534 } 535 536 static int m41t80_sqw_prepare(struct clk_hw *hw) 537 { 538 return m41t80_sqw_control(hw, 1); 539 } 540 541 static void m41t80_sqw_unprepare(struct clk_hw *hw) 542 { 543 m41t80_sqw_control(hw, 0); 544 } 545 546 static int m41t80_sqw_is_prepared(struct clk_hw *hw) 547 { 548 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw); 549 struct i2c_client *client = m41t80->client; 550 int ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 551 552 if (ret < 0) 553 return ret; 554 555 return !!(ret & M41T80_ALMON_SQWE); 556 } 557 558 static const struct clk_ops m41t80_sqw_ops = { 559 .prepare = m41t80_sqw_prepare, 560 .unprepare = m41t80_sqw_unprepare, 561 .is_prepared = m41t80_sqw_is_prepared, 562 .recalc_rate = m41t80_sqw_recalc_rate, 563 .round_rate = m41t80_sqw_round_rate, 564 .set_rate = m41t80_sqw_set_rate, 565 }; 566 567 static struct clk *m41t80_sqw_register_clk(struct m41t80_data *m41t80) 568 { 569 struct i2c_client *client = m41t80->client; 570 struct device_node *node = client->dev.of_node; 571 struct clk *clk; 572 struct clk_init_data init; 573 int ret; 574 575 /* First disable the clock */ 576 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 577 if (ret < 0) 578 return ERR_PTR(ret); 579 ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 580 ret & ~(M41T80_ALMON_SQWE)); 581 if (ret < 0) 582 return ERR_PTR(ret); 583 584 init.name = "m41t80-sqw"; 585 init.ops = &m41t80_sqw_ops; 586 init.flags = 0; 587 init.parent_names = NULL; 588 init.num_parents = 0; 589 m41t80->sqw.init = &init; 590 591 /* optional override of the clockname */ 592 of_property_read_string(node, "clock-output-names", &init.name); 593 594 /* register the clock */ 595 clk = clk_register(&client->dev, &m41t80->sqw); 596 if (!IS_ERR(clk)) 597 of_clk_add_provider(node, of_clk_src_simple_get, clk); 598 599 return clk; 600 } 601 #endif 602 603 #ifdef CONFIG_RTC_DRV_M41T80_WDT 604 /* 605 ***************************************************************************** 606 * 607 * Watchdog Driver 608 * 609 ***************************************************************************** 610 */ 611 static struct i2c_client *save_client; 612 613 /* Default margin */ 614 #define WD_TIMO 60 /* 1..31 seconds */ 615 616 static int wdt_margin = WD_TIMO; 617 module_param(wdt_margin, int, 0); 618 MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)"); 619 620 static unsigned long wdt_is_open; 621 static int boot_flag; 622 623 /** 624 * wdt_ping: 625 * 626 * Reload counter one with the watchdog timeout. We don't bother reloading 627 * the cascade counter. 628 */ 629 static void wdt_ping(void) 630 { 631 unsigned char i2c_data[2]; 632 struct i2c_msg msgs1[1] = { 633 { 634 .addr = save_client->addr, 635 .flags = 0, 636 .len = 2, 637 .buf = i2c_data, 638 }, 639 }; 640 struct m41t80_data *clientdata = i2c_get_clientdata(save_client); 641 642 i2c_data[0] = 0x09; /* watchdog register */ 643 644 if (wdt_margin > 31) 645 i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */ 646 else 647 /* 648 * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02) 649 */ 650 i2c_data[1] = wdt_margin << 2 | 0x82; 651 652 /* 653 * M41T65 has three bits for watchdog resolution. Don't set bit 7, as 654 * that would be an invalid resolution. 655 */ 656 if (clientdata->features & M41T80_FEATURE_WD) 657 i2c_data[1] &= ~M41T80_WATCHDOG_RB2; 658 659 i2c_transfer(save_client->adapter, msgs1, 1); 660 } 661 662 /** 663 * wdt_disable: 664 * 665 * disables watchdog. 666 */ 667 static void wdt_disable(void) 668 { 669 unsigned char i2c_data[2], i2c_buf[0x10]; 670 struct i2c_msg msgs0[2] = { 671 { 672 .addr = save_client->addr, 673 .flags = 0, 674 .len = 1, 675 .buf = i2c_data, 676 }, 677 { 678 .addr = save_client->addr, 679 .flags = I2C_M_RD, 680 .len = 1, 681 .buf = i2c_buf, 682 }, 683 }; 684 struct i2c_msg msgs1[1] = { 685 { 686 .addr = save_client->addr, 687 .flags = 0, 688 .len = 2, 689 .buf = i2c_data, 690 }, 691 }; 692 693 i2c_data[0] = 0x09; 694 i2c_transfer(save_client->adapter, msgs0, 2); 695 696 i2c_data[0] = 0x09; 697 i2c_data[1] = 0x00; 698 i2c_transfer(save_client->adapter, msgs1, 1); 699 } 700 701 /** 702 * wdt_write: 703 * @file: file handle to the watchdog 704 * @buf: buffer to write (unused as data does not matter here 705 * @count: count of bytes 706 * @ppos: pointer to the position to write. No seeks allowed 707 * 708 * A write to a watchdog device is defined as a keepalive signal. Any 709 * write of data will do, as we we don't define content meaning. 710 */ 711 static ssize_t wdt_write(struct file *file, const char __user *buf, 712 size_t count, loff_t *ppos) 713 { 714 if (count) { 715 wdt_ping(); 716 return 1; 717 } 718 return 0; 719 } 720 721 static ssize_t wdt_read(struct file *file, char __user *buf, 722 size_t count, loff_t *ppos) 723 { 724 return 0; 725 } 726 727 /** 728 * wdt_ioctl: 729 * @inode: inode of the device 730 * @file: file handle to the device 731 * @cmd: watchdog command 732 * @arg: argument pointer 733 * 734 * The watchdog API defines a common set of functions for all watchdogs 735 * according to their available features. We only actually usefully support 736 * querying capabilities and current status. 737 */ 738 static int wdt_ioctl(struct file *file, unsigned int cmd, 739 unsigned long arg) 740 { 741 int new_margin, rv; 742 static struct watchdog_info ident = { 743 .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING | 744 WDIOF_SETTIMEOUT, 745 .firmware_version = 1, 746 .identity = "M41T80 WTD" 747 }; 748 749 switch (cmd) { 750 case WDIOC_GETSUPPORT: 751 return copy_to_user((struct watchdog_info __user *)arg, &ident, 752 sizeof(ident)) ? -EFAULT : 0; 753 754 case WDIOC_GETSTATUS: 755 case WDIOC_GETBOOTSTATUS: 756 return put_user(boot_flag, (int __user *)arg); 757 case WDIOC_KEEPALIVE: 758 wdt_ping(); 759 return 0; 760 case WDIOC_SETTIMEOUT: 761 if (get_user(new_margin, (int __user *)arg)) 762 return -EFAULT; 763 /* Arbitrary, can't find the card's limits */ 764 if (new_margin < 1 || new_margin > 124) 765 return -EINVAL; 766 wdt_margin = new_margin; 767 wdt_ping(); 768 /* Fall */ 769 case WDIOC_GETTIMEOUT: 770 return put_user(wdt_margin, (int __user *)arg); 771 772 case WDIOC_SETOPTIONS: 773 if (copy_from_user(&rv, (int __user *)arg, sizeof(int))) 774 return -EFAULT; 775 776 if (rv & WDIOS_DISABLECARD) { 777 pr_info("disable watchdog\n"); 778 wdt_disable(); 779 } 780 781 if (rv & WDIOS_ENABLECARD) { 782 pr_info("enable watchdog\n"); 783 wdt_ping(); 784 } 785 786 return -EINVAL; 787 } 788 return -ENOTTY; 789 } 790 791 static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd, 792 unsigned long arg) 793 { 794 int ret; 795 796 mutex_lock(&m41t80_rtc_mutex); 797 ret = wdt_ioctl(file, cmd, arg); 798 mutex_unlock(&m41t80_rtc_mutex); 799 800 return ret; 801 } 802 803 /** 804 * wdt_open: 805 * @inode: inode of device 806 * @file: file handle to device 807 * 808 */ 809 static int wdt_open(struct inode *inode, struct file *file) 810 { 811 if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) { 812 mutex_lock(&m41t80_rtc_mutex); 813 if (test_and_set_bit(0, &wdt_is_open)) { 814 mutex_unlock(&m41t80_rtc_mutex); 815 return -EBUSY; 816 } 817 /* 818 * Activate 819 */ 820 wdt_is_open = 1; 821 mutex_unlock(&m41t80_rtc_mutex); 822 return nonseekable_open(inode, file); 823 } 824 return -ENODEV; 825 } 826 827 /** 828 * wdt_close: 829 * @inode: inode to board 830 * @file: file handle to board 831 * 832 */ 833 static int wdt_release(struct inode *inode, struct file *file) 834 { 835 if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) 836 clear_bit(0, &wdt_is_open); 837 return 0; 838 } 839 840 /** 841 * notify_sys: 842 * @this: our notifier block 843 * @code: the event being reported 844 * @unused: unused 845 * 846 * Our notifier is called on system shutdowns. We want to turn the card 847 * off at reboot otherwise the machine will reboot again during memory 848 * test or worse yet during the following fsck. This would suck, in fact 849 * trust me - if it happens it does suck. 850 */ 851 static int wdt_notify_sys(struct notifier_block *this, unsigned long code, 852 void *unused) 853 { 854 if (code == SYS_DOWN || code == SYS_HALT) 855 /* Disable Watchdog */ 856 wdt_disable(); 857 return NOTIFY_DONE; 858 } 859 860 static const struct file_operations wdt_fops = { 861 .owner = THIS_MODULE, 862 .read = wdt_read, 863 .unlocked_ioctl = wdt_unlocked_ioctl, 864 .write = wdt_write, 865 .open = wdt_open, 866 .release = wdt_release, 867 .llseek = no_llseek, 868 }; 869 870 static struct miscdevice wdt_dev = { 871 .minor = WATCHDOG_MINOR, 872 .name = "watchdog", 873 .fops = &wdt_fops, 874 }; 875 876 /* 877 * The WDT card needs to learn about soft shutdowns in order to 878 * turn the timebomb registers off. 879 */ 880 static struct notifier_block wdt_notifier = { 881 .notifier_call = wdt_notify_sys, 882 }; 883 #endif /* CONFIG_RTC_DRV_M41T80_WDT */ 884 885 /* 886 ***************************************************************************** 887 * 888 * Driver Interface 889 * 890 ***************************************************************************** 891 */ 892 893 static int m41t80_probe(struct i2c_client *client, 894 const struct i2c_device_id *id) 895 { 896 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); 897 int rc = 0; 898 struct rtc_device *rtc = NULL; 899 struct rtc_time tm; 900 struct m41t80_data *m41t80_data = NULL; 901 bool wakeup_source = false; 902 903 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK | 904 I2C_FUNC_SMBUS_BYTE_DATA)) { 905 dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n"); 906 return -ENODEV; 907 } 908 909 m41t80_data = devm_kzalloc(&client->dev, sizeof(*m41t80_data), 910 GFP_KERNEL); 911 if (!m41t80_data) 912 return -ENOMEM; 913 914 m41t80_data->client = client; 915 if (client->dev.of_node) 916 m41t80_data->features = (unsigned long) 917 of_device_get_match_data(&client->dev); 918 else 919 m41t80_data->features = id->driver_data; 920 i2c_set_clientdata(client, m41t80_data); 921 922 #ifdef CONFIG_OF 923 wakeup_source = of_property_read_bool(client->dev.of_node, 924 "wakeup-source"); 925 #endif 926 if (client->irq > 0) { 927 rc = devm_request_threaded_irq(&client->dev, client->irq, 928 NULL, m41t80_handle_irq, 929 IRQF_TRIGGER_LOW | IRQF_ONESHOT, 930 "m41t80", client); 931 if (rc) { 932 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); 933 client->irq = 0; 934 wakeup_source = false; 935 } 936 } 937 if (client->irq > 0 || wakeup_source) { 938 m41t80_rtc_ops.read_alarm = m41t80_read_alarm; 939 m41t80_rtc_ops.set_alarm = m41t80_set_alarm; 940 m41t80_rtc_ops.alarm_irq_enable = m41t80_alarm_irq_enable; 941 /* Enable the wakealarm */ 942 device_init_wakeup(&client->dev, true); 943 } 944 945 rtc = devm_rtc_device_register(&client->dev, client->name, 946 &m41t80_rtc_ops, THIS_MODULE); 947 if (IS_ERR(rtc)) 948 return PTR_ERR(rtc); 949 950 m41t80_data->rtc = rtc; 951 if (client->irq <= 0) { 952 /* We cannot support UIE mode if we do not have an IRQ line */ 953 rtc->uie_unsupported = 1; 954 } 955 956 /* Make sure HT (Halt Update) bit is cleared */ 957 rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR); 958 959 if (rc >= 0 && rc & M41T80_ALHOUR_HT) { 960 if (m41t80_data->features & M41T80_FEATURE_HT) { 961 m41t80_get_datetime(client, &tm); 962 dev_info(&client->dev, "HT bit was set!\n"); 963 dev_info(&client->dev, 964 "Power Down at %04i-%02i-%02i %02i:%02i:%02i\n", 965 tm.tm_year + 1900, 966 tm.tm_mon + 1, tm.tm_mday, tm.tm_hour, 967 tm.tm_min, tm.tm_sec); 968 } 969 rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR, 970 rc & ~M41T80_ALHOUR_HT); 971 } 972 973 if (rc < 0) { 974 dev_err(&client->dev, "Can't clear HT bit\n"); 975 return rc; 976 } 977 978 /* Make sure ST (stop) bit is cleared */ 979 rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC); 980 981 if (rc >= 0 && rc & M41T80_SEC_ST) 982 rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC, 983 rc & ~M41T80_SEC_ST); 984 if (rc < 0) { 985 dev_err(&client->dev, "Can't clear ST bit\n"); 986 return rc; 987 } 988 989 #ifdef CONFIG_RTC_DRV_M41T80_WDT 990 if (m41t80_data->features & M41T80_FEATURE_HT) { 991 save_client = client; 992 rc = misc_register(&wdt_dev); 993 if (rc) 994 return rc; 995 rc = register_reboot_notifier(&wdt_notifier); 996 if (rc) { 997 misc_deregister(&wdt_dev); 998 return rc; 999 } 1000 } 1001 #endif 1002 #ifdef CONFIG_COMMON_CLK 1003 if (m41t80_data->features & M41T80_FEATURE_SQ) 1004 m41t80_sqw_register_clk(m41t80_data); 1005 #endif 1006 return 0; 1007 } 1008 1009 static int m41t80_remove(struct i2c_client *client) 1010 { 1011 #ifdef CONFIG_RTC_DRV_M41T80_WDT 1012 struct m41t80_data *clientdata = i2c_get_clientdata(client); 1013 1014 if (clientdata->features & M41T80_FEATURE_HT) { 1015 misc_deregister(&wdt_dev); 1016 unregister_reboot_notifier(&wdt_notifier); 1017 } 1018 #endif 1019 1020 return 0; 1021 } 1022 1023 static struct i2c_driver m41t80_driver = { 1024 .driver = { 1025 .name = "rtc-m41t80", 1026 .of_match_table = of_match_ptr(m41t80_of_match), 1027 .pm = &m41t80_pm, 1028 }, 1029 .probe = m41t80_probe, 1030 .remove = m41t80_remove, 1031 .id_table = m41t80_id, 1032 }; 1033 1034 module_i2c_driver(m41t80_driver); 1035 1036 MODULE_AUTHOR("Alexander Bigga <ab@mycable.de>"); 1037 MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver"); 1038 MODULE_LICENSE("GPL"); 1039