1 /* 2 * I2C client/driver for the ST M41T80 family of i2c rtc chips. 3 * 4 * Author: Alexander Bigga <ab@mycable.de> 5 * 6 * Based on m41t00.c by Mark A. Greer <mgreer@mvista.com> 7 * 8 * 2006 (c) mycable GmbH 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 * 14 */ 15 16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 17 18 #include <linux/bcd.h> 19 #include <linux/clk-provider.h> 20 #include <linux/i2c.h> 21 #include <linux/init.h> 22 #include <linux/kernel.h> 23 #include <linux/module.h> 24 #include <linux/of_device.h> 25 #include <linux/rtc.h> 26 #include <linux/slab.h> 27 #include <linux/mutex.h> 28 #include <linux/string.h> 29 #ifdef CONFIG_RTC_DRV_M41T80_WDT 30 #include <linux/fs.h> 31 #include <linux/ioctl.h> 32 #include <linux/miscdevice.h> 33 #include <linux/reboot.h> 34 #include <linux/watchdog.h> 35 #endif 36 37 #define M41T80_REG_SSEC 0x00 38 #define M41T80_REG_SEC 0x01 39 #define M41T80_REG_MIN 0x02 40 #define M41T80_REG_HOUR 0x03 41 #define M41T80_REG_WDAY 0x04 42 #define M41T80_REG_DAY 0x05 43 #define M41T80_REG_MON 0x06 44 #define M41T80_REG_YEAR 0x07 45 #define M41T80_REG_ALARM_MON 0x0a 46 #define M41T80_REG_ALARM_DAY 0x0b 47 #define M41T80_REG_ALARM_HOUR 0x0c 48 #define M41T80_REG_ALARM_MIN 0x0d 49 #define M41T80_REG_ALARM_SEC 0x0e 50 #define M41T80_REG_FLAGS 0x0f 51 #define M41T80_REG_SQW 0x13 52 53 #define M41T80_DATETIME_REG_SIZE (M41T80_REG_YEAR + 1) 54 #define M41T80_ALARM_REG_SIZE \ 55 (M41T80_REG_ALARM_SEC + 1 - M41T80_REG_ALARM_MON) 56 57 #define M41T80_SQW_MAX_FREQ 32768 58 59 #define M41T80_SEC_ST BIT(7) /* ST: Stop Bit */ 60 #define M41T80_ALMON_AFE BIT(7) /* AFE: AF Enable Bit */ 61 #define M41T80_ALMON_SQWE BIT(6) /* SQWE: SQW Enable Bit */ 62 #define M41T80_ALHOUR_HT BIT(6) /* HT: Halt Update Bit */ 63 #define M41T80_FLAGS_OF BIT(2) /* OF: Oscillator Failure Bit */ 64 #define M41T80_FLAGS_AF BIT(6) /* AF: Alarm Flag Bit */ 65 #define M41T80_FLAGS_BATT_LOW BIT(4) /* BL: Battery Low Bit */ 66 #define M41T80_WATCHDOG_RB2 BIT(7) /* RB: Watchdog resolution */ 67 #define M41T80_WATCHDOG_RB1 BIT(1) /* RB: Watchdog resolution */ 68 #define M41T80_WATCHDOG_RB0 BIT(0) /* RB: Watchdog resolution */ 69 70 #define M41T80_FEATURE_HT BIT(0) /* Halt feature */ 71 #define M41T80_FEATURE_BL BIT(1) /* Battery low indicator */ 72 #define M41T80_FEATURE_SQ BIT(2) /* Squarewave feature */ 73 #define M41T80_FEATURE_WD BIT(3) /* Extra watchdog resolution */ 74 #define M41T80_FEATURE_SQ_ALT BIT(4) /* RSx bits are in reg 4 */ 75 76 static const struct i2c_device_id m41t80_id[] = { 77 { "m41t62", M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT }, 78 { "m41t65", M41T80_FEATURE_HT | M41T80_FEATURE_WD }, 79 { "m41t80", M41T80_FEATURE_SQ }, 80 { "m41t81", M41T80_FEATURE_HT | M41T80_FEATURE_SQ}, 81 { "m41t81s", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 82 { "m41t82", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 83 { "m41t83", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 84 { "m41st84", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 85 { "m41st85", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 86 { "m41st87", M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ }, 87 { "rv4162", M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT }, 88 { } 89 }; 90 MODULE_DEVICE_TABLE(i2c, m41t80_id); 91 92 static const struct of_device_id m41t80_of_match[] = { 93 { 94 .compatible = "st,m41t62", 95 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_SQ_ALT) 96 }, 97 { 98 .compatible = "st,m41t65", 99 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_WD) 100 }, 101 { 102 .compatible = "st,m41t80", 103 .data = (void *)(M41T80_FEATURE_SQ) 104 }, 105 { 106 .compatible = "st,m41t81", 107 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_SQ) 108 }, 109 { 110 .compatible = "st,m41t81s", 111 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 112 }, 113 { 114 .compatible = "st,m41t82", 115 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 116 }, 117 { 118 .compatible = "st,m41t83", 119 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 120 }, 121 { 122 .compatible = "st,m41t84", 123 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 124 }, 125 { 126 .compatible = "st,m41t85", 127 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 128 }, 129 { 130 .compatible = "st,m41t87", 131 .data = (void *)(M41T80_FEATURE_HT | M41T80_FEATURE_BL | M41T80_FEATURE_SQ) 132 }, 133 { 134 .compatible = "microcrystal,rv4162", 135 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) 136 }, 137 /* DT compatibility only, do not use compatibles below: */ 138 { 139 .compatible = "st,rv4162", 140 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) 141 }, 142 { 143 .compatible = "rv4162", 144 .data = (void *)(M41T80_FEATURE_SQ | M41T80_FEATURE_WD | M41T80_FEATURE_SQ_ALT) 145 }, 146 { } 147 }; 148 MODULE_DEVICE_TABLE(of, m41t80_of_match); 149 150 struct m41t80_data { 151 unsigned long features; 152 struct i2c_client *client; 153 struct rtc_device *rtc; 154 #ifdef CONFIG_COMMON_CLK 155 struct clk_hw sqw; 156 unsigned long freq; 157 unsigned int sqwe; 158 #endif 159 }; 160 161 static irqreturn_t m41t80_handle_irq(int irq, void *dev_id) 162 { 163 struct i2c_client *client = dev_id; 164 struct m41t80_data *m41t80 = i2c_get_clientdata(client); 165 struct mutex *lock = &m41t80->rtc->ops_lock; 166 unsigned long events = 0; 167 int flags, flags_afe; 168 169 mutex_lock(lock); 170 171 flags_afe = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 172 if (flags_afe < 0) { 173 mutex_unlock(lock); 174 return IRQ_NONE; 175 } 176 177 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 178 if (flags <= 0) { 179 mutex_unlock(lock); 180 return IRQ_NONE; 181 } 182 183 if (flags & M41T80_FLAGS_AF) { 184 flags &= ~M41T80_FLAGS_AF; 185 flags_afe &= ~M41T80_ALMON_AFE; 186 events |= RTC_AF; 187 } 188 189 if (events) { 190 rtc_update_irq(m41t80->rtc, 1, events); 191 i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, flags); 192 i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 193 flags_afe); 194 } 195 196 mutex_unlock(lock); 197 198 return IRQ_HANDLED; 199 } 200 201 static int m41t80_rtc_read_time(struct device *dev, struct rtc_time *tm) 202 { 203 struct i2c_client *client = to_i2c_client(dev); 204 unsigned char buf[8]; 205 int err, flags; 206 207 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 208 if (flags < 0) 209 return flags; 210 211 if (flags & M41T80_FLAGS_OF) { 212 dev_err(&client->dev, "Oscillator failure, data is invalid.\n"); 213 return -EINVAL; 214 } 215 216 err = i2c_smbus_read_i2c_block_data(client, M41T80_REG_SSEC, 217 sizeof(buf), buf); 218 if (err < 0) { 219 dev_err(&client->dev, "Unable to read date\n"); 220 return err; 221 } 222 223 tm->tm_sec = bcd2bin(buf[M41T80_REG_SEC] & 0x7f); 224 tm->tm_min = bcd2bin(buf[M41T80_REG_MIN] & 0x7f); 225 tm->tm_hour = bcd2bin(buf[M41T80_REG_HOUR] & 0x3f); 226 tm->tm_mday = bcd2bin(buf[M41T80_REG_DAY] & 0x3f); 227 tm->tm_wday = buf[M41T80_REG_WDAY] & 0x07; 228 tm->tm_mon = bcd2bin(buf[M41T80_REG_MON] & 0x1f) - 1; 229 230 /* assume 20YY not 19YY, and ignore the Century Bit */ 231 tm->tm_year = bcd2bin(buf[M41T80_REG_YEAR]) + 100; 232 return 0; 233 } 234 235 static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm) 236 { 237 struct i2c_client *client = to_i2c_client(dev); 238 struct m41t80_data *clientdata = i2c_get_clientdata(client); 239 unsigned char buf[8]; 240 int err, flags; 241 242 if (tm->tm_year < 100 || tm->tm_year > 199) 243 return -EINVAL; 244 245 buf[M41T80_REG_SSEC] = 0; 246 buf[M41T80_REG_SEC] = bin2bcd(tm->tm_sec); 247 buf[M41T80_REG_MIN] = bin2bcd(tm->tm_min); 248 buf[M41T80_REG_HOUR] = bin2bcd(tm->tm_hour); 249 buf[M41T80_REG_DAY] = bin2bcd(tm->tm_mday); 250 buf[M41T80_REG_MON] = bin2bcd(tm->tm_mon + 1); 251 buf[M41T80_REG_YEAR] = bin2bcd(tm->tm_year - 100); 252 buf[M41T80_REG_WDAY] = tm->tm_wday; 253 254 /* If the square wave output is controlled in the weekday register */ 255 if (clientdata->features & M41T80_FEATURE_SQ_ALT) { 256 int val; 257 258 val = i2c_smbus_read_byte_data(client, M41T80_REG_WDAY); 259 if (val < 0) 260 return val; 261 262 buf[M41T80_REG_WDAY] |= (val & 0xf0); 263 } 264 265 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_SSEC, 266 sizeof(buf), buf); 267 if (err < 0) { 268 dev_err(&client->dev, "Unable to write to date registers\n"); 269 return err; 270 } 271 272 /* Clear the OF bit of Flags Register */ 273 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 274 if (flags < 0) 275 return flags; 276 277 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, 278 flags & ~M41T80_FLAGS_OF); 279 if (err < 0) { 280 dev_err(&client->dev, "Unable to write flags register\n"); 281 return err; 282 } 283 284 return err; 285 } 286 287 static int m41t80_rtc_proc(struct device *dev, struct seq_file *seq) 288 { 289 struct i2c_client *client = to_i2c_client(dev); 290 struct m41t80_data *clientdata = i2c_get_clientdata(client); 291 int reg; 292 293 if (clientdata->features & M41T80_FEATURE_BL) { 294 reg = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 295 if (reg < 0) 296 return reg; 297 seq_printf(seq, "battery\t\t: %s\n", 298 (reg & M41T80_FLAGS_BATT_LOW) ? "exhausted" : "ok"); 299 } 300 return 0; 301 } 302 303 static int m41t80_alarm_irq_enable(struct device *dev, unsigned int enabled) 304 { 305 struct i2c_client *client = to_i2c_client(dev); 306 int flags, retval; 307 308 flags = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 309 if (flags < 0) 310 return flags; 311 312 if (enabled) 313 flags |= M41T80_ALMON_AFE; 314 else 315 flags &= ~M41T80_ALMON_AFE; 316 317 retval = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, flags); 318 if (retval < 0) { 319 dev_err(dev, "Unable to enable alarm IRQ %d\n", retval); 320 return retval; 321 } 322 return 0; 323 } 324 325 static int m41t80_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 326 { 327 struct i2c_client *client = to_i2c_client(dev); 328 u8 alarmvals[5]; 329 int ret, err; 330 331 alarmvals[0] = bin2bcd(alrm->time.tm_mon + 1); 332 alarmvals[1] = bin2bcd(alrm->time.tm_mday); 333 alarmvals[2] = bin2bcd(alrm->time.tm_hour); 334 alarmvals[3] = bin2bcd(alrm->time.tm_min); 335 alarmvals[4] = bin2bcd(alrm->time.tm_sec); 336 337 /* Clear AF and AFE flags */ 338 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 339 if (ret < 0) 340 return ret; 341 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 342 ret & ~(M41T80_ALMON_AFE)); 343 if (err < 0) { 344 dev_err(dev, "Unable to clear AFE bit\n"); 345 return err; 346 } 347 348 /* Keep SQWE bit value */ 349 alarmvals[0] |= (ret & M41T80_ALMON_SQWE); 350 351 ret = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 352 if (ret < 0) 353 return ret; 354 355 err = i2c_smbus_write_byte_data(client, M41T80_REG_FLAGS, 356 ret & ~(M41T80_FLAGS_AF)); 357 if (err < 0) { 358 dev_err(dev, "Unable to clear AF bit\n"); 359 return err; 360 } 361 362 /* Write the alarm */ 363 err = i2c_smbus_write_i2c_block_data(client, M41T80_REG_ALARM_MON, 364 5, alarmvals); 365 if (err) 366 return err; 367 368 /* Enable the alarm interrupt */ 369 if (alrm->enabled) { 370 alarmvals[0] |= M41T80_ALMON_AFE; 371 err = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 372 alarmvals[0]); 373 if (err) 374 return err; 375 } 376 377 return 0; 378 } 379 380 static int m41t80_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 381 { 382 struct i2c_client *client = to_i2c_client(dev); 383 u8 alarmvals[5]; 384 int flags, ret; 385 386 ret = i2c_smbus_read_i2c_block_data(client, M41T80_REG_ALARM_MON, 387 5, alarmvals); 388 if (ret != 5) 389 return ret < 0 ? ret : -EIO; 390 391 flags = i2c_smbus_read_byte_data(client, M41T80_REG_FLAGS); 392 if (flags < 0) 393 return flags; 394 395 alrm->time.tm_sec = bcd2bin(alarmvals[4] & 0x7f); 396 alrm->time.tm_min = bcd2bin(alarmvals[3] & 0x7f); 397 alrm->time.tm_hour = bcd2bin(alarmvals[2] & 0x3f); 398 alrm->time.tm_mday = bcd2bin(alarmvals[1] & 0x3f); 399 alrm->time.tm_mon = bcd2bin(alarmvals[0] & 0x3f) - 1; 400 401 alrm->enabled = !!(alarmvals[0] & M41T80_ALMON_AFE); 402 alrm->pending = (flags & M41T80_FLAGS_AF) && alrm->enabled; 403 404 return 0; 405 } 406 407 static struct rtc_class_ops m41t80_rtc_ops = { 408 .read_time = m41t80_rtc_read_time, 409 .set_time = m41t80_rtc_set_time, 410 .proc = m41t80_rtc_proc, 411 }; 412 413 #ifdef CONFIG_PM_SLEEP 414 static int m41t80_suspend(struct device *dev) 415 { 416 struct i2c_client *client = to_i2c_client(dev); 417 418 if (client->irq >= 0 && device_may_wakeup(dev)) 419 enable_irq_wake(client->irq); 420 421 return 0; 422 } 423 424 static int m41t80_resume(struct device *dev) 425 { 426 struct i2c_client *client = to_i2c_client(dev); 427 428 if (client->irq >= 0 && device_may_wakeup(dev)) 429 disable_irq_wake(client->irq); 430 431 return 0; 432 } 433 #endif 434 435 static SIMPLE_DEV_PM_OPS(m41t80_pm, m41t80_suspend, m41t80_resume); 436 437 #ifdef CONFIG_COMMON_CLK 438 #define sqw_to_m41t80_data(_hw) container_of(_hw, struct m41t80_data, sqw) 439 440 static unsigned long m41t80_decode_freq(int setting) 441 { 442 return (setting == 0) ? 0 : (setting == 1) ? M41T80_SQW_MAX_FREQ : 443 M41T80_SQW_MAX_FREQ >> setting; 444 } 445 446 static unsigned long m41t80_get_freq(struct m41t80_data *m41t80) 447 { 448 struct i2c_client *client = m41t80->client; 449 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ? 450 M41T80_REG_WDAY : M41T80_REG_SQW; 451 int ret = i2c_smbus_read_byte_data(client, reg_sqw); 452 453 if (ret < 0) 454 return 0; 455 return m41t80_decode_freq(ret >> 4); 456 } 457 458 static unsigned long m41t80_sqw_recalc_rate(struct clk_hw *hw, 459 unsigned long parent_rate) 460 { 461 return sqw_to_m41t80_data(hw)->freq; 462 } 463 464 static long m41t80_sqw_round_rate(struct clk_hw *hw, unsigned long rate, 465 unsigned long *prate) 466 { 467 if (rate >= M41T80_SQW_MAX_FREQ) 468 return M41T80_SQW_MAX_FREQ; 469 if (rate >= M41T80_SQW_MAX_FREQ / 4) 470 return M41T80_SQW_MAX_FREQ / 4; 471 if (!rate) 472 return 0; 473 return 1 << ilog2(rate); 474 } 475 476 static int m41t80_sqw_set_rate(struct clk_hw *hw, unsigned long rate, 477 unsigned long parent_rate) 478 { 479 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw); 480 struct i2c_client *client = m41t80->client; 481 int reg_sqw = (m41t80->features & M41T80_FEATURE_SQ_ALT) ? 482 M41T80_REG_WDAY : M41T80_REG_SQW; 483 int reg, ret, val = 0; 484 485 if (rate >= M41T80_SQW_MAX_FREQ) 486 val = 1; 487 else if (rate >= M41T80_SQW_MAX_FREQ / 4) 488 val = 2; 489 else if (rate) 490 val = 15 - ilog2(rate); 491 492 reg = i2c_smbus_read_byte_data(client, reg_sqw); 493 if (reg < 0) 494 return reg; 495 496 reg = (reg & 0x0f) | (val << 4); 497 498 ret = i2c_smbus_write_byte_data(client, reg_sqw, reg); 499 if (!ret) 500 m41t80->freq = m41t80_decode_freq(val); 501 return ret; 502 } 503 504 static int m41t80_sqw_control(struct clk_hw *hw, bool enable) 505 { 506 struct m41t80_data *m41t80 = sqw_to_m41t80_data(hw); 507 struct i2c_client *client = m41t80->client; 508 int ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 509 510 if (ret < 0) 511 return ret; 512 513 if (enable) 514 ret |= M41T80_ALMON_SQWE; 515 else 516 ret &= ~M41T80_ALMON_SQWE; 517 518 ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, ret); 519 if (!ret) 520 m41t80->sqwe = enable; 521 return ret; 522 } 523 524 static int m41t80_sqw_prepare(struct clk_hw *hw) 525 { 526 return m41t80_sqw_control(hw, 1); 527 } 528 529 static void m41t80_sqw_unprepare(struct clk_hw *hw) 530 { 531 m41t80_sqw_control(hw, 0); 532 } 533 534 static int m41t80_sqw_is_prepared(struct clk_hw *hw) 535 { 536 return sqw_to_m41t80_data(hw)->sqwe; 537 } 538 539 static const struct clk_ops m41t80_sqw_ops = { 540 .prepare = m41t80_sqw_prepare, 541 .unprepare = m41t80_sqw_unprepare, 542 .is_prepared = m41t80_sqw_is_prepared, 543 .recalc_rate = m41t80_sqw_recalc_rate, 544 .round_rate = m41t80_sqw_round_rate, 545 .set_rate = m41t80_sqw_set_rate, 546 }; 547 548 static struct clk *m41t80_sqw_register_clk(struct m41t80_data *m41t80) 549 { 550 struct i2c_client *client = m41t80->client; 551 struct device_node *node = client->dev.of_node; 552 struct clk *clk; 553 struct clk_init_data init; 554 int ret; 555 556 /* First disable the clock */ 557 ret = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); 558 if (ret < 0) 559 return ERR_PTR(ret); 560 ret = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, 561 ret & ~(M41T80_ALMON_SQWE)); 562 if (ret < 0) 563 return ERR_PTR(ret); 564 565 init.name = "m41t80-sqw"; 566 init.ops = &m41t80_sqw_ops; 567 init.flags = 0; 568 init.parent_names = NULL; 569 init.num_parents = 0; 570 m41t80->sqw.init = &init; 571 m41t80->freq = m41t80_get_freq(m41t80); 572 573 /* optional override of the clockname */ 574 of_property_read_string(node, "clock-output-names", &init.name); 575 576 /* register the clock */ 577 clk = clk_register(&client->dev, &m41t80->sqw); 578 if (!IS_ERR(clk)) 579 of_clk_add_provider(node, of_clk_src_simple_get, clk); 580 581 return clk; 582 } 583 #endif 584 585 #ifdef CONFIG_RTC_DRV_M41T80_WDT 586 /* 587 ***************************************************************************** 588 * 589 * Watchdog Driver 590 * 591 ***************************************************************************** 592 */ 593 static DEFINE_MUTEX(m41t80_rtc_mutex); 594 static struct i2c_client *save_client; 595 596 /* Default margin */ 597 #define WD_TIMO 60 /* 1..31 seconds */ 598 599 static int wdt_margin = WD_TIMO; 600 module_param(wdt_margin, int, 0); 601 MODULE_PARM_DESC(wdt_margin, "Watchdog timeout in seconds (default 60s)"); 602 603 static unsigned long wdt_is_open; 604 static int boot_flag; 605 606 /** 607 * wdt_ping: 608 * 609 * Reload counter one with the watchdog timeout. We don't bother reloading 610 * the cascade counter. 611 */ 612 static void wdt_ping(void) 613 { 614 unsigned char i2c_data[2]; 615 struct i2c_msg msgs1[1] = { 616 { 617 .addr = save_client->addr, 618 .flags = 0, 619 .len = 2, 620 .buf = i2c_data, 621 }, 622 }; 623 struct m41t80_data *clientdata = i2c_get_clientdata(save_client); 624 625 i2c_data[0] = 0x09; /* watchdog register */ 626 627 if (wdt_margin > 31) 628 i2c_data[1] = (wdt_margin & 0xFC) | 0x83; /* resolution = 4s */ 629 else 630 /* 631 * WDS = 1 (0x80), mulitplier = WD_TIMO, resolution = 1s (0x02) 632 */ 633 i2c_data[1] = wdt_margin << 2 | 0x82; 634 635 /* 636 * M41T65 has three bits for watchdog resolution. Don't set bit 7, as 637 * that would be an invalid resolution. 638 */ 639 if (clientdata->features & M41T80_FEATURE_WD) 640 i2c_data[1] &= ~M41T80_WATCHDOG_RB2; 641 642 i2c_transfer(save_client->adapter, msgs1, 1); 643 } 644 645 /** 646 * wdt_disable: 647 * 648 * disables watchdog. 649 */ 650 static void wdt_disable(void) 651 { 652 unsigned char i2c_data[2], i2c_buf[0x10]; 653 struct i2c_msg msgs0[2] = { 654 { 655 .addr = save_client->addr, 656 .flags = 0, 657 .len = 1, 658 .buf = i2c_data, 659 }, 660 { 661 .addr = save_client->addr, 662 .flags = I2C_M_RD, 663 .len = 1, 664 .buf = i2c_buf, 665 }, 666 }; 667 struct i2c_msg msgs1[1] = { 668 { 669 .addr = save_client->addr, 670 .flags = 0, 671 .len = 2, 672 .buf = i2c_data, 673 }, 674 }; 675 676 i2c_data[0] = 0x09; 677 i2c_transfer(save_client->adapter, msgs0, 2); 678 679 i2c_data[0] = 0x09; 680 i2c_data[1] = 0x00; 681 i2c_transfer(save_client->adapter, msgs1, 1); 682 } 683 684 /** 685 * wdt_write: 686 * @file: file handle to the watchdog 687 * @buf: buffer to write (unused as data does not matter here 688 * @count: count of bytes 689 * @ppos: pointer to the position to write. No seeks allowed 690 * 691 * A write to a watchdog device is defined as a keepalive signal. Any 692 * write of data will do, as we we don't define content meaning. 693 */ 694 static ssize_t wdt_write(struct file *file, const char __user *buf, 695 size_t count, loff_t *ppos) 696 { 697 if (count) { 698 wdt_ping(); 699 return 1; 700 } 701 return 0; 702 } 703 704 static ssize_t wdt_read(struct file *file, char __user *buf, 705 size_t count, loff_t *ppos) 706 { 707 return 0; 708 } 709 710 /** 711 * wdt_ioctl: 712 * @inode: inode of the device 713 * @file: file handle to the device 714 * @cmd: watchdog command 715 * @arg: argument pointer 716 * 717 * The watchdog API defines a common set of functions for all watchdogs 718 * according to their available features. We only actually usefully support 719 * querying capabilities and current status. 720 */ 721 static int wdt_ioctl(struct file *file, unsigned int cmd, 722 unsigned long arg) 723 { 724 int new_margin, rv; 725 static struct watchdog_info ident = { 726 .options = WDIOF_POWERUNDER | WDIOF_KEEPALIVEPING | 727 WDIOF_SETTIMEOUT, 728 .firmware_version = 1, 729 .identity = "M41T80 WTD" 730 }; 731 732 switch (cmd) { 733 case WDIOC_GETSUPPORT: 734 return copy_to_user((struct watchdog_info __user *)arg, &ident, 735 sizeof(ident)) ? -EFAULT : 0; 736 737 case WDIOC_GETSTATUS: 738 case WDIOC_GETBOOTSTATUS: 739 return put_user(boot_flag, (int __user *)arg); 740 case WDIOC_KEEPALIVE: 741 wdt_ping(); 742 return 0; 743 case WDIOC_SETTIMEOUT: 744 if (get_user(new_margin, (int __user *)arg)) 745 return -EFAULT; 746 /* Arbitrary, can't find the card's limits */ 747 if (new_margin < 1 || new_margin > 124) 748 return -EINVAL; 749 wdt_margin = new_margin; 750 wdt_ping(); 751 /* Fall through */ 752 case WDIOC_GETTIMEOUT: 753 return put_user(wdt_margin, (int __user *)arg); 754 755 case WDIOC_SETOPTIONS: 756 if (copy_from_user(&rv, (int __user *)arg, sizeof(int))) 757 return -EFAULT; 758 759 if (rv & WDIOS_DISABLECARD) { 760 pr_info("disable watchdog\n"); 761 wdt_disable(); 762 } 763 764 if (rv & WDIOS_ENABLECARD) { 765 pr_info("enable watchdog\n"); 766 wdt_ping(); 767 } 768 769 return -EINVAL; 770 } 771 return -ENOTTY; 772 } 773 774 static long wdt_unlocked_ioctl(struct file *file, unsigned int cmd, 775 unsigned long arg) 776 { 777 int ret; 778 779 mutex_lock(&m41t80_rtc_mutex); 780 ret = wdt_ioctl(file, cmd, arg); 781 mutex_unlock(&m41t80_rtc_mutex); 782 783 return ret; 784 } 785 786 /** 787 * wdt_open: 788 * @inode: inode of device 789 * @file: file handle to device 790 * 791 */ 792 static int wdt_open(struct inode *inode, struct file *file) 793 { 794 if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) { 795 mutex_lock(&m41t80_rtc_mutex); 796 if (test_and_set_bit(0, &wdt_is_open)) { 797 mutex_unlock(&m41t80_rtc_mutex); 798 return -EBUSY; 799 } 800 /* 801 * Activate 802 */ 803 wdt_is_open = 1; 804 mutex_unlock(&m41t80_rtc_mutex); 805 return stream_open(inode, file); 806 } 807 return -ENODEV; 808 } 809 810 /** 811 * wdt_close: 812 * @inode: inode to board 813 * @file: file handle to board 814 * 815 */ 816 static int wdt_release(struct inode *inode, struct file *file) 817 { 818 if (MINOR(inode->i_rdev) == WATCHDOG_MINOR) 819 clear_bit(0, &wdt_is_open); 820 return 0; 821 } 822 823 /** 824 * notify_sys: 825 * @this: our notifier block 826 * @code: the event being reported 827 * @unused: unused 828 * 829 * Our notifier is called on system shutdowns. We want to turn the card 830 * off at reboot otherwise the machine will reboot again during memory 831 * test or worse yet during the following fsck. This would suck, in fact 832 * trust me - if it happens it does suck. 833 */ 834 static int wdt_notify_sys(struct notifier_block *this, unsigned long code, 835 void *unused) 836 { 837 if (code == SYS_DOWN || code == SYS_HALT) 838 /* Disable Watchdog */ 839 wdt_disable(); 840 return NOTIFY_DONE; 841 } 842 843 static const struct file_operations wdt_fops = { 844 .owner = THIS_MODULE, 845 .read = wdt_read, 846 .unlocked_ioctl = wdt_unlocked_ioctl, 847 .write = wdt_write, 848 .open = wdt_open, 849 .release = wdt_release, 850 .llseek = no_llseek, 851 }; 852 853 static struct miscdevice wdt_dev = { 854 .minor = WATCHDOG_MINOR, 855 .name = "watchdog", 856 .fops = &wdt_fops, 857 }; 858 859 /* 860 * The WDT card needs to learn about soft shutdowns in order to 861 * turn the timebomb registers off. 862 */ 863 static struct notifier_block wdt_notifier = { 864 .notifier_call = wdt_notify_sys, 865 }; 866 #endif /* CONFIG_RTC_DRV_M41T80_WDT */ 867 868 /* 869 ***************************************************************************** 870 * 871 * Driver Interface 872 * 873 ***************************************************************************** 874 */ 875 876 static int m41t80_probe(struct i2c_client *client, 877 const struct i2c_device_id *id) 878 { 879 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); 880 int rc = 0; 881 struct rtc_time tm; 882 struct m41t80_data *m41t80_data = NULL; 883 bool wakeup_source = false; 884 885 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_I2C_BLOCK | 886 I2C_FUNC_SMBUS_BYTE_DATA)) { 887 dev_err(&adapter->dev, "doesn't support I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK\n"); 888 return -ENODEV; 889 } 890 891 m41t80_data = devm_kzalloc(&client->dev, sizeof(*m41t80_data), 892 GFP_KERNEL); 893 if (!m41t80_data) 894 return -ENOMEM; 895 896 m41t80_data->client = client; 897 if (client->dev.of_node) 898 m41t80_data->features = (unsigned long) 899 of_device_get_match_data(&client->dev); 900 else 901 m41t80_data->features = id->driver_data; 902 i2c_set_clientdata(client, m41t80_data); 903 904 m41t80_data->rtc = devm_rtc_allocate_device(&client->dev); 905 if (IS_ERR(m41t80_data->rtc)) 906 return PTR_ERR(m41t80_data->rtc); 907 908 #ifdef CONFIG_OF 909 wakeup_source = of_property_read_bool(client->dev.of_node, 910 "wakeup-source"); 911 #endif 912 if (client->irq > 0) { 913 rc = devm_request_threaded_irq(&client->dev, client->irq, 914 NULL, m41t80_handle_irq, 915 IRQF_TRIGGER_LOW | IRQF_ONESHOT, 916 "m41t80", client); 917 if (rc) { 918 dev_warn(&client->dev, "unable to request IRQ, alarms disabled\n"); 919 client->irq = 0; 920 wakeup_source = false; 921 } 922 } 923 if (client->irq > 0 || wakeup_source) { 924 m41t80_rtc_ops.read_alarm = m41t80_read_alarm; 925 m41t80_rtc_ops.set_alarm = m41t80_set_alarm; 926 m41t80_rtc_ops.alarm_irq_enable = m41t80_alarm_irq_enable; 927 /* Enable the wakealarm */ 928 device_init_wakeup(&client->dev, true); 929 } 930 931 m41t80_data->rtc->ops = &m41t80_rtc_ops; 932 933 if (client->irq <= 0) { 934 /* We cannot support UIE mode if we do not have an IRQ line */ 935 m41t80_data->rtc->uie_unsupported = 1; 936 } 937 938 /* Make sure HT (Halt Update) bit is cleared */ 939 rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_HOUR); 940 941 if (rc >= 0 && rc & M41T80_ALHOUR_HT) { 942 if (m41t80_data->features & M41T80_FEATURE_HT) { 943 m41t80_rtc_read_time(&client->dev, &tm); 944 dev_info(&client->dev, "HT bit was set!\n"); 945 dev_info(&client->dev, "Power Down at %ptR\n", &tm); 946 } 947 rc = i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_HOUR, 948 rc & ~M41T80_ALHOUR_HT); 949 } 950 951 if (rc < 0) { 952 dev_err(&client->dev, "Can't clear HT bit\n"); 953 return rc; 954 } 955 956 /* Make sure ST (stop) bit is cleared */ 957 rc = i2c_smbus_read_byte_data(client, M41T80_REG_SEC); 958 959 if (rc >= 0 && rc & M41T80_SEC_ST) 960 rc = i2c_smbus_write_byte_data(client, M41T80_REG_SEC, 961 rc & ~M41T80_SEC_ST); 962 if (rc < 0) { 963 dev_err(&client->dev, "Can't clear ST bit\n"); 964 return rc; 965 } 966 967 #ifdef CONFIG_RTC_DRV_M41T80_WDT 968 if (m41t80_data->features & M41T80_FEATURE_HT) { 969 save_client = client; 970 rc = misc_register(&wdt_dev); 971 if (rc) 972 return rc; 973 rc = register_reboot_notifier(&wdt_notifier); 974 if (rc) { 975 misc_deregister(&wdt_dev); 976 return rc; 977 } 978 } 979 #endif 980 #ifdef CONFIG_COMMON_CLK 981 if (m41t80_data->features & M41T80_FEATURE_SQ) 982 m41t80_sqw_register_clk(m41t80_data); 983 #endif 984 985 rc = rtc_register_device(m41t80_data->rtc); 986 if (rc) 987 return rc; 988 989 return 0; 990 } 991 992 static int m41t80_remove(struct i2c_client *client) 993 { 994 #ifdef CONFIG_RTC_DRV_M41T80_WDT 995 struct m41t80_data *clientdata = i2c_get_clientdata(client); 996 997 if (clientdata->features & M41T80_FEATURE_HT) { 998 misc_deregister(&wdt_dev); 999 unregister_reboot_notifier(&wdt_notifier); 1000 } 1001 #endif 1002 1003 return 0; 1004 } 1005 1006 static struct i2c_driver m41t80_driver = { 1007 .driver = { 1008 .name = "rtc-m41t80", 1009 .of_match_table = of_match_ptr(m41t80_of_match), 1010 .pm = &m41t80_pm, 1011 }, 1012 .probe = m41t80_probe, 1013 .remove = m41t80_remove, 1014 .id_table = m41t80_id, 1015 }; 1016 1017 module_i2c_driver(m41t80_driver); 1018 1019 MODULE_AUTHOR("Alexander Bigga <ab@mycable.de>"); 1020 MODULE_DESCRIPTION("ST Microelectronics M41T80 series RTC I2C Client Driver"); 1021 MODULE_LICENSE("GPL"); 1022