xref: /openbmc/linux/drivers/rtc/rtc-isl12022.c (revision 9470114d)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * An I2C driver for the Intersil ISL 12022
4  *
5  * Author: Roman Fietze <roman.fietze@telemotive.de>
6  *
7  * Based on the Philips PCF8563 RTC
8  * by Alessandro Zummo <a.zummo@towertech.it>.
9  */
10 
11 #include <linux/bcd.h>
12 #include <linux/bitfield.h>
13 #include <linux/clk-provider.h>
14 #include <linux/err.h>
15 #include <linux/hwmon.h>
16 #include <linux/i2c.h>
17 #include <linux/module.h>
18 #include <linux/regmap.h>
19 #include <linux/rtc.h>
20 #include <linux/slab.h>
21 
22 #include <asm/byteorder.h>
23 
24 /* ISL register offsets */
25 #define ISL12022_REG_SC		0x00
26 #define ISL12022_REG_MN		0x01
27 #define ISL12022_REG_HR		0x02
28 #define ISL12022_REG_DT		0x03
29 #define ISL12022_REG_MO		0x04
30 #define ISL12022_REG_YR		0x05
31 #define ISL12022_REG_DW		0x06
32 
33 #define ISL12022_REG_SR		0x07
34 #define ISL12022_REG_INT	0x08
35 
36 #define ISL12022_REG_PWR_VBAT	0x0a
37 
38 #define ISL12022_REG_BETA	0x0d
39 #define ISL12022_REG_TEMP_L	0x28
40 
41 /* ISL register bits */
42 #define ISL12022_HR_MIL		(1 << 7)	/* military or 24 hour time */
43 
44 #define ISL12022_SR_LBAT85	(1 << 2)
45 #define ISL12022_SR_LBAT75	(1 << 1)
46 
47 #define ISL12022_INT_WRTC	(1 << 6)
48 #define ISL12022_INT_FO_MASK	GENMASK(3, 0)
49 #define ISL12022_INT_FO_OFF	0x0
50 #define ISL12022_INT_FO_32K	0x1
51 
52 #define ISL12022_REG_VB85_MASK	GENMASK(5, 3)
53 #define ISL12022_REG_VB75_MASK	GENMASK(2, 0)
54 
55 #define ISL12022_BETA_TSE	(1 << 7)
56 
57 static umode_t isl12022_hwmon_is_visible(const void *data,
58 					 enum hwmon_sensor_types type,
59 					 u32 attr, int channel)
60 {
61 	if (type == hwmon_temp && attr == hwmon_temp_input)
62 		return 0444;
63 
64 	return 0;
65 }
66 
67 /*
68  * A user-initiated temperature conversion is not started by this function,
69  * so the temperature is updated once every ~60 seconds.
70  */
71 static int isl12022_hwmon_read_temp(struct device *dev, long *mC)
72 {
73 	struct regmap *regmap = dev_get_drvdata(dev);
74 	int temp, ret;
75 	__le16 buf;
76 
77 	ret = regmap_bulk_read(regmap, ISL12022_REG_TEMP_L, &buf, sizeof(buf));
78 	if (ret)
79 		return ret;
80 	/*
81 	 * Temperature is represented as a 10-bit number, unit half-Kelvins.
82 	 */
83 	temp = le16_to_cpu(buf);
84 	temp *= 500;
85 	temp -= 273000;
86 
87 	*mC = temp;
88 
89 	return 0;
90 }
91 
92 static int isl12022_hwmon_read(struct device *dev,
93 			       enum hwmon_sensor_types type,
94 			       u32 attr, int channel, long *val)
95 {
96 	if (type == hwmon_temp && attr == hwmon_temp_input)
97 		return isl12022_hwmon_read_temp(dev, val);
98 
99 	return -EOPNOTSUPP;
100 }
101 
102 static const struct hwmon_channel_info * const isl12022_hwmon_info[] = {
103 	HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT),
104 	NULL
105 };
106 
107 static const struct hwmon_ops isl12022_hwmon_ops = {
108 	.is_visible = isl12022_hwmon_is_visible,
109 	.read = isl12022_hwmon_read,
110 };
111 
112 static const struct hwmon_chip_info isl12022_hwmon_chip_info = {
113 	.ops = &isl12022_hwmon_ops,
114 	.info = isl12022_hwmon_info,
115 };
116 
117 static void isl12022_hwmon_register(struct device *dev)
118 {
119 	struct regmap *regmap = dev_get_drvdata(dev);
120 	struct device *hwmon;
121 	int ret;
122 
123 	if (!IS_REACHABLE(CONFIG_HWMON))
124 		return;
125 
126 	ret = regmap_update_bits(regmap, ISL12022_REG_BETA,
127 				 ISL12022_BETA_TSE, ISL12022_BETA_TSE);
128 	if (ret) {
129 		dev_warn(dev, "unable to enable temperature sensor\n");
130 		return;
131 	}
132 
133 	hwmon = devm_hwmon_device_register_with_info(dev, "isl12022", regmap,
134 						     &isl12022_hwmon_chip_info,
135 						     NULL);
136 	if (IS_ERR(hwmon))
137 		dev_warn(dev, "unable to register hwmon device: %pe\n", hwmon);
138 }
139 
140 /*
141  * In the routines that deal directly with the isl12022 hardware, we use
142  * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
143  */
144 static int isl12022_rtc_read_time(struct device *dev, struct rtc_time *tm)
145 {
146 	struct regmap *regmap = dev_get_drvdata(dev);
147 	uint8_t buf[ISL12022_REG_INT + 1];
148 	int ret;
149 
150 	ret = regmap_bulk_read(regmap, ISL12022_REG_SC, buf, sizeof(buf));
151 	if (ret)
152 		return ret;
153 
154 	dev_dbg(dev,
155 		"raw data is sec=%02x, min=%02x, hr=%02x, mday=%02x, mon=%02x, year=%02x, wday=%02x, sr=%02x, int=%02x",
156 		buf[ISL12022_REG_SC],
157 		buf[ISL12022_REG_MN],
158 		buf[ISL12022_REG_HR],
159 		buf[ISL12022_REG_DT],
160 		buf[ISL12022_REG_MO],
161 		buf[ISL12022_REG_YR],
162 		buf[ISL12022_REG_DW],
163 		buf[ISL12022_REG_SR],
164 		buf[ISL12022_REG_INT]);
165 
166 	tm->tm_sec = bcd2bin(buf[ISL12022_REG_SC] & 0x7F);
167 	tm->tm_min = bcd2bin(buf[ISL12022_REG_MN] & 0x7F);
168 	tm->tm_hour = bcd2bin(buf[ISL12022_REG_HR] & 0x3F);
169 	tm->tm_mday = bcd2bin(buf[ISL12022_REG_DT] & 0x3F);
170 	tm->tm_wday = buf[ISL12022_REG_DW] & 0x07;
171 	tm->tm_mon = bcd2bin(buf[ISL12022_REG_MO] & 0x1F) - 1;
172 	tm->tm_year = bcd2bin(buf[ISL12022_REG_YR]) + 100;
173 
174 	dev_dbg(dev, "%s: %ptR\n", __func__, tm);
175 
176 	return 0;
177 }
178 
179 static int isl12022_rtc_set_time(struct device *dev, struct rtc_time *tm)
180 {
181 	struct regmap *regmap = dev_get_drvdata(dev);
182 	int ret;
183 	uint8_t buf[ISL12022_REG_DW + 1];
184 
185 	dev_dbg(dev, "%s: %ptR\n", __func__, tm);
186 
187 	/* Ensure the write enable bit is set. */
188 	ret = regmap_update_bits(regmap, ISL12022_REG_INT,
189 				 ISL12022_INT_WRTC, ISL12022_INT_WRTC);
190 	if (ret)
191 		return ret;
192 
193 	/* hours, minutes and seconds */
194 	buf[ISL12022_REG_SC] = bin2bcd(tm->tm_sec);
195 	buf[ISL12022_REG_MN] = bin2bcd(tm->tm_min);
196 	buf[ISL12022_REG_HR] = bin2bcd(tm->tm_hour) | ISL12022_HR_MIL;
197 
198 	buf[ISL12022_REG_DT] = bin2bcd(tm->tm_mday);
199 
200 	/* month, 1 - 12 */
201 	buf[ISL12022_REG_MO] = bin2bcd(tm->tm_mon + 1);
202 
203 	/* year and century */
204 	buf[ISL12022_REG_YR] = bin2bcd(tm->tm_year % 100);
205 
206 	buf[ISL12022_REG_DW] = tm->tm_wday & 0x07;
207 
208 	return regmap_bulk_write(regmap, ISL12022_REG_SC, buf, sizeof(buf));
209 }
210 
211 static int isl12022_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
212 {
213 	struct regmap *regmap = dev_get_drvdata(dev);
214 	u32 user, val;
215 	int ret;
216 
217 	switch (cmd) {
218 	case RTC_VL_READ:
219 		ret = regmap_read(regmap, ISL12022_REG_SR, &val);
220 		if (ret)
221 			return ret;
222 
223 		user = 0;
224 		if (val & ISL12022_SR_LBAT85)
225 			user |= RTC_VL_BACKUP_LOW;
226 
227 		if (val & ISL12022_SR_LBAT75)
228 			user |= RTC_VL_BACKUP_EMPTY;
229 
230 		return put_user(user, (u32 __user *)arg);
231 
232 	default:
233 		return -ENOIOCTLCMD;
234 	}
235 }
236 
237 static const struct rtc_class_ops isl12022_rtc_ops = {
238 	.ioctl		= isl12022_rtc_ioctl,
239 	.read_time	= isl12022_rtc_read_time,
240 	.set_time	= isl12022_rtc_set_time,
241 };
242 
243 static const struct regmap_config regmap_config = {
244 	.reg_bits = 8,
245 	.val_bits = 8,
246 	.use_single_write = true,
247 };
248 
249 static int isl12022_register_clock(struct device *dev)
250 {
251 	struct regmap *regmap = dev_get_drvdata(dev);
252 	struct clk_hw *hw;
253 	int ret;
254 
255 	if (!device_property_present(dev, "#clock-cells")) {
256 		/*
257 		 * Disabling the F_OUT pin reduces the power
258 		 * consumption in battery mode by ~25%.
259 		 */
260 		regmap_update_bits(regmap, ISL12022_REG_INT, ISL12022_INT_FO_MASK,
261 				   ISL12022_INT_FO_OFF);
262 
263 		return 0;
264 	}
265 
266 	if (!IS_ENABLED(CONFIG_COMMON_CLK))
267 		return 0;
268 
269 	/*
270 	 * For now, only support a fixed clock of 32768Hz (the reset default).
271 	 */
272 	ret = regmap_update_bits(regmap, ISL12022_REG_INT,
273 				 ISL12022_INT_FO_MASK, ISL12022_INT_FO_32K);
274 	if (ret)
275 		return ret;
276 
277 	hw = devm_clk_hw_register_fixed_rate(dev, "isl12022", NULL, 0, 32768);
278 	if (IS_ERR(hw))
279 		return PTR_ERR(hw);
280 
281 	return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get, hw);
282 }
283 
284 static const u32 trip_levels[2][7] = {
285 	{ 2125000, 2295000, 2550000, 2805000, 3060000, 4250000, 4675000 },
286 	{ 1875000, 2025000, 2250000, 2475000, 2700000, 3750000, 4125000 },
287 };
288 
289 static void isl12022_set_trip_levels(struct device *dev)
290 {
291 	struct regmap *regmap = dev_get_drvdata(dev);
292 	u32 levels[2] = {0, 0};
293 	int ret, i, j, x[2];
294 	u8 val, mask;
295 
296 	device_property_read_u32_array(dev, "isil,battery-trip-levels-microvolt",
297 				       levels, 2);
298 
299 	for (i = 0; i < 2; i++) {
300 		for (j = 0; j < ARRAY_SIZE(trip_levels[i]) - 1; j++) {
301 			if (levels[i] <= trip_levels[i][j])
302 				break;
303 		}
304 		x[i] = j;
305 	}
306 
307 	val = FIELD_PREP(ISL12022_REG_VB85_MASK, x[0]) |
308 		FIELD_PREP(ISL12022_REG_VB75_MASK, x[1]);
309 	mask = ISL12022_REG_VB85_MASK | ISL12022_REG_VB75_MASK;
310 
311 	ret = regmap_update_bits(regmap, ISL12022_REG_PWR_VBAT, mask, val);
312 	if (ret)
313 		dev_warn(dev, "unable to set battery alarm levels: %d\n", ret);
314 
315 	/*
316 	 * Force a write of the TSE bit in the BETA register, in order
317 	 * to trigger an update of the LBAT75 and LBAT85 bits in the
318 	 * status register. In battery backup mode, those bits have
319 	 * another meaning, so without this, they may contain stale
320 	 * values for up to a minute after power-on.
321 	 */
322 	regmap_write_bits(regmap, ISL12022_REG_BETA,
323 			  ISL12022_BETA_TSE, ISL12022_BETA_TSE);
324 }
325 
326 static int isl12022_probe(struct i2c_client *client)
327 {
328 	struct rtc_device *rtc;
329 	struct regmap *regmap;
330 	int ret;
331 
332 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
333 		return -ENODEV;
334 
335 	regmap = devm_regmap_init_i2c(client, &regmap_config);
336 	if (IS_ERR(regmap)) {
337 		dev_err(&client->dev, "regmap allocation failed\n");
338 		return PTR_ERR(regmap);
339 	}
340 
341 	dev_set_drvdata(&client->dev, regmap);
342 
343 	ret = isl12022_register_clock(&client->dev);
344 	if (ret)
345 		return ret;
346 
347 	isl12022_set_trip_levels(&client->dev);
348 	isl12022_hwmon_register(&client->dev);
349 
350 	rtc = devm_rtc_allocate_device(&client->dev);
351 	if (IS_ERR(rtc))
352 		return PTR_ERR(rtc);
353 
354 	rtc->ops = &isl12022_rtc_ops;
355 	rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
356 	rtc->range_max = RTC_TIMESTAMP_END_2099;
357 
358 	return devm_rtc_register_device(rtc);
359 }
360 
361 static const struct of_device_id isl12022_dt_match[] = {
362 	{ .compatible = "isl,isl12022" }, /* for backward compat., don't use */
363 	{ .compatible = "isil,isl12022" },
364 	{ },
365 };
366 MODULE_DEVICE_TABLE(of, isl12022_dt_match);
367 
368 static const struct i2c_device_id isl12022_id[] = {
369 	{ "isl12022", 0 },
370 	{ }
371 };
372 MODULE_DEVICE_TABLE(i2c, isl12022_id);
373 
374 static struct i2c_driver isl12022_driver = {
375 	.driver		= {
376 		.name	= "rtc-isl12022",
377 		.of_match_table = isl12022_dt_match,
378 	},
379 	.probe		= isl12022_probe,
380 	.id_table	= isl12022_id,
381 };
382 
383 module_i2c_driver(isl12022_driver);
384 
385 MODULE_AUTHOR("roman.fietze@telemotive.de");
386 MODULE_DESCRIPTION("ISL 12022 RTC driver");
387 MODULE_LICENSE("GPL");
388