1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Freescale FlexTimer Module (FTM) alarm device driver.
4  *
5  * Copyright 2014 Freescale Semiconductor, Inc.
6  * Copyright 2019-2020 NXP
7  *
8  */
9 
10 #include <linux/device.h>
11 #include <linux/err.h>
12 #include <linux/interrupt.h>
13 #include <linux/io.h>
14 #include <linux/platform_device.h>
15 #include <linux/mod_devicetable.h>
16 #include <linux/module.h>
17 #include <linux/fsl/ftm.h>
18 #include <linux/rtc.h>
19 #include <linux/time.h>
20 #include <linux/acpi.h>
21 #include <linux/pm_wakeirq.h>
22 
23 #define FTM_SC_CLK(c)		((c) << FTM_SC_CLK_MASK_SHIFT)
24 
25 /*
26  * Select Fixed frequency clock (32KHz) as clock source
27  * of FlexTimer Module
28  */
29 #define FTM_SC_CLKS_FIXED_FREQ	0x02
30 #define FIXED_FREQ_CLK		32000
31 
32 /* Select 128 (2^7) as divider factor */
33 #define MAX_FREQ_DIV		(1 << FTM_SC_PS_MASK)
34 
35 /* Maximum counter value in FlexTimer's CNT registers */
36 #define MAX_COUNT_VAL		0xffff
37 
38 struct ftm_rtc {
39 	struct rtc_device *rtc_dev;
40 	void __iomem *base;
41 	bool big_endian;
42 	u32 alarm_freq;
43 };
44 
45 static inline u32 rtc_readl(struct ftm_rtc *dev, u32 reg)
46 {
47 	if (dev->big_endian)
48 		return ioread32be(dev->base + reg);
49 	else
50 		return ioread32(dev->base + reg);
51 }
52 
53 static inline void rtc_writel(struct ftm_rtc *dev, u32 reg, u32 val)
54 {
55 	if (dev->big_endian)
56 		iowrite32be(val, dev->base + reg);
57 	else
58 		iowrite32(val, dev->base + reg);
59 }
60 
61 static inline void ftm_counter_enable(struct ftm_rtc *rtc)
62 {
63 	u32 val;
64 
65 	/* select and enable counter clock source */
66 	val = rtc_readl(rtc, FTM_SC);
67 	val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
68 	val |= (FTM_SC_PS_MASK | FTM_SC_CLK(FTM_SC_CLKS_FIXED_FREQ));
69 	rtc_writel(rtc, FTM_SC, val);
70 }
71 
72 static inline void ftm_counter_disable(struct ftm_rtc *rtc)
73 {
74 	u32 val;
75 
76 	/* disable counter clock source */
77 	val = rtc_readl(rtc, FTM_SC);
78 	val &= ~(FTM_SC_PS_MASK | FTM_SC_CLK_MASK);
79 	rtc_writel(rtc, FTM_SC, val);
80 }
81 
82 static inline void ftm_irq_acknowledge(struct ftm_rtc *rtc)
83 {
84 	unsigned int timeout = 100;
85 
86 	/*
87 	 *Fix errata A-007728 for flextimer
88 	 *	If the FTM counter reaches the FTM_MOD value between
89 	 *	the reading of the TOF bit and the writing of 0 to
90 	 *	the TOF bit, the process of clearing the TOF bit
91 	 *	does not work as expected when FTMx_CONF[NUMTOF] != 0
92 	 *	and the current TOF count is less than FTMx_CONF[NUMTOF].
93 	 *	If the above condition is met, the TOF bit remains set.
94 	 *	If the TOF interrupt is enabled (FTMx_SC[TOIE] = 1),the
95 	 *	TOF interrupt also remains asserted.
96 	 *
97 	 *	Above is the errata discription
98 	 *
99 	 *	In one word: software clearing TOF bit not works when
100 	 *	FTMx_CONF[NUMTOF] was seted as nonzero and FTM counter
101 	 *	reaches the FTM_MOD value.
102 	 *
103 	 *	The workaround is clearing TOF bit until it works
104 	 *	(FTM counter doesn't always reache the FTM_MOD anyway),
105 	 *	which may cost some cycles.
106 	 */
107 	while ((FTM_SC_TOF & rtc_readl(rtc, FTM_SC)) && timeout--)
108 		rtc_writel(rtc, FTM_SC, rtc_readl(rtc, FTM_SC) & (~FTM_SC_TOF));
109 }
110 
111 static inline void ftm_irq_enable(struct ftm_rtc *rtc)
112 {
113 	u32 val;
114 
115 	val = rtc_readl(rtc, FTM_SC);
116 	val |= FTM_SC_TOIE;
117 	rtc_writel(rtc, FTM_SC, val);
118 }
119 
120 static inline void ftm_irq_disable(struct ftm_rtc *rtc)
121 {
122 	u32 val;
123 
124 	val = rtc_readl(rtc, FTM_SC);
125 	val &= ~FTM_SC_TOIE;
126 	rtc_writel(rtc, FTM_SC, val);
127 }
128 
129 static inline void ftm_reset_counter(struct ftm_rtc *rtc)
130 {
131 	/*
132 	 * The CNT register contains the FTM counter value.
133 	 * Reset clears the CNT register. Writing any value to COUNT
134 	 * updates the counter with its initial value, CNTIN.
135 	 */
136 	rtc_writel(rtc, FTM_CNT, 0x00);
137 }
138 
139 static void ftm_clean_alarm(struct ftm_rtc *rtc)
140 {
141 	ftm_counter_disable(rtc);
142 
143 	rtc_writel(rtc, FTM_CNTIN, 0x00);
144 	rtc_writel(rtc, FTM_MOD, ~0U);
145 
146 	ftm_reset_counter(rtc);
147 }
148 
149 static irqreturn_t ftm_rtc_alarm_interrupt(int irq, void *dev)
150 {
151 	struct ftm_rtc *rtc = dev;
152 
153 	rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);
154 
155 	ftm_irq_acknowledge(rtc);
156 	ftm_irq_disable(rtc);
157 	ftm_clean_alarm(rtc);
158 
159 	return IRQ_HANDLED;
160 }
161 
162 static int ftm_rtc_alarm_irq_enable(struct device *dev,
163 		unsigned int enabled)
164 {
165 	struct ftm_rtc *rtc = dev_get_drvdata(dev);
166 
167 	if (enabled)
168 		ftm_irq_enable(rtc);
169 	else
170 		ftm_irq_disable(rtc);
171 
172 	return 0;
173 }
174 
175 /*
176  * Note:
177  *	The function is not really getting time from the RTC
178  *	since FlexTimer is not a RTC device, but we need to
179  *	get time to setup alarm, so we are using system time
180  *	for now.
181  */
182 static int ftm_rtc_read_time(struct device *dev, struct rtc_time *tm)
183 {
184 	rtc_time64_to_tm(ktime_get_real_seconds(), tm);
185 
186 	return 0;
187 }
188 
189 static int ftm_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
190 {
191 	return 0;
192 }
193 
194 /*
195  * 1. Select fixed frequency clock (32KHz) as clock source;
196  * 2. Select 128 (2^7) as divider factor;
197  * So clock is 250 Hz (32KHz/128).
198  *
199  * 3. FlexTimer's CNT register is a 32bit register,
200  * but the register's 16 bit as counter value,it's other 16 bit
201  * is reserved.So minimum counter value is 0x0,maximum counter
202  * value is 0xffff.
203  * So max alarm value is 262 (65536 / 250) seconds
204  */
205 static int ftm_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
206 {
207 	time64_t alm_time;
208 	unsigned long long cycle;
209 	struct ftm_rtc *rtc = dev_get_drvdata(dev);
210 
211 	alm_time = rtc_tm_to_time64(&alm->time);
212 
213 	ftm_clean_alarm(rtc);
214 	cycle = (alm_time - ktime_get_real_seconds()) * rtc->alarm_freq;
215 	if (cycle > MAX_COUNT_VAL) {
216 		pr_err("Out of alarm range {0~262} seconds.\n");
217 		return -ERANGE;
218 	}
219 
220 	ftm_irq_disable(rtc);
221 
222 	/*
223 	 * The counter increments until the value of MOD is reached,
224 	 * at which point the counter is reloaded with the value of CNTIN.
225 	 * The TOF (the overflow flag) bit is set when the FTM counter
226 	 * changes from MOD to CNTIN. So we should using the cycle - 1.
227 	 */
228 	rtc_writel(rtc, FTM_MOD, cycle - 1);
229 
230 	ftm_counter_enable(rtc);
231 	ftm_irq_enable(rtc);
232 
233 	return 0;
234 
235 }
236 
237 static const struct rtc_class_ops ftm_rtc_ops = {
238 	.read_time		= ftm_rtc_read_time,
239 	.read_alarm		= ftm_rtc_read_alarm,
240 	.set_alarm		= ftm_rtc_set_alarm,
241 	.alarm_irq_enable	= ftm_rtc_alarm_irq_enable,
242 };
243 
244 static int ftm_rtc_probe(struct platform_device *pdev)
245 {
246 	int irq;
247 	int ret;
248 	struct ftm_rtc *rtc;
249 
250 	rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
251 	if (unlikely(!rtc)) {
252 		dev_err(&pdev->dev, "cannot alloc memory for rtc\n");
253 		return -ENOMEM;
254 	}
255 
256 	platform_set_drvdata(pdev, rtc);
257 
258 	rtc->rtc_dev = devm_rtc_allocate_device(&pdev->dev);
259 	if (IS_ERR(rtc->rtc_dev))
260 		return PTR_ERR(rtc->rtc_dev);
261 
262 	rtc->base = devm_platform_ioremap_resource(pdev, 0);
263 	if (IS_ERR(rtc->base)) {
264 		dev_err(&pdev->dev, "cannot ioremap resource for rtc\n");
265 		return PTR_ERR(rtc->base);
266 	}
267 
268 	irq = platform_get_irq(pdev, 0);
269 	if (irq < 0)
270 		return irq;
271 
272 	ret = devm_request_irq(&pdev->dev, irq, ftm_rtc_alarm_interrupt,
273 			       0, dev_name(&pdev->dev), rtc);
274 	if (ret < 0) {
275 		dev_err(&pdev->dev, "failed to request irq\n");
276 		return ret;
277 	}
278 
279 	rtc->big_endian =
280 		device_property_read_bool(&pdev->dev, "big-endian");
281 
282 	rtc->alarm_freq = (u32)FIXED_FREQ_CLK / (u32)MAX_FREQ_DIV;
283 	rtc->rtc_dev->ops = &ftm_rtc_ops;
284 
285 	device_init_wakeup(&pdev->dev, true);
286 	ret = dev_pm_set_wake_irq(&pdev->dev, irq);
287 	if (ret)
288 		dev_err(&pdev->dev, "failed to enable irq wake\n");
289 
290 	ret = devm_rtc_register_device(rtc->rtc_dev);
291 	if (ret) {
292 		dev_err(&pdev->dev, "can't register rtc device\n");
293 		return ret;
294 	}
295 
296 	return 0;
297 }
298 
299 static const struct of_device_id ftm_rtc_match[] = {
300 	{ .compatible = "fsl,ls1012a-ftm-alarm", },
301 	{ .compatible = "fsl,ls1021a-ftm-alarm", },
302 	{ .compatible = "fsl,ls1028a-ftm-alarm", },
303 	{ .compatible = "fsl,ls1043a-ftm-alarm", },
304 	{ .compatible = "fsl,ls1046a-ftm-alarm", },
305 	{ .compatible = "fsl,ls1088a-ftm-alarm", },
306 	{ .compatible = "fsl,ls208xa-ftm-alarm", },
307 	{ .compatible = "fsl,lx2160a-ftm-alarm", },
308 	{ },
309 };
310 MODULE_DEVICE_TABLE(of, ftm_rtc_match);
311 
312 static const struct acpi_device_id ftm_imx_acpi_ids[] = {
313 	{"NXP0014",},
314 	{ }
315 };
316 MODULE_DEVICE_TABLE(acpi, ftm_imx_acpi_ids);
317 
318 static struct platform_driver ftm_rtc_driver = {
319 	.probe		= ftm_rtc_probe,
320 	.driver		= {
321 		.name	= "ftm-alarm",
322 		.of_match_table = ftm_rtc_match,
323 		.acpi_match_table = ACPI_PTR(ftm_imx_acpi_ids),
324 	},
325 };
326 
327 module_platform_driver(ftm_rtc_driver);
328 
329 MODULE_DESCRIPTION("NXP/Freescale FlexTimer alarm driver");
330 MODULE_AUTHOR("Biwen Li <biwen.li@nxp.com>");
331 MODULE_LICENSE("GPL");
332