1 /* 2 * RTC client/driver for the Maxim/Dallas DS3232/DS3234 Real-Time Clock 3 * 4 * Copyright (C) 2009-2011 Freescale Semiconductor. 5 * Author: Jack Lan <jack.lan@freescale.com> 6 * Copyright (C) 2008 MIMOMax Wireless Ltd. 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 */ 13 14 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 15 16 #include <linux/kernel.h> 17 #include <linux/module.h> 18 #include <linux/interrupt.h> 19 #include <linux/i2c.h> 20 #include <linux/spi/spi.h> 21 #include <linux/rtc.h> 22 #include <linux/bcd.h> 23 #include <linux/slab.h> 24 #include <linux/regmap.h> 25 #include <linux/hwmon.h> 26 27 #define DS3232_REG_SECONDS 0x00 28 #define DS3232_REG_MINUTES 0x01 29 #define DS3232_REG_HOURS 0x02 30 #define DS3232_REG_AMPM 0x02 31 #define DS3232_REG_DAY 0x03 32 #define DS3232_REG_DATE 0x04 33 #define DS3232_REG_MONTH 0x05 34 #define DS3232_REG_CENTURY 0x05 35 #define DS3232_REG_YEAR 0x06 36 #define DS3232_REG_ALARM1 0x07 /* Alarm 1 BASE */ 37 #define DS3232_REG_ALARM2 0x0B /* Alarm 2 BASE */ 38 #define DS3232_REG_CR 0x0E /* Control register */ 39 # define DS3232_REG_CR_nEOSC 0x80 40 # define DS3232_REG_CR_INTCN 0x04 41 # define DS3232_REG_CR_A2IE 0x02 42 # define DS3232_REG_CR_A1IE 0x01 43 44 #define DS3232_REG_SR 0x0F /* control/status register */ 45 # define DS3232_REG_SR_OSF 0x80 46 # define DS3232_REG_SR_BSY 0x04 47 # define DS3232_REG_SR_A2F 0x02 48 # define DS3232_REG_SR_A1F 0x01 49 50 #define DS3232_REG_TEMPERATURE 0x11 51 #define DS3232_REG_SRAM_START 0x14 52 #define DS3232_REG_SRAM_END 0xFF 53 54 #define DS3232_REG_SRAM_SIZE 236 55 56 struct ds3232 { 57 struct device *dev; 58 struct regmap *regmap; 59 int irq; 60 struct rtc_device *rtc; 61 62 bool suspended; 63 }; 64 65 static int ds3232_check_rtc_status(struct device *dev) 66 { 67 struct ds3232 *ds3232 = dev_get_drvdata(dev); 68 int ret = 0; 69 int control, stat; 70 71 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); 72 if (ret) 73 return ret; 74 75 if (stat & DS3232_REG_SR_OSF) 76 dev_warn(dev, 77 "oscillator discontinuity flagged, " 78 "time unreliable\n"); 79 80 stat &= ~(DS3232_REG_SR_OSF | DS3232_REG_SR_A1F | DS3232_REG_SR_A2F); 81 82 ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat); 83 if (ret) 84 return ret; 85 86 /* If the alarm is pending, clear it before requesting 87 * the interrupt, so an interrupt event isn't reported 88 * before everything is initialized. 89 */ 90 91 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); 92 if (ret) 93 return ret; 94 95 control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE); 96 control |= DS3232_REG_CR_INTCN; 97 98 return regmap_write(ds3232->regmap, DS3232_REG_CR, control); 99 } 100 101 static int ds3232_read_time(struct device *dev, struct rtc_time *time) 102 { 103 struct ds3232 *ds3232 = dev_get_drvdata(dev); 104 int ret; 105 u8 buf[7]; 106 unsigned int year, month, day, hour, minute, second; 107 unsigned int week, twelve_hr, am_pm; 108 unsigned int century, add_century = 0; 109 110 ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_SECONDS, buf, 7); 111 if (ret) 112 return ret; 113 114 second = buf[0]; 115 minute = buf[1]; 116 hour = buf[2]; 117 week = buf[3]; 118 day = buf[4]; 119 month = buf[5]; 120 year = buf[6]; 121 122 /* Extract additional information for AM/PM and century */ 123 124 twelve_hr = hour & 0x40; 125 am_pm = hour & 0x20; 126 century = month & 0x80; 127 128 /* Write to rtc_time structure */ 129 130 time->tm_sec = bcd2bin(second); 131 time->tm_min = bcd2bin(minute); 132 if (twelve_hr) { 133 /* Convert to 24 hr */ 134 if (am_pm) 135 time->tm_hour = bcd2bin(hour & 0x1F) + 12; 136 else 137 time->tm_hour = bcd2bin(hour & 0x1F); 138 } else { 139 time->tm_hour = bcd2bin(hour); 140 } 141 142 /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */ 143 time->tm_wday = bcd2bin(week) - 1; 144 time->tm_mday = bcd2bin(day); 145 /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */ 146 time->tm_mon = bcd2bin(month & 0x7F) - 1; 147 if (century) 148 add_century = 100; 149 150 time->tm_year = bcd2bin(year) + add_century; 151 152 return 0; 153 } 154 155 static int ds3232_set_time(struct device *dev, struct rtc_time *time) 156 { 157 struct ds3232 *ds3232 = dev_get_drvdata(dev); 158 u8 buf[7]; 159 160 /* Extract time from rtc_time and load into ds3232*/ 161 162 buf[0] = bin2bcd(time->tm_sec); 163 buf[1] = bin2bcd(time->tm_min); 164 buf[2] = bin2bcd(time->tm_hour); 165 /* Day of the week in linux range is 0~6 while 1~7 in RTC chip */ 166 buf[3] = bin2bcd(time->tm_wday + 1); 167 buf[4] = bin2bcd(time->tm_mday); /* Date */ 168 /* linux tm_mon range:0~11, while month range is 1~12 in RTC chip */ 169 buf[5] = bin2bcd(time->tm_mon + 1); 170 if (time->tm_year >= 100) { 171 buf[5] |= 0x80; 172 buf[6] = bin2bcd(time->tm_year - 100); 173 } else { 174 buf[6] = bin2bcd(time->tm_year); 175 } 176 177 return regmap_bulk_write(ds3232->regmap, DS3232_REG_SECONDS, buf, 7); 178 } 179 180 /* 181 * DS3232 has two alarm, we only use alarm1 182 * According to linux specification, only support one-shot alarm 183 * no periodic alarm mode 184 */ 185 static int ds3232_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) 186 { 187 struct ds3232 *ds3232 = dev_get_drvdata(dev); 188 int control, stat; 189 int ret; 190 u8 buf[4]; 191 192 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); 193 if (ret) 194 goto out; 195 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); 196 if (ret) 197 goto out; 198 ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_ALARM1, buf, 4); 199 if (ret) 200 goto out; 201 202 alarm->time.tm_sec = bcd2bin(buf[0] & 0x7F); 203 alarm->time.tm_min = bcd2bin(buf[1] & 0x7F); 204 alarm->time.tm_hour = bcd2bin(buf[2] & 0x7F); 205 alarm->time.tm_mday = bcd2bin(buf[3] & 0x7F); 206 207 alarm->enabled = !!(control & DS3232_REG_CR_A1IE); 208 alarm->pending = !!(stat & DS3232_REG_SR_A1F); 209 210 ret = 0; 211 out: 212 return ret; 213 } 214 215 /* 216 * linux rtc-module does not support wday alarm 217 * and only 24h time mode supported indeed 218 */ 219 static int ds3232_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) 220 { 221 struct ds3232 *ds3232 = dev_get_drvdata(dev); 222 int control, stat; 223 int ret; 224 u8 buf[4]; 225 226 if (ds3232->irq <= 0) 227 return -EINVAL; 228 229 buf[0] = bin2bcd(alarm->time.tm_sec); 230 buf[1] = bin2bcd(alarm->time.tm_min); 231 buf[2] = bin2bcd(alarm->time.tm_hour); 232 buf[3] = bin2bcd(alarm->time.tm_mday); 233 234 /* clear alarm interrupt enable bit */ 235 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); 236 if (ret) 237 goto out; 238 control &= ~(DS3232_REG_CR_A1IE | DS3232_REG_CR_A2IE); 239 ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control); 240 if (ret) 241 goto out; 242 243 /* clear any pending alarm flag */ 244 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); 245 if (ret) 246 goto out; 247 stat &= ~(DS3232_REG_SR_A1F | DS3232_REG_SR_A2F); 248 ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat); 249 if (ret) 250 goto out; 251 252 ret = regmap_bulk_write(ds3232->regmap, DS3232_REG_ALARM1, buf, 4); 253 if (ret) 254 goto out; 255 256 if (alarm->enabled) { 257 control |= DS3232_REG_CR_A1IE; 258 ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control); 259 } 260 out: 261 return ret; 262 } 263 264 static int ds3232_update_alarm(struct device *dev, unsigned int enabled) 265 { 266 struct ds3232 *ds3232 = dev_get_drvdata(dev); 267 int control; 268 int ret; 269 270 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); 271 if (ret) 272 return ret; 273 274 if (enabled) 275 /* enable alarm1 interrupt */ 276 control |= DS3232_REG_CR_A1IE; 277 else 278 /* disable alarm1 interrupt */ 279 control &= ~(DS3232_REG_CR_A1IE); 280 ret = regmap_write(ds3232->regmap, DS3232_REG_CR, control); 281 282 return ret; 283 } 284 285 /* 286 * Temperature sensor support for ds3232/ds3234 devices. 287 * A user-initiated temperature conversion is not started by this function, 288 * so the temperature is updated once every 64 seconds. 289 */ 290 static int ds3232_hwmon_read_temp(struct device *dev, long int *mC) 291 { 292 struct ds3232 *ds3232 = dev_get_drvdata(dev); 293 u8 temp_buf[2]; 294 s16 temp; 295 int ret; 296 297 ret = regmap_bulk_read(ds3232->regmap, DS3232_REG_TEMPERATURE, temp_buf, 298 sizeof(temp_buf)); 299 if (ret < 0) 300 return ret; 301 302 /* 303 * Temperature is represented as a 10-bit code with a resolution of 304 * 0.25 degree celsius and encoded in two's complement format. 305 */ 306 temp = (temp_buf[0] << 8) | temp_buf[1]; 307 temp >>= 6; 308 *mC = temp * 250; 309 310 return 0; 311 } 312 313 static umode_t ds3232_hwmon_is_visible(const void *data, 314 enum hwmon_sensor_types type, 315 u32 attr, int channel) 316 { 317 if (type != hwmon_temp) 318 return 0; 319 320 switch (attr) { 321 case hwmon_temp_input: 322 return 0444; 323 default: 324 return 0; 325 } 326 } 327 328 static int ds3232_hwmon_read(struct device *dev, 329 enum hwmon_sensor_types type, 330 u32 attr, int channel, long *temp) 331 { 332 int err; 333 334 switch (attr) { 335 case hwmon_temp_input: 336 err = ds3232_hwmon_read_temp(dev, temp); 337 break; 338 default: 339 err = -EOPNOTSUPP; 340 break; 341 } 342 343 return err; 344 } 345 346 static u32 ds3232_hwmon_chip_config[] = { 347 HWMON_C_REGISTER_TZ, 348 0 349 }; 350 351 static const struct hwmon_channel_info ds3232_hwmon_chip = { 352 .type = hwmon_chip, 353 .config = ds3232_hwmon_chip_config, 354 }; 355 356 static u32 ds3232_hwmon_temp_config[] = { 357 HWMON_T_INPUT, 358 0 359 }; 360 361 static const struct hwmon_channel_info ds3232_hwmon_temp = { 362 .type = hwmon_temp, 363 .config = ds3232_hwmon_temp_config, 364 }; 365 366 static const struct hwmon_channel_info *ds3232_hwmon_info[] = { 367 &ds3232_hwmon_chip, 368 &ds3232_hwmon_temp, 369 NULL 370 }; 371 372 static const struct hwmon_ops ds3232_hwmon_hwmon_ops = { 373 .is_visible = ds3232_hwmon_is_visible, 374 .read = ds3232_hwmon_read, 375 }; 376 377 static const struct hwmon_chip_info ds3232_hwmon_chip_info = { 378 .ops = &ds3232_hwmon_hwmon_ops, 379 .info = ds3232_hwmon_info, 380 }; 381 382 static void ds3232_hwmon_register(struct device *dev, const char *name) 383 { 384 struct ds3232 *ds3232 = dev_get_drvdata(dev); 385 struct device *hwmon_dev; 386 387 if (!IS_ENABLED(CONFIG_RTC_DRV_DS3232_HWMON)) 388 return; 389 390 hwmon_dev = devm_hwmon_device_register_with_info(dev, name, ds3232, 391 &ds3232_hwmon_chip_info, 392 NULL); 393 if (IS_ERR(hwmon_dev)) { 394 dev_err(dev, "unable to register hwmon device %ld\n", 395 PTR_ERR(hwmon_dev)); 396 } 397 } 398 399 static int ds3232_alarm_irq_enable(struct device *dev, unsigned int enabled) 400 { 401 struct ds3232 *ds3232 = dev_get_drvdata(dev); 402 403 if (ds3232->irq <= 0) 404 return -EINVAL; 405 406 return ds3232_update_alarm(dev, enabled); 407 } 408 409 static irqreturn_t ds3232_irq(int irq, void *dev_id) 410 { 411 struct device *dev = dev_id; 412 struct ds3232 *ds3232 = dev_get_drvdata(dev); 413 struct mutex *lock = &ds3232->rtc->ops_lock; 414 int ret; 415 int stat, control; 416 417 mutex_lock(lock); 418 419 ret = regmap_read(ds3232->regmap, DS3232_REG_SR, &stat); 420 if (ret) 421 goto unlock; 422 423 if (stat & DS3232_REG_SR_A1F) { 424 ret = regmap_read(ds3232->regmap, DS3232_REG_CR, &control); 425 if (ret) { 426 dev_warn(ds3232->dev, 427 "Read Control Register error %d\n", ret); 428 } else { 429 /* disable alarm1 interrupt */ 430 control &= ~(DS3232_REG_CR_A1IE); 431 ret = regmap_write(ds3232->regmap, DS3232_REG_CR, 432 control); 433 if (ret) { 434 dev_warn(ds3232->dev, 435 "Write Control Register error %d\n", 436 ret); 437 goto unlock; 438 } 439 440 /* clear the alarm pend flag */ 441 stat &= ~DS3232_REG_SR_A1F; 442 ret = regmap_write(ds3232->regmap, DS3232_REG_SR, stat); 443 if (ret) { 444 dev_warn(ds3232->dev, 445 "Write Status Register error %d\n", 446 ret); 447 goto unlock; 448 } 449 450 rtc_update_irq(ds3232->rtc, 1, RTC_AF | RTC_IRQF); 451 } 452 } 453 454 unlock: 455 mutex_unlock(lock); 456 457 return IRQ_HANDLED; 458 } 459 460 static const struct rtc_class_ops ds3232_rtc_ops = { 461 .read_time = ds3232_read_time, 462 .set_time = ds3232_set_time, 463 .read_alarm = ds3232_read_alarm, 464 .set_alarm = ds3232_set_alarm, 465 .alarm_irq_enable = ds3232_alarm_irq_enable, 466 }; 467 468 static int ds3232_nvmem_read(void *priv, unsigned int offset, void *val, 469 size_t bytes) 470 { 471 struct regmap *ds3232_regmap = (struct regmap *)priv; 472 473 return regmap_bulk_read(ds3232_regmap, DS3232_REG_SRAM_START + offset, 474 val, bytes); 475 } 476 477 static int ds3232_nvmem_write(void *priv, unsigned int offset, void *val, 478 size_t bytes) 479 { 480 struct regmap *ds3232_regmap = (struct regmap *)priv; 481 482 return regmap_bulk_write(ds3232_regmap, DS3232_REG_SRAM_START + offset, 483 val, bytes); 484 } 485 486 static int ds3232_probe(struct device *dev, struct regmap *regmap, int irq, 487 const char *name) 488 { 489 struct ds3232 *ds3232; 490 int ret; 491 struct nvmem_config nvmem_cfg = { 492 .name = "ds3232_sram", 493 .stride = 1, 494 .size = DS3232_REG_SRAM_SIZE, 495 .word_size = 1, 496 .reg_read = ds3232_nvmem_read, 497 .reg_write = ds3232_nvmem_write, 498 .priv = regmap, 499 .type = NVMEM_TYPE_BATTERY_BACKED 500 }; 501 502 ds3232 = devm_kzalloc(dev, sizeof(*ds3232), GFP_KERNEL); 503 if (!ds3232) 504 return -ENOMEM; 505 506 ds3232->regmap = regmap; 507 ds3232->irq = irq; 508 ds3232->dev = dev; 509 dev_set_drvdata(dev, ds3232); 510 511 ret = ds3232_check_rtc_status(dev); 512 if (ret) 513 return ret; 514 515 if (ds3232->irq > 0) 516 device_init_wakeup(dev, 1); 517 518 ds3232_hwmon_register(dev, name); 519 520 ds3232->rtc = devm_rtc_device_register(dev, name, &ds3232_rtc_ops, 521 THIS_MODULE); 522 if (IS_ERR(ds3232->rtc)) 523 return PTR_ERR(ds3232->rtc); 524 525 ret = rtc_nvmem_register(ds3232->rtc, &nvmem_cfg); 526 if(ret) 527 return ret; 528 529 if (ds3232->irq > 0) { 530 ret = devm_request_threaded_irq(dev, ds3232->irq, NULL, 531 ds3232_irq, 532 IRQF_SHARED | IRQF_ONESHOT, 533 name, dev); 534 if (ret) { 535 device_set_wakeup_capable(dev, 0); 536 ds3232->irq = 0; 537 dev_err(dev, "unable to request IRQ\n"); 538 } 539 } 540 541 return 0; 542 } 543 544 #ifdef CONFIG_PM_SLEEP 545 static int ds3232_suspend(struct device *dev) 546 { 547 struct ds3232 *ds3232 = dev_get_drvdata(dev); 548 549 if (device_may_wakeup(dev)) { 550 if (enable_irq_wake(ds3232->irq)) 551 dev_warn_once(dev, "Cannot set wakeup source\n"); 552 } 553 554 return 0; 555 } 556 557 static int ds3232_resume(struct device *dev) 558 { 559 struct ds3232 *ds3232 = dev_get_drvdata(dev); 560 561 if (device_may_wakeup(dev)) 562 disable_irq_wake(ds3232->irq); 563 564 return 0; 565 } 566 #endif 567 568 static const struct dev_pm_ops ds3232_pm_ops = { 569 SET_SYSTEM_SLEEP_PM_OPS(ds3232_suspend, ds3232_resume) 570 }; 571 572 #if IS_ENABLED(CONFIG_I2C) 573 574 static int ds3232_i2c_probe(struct i2c_client *client, 575 const struct i2c_device_id *id) 576 { 577 struct regmap *regmap; 578 static const struct regmap_config config = { 579 .reg_bits = 8, 580 .val_bits = 8, 581 .max_register = DS3232_REG_SRAM_END, 582 }; 583 584 regmap = devm_regmap_init_i2c(client, &config); 585 if (IS_ERR(regmap)) { 586 dev_err(&client->dev, "%s: regmap allocation failed: %ld\n", 587 __func__, PTR_ERR(regmap)); 588 return PTR_ERR(regmap); 589 } 590 591 return ds3232_probe(&client->dev, regmap, client->irq, client->name); 592 } 593 594 static const struct i2c_device_id ds3232_id[] = { 595 { "ds3232", 0 }, 596 { } 597 }; 598 MODULE_DEVICE_TABLE(i2c, ds3232_id); 599 600 static const struct of_device_id ds3232_of_match[] = { 601 { .compatible = "dallas,ds3232" }, 602 { } 603 }; 604 MODULE_DEVICE_TABLE(of, ds3232_of_match); 605 606 static struct i2c_driver ds3232_driver = { 607 .driver = { 608 .name = "rtc-ds3232", 609 .of_match_table = of_match_ptr(ds3232_of_match), 610 .pm = &ds3232_pm_ops, 611 }, 612 .probe = ds3232_i2c_probe, 613 .id_table = ds3232_id, 614 }; 615 616 static int ds3232_register_driver(void) 617 { 618 return i2c_add_driver(&ds3232_driver); 619 } 620 621 static void ds3232_unregister_driver(void) 622 { 623 i2c_del_driver(&ds3232_driver); 624 } 625 626 #else 627 628 static int ds3232_register_driver(void) 629 { 630 return 0; 631 } 632 633 static void ds3232_unregister_driver(void) 634 { 635 } 636 637 #endif 638 639 #if IS_ENABLED(CONFIG_SPI_MASTER) 640 641 static int ds3234_probe(struct spi_device *spi) 642 { 643 int res; 644 unsigned int tmp; 645 static const struct regmap_config config = { 646 .reg_bits = 8, 647 .val_bits = 8, 648 .max_register = DS3232_REG_SRAM_END, 649 .write_flag_mask = 0x80, 650 }; 651 struct regmap *regmap; 652 653 regmap = devm_regmap_init_spi(spi, &config); 654 if (IS_ERR(regmap)) { 655 dev_err(&spi->dev, "%s: regmap allocation failed: %ld\n", 656 __func__, PTR_ERR(regmap)); 657 return PTR_ERR(regmap); 658 } 659 660 spi->mode = SPI_MODE_3; 661 spi->bits_per_word = 8; 662 spi_setup(spi); 663 664 res = regmap_read(regmap, DS3232_REG_SECONDS, &tmp); 665 if (res) 666 return res; 667 668 /* Control settings 669 * 670 * CONTROL_REG 671 * BIT 7 6 5 4 3 2 1 0 672 * EOSC BBSQW CONV RS2 RS1 INTCN A2IE A1IE 673 * 674 * 0 0 0 1 1 1 0 0 675 * 676 * CONTROL_STAT_REG 677 * BIT 7 6 5 4 3 2 1 0 678 * OSF BB32kHz CRATE1 CRATE0 EN32kHz BSY A2F A1F 679 * 680 * 1 0 0 0 1 0 0 0 681 */ 682 res = regmap_read(regmap, DS3232_REG_CR, &tmp); 683 if (res) 684 return res; 685 res = regmap_write(regmap, DS3232_REG_CR, tmp & 0x1c); 686 if (res) 687 return res; 688 689 res = regmap_read(regmap, DS3232_REG_SR, &tmp); 690 if (res) 691 return res; 692 res = regmap_write(regmap, DS3232_REG_SR, tmp & 0x88); 693 if (res) 694 return res; 695 696 /* Print our settings */ 697 res = regmap_read(regmap, DS3232_REG_CR, &tmp); 698 if (res) 699 return res; 700 dev_info(&spi->dev, "Control Reg: 0x%02x\n", tmp); 701 702 res = regmap_read(regmap, DS3232_REG_SR, &tmp); 703 if (res) 704 return res; 705 dev_info(&spi->dev, "Ctrl/Stat Reg: 0x%02x\n", tmp); 706 707 return ds3232_probe(&spi->dev, regmap, spi->irq, "ds3234"); 708 } 709 710 static struct spi_driver ds3234_driver = { 711 .driver = { 712 .name = "ds3234", 713 }, 714 .probe = ds3234_probe, 715 }; 716 717 static int ds3234_register_driver(void) 718 { 719 return spi_register_driver(&ds3234_driver); 720 } 721 722 static void ds3234_unregister_driver(void) 723 { 724 spi_unregister_driver(&ds3234_driver); 725 } 726 727 #else 728 729 static int ds3234_register_driver(void) 730 { 731 return 0; 732 } 733 734 static void ds3234_unregister_driver(void) 735 { 736 } 737 738 #endif 739 740 static int __init ds323x_init(void) 741 { 742 int ret; 743 744 ret = ds3232_register_driver(); 745 if (ret) { 746 pr_err("Failed to register ds3232 driver: %d\n", ret); 747 return ret; 748 } 749 750 ret = ds3234_register_driver(); 751 if (ret) { 752 pr_err("Failed to register ds3234 driver: %d\n", ret); 753 ds3232_unregister_driver(); 754 } 755 756 return ret; 757 } 758 module_init(ds323x_init) 759 760 static void __exit ds323x_exit(void) 761 { 762 ds3234_unregister_driver(); 763 ds3232_unregister_driver(); 764 } 765 module_exit(ds323x_exit) 766 767 MODULE_AUTHOR("Srikanth Srinivasan <srikanth.srinivasan@freescale.com>"); 768 MODULE_AUTHOR("Dennis Aberilla <denzzzhome@yahoo.com>"); 769 MODULE_DESCRIPTION("Maxim/Dallas DS3232/DS3234 RTC Driver"); 770 MODULE_LICENSE("GPL"); 771 MODULE_ALIAS("spi:ds3234"); 772