1 /* 2 * An rtc driver for the Dallas DS1511 3 * 4 * Copyright (C) 2006 Atsushi Nemoto <anemo@mba.ocn.ne.jp> 5 * Copyright (C) 2007 Andrew Sharp <andy.sharp@lsi.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * Real time clock driver for the Dallas 1511 chip, which also 12 * contains a watchdog timer. There is a tiny amount of code that 13 * platform code could use to mess with the watchdog device a little 14 * bit, but not a full watchdog driver. 15 */ 16 17 #include <linux/bcd.h> 18 #include <linux/init.h> 19 #include <linux/kernel.h> 20 #include <linux/gfp.h> 21 #include <linux/delay.h> 22 #include <linux/interrupt.h> 23 #include <linux/rtc.h> 24 #include <linux/platform_device.h> 25 #include <linux/io.h> 26 #include <linux/module.h> 27 28 #define DRV_VERSION "0.6" 29 30 enum ds1511reg { 31 DS1511_SEC = 0x0, 32 DS1511_MIN = 0x1, 33 DS1511_HOUR = 0x2, 34 DS1511_DOW = 0x3, 35 DS1511_DOM = 0x4, 36 DS1511_MONTH = 0x5, 37 DS1511_YEAR = 0x6, 38 DS1511_CENTURY = 0x7, 39 DS1511_AM1_SEC = 0x8, 40 DS1511_AM2_MIN = 0x9, 41 DS1511_AM3_HOUR = 0xa, 42 DS1511_AM4_DATE = 0xb, 43 DS1511_WD_MSEC = 0xc, 44 DS1511_WD_SEC = 0xd, 45 DS1511_CONTROL_A = 0xe, 46 DS1511_CONTROL_B = 0xf, 47 DS1511_RAMADDR_LSB = 0x10, 48 DS1511_RAMDATA = 0x13 49 }; 50 51 #define DS1511_BLF1 0x80 52 #define DS1511_BLF2 0x40 53 #define DS1511_PRS 0x20 54 #define DS1511_PAB 0x10 55 #define DS1511_TDF 0x08 56 #define DS1511_KSF 0x04 57 #define DS1511_WDF 0x02 58 #define DS1511_IRQF 0x01 59 #define DS1511_TE 0x80 60 #define DS1511_CS 0x40 61 #define DS1511_BME 0x20 62 #define DS1511_TPE 0x10 63 #define DS1511_TIE 0x08 64 #define DS1511_KIE 0x04 65 #define DS1511_WDE 0x02 66 #define DS1511_WDS 0x01 67 #define DS1511_RAM_MAX 0xff 68 69 #define RTC_CMD DS1511_CONTROL_B 70 #define RTC_CMD1 DS1511_CONTROL_A 71 72 #define RTC_ALARM_SEC DS1511_AM1_SEC 73 #define RTC_ALARM_MIN DS1511_AM2_MIN 74 #define RTC_ALARM_HOUR DS1511_AM3_HOUR 75 #define RTC_ALARM_DATE DS1511_AM4_DATE 76 77 #define RTC_SEC DS1511_SEC 78 #define RTC_MIN DS1511_MIN 79 #define RTC_HOUR DS1511_HOUR 80 #define RTC_DOW DS1511_DOW 81 #define RTC_DOM DS1511_DOM 82 #define RTC_MON DS1511_MONTH 83 #define RTC_YEAR DS1511_YEAR 84 #define RTC_CENTURY DS1511_CENTURY 85 86 #define RTC_TIE DS1511_TIE 87 #define RTC_TE DS1511_TE 88 89 struct rtc_plat_data { 90 struct rtc_device *rtc; 91 void __iomem *ioaddr; /* virtual base address */ 92 int size; /* amount of memory mapped */ 93 int irq; 94 unsigned int irqen; 95 int alrm_sec; 96 int alrm_min; 97 int alrm_hour; 98 int alrm_mday; 99 spinlock_t lock; 100 }; 101 102 static DEFINE_SPINLOCK(ds1511_lock); 103 104 static __iomem char *ds1511_base; 105 static u32 reg_spacing = 1; 106 107 static noinline void 108 rtc_write(uint8_t val, uint32_t reg) 109 { 110 writeb(val, ds1511_base + (reg * reg_spacing)); 111 } 112 113 static inline void 114 rtc_write_alarm(uint8_t val, enum ds1511reg reg) 115 { 116 rtc_write((val | 0x80), reg); 117 } 118 119 static noinline uint8_t 120 rtc_read(enum ds1511reg reg) 121 { 122 return readb(ds1511_base + (reg * reg_spacing)); 123 } 124 125 static inline void 126 rtc_disable_update(void) 127 { 128 rtc_write((rtc_read(RTC_CMD) & ~RTC_TE), RTC_CMD); 129 } 130 131 static void 132 rtc_enable_update(void) 133 { 134 rtc_write((rtc_read(RTC_CMD) | RTC_TE), RTC_CMD); 135 } 136 137 /* 138 * #define DS1511_WDOG_RESET_SUPPORT 139 * 140 * Uncomment this if you want to use these routines in 141 * some platform code. 142 */ 143 #ifdef DS1511_WDOG_RESET_SUPPORT 144 /* 145 * just enough code to set the watchdog timer so that it 146 * will reboot the system 147 */ 148 void 149 ds1511_wdog_set(unsigned long deciseconds) 150 { 151 /* 152 * the wdog timer can take 99.99 seconds 153 */ 154 deciseconds %= 10000; 155 /* 156 * set the wdog values in the wdog registers 157 */ 158 rtc_write(bin2bcd(deciseconds % 100), DS1511_WD_MSEC); 159 rtc_write(bin2bcd(deciseconds / 100), DS1511_WD_SEC); 160 /* 161 * set wdog enable and wdog 'steering' bit to issue a reset 162 */ 163 rtc_write(DS1511_WDE | DS1511_WDS, RTC_CMD); 164 } 165 166 void 167 ds1511_wdog_disable(void) 168 { 169 /* 170 * clear wdog enable and wdog 'steering' bits 171 */ 172 rtc_write(rtc_read(RTC_CMD) & ~(DS1511_WDE | DS1511_WDS), RTC_CMD); 173 /* 174 * clear the wdog counter 175 */ 176 rtc_write(0, DS1511_WD_MSEC); 177 rtc_write(0, DS1511_WD_SEC); 178 } 179 #endif 180 181 /* 182 * set the rtc chip's idea of the time. 183 * stupidly, some callers call with year unmolested; 184 * and some call with year = year - 1900. thanks. 185 */ 186 static int ds1511_rtc_set_time(struct device *dev, struct rtc_time *rtc_tm) 187 { 188 u8 mon, day, dow, hrs, min, sec, yrs, cen; 189 unsigned long flags; 190 191 /* 192 * won't have to change this for a while 193 */ 194 if (rtc_tm->tm_year < 1900) { 195 rtc_tm->tm_year += 1900; 196 } 197 198 if (rtc_tm->tm_year < 1970) { 199 return -EINVAL; 200 } 201 yrs = rtc_tm->tm_year % 100; 202 cen = rtc_tm->tm_year / 100; 203 mon = rtc_tm->tm_mon + 1; /* tm_mon starts at zero */ 204 day = rtc_tm->tm_mday; 205 dow = rtc_tm->tm_wday & 0x7; /* automatic BCD */ 206 hrs = rtc_tm->tm_hour; 207 min = rtc_tm->tm_min; 208 sec = rtc_tm->tm_sec; 209 210 if ((mon > 12) || (day == 0)) { 211 return -EINVAL; 212 } 213 214 if (day > rtc_month_days(rtc_tm->tm_mon, rtc_tm->tm_year)) { 215 return -EINVAL; 216 } 217 218 if ((hrs >= 24) || (min >= 60) || (sec >= 60)) { 219 return -EINVAL; 220 } 221 222 /* 223 * each register is a different number of valid bits 224 */ 225 sec = bin2bcd(sec) & 0x7f; 226 min = bin2bcd(min) & 0x7f; 227 hrs = bin2bcd(hrs) & 0x3f; 228 day = bin2bcd(day) & 0x3f; 229 mon = bin2bcd(mon) & 0x1f; 230 yrs = bin2bcd(yrs) & 0xff; 231 cen = bin2bcd(cen) & 0xff; 232 233 spin_lock_irqsave(&ds1511_lock, flags); 234 rtc_disable_update(); 235 rtc_write(cen, RTC_CENTURY); 236 rtc_write(yrs, RTC_YEAR); 237 rtc_write((rtc_read(RTC_MON) & 0xe0) | mon, RTC_MON); 238 rtc_write(day, RTC_DOM); 239 rtc_write(hrs, RTC_HOUR); 240 rtc_write(min, RTC_MIN); 241 rtc_write(sec, RTC_SEC); 242 rtc_write(dow, RTC_DOW); 243 rtc_enable_update(); 244 spin_unlock_irqrestore(&ds1511_lock, flags); 245 246 return 0; 247 } 248 249 static int ds1511_rtc_read_time(struct device *dev, struct rtc_time *rtc_tm) 250 { 251 unsigned int century; 252 unsigned long flags; 253 254 spin_lock_irqsave(&ds1511_lock, flags); 255 rtc_disable_update(); 256 257 rtc_tm->tm_sec = rtc_read(RTC_SEC) & 0x7f; 258 rtc_tm->tm_min = rtc_read(RTC_MIN) & 0x7f; 259 rtc_tm->tm_hour = rtc_read(RTC_HOUR) & 0x3f; 260 rtc_tm->tm_mday = rtc_read(RTC_DOM) & 0x3f; 261 rtc_tm->tm_wday = rtc_read(RTC_DOW) & 0x7; 262 rtc_tm->tm_mon = rtc_read(RTC_MON) & 0x1f; 263 rtc_tm->tm_year = rtc_read(RTC_YEAR) & 0x7f; 264 century = rtc_read(RTC_CENTURY); 265 266 rtc_enable_update(); 267 spin_unlock_irqrestore(&ds1511_lock, flags); 268 269 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec); 270 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min); 271 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour); 272 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday); 273 rtc_tm->tm_wday = bcd2bin(rtc_tm->tm_wday); 274 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon); 275 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year); 276 century = bcd2bin(century) * 100; 277 278 /* 279 * Account for differences between how the RTC uses the values 280 * and how they are defined in a struct rtc_time; 281 */ 282 century += rtc_tm->tm_year; 283 rtc_tm->tm_year = century - 1900; 284 285 rtc_tm->tm_mon--; 286 287 if (rtc_valid_tm(rtc_tm) < 0) { 288 dev_err(dev, "retrieved date/time is not valid.\n"); 289 rtc_time_to_tm(0, rtc_tm); 290 } 291 return 0; 292 } 293 294 /* 295 * write the alarm register settings 296 * 297 * we only have the use to interrupt every second, otherwise 298 * known as the update interrupt, or the interrupt if the whole 299 * date/hours/mins/secs matches. the ds1511 has many more 300 * permutations, but the kernel doesn't. 301 */ 302 static void 303 ds1511_rtc_update_alarm(struct rtc_plat_data *pdata) 304 { 305 unsigned long flags; 306 307 spin_lock_irqsave(&pdata->lock, flags); 308 rtc_write(pdata->alrm_mday < 0 || (pdata->irqen & RTC_UF) ? 309 0x80 : bin2bcd(pdata->alrm_mday) & 0x3f, 310 RTC_ALARM_DATE); 311 rtc_write(pdata->alrm_hour < 0 || (pdata->irqen & RTC_UF) ? 312 0x80 : bin2bcd(pdata->alrm_hour) & 0x3f, 313 RTC_ALARM_HOUR); 314 rtc_write(pdata->alrm_min < 0 || (pdata->irqen & RTC_UF) ? 315 0x80 : bin2bcd(pdata->alrm_min) & 0x7f, 316 RTC_ALARM_MIN); 317 rtc_write(pdata->alrm_sec < 0 || (pdata->irqen & RTC_UF) ? 318 0x80 : bin2bcd(pdata->alrm_sec) & 0x7f, 319 RTC_ALARM_SEC); 320 rtc_write(rtc_read(RTC_CMD) | (pdata->irqen ? RTC_TIE : 0), RTC_CMD); 321 rtc_read(RTC_CMD1); /* clear interrupts */ 322 spin_unlock_irqrestore(&pdata->lock, flags); 323 } 324 325 static int 326 ds1511_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) 327 { 328 struct platform_device *pdev = to_platform_device(dev); 329 struct rtc_plat_data *pdata = platform_get_drvdata(pdev); 330 331 if (pdata->irq <= 0) 332 return -EINVAL; 333 334 pdata->alrm_mday = alrm->time.tm_mday; 335 pdata->alrm_hour = alrm->time.tm_hour; 336 pdata->alrm_min = alrm->time.tm_min; 337 pdata->alrm_sec = alrm->time.tm_sec; 338 if (alrm->enabled) { 339 pdata->irqen |= RTC_AF; 340 } 341 ds1511_rtc_update_alarm(pdata); 342 return 0; 343 } 344 345 static int 346 ds1511_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) 347 { 348 struct platform_device *pdev = to_platform_device(dev); 349 struct rtc_plat_data *pdata = platform_get_drvdata(pdev); 350 351 if (pdata->irq <= 0) 352 return -EINVAL; 353 354 alrm->time.tm_mday = pdata->alrm_mday < 0 ? 0 : pdata->alrm_mday; 355 alrm->time.tm_hour = pdata->alrm_hour < 0 ? 0 : pdata->alrm_hour; 356 alrm->time.tm_min = pdata->alrm_min < 0 ? 0 : pdata->alrm_min; 357 alrm->time.tm_sec = pdata->alrm_sec < 0 ? 0 : pdata->alrm_sec; 358 alrm->enabled = (pdata->irqen & RTC_AF) ? 1 : 0; 359 return 0; 360 } 361 362 static irqreturn_t 363 ds1511_interrupt(int irq, void *dev_id) 364 { 365 struct platform_device *pdev = dev_id; 366 struct rtc_plat_data *pdata = platform_get_drvdata(pdev); 367 unsigned long events = 0; 368 369 spin_lock(&pdata->lock); 370 /* 371 * read and clear interrupt 372 */ 373 if (rtc_read(RTC_CMD1) & DS1511_IRQF) { 374 events = RTC_IRQF; 375 if (rtc_read(RTC_ALARM_SEC) & 0x80) 376 events |= RTC_UF; 377 else 378 events |= RTC_AF; 379 if (likely(pdata->rtc)) 380 rtc_update_irq(pdata->rtc, 1, events); 381 } 382 spin_unlock(&pdata->lock); 383 return events ? IRQ_HANDLED : IRQ_NONE; 384 } 385 386 static int ds1511_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) 387 { 388 struct platform_device *pdev = to_platform_device(dev); 389 struct rtc_plat_data *pdata = platform_get_drvdata(pdev); 390 391 if (pdata->irq <= 0) 392 return -EINVAL; 393 if (enabled) 394 pdata->irqen |= RTC_AF; 395 else 396 pdata->irqen &= ~RTC_AF; 397 ds1511_rtc_update_alarm(pdata); 398 return 0; 399 } 400 401 static const struct rtc_class_ops ds1511_rtc_ops = { 402 .read_time = ds1511_rtc_read_time, 403 .set_time = ds1511_rtc_set_time, 404 .read_alarm = ds1511_rtc_read_alarm, 405 .set_alarm = ds1511_rtc_set_alarm, 406 .alarm_irq_enable = ds1511_rtc_alarm_irq_enable, 407 }; 408 409 static ssize_t 410 ds1511_nvram_read(struct file *filp, struct kobject *kobj, 411 struct bin_attribute *ba, 412 char *buf, loff_t pos, size_t size) 413 { 414 ssize_t count; 415 416 /* 417 * if count is more than one, turn on "burst" mode 418 * turn it off when you're done 419 */ 420 if (size > 1) { 421 rtc_write((rtc_read(RTC_CMD) | DS1511_BME), RTC_CMD); 422 } 423 if (pos > DS1511_RAM_MAX) { 424 pos = DS1511_RAM_MAX; 425 } 426 if (size + pos > DS1511_RAM_MAX + 1) { 427 size = DS1511_RAM_MAX - pos + 1; 428 } 429 rtc_write(pos, DS1511_RAMADDR_LSB); 430 for (count = 0; size > 0; count++, size--) { 431 *buf++ = rtc_read(DS1511_RAMDATA); 432 } 433 if (count > 1) { 434 rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD); 435 } 436 return count; 437 } 438 439 static ssize_t 440 ds1511_nvram_write(struct file *filp, struct kobject *kobj, 441 struct bin_attribute *bin_attr, 442 char *buf, loff_t pos, size_t size) 443 { 444 ssize_t count; 445 446 /* 447 * if count is more than one, turn on "burst" mode 448 * turn it off when you're done 449 */ 450 if (size > 1) { 451 rtc_write((rtc_read(RTC_CMD) | DS1511_BME), RTC_CMD); 452 } 453 if (pos > DS1511_RAM_MAX) { 454 pos = DS1511_RAM_MAX; 455 } 456 if (size + pos > DS1511_RAM_MAX + 1) { 457 size = DS1511_RAM_MAX - pos + 1; 458 } 459 rtc_write(pos, DS1511_RAMADDR_LSB); 460 for (count = 0; size > 0; count++, size--) { 461 rtc_write(*buf++, DS1511_RAMDATA); 462 } 463 if (count > 1) { 464 rtc_write((rtc_read(RTC_CMD) & ~DS1511_BME), RTC_CMD); 465 } 466 return count; 467 } 468 469 static struct bin_attribute ds1511_nvram_attr = { 470 .attr = { 471 .name = "nvram", 472 .mode = S_IRUGO | S_IWUSR, 473 }, 474 .size = DS1511_RAM_MAX, 475 .read = ds1511_nvram_read, 476 .write = ds1511_nvram_write, 477 }; 478 479 static int __devinit 480 ds1511_rtc_probe(struct platform_device *pdev) 481 { 482 struct rtc_device *rtc; 483 struct resource *res; 484 struct rtc_plat_data *pdata; 485 int ret = 0; 486 487 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 488 if (!res) { 489 return -ENODEV; 490 } 491 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 492 if (!pdata) 493 return -ENOMEM; 494 pdata->size = resource_size(res); 495 if (!devm_request_mem_region(&pdev->dev, res->start, pdata->size, 496 pdev->name)) 497 return -EBUSY; 498 ds1511_base = devm_ioremap(&pdev->dev, res->start, pdata->size); 499 if (!ds1511_base) 500 return -ENOMEM; 501 pdata->ioaddr = ds1511_base; 502 pdata->irq = platform_get_irq(pdev, 0); 503 504 /* 505 * turn on the clock and the crystal, etc. 506 */ 507 rtc_write(0, RTC_CMD); 508 rtc_write(0, RTC_CMD1); 509 /* 510 * clear the wdog counter 511 */ 512 rtc_write(0, DS1511_WD_MSEC); 513 rtc_write(0, DS1511_WD_SEC); 514 /* 515 * start the clock 516 */ 517 rtc_enable_update(); 518 519 /* 520 * check for a dying bat-tree 521 */ 522 if (rtc_read(RTC_CMD1) & DS1511_BLF1) { 523 dev_warn(&pdev->dev, "voltage-low detected.\n"); 524 } 525 526 spin_lock_init(&pdata->lock); 527 platform_set_drvdata(pdev, pdata); 528 /* 529 * if the platform has an interrupt in mind for this device, 530 * then by all means, set it 531 */ 532 if (pdata->irq > 0) { 533 rtc_read(RTC_CMD1); 534 if (devm_request_irq(&pdev->dev, pdata->irq, ds1511_interrupt, 535 IRQF_DISABLED | IRQF_SHARED, pdev->name, pdev) < 0) { 536 537 dev_warn(&pdev->dev, "interrupt not available.\n"); 538 pdata->irq = 0; 539 } 540 } 541 542 rtc = rtc_device_register(pdev->name, &pdev->dev, &ds1511_rtc_ops, 543 THIS_MODULE); 544 if (IS_ERR(rtc)) 545 return PTR_ERR(rtc); 546 pdata->rtc = rtc; 547 548 ret = sysfs_create_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr); 549 if (ret) 550 rtc_device_unregister(pdata->rtc); 551 return ret; 552 } 553 554 static int __devexit 555 ds1511_rtc_remove(struct platform_device *pdev) 556 { 557 struct rtc_plat_data *pdata = platform_get_drvdata(pdev); 558 559 sysfs_remove_bin_file(&pdev->dev.kobj, &ds1511_nvram_attr); 560 rtc_device_unregister(pdata->rtc); 561 if (pdata->irq > 0) { 562 /* 563 * disable the alarm interrupt 564 */ 565 rtc_write(rtc_read(RTC_CMD) & ~RTC_TIE, RTC_CMD); 566 rtc_read(RTC_CMD1); 567 } 568 return 0; 569 } 570 571 /* work with hotplug and coldplug */ 572 MODULE_ALIAS("platform:ds1511"); 573 574 static struct platform_driver ds1511_rtc_driver = { 575 .probe = ds1511_rtc_probe, 576 .remove = __devexit_p(ds1511_rtc_remove), 577 .driver = { 578 .name = "ds1511", 579 .owner = THIS_MODULE, 580 }, 581 }; 582 583 static int __init 584 ds1511_rtc_init(void) 585 { 586 return platform_driver_register(&ds1511_rtc_driver); 587 } 588 589 static void __exit 590 ds1511_rtc_exit(void) 591 { 592 platform_driver_unregister(&ds1511_rtc_driver); 593 } 594 595 module_init(ds1511_rtc_init); 596 module_exit(ds1511_rtc_exit); 597 598 MODULE_AUTHOR("Andrew Sharp <andy.sharp@lsi.com>"); 599 MODULE_DESCRIPTION("Dallas DS1511 RTC driver"); 600 MODULE_LICENSE("GPL"); 601 MODULE_VERSION(DRV_VERSION); 602