1 // SPDX-License-Identifier: GPL-2.0-only 2 /* rtc-ds1343.c 3 * 4 * Driver for Dallas Semiconductor DS1343 Low Current, SPI Compatible 5 * Real Time Clock 6 * 7 * Author : Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com> 8 * Ankur Srivastava <sankurece@gmail.com> : DS1343 Nvram Support 9 */ 10 11 #include <linux/init.h> 12 #include <linux/module.h> 13 #include <linux/interrupt.h> 14 #include <linux/device.h> 15 #include <linux/spi/spi.h> 16 #include <linux/regmap.h> 17 #include <linux/rtc.h> 18 #include <linux/bcd.h> 19 #include <linux/pm.h> 20 #include <linux/pm_wakeirq.h> 21 #include <linux/slab.h> 22 23 #define DALLAS_MAXIM_DS1343 0 24 #define DALLAS_MAXIM_DS1344 1 25 26 /* RTC DS1343 Registers */ 27 #define DS1343_SECONDS_REG 0x00 28 #define DS1343_MINUTES_REG 0x01 29 #define DS1343_HOURS_REG 0x02 30 #define DS1343_DAY_REG 0x03 31 #define DS1343_DATE_REG 0x04 32 #define DS1343_MONTH_REG 0x05 33 #define DS1343_YEAR_REG 0x06 34 #define DS1343_ALM0_SEC_REG 0x07 35 #define DS1343_ALM0_MIN_REG 0x08 36 #define DS1343_ALM0_HOUR_REG 0x09 37 #define DS1343_ALM0_DAY_REG 0x0A 38 #define DS1343_ALM1_SEC_REG 0x0B 39 #define DS1343_ALM1_MIN_REG 0x0C 40 #define DS1343_ALM1_HOUR_REG 0x0D 41 #define DS1343_ALM1_DAY_REG 0x0E 42 #define DS1343_CONTROL_REG 0x0F 43 #define DS1343_STATUS_REG 0x10 44 #define DS1343_TRICKLE_REG 0x11 45 #define DS1343_NVRAM 0x20 46 47 #define DS1343_NVRAM_LEN 96 48 49 /* DS1343 Control Registers bits */ 50 #define DS1343_EOSC 0x80 51 #define DS1343_DOSF 0x20 52 #define DS1343_EGFIL 0x10 53 #define DS1343_SQW 0x08 54 #define DS1343_INTCN 0x04 55 #define DS1343_A1IE 0x02 56 #define DS1343_A0IE 0x01 57 58 /* DS1343 Status Registers bits */ 59 #define DS1343_OSF 0x80 60 #define DS1343_IRQF1 0x02 61 #define DS1343_IRQF0 0x01 62 63 /* DS1343 Trickle Charger Registers bits */ 64 #define DS1343_TRICKLE_MAGIC 0xa0 65 #define DS1343_TRICKLE_DS1 0x08 66 #define DS1343_TRICKLE_1K 0x01 67 #define DS1343_TRICKLE_2K 0x02 68 #define DS1343_TRICKLE_4K 0x03 69 70 static const struct spi_device_id ds1343_id[] = { 71 { "ds1343", DALLAS_MAXIM_DS1343 }, 72 { "ds1344", DALLAS_MAXIM_DS1344 }, 73 { } 74 }; 75 MODULE_DEVICE_TABLE(spi, ds1343_id); 76 77 struct ds1343_priv { 78 struct spi_device *spi; 79 struct rtc_device *rtc; 80 struct regmap *map; 81 int irq; 82 }; 83 84 static ssize_t ds1343_show_glitchfilter(struct device *dev, 85 struct device_attribute *attr, char *buf) 86 { 87 struct ds1343_priv *priv = dev_get_drvdata(dev->parent); 88 int glitch_filt_status, data; 89 int res; 90 91 res = regmap_read(priv->map, DS1343_CONTROL_REG, &data); 92 if (res) 93 return res; 94 95 glitch_filt_status = !!(data & DS1343_EGFIL); 96 97 if (glitch_filt_status) 98 return sprintf(buf, "enabled\n"); 99 else 100 return sprintf(buf, "disabled\n"); 101 } 102 103 static ssize_t ds1343_store_glitchfilter(struct device *dev, 104 struct device_attribute *attr, 105 const char *buf, size_t count) 106 { 107 struct ds1343_priv *priv = dev_get_drvdata(dev->parent); 108 int data = 0; 109 int res; 110 111 if (strncmp(buf, "enabled", 7) == 0) 112 data = DS1343_EGFIL; 113 else if (strncmp(buf, "disabled", 8)) 114 return -EINVAL; 115 116 res = regmap_update_bits(priv->map, DS1343_CONTROL_REG, 117 DS1343_EGFIL, data); 118 if (res) 119 return res; 120 121 return count; 122 } 123 124 static DEVICE_ATTR(glitch_filter, S_IRUGO | S_IWUSR, ds1343_show_glitchfilter, 125 ds1343_store_glitchfilter); 126 127 static int ds1343_nvram_write(void *priv, unsigned int off, void *val, 128 size_t bytes) 129 { 130 struct ds1343_priv *ds1343 = priv; 131 132 return regmap_bulk_write(ds1343->map, DS1343_NVRAM + off, val, bytes); 133 } 134 135 static int ds1343_nvram_read(void *priv, unsigned int off, void *val, 136 size_t bytes) 137 { 138 struct ds1343_priv *ds1343 = priv; 139 140 return regmap_bulk_read(ds1343->map, DS1343_NVRAM + off, val, bytes); 141 } 142 143 static ssize_t ds1343_show_tricklecharger(struct device *dev, 144 struct device_attribute *attr, char *buf) 145 { 146 struct ds1343_priv *priv = dev_get_drvdata(dev->parent); 147 int res, data; 148 char *diodes = "disabled", *resistors = " "; 149 150 res = regmap_read(priv->map, DS1343_TRICKLE_REG, &data); 151 if (res) 152 return res; 153 154 if ((data & 0xf0) == DS1343_TRICKLE_MAGIC) { 155 switch (data & 0x0c) { 156 case DS1343_TRICKLE_DS1: 157 diodes = "one diode,"; 158 break; 159 160 default: 161 diodes = "no diode,"; 162 break; 163 } 164 165 switch (data & 0x03) { 166 case DS1343_TRICKLE_1K: 167 resistors = "1k Ohm"; 168 break; 169 170 case DS1343_TRICKLE_2K: 171 resistors = "2k Ohm"; 172 break; 173 174 case DS1343_TRICKLE_4K: 175 resistors = "4k Ohm"; 176 break; 177 178 default: 179 diodes = "disabled"; 180 break; 181 } 182 } 183 184 return sprintf(buf, "%s %s\n", diodes, resistors); 185 } 186 187 static DEVICE_ATTR(trickle_charger, S_IRUGO, ds1343_show_tricklecharger, NULL); 188 189 static struct attribute *ds1343_attrs[] = { 190 &dev_attr_glitch_filter.attr, 191 &dev_attr_trickle_charger.attr, 192 NULL 193 }; 194 195 static const struct attribute_group ds1343_attr_group = { 196 .attrs = ds1343_attrs, 197 }; 198 199 static int ds1343_read_time(struct device *dev, struct rtc_time *dt) 200 { 201 struct ds1343_priv *priv = dev_get_drvdata(dev); 202 unsigned char buf[7]; 203 int res; 204 205 res = regmap_bulk_read(priv->map, DS1343_SECONDS_REG, buf, 7); 206 if (res) 207 return res; 208 209 dt->tm_sec = bcd2bin(buf[0]); 210 dt->tm_min = bcd2bin(buf[1]); 211 dt->tm_hour = bcd2bin(buf[2] & 0x3F); 212 dt->tm_wday = bcd2bin(buf[3]) - 1; 213 dt->tm_mday = bcd2bin(buf[4]); 214 dt->tm_mon = bcd2bin(buf[5] & 0x1F) - 1; 215 dt->tm_year = bcd2bin(buf[6]) + 100; /* year offset from 1900 */ 216 217 return 0; 218 } 219 220 static int ds1343_set_time(struct device *dev, struct rtc_time *dt) 221 { 222 struct ds1343_priv *priv = dev_get_drvdata(dev); 223 u8 buf[7]; 224 225 buf[0] = bin2bcd(dt->tm_sec); 226 buf[1] = bin2bcd(dt->tm_min); 227 buf[2] = bin2bcd(dt->tm_hour) & 0x3F; 228 buf[3] = bin2bcd(dt->tm_wday + 1); 229 buf[4] = bin2bcd(dt->tm_mday); 230 buf[5] = bin2bcd(dt->tm_mon + 1); 231 buf[6] = bin2bcd(dt->tm_year - 100); 232 233 return regmap_bulk_write(priv->map, DS1343_SECONDS_REG, 234 buf, sizeof(buf)); 235 } 236 237 static int ds1343_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) 238 { 239 struct ds1343_priv *priv = dev_get_drvdata(dev); 240 unsigned char buf[4]; 241 unsigned int val; 242 int res; 243 244 if (priv->irq <= 0) 245 return -EINVAL; 246 247 res = regmap_read(priv->map, DS1343_STATUS_REG, &val); 248 if (res) 249 return res; 250 251 alarm->pending = !!(val & DS1343_IRQF0); 252 253 res = regmap_read(priv->map, DS1343_CONTROL_REG, &val); 254 if (res) 255 return res; 256 alarm->enabled = !!(val & DS1343_A0IE); 257 258 res = regmap_bulk_read(priv->map, DS1343_ALM0_SEC_REG, buf, 4); 259 if (res) 260 return res; 261 262 alarm->time.tm_sec = bcd2bin(buf[0]) & 0x7f; 263 alarm->time.tm_min = bcd2bin(buf[1]) & 0x7f; 264 alarm->time.tm_hour = bcd2bin(buf[2]) & 0x3f; 265 alarm->time.tm_mday = bcd2bin(buf[3]) & 0x3f; 266 267 return 0; 268 } 269 270 static int ds1343_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) 271 { 272 struct ds1343_priv *priv = dev_get_drvdata(dev); 273 unsigned char buf[4]; 274 int res = 0; 275 276 if (priv->irq <= 0) 277 return -EINVAL; 278 279 res = regmap_update_bits(priv->map, DS1343_CONTROL_REG, DS1343_A0IE, 0); 280 if (res) 281 return res; 282 283 buf[0] = bin2bcd(alarm->time.tm_sec); 284 buf[1] = bin2bcd(alarm->time.tm_min); 285 buf[2] = bin2bcd(alarm->time.tm_hour); 286 buf[3] = bin2bcd(alarm->time.tm_mday); 287 288 res = regmap_bulk_write(priv->map, DS1343_ALM0_SEC_REG, buf, 4); 289 if (res) 290 return res; 291 292 if (alarm->enabled) 293 res = regmap_update_bits(priv->map, DS1343_CONTROL_REG, 294 DS1343_A0IE, DS1343_A0IE); 295 296 return res; 297 } 298 299 static int ds1343_alarm_irq_enable(struct device *dev, unsigned int enabled) 300 { 301 struct ds1343_priv *priv = dev_get_drvdata(dev); 302 303 if (priv->irq <= 0) 304 return -EINVAL; 305 306 return regmap_update_bits(priv->map, DS1343_CONTROL_REG, 307 DS1343_A0IE, enabled ? DS1343_A0IE : 0); 308 } 309 310 static irqreturn_t ds1343_thread(int irq, void *dev_id) 311 { 312 struct ds1343_priv *priv = dev_id; 313 unsigned int stat; 314 int res = 0; 315 316 rtc_lock(priv->rtc); 317 318 res = regmap_read(priv->map, DS1343_STATUS_REG, &stat); 319 if (res) 320 goto out; 321 322 if (stat & DS1343_IRQF0) { 323 stat &= ~DS1343_IRQF0; 324 regmap_write(priv->map, DS1343_STATUS_REG, stat); 325 326 rtc_update_irq(priv->rtc, 1, RTC_AF | RTC_IRQF); 327 328 regmap_update_bits(priv->map, DS1343_CONTROL_REG, 329 DS1343_A0IE, 0); 330 } 331 332 out: 333 rtc_unlock(priv->rtc); 334 return IRQ_HANDLED; 335 } 336 337 static const struct rtc_class_ops ds1343_rtc_ops = { 338 .read_time = ds1343_read_time, 339 .set_time = ds1343_set_time, 340 .read_alarm = ds1343_read_alarm, 341 .set_alarm = ds1343_set_alarm, 342 .alarm_irq_enable = ds1343_alarm_irq_enable, 343 }; 344 345 static int ds1343_probe(struct spi_device *spi) 346 { 347 struct ds1343_priv *priv; 348 struct regmap_config config = { .reg_bits = 8, .val_bits = 8, 349 .write_flag_mask = 0x80, }; 350 unsigned int data; 351 int res; 352 struct nvmem_config nvmem_cfg = { 353 .name = "ds1343-", 354 .word_size = 1, 355 .stride = 1, 356 .size = DS1343_NVRAM_LEN, 357 .reg_read = ds1343_nvram_read, 358 .reg_write = ds1343_nvram_write, 359 }; 360 361 priv = devm_kzalloc(&spi->dev, sizeof(struct ds1343_priv), GFP_KERNEL); 362 if (!priv) 363 return -ENOMEM; 364 365 priv->spi = spi; 366 367 /* RTC DS1347 works in spi mode 3 and 368 * its chip select is active high 369 */ 370 spi->mode = SPI_MODE_3 | SPI_CS_HIGH; 371 spi->bits_per_word = 8; 372 res = spi_setup(spi); 373 if (res) 374 return res; 375 376 spi_set_drvdata(spi, priv); 377 378 priv->map = devm_regmap_init_spi(spi, &config); 379 380 if (IS_ERR(priv->map)) { 381 dev_err(&spi->dev, "spi regmap init failed for rtc ds1343\n"); 382 return PTR_ERR(priv->map); 383 } 384 385 res = regmap_read(priv->map, DS1343_SECONDS_REG, &data); 386 if (res) 387 return res; 388 389 regmap_read(priv->map, DS1343_CONTROL_REG, &data); 390 data |= DS1343_INTCN; 391 data &= ~(DS1343_EOSC | DS1343_A1IE | DS1343_A0IE); 392 regmap_write(priv->map, DS1343_CONTROL_REG, data); 393 394 regmap_read(priv->map, DS1343_STATUS_REG, &data); 395 data &= ~(DS1343_OSF | DS1343_IRQF1 | DS1343_IRQF0); 396 regmap_write(priv->map, DS1343_STATUS_REG, data); 397 398 priv->rtc = devm_rtc_allocate_device(&spi->dev); 399 if (IS_ERR(priv->rtc)) 400 return PTR_ERR(priv->rtc); 401 402 priv->rtc->nvram_old_abi = true; 403 priv->rtc->ops = &ds1343_rtc_ops; 404 priv->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000; 405 priv->rtc->range_max = RTC_TIMESTAMP_END_2099; 406 407 res = rtc_add_group(priv->rtc, &ds1343_attr_group); 408 if (res) 409 dev_err(&spi->dev, 410 "unable to create sysfs entries for rtc ds1343\n"); 411 412 res = rtc_register_device(priv->rtc); 413 if (res) 414 return res; 415 416 nvmem_cfg.priv = priv; 417 rtc_nvmem_register(priv->rtc, &nvmem_cfg); 418 419 priv->irq = spi->irq; 420 421 if (priv->irq >= 0) { 422 res = devm_request_threaded_irq(&spi->dev, spi->irq, NULL, 423 ds1343_thread, IRQF_ONESHOT, 424 "ds1343", priv); 425 if (res) { 426 priv->irq = -1; 427 dev_err(&spi->dev, 428 "unable to request irq for rtc ds1343\n"); 429 } else { 430 device_init_wakeup(&spi->dev, true); 431 dev_pm_set_wake_irq(&spi->dev, spi->irq); 432 } 433 } 434 435 return 0; 436 } 437 438 static int ds1343_remove(struct spi_device *spi) 439 { 440 dev_pm_clear_wake_irq(&spi->dev); 441 442 return 0; 443 } 444 445 #ifdef CONFIG_PM_SLEEP 446 447 static int ds1343_suspend(struct device *dev) 448 { 449 struct spi_device *spi = to_spi_device(dev); 450 451 if (spi->irq >= 0 && device_may_wakeup(dev)) 452 enable_irq_wake(spi->irq); 453 454 return 0; 455 } 456 457 static int ds1343_resume(struct device *dev) 458 { 459 struct spi_device *spi = to_spi_device(dev); 460 461 if (spi->irq >= 0 && device_may_wakeup(dev)) 462 disable_irq_wake(spi->irq); 463 464 return 0; 465 } 466 467 #endif 468 469 static SIMPLE_DEV_PM_OPS(ds1343_pm, ds1343_suspend, ds1343_resume); 470 471 static struct spi_driver ds1343_driver = { 472 .driver = { 473 .name = "ds1343", 474 .pm = &ds1343_pm, 475 }, 476 .probe = ds1343_probe, 477 .remove = ds1343_remove, 478 .id_table = ds1343_id, 479 }; 480 481 module_spi_driver(ds1343_driver); 482 483 MODULE_DESCRIPTION("DS1343 RTC SPI Driver"); 484 MODULE_AUTHOR("Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>," 485 "Ankur Srivastava <sankurece@gmail.com>"); 486 MODULE_LICENSE("GPL v2"); 487