xref: /openbmc/linux/drivers/rtc/rtc-ds1343.c (revision 5d331b7f)
1 /* rtc-ds1343.c
2  *
3  * Driver for Dallas Semiconductor DS1343 Low Current, SPI Compatible
4  * Real Time Clock
5  *
6  * Author : Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>
7  *	    Ankur Srivastava <sankurece@gmail.com> : DS1343 Nvram Support
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  */
14 
15 #include <linux/init.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
18 #include <linux/device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/regmap.h>
21 #include <linux/rtc.h>
22 #include <linux/bcd.h>
23 #include <linux/pm.h>
24 #include <linux/pm_wakeirq.h>
25 #include <linux/slab.h>
26 
27 #define DALLAS_MAXIM_DS1343	0
28 #define DALLAS_MAXIM_DS1344	1
29 
30 /* RTC DS1343 Registers */
31 #define DS1343_SECONDS_REG	0x00
32 #define DS1343_MINUTES_REG	0x01
33 #define DS1343_HOURS_REG	0x02
34 #define DS1343_DAY_REG		0x03
35 #define DS1343_DATE_REG		0x04
36 #define DS1343_MONTH_REG	0x05
37 #define DS1343_YEAR_REG		0x06
38 #define DS1343_ALM0_SEC_REG	0x07
39 #define DS1343_ALM0_MIN_REG	0x08
40 #define DS1343_ALM0_HOUR_REG	0x09
41 #define DS1343_ALM0_DAY_REG	0x0A
42 #define DS1343_ALM1_SEC_REG	0x0B
43 #define DS1343_ALM1_MIN_REG	0x0C
44 #define DS1343_ALM1_HOUR_REG	0x0D
45 #define DS1343_ALM1_DAY_REG	0x0E
46 #define DS1343_CONTROL_REG	0x0F
47 #define DS1343_STATUS_REG	0x10
48 #define DS1343_TRICKLE_REG	0x11
49 #define DS1343_NVRAM		0x20
50 
51 #define DS1343_NVRAM_LEN	96
52 
53 /* DS1343 Control Registers bits */
54 #define DS1343_EOSC		0x80
55 #define DS1343_DOSF		0x20
56 #define DS1343_EGFIL		0x10
57 #define DS1343_SQW		0x08
58 #define DS1343_INTCN		0x04
59 #define DS1343_A1IE		0x02
60 #define DS1343_A0IE		0x01
61 
62 /* DS1343 Status Registers bits */
63 #define DS1343_OSF		0x80
64 #define DS1343_IRQF1		0x02
65 #define DS1343_IRQF0		0x01
66 
67 /* DS1343 Trickle Charger Registers bits */
68 #define DS1343_TRICKLE_MAGIC	0xa0
69 #define DS1343_TRICKLE_DS1	0x08
70 #define DS1343_TRICKLE_1K	0x01
71 #define DS1343_TRICKLE_2K	0x02
72 #define DS1343_TRICKLE_4K	0x03
73 
74 static const struct spi_device_id ds1343_id[] = {
75 	{ "ds1343", DALLAS_MAXIM_DS1343 },
76 	{ "ds1344", DALLAS_MAXIM_DS1344 },
77 	{ }
78 };
79 MODULE_DEVICE_TABLE(spi, ds1343_id);
80 
81 struct ds1343_priv {
82 	struct spi_device *spi;
83 	struct rtc_device *rtc;
84 	struct regmap *map;
85 	struct mutex mutex;
86 	unsigned int irqen;
87 	int irq;
88 	int alarm_sec;
89 	int alarm_min;
90 	int alarm_hour;
91 	int alarm_mday;
92 };
93 
94 static int ds1343_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
95 {
96 	switch (cmd) {
97 #ifdef RTC_SET_CHARGE
98 	case RTC_SET_CHARGE:
99 	{
100 		int val;
101 
102 		if (copy_from_user(&val, (int __user *)arg, sizeof(int)))
103 			return -EFAULT;
104 
105 		return regmap_write(priv->map, DS1343_TRICKLE_REG, val);
106 	}
107 	break;
108 #endif
109 	}
110 
111 	return -ENOIOCTLCMD;
112 }
113 
114 static ssize_t ds1343_show_glitchfilter(struct device *dev,
115 				struct device_attribute *attr, char *buf)
116 {
117 	struct ds1343_priv *priv = dev_get_drvdata(dev);
118 	int glitch_filt_status, data;
119 
120 	regmap_read(priv->map, DS1343_CONTROL_REG, &data);
121 
122 	glitch_filt_status = !!(data & DS1343_EGFIL);
123 
124 	if (glitch_filt_status)
125 		return sprintf(buf, "enabled\n");
126 	else
127 		return sprintf(buf, "disabled\n");
128 }
129 
130 static ssize_t ds1343_store_glitchfilter(struct device *dev,
131 					struct device_attribute *attr,
132 					const char *buf, size_t count)
133 {
134 	struct ds1343_priv *priv = dev_get_drvdata(dev);
135 	int data;
136 
137 	regmap_read(priv->map, DS1343_CONTROL_REG, &data);
138 
139 	if (strncmp(buf, "enabled", 7) == 0)
140 		data |= DS1343_EGFIL;
141 
142 	else if (strncmp(buf, "disabled", 8) == 0)
143 		data &= ~(DS1343_EGFIL);
144 
145 	else
146 		return -EINVAL;
147 
148 	regmap_write(priv->map, DS1343_CONTROL_REG, data);
149 
150 	return count;
151 }
152 
153 static DEVICE_ATTR(glitch_filter, S_IRUGO | S_IWUSR, ds1343_show_glitchfilter,
154 			ds1343_store_glitchfilter);
155 
156 static int ds1343_nvram_write(void *priv, unsigned int off, void *val,
157 			      size_t bytes)
158 {
159 	struct ds1343_priv *ds1343 = priv;
160 
161 	return regmap_bulk_write(ds1343->map, DS1343_NVRAM + off, val, bytes);
162 }
163 
164 static int ds1343_nvram_read(void *priv, unsigned int off, void *val,
165 			     size_t bytes)
166 {
167 	struct ds1343_priv *ds1343 = priv;
168 
169 	return regmap_bulk_read(ds1343->map, DS1343_NVRAM + off, val, bytes);
170 }
171 
172 static ssize_t ds1343_show_tricklecharger(struct device *dev,
173 				struct device_attribute *attr, char *buf)
174 {
175 	struct ds1343_priv *priv = dev_get_drvdata(dev);
176 	int data;
177 	char *diodes = "disabled", *resistors = " ";
178 
179 	regmap_read(priv->map, DS1343_TRICKLE_REG, &data);
180 
181 	if ((data & 0xf0) == DS1343_TRICKLE_MAGIC) {
182 		switch (data & 0x0c) {
183 		case DS1343_TRICKLE_DS1:
184 			diodes = "one diode,";
185 			break;
186 
187 		default:
188 			diodes = "no diode,";
189 			break;
190 		}
191 
192 		switch (data & 0x03) {
193 		case DS1343_TRICKLE_1K:
194 			resistors = "1k Ohm";
195 			break;
196 
197 		case DS1343_TRICKLE_2K:
198 			resistors = "2k Ohm";
199 			break;
200 
201 		case DS1343_TRICKLE_4K:
202 			resistors = "4k Ohm";
203 			break;
204 
205 		default:
206 			diodes = "disabled";
207 			break;
208 		}
209 	}
210 
211 	return sprintf(buf, "%s %s\n", diodes, resistors);
212 }
213 
214 static DEVICE_ATTR(trickle_charger, S_IRUGO, ds1343_show_tricklecharger, NULL);
215 
216 static int ds1343_sysfs_register(struct device *dev)
217 {
218 	int err;
219 
220 	err = device_create_file(dev, &dev_attr_glitch_filter);
221 	if (err)
222 		return err;
223 
224 	err = device_create_file(dev, &dev_attr_trickle_charger);
225 	if (!err)
226 		return 0;
227 
228 	device_remove_file(dev, &dev_attr_glitch_filter);
229 
230 	return err;
231 }
232 
233 static void ds1343_sysfs_unregister(struct device *dev)
234 {
235 	device_remove_file(dev, &dev_attr_glitch_filter);
236 	device_remove_file(dev, &dev_attr_trickle_charger);
237 }
238 
239 static int ds1343_read_time(struct device *dev, struct rtc_time *dt)
240 {
241 	struct ds1343_priv *priv = dev_get_drvdata(dev);
242 	unsigned char buf[7];
243 	int res;
244 
245 	res = regmap_bulk_read(priv->map, DS1343_SECONDS_REG, buf, 7);
246 	if (res)
247 		return res;
248 
249 	dt->tm_sec	= bcd2bin(buf[0]);
250 	dt->tm_min	= bcd2bin(buf[1]);
251 	dt->tm_hour	= bcd2bin(buf[2] & 0x3F);
252 	dt->tm_wday	= bcd2bin(buf[3]) - 1;
253 	dt->tm_mday	= bcd2bin(buf[4]);
254 	dt->tm_mon	= bcd2bin(buf[5] & 0x1F) - 1;
255 	dt->tm_year	= bcd2bin(buf[6]) + 100; /* year offset from 1900 */
256 
257 	return 0;
258 }
259 
260 static int ds1343_set_time(struct device *dev, struct rtc_time *dt)
261 {
262 	struct ds1343_priv *priv = dev_get_drvdata(dev);
263 	int res;
264 
265 	res = regmap_write(priv->map, DS1343_SECONDS_REG,
266 				bin2bcd(dt->tm_sec));
267 	if (res)
268 		return res;
269 
270 	res = regmap_write(priv->map, DS1343_MINUTES_REG,
271 				bin2bcd(dt->tm_min));
272 	if (res)
273 		return res;
274 
275 	res = regmap_write(priv->map, DS1343_HOURS_REG,
276 				bin2bcd(dt->tm_hour) & 0x3F);
277 	if (res)
278 		return res;
279 
280 	res = regmap_write(priv->map, DS1343_DAY_REG,
281 				bin2bcd(dt->tm_wday + 1));
282 	if (res)
283 		return res;
284 
285 	res = regmap_write(priv->map, DS1343_DATE_REG,
286 				bin2bcd(dt->tm_mday));
287 	if (res)
288 		return res;
289 
290 	res = regmap_write(priv->map, DS1343_MONTH_REG,
291 				bin2bcd(dt->tm_mon + 1));
292 	if (res)
293 		return res;
294 
295 	dt->tm_year %= 100;
296 
297 	res = regmap_write(priv->map, DS1343_YEAR_REG,
298 				bin2bcd(dt->tm_year));
299 	if (res)
300 		return res;
301 
302 	return 0;
303 }
304 
305 static int ds1343_update_alarm(struct device *dev)
306 {
307 	struct ds1343_priv *priv = dev_get_drvdata(dev);
308 	unsigned int control, stat;
309 	unsigned char buf[4];
310 	int res = 0;
311 
312 	res = regmap_read(priv->map, DS1343_CONTROL_REG, &control);
313 	if (res)
314 		return res;
315 
316 	res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
317 	if (res)
318 		return res;
319 
320 	control &= ~(DS1343_A0IE);
321 	stat &= ~(DS1343_IRQF0);
322 
323 	res = regmap_write(priv->map, DS1343_CONTROL_REG, control);
324 	if (res)
325 		return res;
326 
327 	res = regmap_write(priv->map, DS1343_STATUS_REG, stat);
328 	if (res)
329 		return res;
330 
331 	buf[0] = priv->alarm_sec < 0 || (priv->irqen & RTC_UF) ?
332 		0x80 : bin2bcd(priv->alarm_sec) & 0x7F;
333 	buf[1] = priv->alarm_min < 0 || (priv->irqen & RTC_UF) ?
334 		0x80 : bin2bcd(priv->alarm_min) & 0x7F;
335 	buf[2] = priv->alarm_hour < 0 || (priv->irqen & RTC_UF) ?
336 		0x80 : bin2bcd(priv->alarm_hour) & 0x3F;
337 	buf[3] = priv->alarm_mday < 0 || (priv->irqen & RTC_UF) ?
338 		0x80 : bin2bcd(priv->alarm_mday) & 0x7F;
339 
340 	res = regmap_bulk_write(priv->map, DS1343_ALM0_SEC_REG, buf, 4);
341 	if (res)
342 		return res;
343 
344 	if (priv->irqen) {
345 		control |= DS1343_A0IE;
346 		res = regmap_write(priv->map, DS1343_CONTROL_REG, control);
347 	}
348 
349 	return res;
350 }
351 
352 static int ds1343_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
353 {
354 	struct ds1343_priv *priv = dev_get_drvdata(dev);
355 	int res = 0;
356 	unsigned int stat;
357 
358 	if (priv->irq <= 0)
359 		return -EINVAL;
360 
361 	mutex_lock(&priv->mutex);
362 
363 	res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
364 	if (res)
365 		goto out;
366 
367 	alarm->enabled = !!(priv->irqen & RTC_AF);
368 	alarm->pending = !!(stat & DS1343_IRQF0);
369 
370 	alarm->time.tm_sec = priv->alarm_sec < 0 ? 0 : priv->alarm_sec;
371 	alarm->time.tm_min = priv->alarm_min < 0 ? 0 : priv->alarm_min;
372 	alarm->time.tm_hour = priv->alarm_hour < 0 ? 0 : priv->alarm_hour;
373 	alarm->time.tm_mday = priv->alarm_mday < 0 ? 0 : priv->alarm_mday;
374 
375 out:
376 	mutex_unlock(&priv->mutex);
377 	return res;
378 }
379 
380 static int ds1343_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
381 {
382 	struct ds1343_priv *priv = dev_get_drvdata(dev);
383 	int res = 0;
384 
385 	if (priv->irq <= 0)
386 		return -EINVAL;
387 
388 	mutex_lock(&priv->mutex);
389 
390 	priv->alarm_sec = alarm->time.tm_sec;
391 	priv->alarm_min = alarm->time.tm_min;
392 	priv->alarm_hour = alarm->time.tm_hour;
393 	priv->alarm_mday = alarm->time.tm_mday;
394 
395 	if (alarm->enabled)
396 		priv->irqen |= RTC_AF;
397 
398 	res = ds1343_update_alarm(dev);
399 
400 	mutex_unlock(&priv->mutex);
401 
402 	return res;
403 }
404 
405 static int ds1343_alarm_irq_enable(struct device *dev, unsigned int enabled)
406 {
407 	struct ds1343_priv *priv = dev_get_drvdata(dev);
408 	int res = 0;
409 
410 	if (priv->irq <= 0)
411 		return -EINVAL;
412 
413 	mutex_lock(&priv->mutex);
414 
415 	if (enabled)
416 		priv->irqen |= RTC_AF;
417 	else
418 		priv->irqen &= ~RTC_AF;
419 
420 	res = ds1343_update_alarm(dev);
421 
422 	mutex_unlock(&priv->mutex);
423 
424 	return res;
425 }
426 
427 static irqreturn_t ds1343_thread(int irq, void *dev_id)
428 {
429 	struct ds1343_priv *priv = dev_id;
430 	unsigned int stat, control;
431 	int res = 0;
432 
433 	mutex_lock(&priv->mutex);
434 
435 	res = regmap_read(priv->map, DS1343_STATUS_REG, &stat);
436 	if (res)
437 		goto out;
438 
439 	if (stat & DS1343_IRQF0) {
440 		stat &= ~DS1343_IRQF0;
441 		regmap_write(priv->map, DS1343_STATUS_REG, stat);
442 
443 		res = regmap_read(priv->map, DS1343_CONTROL_REG, &control);
444 		if (res)
445 			goto out;
446 
447 		control &= ~DS1343_A0IE;
448 		regmap_write(priv->map, DS1343_CONTROL_REG, control);
449 
450 		rtc_update_irq(priv->rtc, 1, RTC_AF | RTC_IRQF);
451 	}
452 
453 out:
454 	mutex_unlock(&priv->mutex);
455 	return IRQ_HANDLED;
456 }
457 
458 static const struct rtc_class_ops ds1343_rtc_ops = {
459 	.ioctl		= ds1343_ioctl,
460 	.read_time	= ds1343_read_time,
461 	.set_time	= ds1343_set_time,
462 	.read_alarm	= ds1343_read_alarm,
463 	.set_alarm	= ds1343_set_alarm,
464 	.alarm_irq_enable = ds1343_alarm_irq_enable,
465 };
466 
467 static int ds1343_probe(struct spi_device *spi)
468 {
469 	struct ds1343_priv *priv;
470 	struct regmap_config config = { .reg_bits = 8, .val_bits = 8,
471 					.write_flag_mask = 0x80, };
472 	unsigned int data;
473 	int res;
474 	struct nvmem_config nvmem_cfg = {
475 		.name = "ds1343-",
476 		.word_size = 1,
477 		.stride = 1,
478 		.size = DS1343_NVRAM_LEN,
479 		.reg_read = ds1343_nvram_read,
480 		.reg_write = ds1343_nvram_write,
481 	};
482 
483 	priv = devm_kzalloc(&spi->dev, sizeof(struct ds1343_priv), GFP_KERNEL);
484 	if (!priv)
485 		return -ENOMEM;
486 
487 	priv->spi = spi;
488 	mutex_init(&priv->mutex);
489 
490 	/* RTC DS1347 works in spi mode 3 and
491 	 * its chip select is active high
492 	 */
493 	spi->mode = SPI_MODE_3 | SPI_CS_HIGH;
494 	spi->bits_per_word = 8;
495 	res = spi_setup(spi);
496 	if (res)
497 		return res;
498 
499 	spi_set_drvdata(spi, priv);
500 
501 	priv->map = devm_regmap_init_spi(spi, &config);
502 
503 	if (IS_ERR(priv->map)) {
504 		dev_err(&spi->dev, "spi regmap init failed for rtc ds1343\n");
505 		return PTR_ERR(priv->map);
506 	}
507 
508 	res = regmap_read(priv->map, DS1343_SECONDS_REG, &data);
509 	if (res)
510 		return res;
511 
512 	regmap_read(priv->map, DS1343_CONTROL_REG, &data);
513 	data |= DS1343_INTCN;
514 	data &= ~(DS1343_EOSC | DS1343_A1IE | DS1343_A0IE);
515 	regmap_write(priv->map, DS1343_CONTROL_REG, data);
516 
517 	regmap_read(priv->map, DS1343_STATUS_REG, &data);
518 	data &= ~(DS1343_OSF | DS1343_IRQF1 | DS1343_IRQF0);
519 	regmap_write(priv->map, DS1343_STATUS_REG, data);
520 
521 	priv->rtc = devm_rtc_allocate_device(&spi->dev);
522 	if (IS_ERR(priv->rtc))
523 		return PTR_ERR(priv->rtc);
524 
525 	priv->rtc->nvram_old_abi = true;
526 	priv->rtc->ops = &ds1343_rtc_ops;
527 
528 	res = rtc_register_device(priv->rtc);
529 	if (res)
530 		return res;
531 
532 	nvmem_cfg.priv = priv;
533 	rtc_nvmem_register(priv->rtc, &nvmem_cfg);
534 
535 	priv->irq = spi->irq;
536 
537 	if (priv->irq >= 0) {
538 		res = devm_request_threaded_irq(&spi->dev, spi->irq, NULL,
539 						ds1343_thread, IRQF_ONESHOT,
540 						"ds1343", priv);
541 		if (res) {
542 			priv->irq = -1;
543 			dev_err(&spi->dev,
544 				"unable to request irq for rtc ds1343\n");
545 		} else {
546 			device_init_wakeup(&spi->dev, true);
547 			dev_pm_set_wake_irq(&spi->dev, spi->irq);
548 		}
549 	}
550 
551 	res = ds1343_sysfs_register(&spi->dev);
552 	if (res)
553 		dev_err(&spi->dev,
554 			"unable to create sysfs entries for rtc ds1343\n");
555 
556 	return 0;
557 }
558 
559 static int ds1343_remove(struct spi_device *spi)
560 {
561 	struct ds1343_priv *priv = spi_get_drvdata(spi);
562 
563 	if (spi->irq) {
564 		mutex_lock(&priv->mutex);
565 		priv->irqen &= ~RTC_AF;
566 		mutex_unlock(&priv->mutex);
567 
568 		dev_pm_clear_wake_irq(&spi->dev);
569 		device_init_wakeup(&spi->dev, false);
570 		devm_free_irq(&spi->dev, spi->irq, priv);
571 	}
572 
573 	spi_set_drvdata(spi, NULL);
574 
575 	ds1343_sysfs_unregister(&spi->dev);
576 
577 	return 0;
578 }
579 
580 #ifdef CONFIG_PM_SLEEP
581 
582 static int ds1343_suspend(struct device *dev)
583 {
584 	struct spi_device *spi = to_spi_device(dev);
585 
586 	if (spi->irq >= 0 && device_may_wakeup(dev))
587 		enable_irq_wake(spi->irq);
588 
589 	return 0;
590 }
591 
592 static int ds1343_resume(struct device *dev)
593 {
594 	struct spi_device *spi = to_spi_device(dev);
595 
596 	if (spi->irq >= 0 && device_may_wakeup(dev))
597 		disable_irq_wake(spi->irq);
598 
599 	return 0;
600 }
601 
602 #endif
603 
604 static SIMPLE_DEV_PM_OPS(ds1343_pm, ds1343_suspend, ds1343_resume);
605 
606 static struct spi_driver ds1343_driver = {
607 	.driver = {
608 		.name = "ds1343",
609 		.pm = &ds1343_pm,
610 	},
611 	.probe = ds1343_probe,
612 	.remove = ds1343_remove,
613 	.id_table = ds1343_id,
614 };
615 
616 module_spi_driver(ds1343_driver);
617 
618 MODULE_DESCRIPTION("DS1343 RTC SPI Driver");
619 MODULE_AUTHOR("Raghavendra Chandra Ganiga <ravi23ganiga@gmail.com>,"
620 		"Ankur Srivastava <sankurece@gmail.com>");
621 MODULE_LICENSE("GPL v2");
622