1 /* 2 * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips. 3 * 4 * Copyright (C) 2005 James Chapman (ds1337 core) 5 * Copyright (C) 2006 David Brownell 6 * Copyright (C) 2009 Matthias Fuchs (rx8025 support) 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/module.h> 14 #include <linux/init.h> 15 #include <linux/slab.h> 16 #include <linux/i2c.h> 17 #include <linux/string.h> 18 #include <linux/rtc.h> 19 #include <linux/bcd.h> 20 21 22 23 /* We can't determine type by probing, but if we expect pre-Linux code 24 * to have set the chip up as a clock (turning on the oscillator and 25 * setting the date and time), Linux can ignore the non-clock features. 26 * That's a natural job for a factory or repair bench. 27 */ 28 enum ds_type { 29 ds_1307, 30 ds_1337, 31 ds_1338, 32 ds_1339, 33 ds_1340, 34 ds_1388, 35 ds_3231, 36 m41t00, 37 rx_8025, 38 // rs5c372 too? different address... 39 }; 40 41 42 /* RTC registers don't differ much, except for the century flag */ 43 #define DS1307_REG_SECS 0x00 /* 00-59 */ 44 # define DS1307_BIT_CH 0x80 45 # define DS1340_BIT_nEOSC 0x80 46 #define DS1307_REG_MIN 0x01 /* 00-59 */ 47 #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */ 48 # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */ 49 # define DS1307_BIT_PM 0x20 /* in REG_HOUR */ 50 # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */ 51 # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */ 52 #define DS1307_REG_WDAY 0x03 /* 01-07 */ 53 #define DS1307_REG_MDAY 0x04 /* 01-31 */ 54 #define DS1307_REG_MONTH 0x05 /* 01-12 */ 55 # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */ 56 #define DS1307_REG_YEAR 0x06 /* 00-99 */ 57 58 /* Other registers (control, status, alarms, trickle charge, NVRAM, etc) 59 * start at 7, and they differ a LOT. Only control and status matter for 60 * basic RTC date and time functionality; be careful using them. 61 */ 62 #define DS1307_REG_CONTROL 0x07 /* or ds1338 */ 63 # define DS1307_BIT_OUT 0x80 64 # define DS1338_BIT_OSF 0x20 65 # define DS1307_BIT_SQWE 0x10 66 # define DS1307_BIT_RS1 0x02 67 # define DS1307_BIT_RS0 0x01 68 #define DS1337_REG_CONTROL 0x0e 69 # define DS1337_BIT_nEOSC 0x80 70 # define DS1339_BIT_BBSQI 0x20 71 # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */ 72 # define DS1337_BIT_RS2 0x10 73 # define DS1337_BIT_RS1 0x08 74 # define DS1337_BIT_INTCN 0x04 75 # define DS1337_BIT_A2IE 0x02 76 # define DS1337_BIT_A1IE 0x01 77 #define DS1340_REG_CONTROL 0x07 78 # define DS1340_BIT_OUT 0x80 79 # define DS1340_BIT_FT 0x40 80 # define DS1340_BIT_CALIB_SIGN 0x20 81 # define DS1340_M_CALIBRATION 0x1f 82 #define DS1340_REG_FLAG 0x09 83 # define DS1340_BIT_OSF 0x80 84 #define DS1337_REG_STATUS 0x0f 85 # define DS1337_BIT_OSF 0x80 86 # define DS1337_BIT_A2I 0x02 87 # define DS1337_BIT_A1I 0x01 88 #define DS1339_REG_ALARM1_SECS 0x07 89 #define DS1339_REG_TRICKLE 0x10 90 91 #define RX8025_REG_CTRL1 0x0e 92 # define RX8025_BIT_2412 0x20 93 #define RX8025_REG_CTRL2 0x0f 94 # define RX8025_BIT_PON 0x10 95 # define RX8025_BIT_VDET 0x40 96 # define RX8025_BIT_XST 0x20 97 98 99 struct ds1307 { 100 u8 offset; /* register's offset */ 101 u8 regs[11]; 102 enum ds_type type; 103 unsigned long flags; 104 #define HAS_NVRAM 0 /* bit 0 == sysfs file active */ 105 #define HAS_ALARM 1 /* bit 1 == irq claimed */ 106 struct i2c_client *client; 107 struct rtc_device *rtc; 108 struct work_struct work; 109 s32 (*read_block_data)(const struct i2c_client *client, u8 command, 110 u8 length, u8 *values); 111 s32 (*write_block_data)(const struct i2c_client *client, u8 command, 112 u8 length, const u8 *values); 113 }; 114 115 struct chip_desc { 116 unsigned nvram56:1; 117 unsigned alarm:1; 118 }; 119 120 static const struct chip_desc chips[] = { 121 [ds_1307] = { 122 .nvram56 = 1, 123 }, 124 [ds_1337] = { 125 .alarm = 1, 126 }, 127 [ds_1338] = { 128 .nvram56 = 1, 129 }, 130 [ds_1339] = { 131 .alarm = 1, 132 }, 133 [ds_1340] = { 134 }, 135 [ds_3231] = { 136 .alarm = 1, 137 }, 138 [m41t00] = { 139 }, 140 [rx_8025] = { 141 }, }; 142 143 static const struct i2c_device_id ds1307_id[] = { 144 { "ds1307", ds_1307 }, 145 { "ds1337", ds_1337 }, 146 { "ds1338", ds_1338 }, 147 { "ds1339", ds_1339 }, 148 { "ds1388", ds_1388 }, 149 { "ds1340", ds_1340 }, 150 { "ds3231", ds_3231 }, 151 { "m41t00", m41t00 }, 152 { "rx8025", rx_8025 }, 153 { } 154 }; 155 MODULE_DEVICE_TABLE(i2c, ds1307_id); 156 157 /*----------------------------------------------------------------------*/ 158 159 #define BLOCK_DATA_MAX_TRIES 10 160 161 static s32 ds1307_read_block_data_once(const struct i2c_client *client, 162 u8 command, u8 length, u8 *values) 163 { 164 s32 i, data; 165 166 for (i = 0; i < length; i++) { 167 data = i2c_smbus_read_byte_data(client, command + i); 168 if (data < 0) 169 return data; 170 values[i] = data; 171 } 172 return i; 173 } 174 175 static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command, 176 u8 length, u8 *values) 177 { 178 u8 oldvalues[I2C_SMBUS_BLOCK_MAX]; 179 s32 ret; 180 int tries = 0; 181 182 dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length); 183 ret = ds1307_read_block_data_once(client, command, length, values); 184 if (ret < 0) 185 return ret; 186 do { 187 if (++tries > BLOCK_DATA_MAX_TRIES) { 188 dev_err(&client->dev, 189 "ds1307_read_block_data failed\n"); 190 return -EIO; 191 } 192 memcpy(oldvalues, values, length); 193 ret = ds1307_read_block_data_once(client, command, length, 194 values); 195 if (ret < 0) 196 return ret; 197 } while (memcmp(oldvalues, values, length)); 198 return length; 199 } 200 201 static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command, 202 u8 length, const u8 *values) 203 { 204 u8 currvalues[I2C_SMBUS_BLOCK_MAX]; 205 int tries = 0; 206 207 dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length); 208 do { 209 s32 i, ret; 210 211 if (++tries > BLOCK_DATA_MAX_TRIES) { 212 dev_err(&client->dev, 213 "ds1307_write_block_data failed\n"); 214 return -EIO; 215 } 216 for (i = 0; i < length; i++) { 217 ret = i2c_smbus_write_byte_data(client, command + i, 218 values[i]); 219 if (ret < 0) 220 return ret; 221 } 222 ret = ds1307_read_block_data_once(client, command, length, 223 currvalues); 224 if (ret < 0) 225 return ret; 226 } while (memcmp(currvalues, values, length)); 227 return length; 228 } 229 230 /*----------------------------------------------------------------------*/ 231 232 /* 233 * The IRQ logic includes a "real" handler running in IRQ context just 234 * long enough to schedule this workqueue entry. We need a task context 235 * to talk to the RTC, since I2C I/O calls require that; and disable the 236 * IRQ until we clear its status on the chip, so that this handler can 237 * work with any type of triggering (not just falling edge). 238 * 239 * The ds1337 and ds1339 both have two alarms, but we only use the first 240 * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm 241 * signal; ds1339 chips have only one alarm signal. 242 */ 243 static void ds1307_work(struct work_struct *work) 244 { 245 struct ds1307 *ds1307; 246 struct i2c_client *client; 247 struct mutex *lock; 248 int stat, control; 249 250 ds1307 = container_of(work, struct ds1307, work); 251 client = ds1307->client; 252 lock = &ds1307->rtc->ops_lock; 253 254 mutex_lock(lock); 255 stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS); 256 if (stat < 0) 257 goto out; 258 259 if (stat & DS1337_BIT_A1I) { 260 stat &= ~DS1337_BIT_A1I; 261 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat); 262 263 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); 264 if (control < 0) 265 goto out; 266 267 control &= ~DS1337_BIT_A1IE; 268 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control); 269 270 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF); 271 } 272 273 out: 274 if (test_bit(HAS_ALARM, &ds1307->flags)) 275 enable_irq(client->irq); 276 mutex_unlock(lock); 277 } 278 279 static irqreturn_t ds1307_irq(int irq, void *dev_id) 280 { 281 struct i2c_client *client = dev_id; 282 struct ds1307 *ds1307 = i2c_get_clientdata(client); 283 284 disable_irq_nosync(irq); 285 schedule_work(&ds1307->work); 286 return IRQ_HANDLED; 287 } 288 289 /*----------------------------------------------------------------------*/ 290 291 static int ds1307_get_time(struct device *dev, struct rtc_time *t) 292 { 293 struct ds1307 *ds1307 = dev_get_drvdata(dev); 294 int tmp; 295 296 /* read the RTC date and time registers all at once */ 297 tmp = ds1307->read_block_data(ds1307->client, 298 ds1307->offset, 7, ds1307->regs); 299 if (tmp != 7) { 300 dev_err(dev, "%s error %d\n", "read", tmp); 301 return -EIO; 302 } 303 304 dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", 305 "read", 306 ds1307->regs[0], ds1307->regs[1], 307 ds1307->regs[2], ds1307->regs[3], 308 ds1307->regs[4], ds1307->regs[5], 309 ds1307->regs[6]); 310 311 t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f); 312 t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f); 313 tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f; 314 t->tm_hour = bcd2bin(tmp); 315 t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1; 316 t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f); 317 tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f; 318 t->tm_mon = bcd2bin(tmp) - 1; 319 320 /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */ 321 t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100; 322 323 dev_dbg(dev, "%s secs=%d, mins=%d, " 324 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", 325 "read", t->tm_sec, t->tm_min, 326 t->tm_hour, t->tm_mday, 327 t->tm_mon, t->tm_year, t->tm_wday); 328 329 /* initial clock setting can be undefined */ 330 return rtc_valid_tm(t); 331 } 332 333 static int ds1307_set_time(struct device *dev, struct rtc_time *t) 334 { 335 struct ds1307 *ds1307 = dev_get_drvdata(dev); 336 int result; 337 int tmp; 338 u8 *buf = ds1307->regs; 339 340 dev_dbg(dev, "%s secs=%d, mins=%d, " 341 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", 342 "write", t->tm_sec, t->tm_min, 343 t->tm_hour, t->tm_mday, 344 t->tm_mon, t->tm_year, t->tm_wday); 345 346 buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec); 347 buf[DS1307_REG_MIN] = bin2bcd(t->tm_min); 348 buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour); 349 buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1); 350 buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday); 351 buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1); 352 353 /* assume 20YY not 19YY */ 354 tmp = t->tm_year - 100; 355 buf[DS1307_REG_YEAR] = bin2bcd(tmp); 356 357 switch (ds1307->type) { 358 case ds_1337: 359 case ds_1339: 360 case ds_3231: 361 buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY; 362 break; 363 case ds_1340: 364 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN 365 | DS1340_BIT_CENTURY; 366 break; 367 default: 368 break; 369 } 370 371 dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", 372 "write", buf[0], buf[1], buf[2], buf[3], 373 buf[4], buf[5], buf[6]); 374 375 result = ds1307->write_block_data(ds1307->client, 376 ds1307->offset, 7, buf); 377 if (result < 0) { 378 dev_err(dev, "%s error %d\n", "write", result); 379 return result; 380 } 381 return 0; 382 } 383 384 static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t) 385 { 386 struct i2c_client *client = to_i2c_client(dev); 387 struct ds1307 *ds1307 = i2c_get_clientdata(client); 388 int ret; 389 390 if (!test_bit(HAS_ALARM, &ds1307->flags)) 391 return -EINVAL; 392 393 /* read all ALARM1, ALARM2, and status registers at once */ 394 ret = ds1307->read_block_data(client, 395 DS1339_REG_ALARM1_SECS, 9, ds1307->regs); 396 if (ret != 9) { 397 dev_err(dev, "%s error %d\n", "alarm read", ret); 398 return -EIO; 399 } 400 401 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", 402 "alarm read", 403 ds1307->regs[0], ds1307->regs[1], 404 ds1307->regs[2], ds1307->regs[3], 405 ds1307->regs[4], ds1307->regs[5], 406 ds1307->regs[6], ds1307->regs[7], 407 ds1307->regs[8]); 408 409 /* report alarm time (ALARM1); assume 24 hour and day-of-month modes, 410 * and that all four fields are checked matches 411 */ 412 t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f); 413 t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f); 414 t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f); 415 t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f); 416 t->time.tm_mon = -1; 417 t->time.tm_year = -1; 418 t->time.tm_wday = -1; 419 t->time.tm_yday = -1; 420 t->time.tm_isdst = -1; 421 422 /* ... and status */ 423 t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE); 424 t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I); 425 426 dev_dbg(dev, "%s secs=%d, mins=%d, " 427 "hours=%d, mday=%d, enabled=%d, pending=%d\n", 428 "alarm read", t->time.tm_sec, t->time.tm_min, 429 t->time.tm_hour, t->time.tm_mday, 430 t->enabled, t->pending); 431 432 return 0; 433 } 434 435 static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t) 436 { 437 struct i2c_client *client = to_i2c_client(dev); 438 struct ds1307 *ds1307 = i2c_get_clientdata(client); 439 unsigned char *buf = ds1307->regs; 440 u8 control, status; 441 int ret; 442 443 if (!test_bit(HAS_ALARM, &ds1307->flags)) 444 return -EINVAL; 445 446 dev_dbg(dev, "%s secs=%d, mins=%d, " 447 "hours=%d, mday=%d, enabled=%d, pending=%d\n", 448 "alarm set", t->time.tm_sec, t->time.tm_min, 449 t->time.tm_hour, t->time.tm_mday, 450 t->enabled, t->pending); 451 452 /* read current status of both alarms and the chip */ 453 ret = ds1307->read_block_data(client, 454 DS1339_REG_ALARM1_SECS, 9, buf); 455 if (ret != 9) { 456 dev_err(dev, "%s error %d\n", "alarm write", ret); 457 return -EIO; 458 } 459 control = ds1307->regs[7]; 460 status = ds1307->regs[8]; 461 462 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", 463 "alarm set (old status)", 464 ds1307->regs[0], ds1307->regs[1], 465 ds1307->regs[2], ds1307->regs[3], 466 ds1307->regs[4], ds1307->regs[5], 467 ds1307->regs[6], control, status); 468 469 /* set ALARM1, using 24 hour and day-of-month modes */ 470 buf[0] = bin2bcd(t->time.tm_sec); 471 buf[1] = bin2bcd(t->time.tm_min); 472 buf[2] = bin2bcd(t->time.tm_hour); 473 buf[3] = bin2bcd(t->time.tm_mday); 474 475 /* set ALARM2 to non-garbage */ 476 buf[4] = 0; 477 buf[5] = 0; 478 buf[6] = 0; 479 480 /* optionally enable ALARM1 */ 481 buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE); 482 if (t->enabled) { 483 dev_dbg(dev, "alarm IRQ armed\n"); 484 buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */ 485 } 486 buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I); 487 488 ret = ds1307->write_block_data(client, 489 DS1339_REG_ALARM1_SECS, 9, buf); 490 if (ret < 0) { 491 dev_err(dev, "can't set alarm time\n"); 492 return ret; 493 } 494 495 return 0; 496 } 497 498 static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled) 499 { 500 struct i2c_client *client = to_i2c_client(dev); 501 struct ds1307 *ds1307 = i2c_get_clientdata(client); 502 int ret; 503 504 if (!test_bit(HAS_ALARM, &ds1307->flags)) 505 return -ENOTTY; 506 507 ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); 508 if (ret < 0) 509 return ret; 510 511 if (enabled) 512 ret |= DS1337_BIT_A1IE; 513 else 514 ret &= ~DS1337_BIT_A1IE; 515 516 ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret); 517 if (ret < 0) 518 return ret; 519 520 return 0; 521 } 522 523 static const struct rtc_class_ops ds13xx_rtc_ops = { 524 .read_time = ds1307_get_time, 525 .set_time = ds1307_set_time, 526 .read_alarm = ds1337_read_alarm, 527 .set_alarm = ds1337_set_alarm, 528 .alarm_irq_enable = ds1307_alarm_irq_enable, 529 }; 530 531 /*----------------------------------------------------------------------*/ 532 533 #define NVRAM_SIZE 56 534 535 static ssize_t 536 ds1307_nvram_read(struct file *filp, struct kobject *kobj, 537 struct bin_attribute *attr, 538 char *buf, loff_t off, size_t count) 539 { 540 struct i2c_client *client; 541 struct ds1307 *ds1307; 542 int result; 543 544 client = kobj_to_i2c_client(kobj); 545 ds1307 = i2c_get_clientdata(client); 546 547 if (unlikely(off >= NVRAM_SIZE)) 548 return 0; 549 if ((off + count) > NVRAM_SIZE) 550 count = NVRAM_SIZE - off; 551 if (unlikely(!count)) 552 return count; 553 554 result = ds1307->read_block_data(client, 8 + off, count, buf); 555 if (result < 0) 556 dev_err(&client->dev, "%s error %d\n", "nvram read", result); 557 return result; 558 } 559 560 static ssize_t 561 ds1307_nvram_write(struct file *filp, struct kobject *kobj, 562 struct bin_attribute *attr, 563 char *buf, loff_t off, size_t count) 564 { 565 struct i2c_client *client; 566 struct ds1307 *ds1307; 567 int result; 568 569 client = kobj_to_i2c_client(kobj); 570 ds1307 = i2c_get_clientdata(client); 571 572 if (unlikely(off >= NVRAM_SIZE)) 573 return -EFBIG; 574 if ((off + count) > NVRAM_SIZE) 575 count = NVRAM_SIZE - off; 576 if (unlikely(!count)) 577 return count; 578 579 result = ds1307->write_block_data(client, 8 + off, count, buf); 580 if (result < 0) { 581 dev_err(&client->dev, "%s error %d\n", "nvram write", result); 582 return result; 583 } 584 return count; 585 } 586 587 static struct bin_attribute nvram = { 588 .attr = { 589 .name = "nvram", 590 .mode = S_IRUGO | S_IWUSR, 591 }, 592 593 .read = ds1307_nvram_read, 594 .write = ds1307_nvram_write, 595 .size = NVRAM_SIZE, 596 }; 597 598 /*----------------------------------------------------------------------*/ 599 600 static struct i2c_driver ds1307_driver; 601 602 static int __devinit ds1307_probe(struct i2c_client *client, 603 const struct i2c_device_id *id) 604 { 605 struct ds1307 *ds1307; 606 int err = -ENODEV; 607 int tmp; 608 const struct chip_desc *chip = &chips[id->driver_data]; 609 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); 610 int want_irq = false; 611 unsigned char *buf; 612 static const int bbsqi_bitpos[] = { 613 [ds_1337] = 0, 614 [ds_1339] = DS1339_BIT_BBSQI, 615 [ds_3231] = DS3231_BIT_BBSQW, 616 }; 617 618 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA) 619 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) 620 return -EIO; 621 622 if (!(ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL))) 623 return -ENOMEM; 624 625 i2c_set_clientdata(client, ds1307); 626 627 ds1307->client = client; 628 ds1307->type = id->driver_data; 629 ds1307->offset = 0; 630 631 buf = ds1307->regs; 632 if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { 633 ds1307->read_block_data = i2c_smbus_read_i2c_block_data; 634 ds1307->write_block_data = i2c_smbus_write_i2c_block_data; 635 } else { 636 ds1307->read_block_data = ds1307_read_block_data; 637 ds1307->write_block_data = ds1307_write_block_data; 638 } 639 640 switch (ds1307->type) { 641 case ds_1337: 642 case ds_1339: 643 case ds_3231: 644 /* has IRQ? */ 645 if (ds1307->client->irq > 0 && chip->alarm) { 646 INIT_WORK(&ds1307->work, ds1307_work); 647 want_irq = true; 648 } 649 /* get registers that the "rtc" read below won't read... */ 650 tmp = ds1307->read_block_data(ds1307->client, 651 DS1337_REG_CONTROL, 2, buf); 652 if (tmp != 2) { 653 pr_debug("read error %d\n", tmp); 654 err = -EIO; 655 goto exit_free; 656 } 657 658 /* oscillator off? turn it on, so clock can tick. */ 659 if (ds1307->regs[0] & DS1337_BIT_nEOSC) 660 ds1307->regs[0] &= ~DS1337_BIT_nEOSC; 661 662 /* Using IRQ? Disable the square wave and both alarms. 663 * For some variants, be sure alarms can trigger when we're 664 * running on Vbackup (BBSQI/BBSQW) 665 */ 666 if (want_irq) { 667 ds1307->regs[0] |= DS1337_BIT_INTCN 668 | bbsqi_bitpos[ds1307->type]; 669 ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE); 670 } 671 672 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, 673 ds1307->regs[0]); 674 675 /* oscillator fault? clear flag, and warn */ 676 if (ds1307->regs[1] & DS1337_BIT_OSF) { 677 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, 678 ds1307->regs[1] & ~DS1337_BIT_OSF); 679 dev_warn(&client->dev, "SET TIME!\n"); 680 } 681 break; 682 683 case rx_8025: 684 tmp = i2c_smbus_read_i2c_block_data(ds1307->client, 685 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf); 686 if (tmp != 2) { 687 pr_debug("read error %d\n", tmp); 688 err = -EIO; 689 goto exit_free; 690 } 691 692 /* oscillator off? turn it on, so clock can tick. */ 693 if (!(ds1307->regs[1] & RX8025_BIT_XST)) { 694 ds1307->regs[1] |= RX8025_BIT_XST; 695 i2c_smbus_write_byte_data(client, 696 RX8025_REG_CTRL2 << 4 | 0x08, 697 ds1307->regs[1]); 698 dev_warn(&client->dev, 699 "oscillator stop detected - SET TIME!\n"); 700 } 701 702 if (ds1307->regs[1] & RX8025_BIT_PON) { 703 ds1307->regs[1] &= ~RX8025_BIT_PON; 704 i2c_smbus_write_byte_data(client, 705 RX8025_REG_CTRL2 << 4 | 0x08, 706 ds1307->regs[1]); 707 dev_warn(&client->dev, "power-on detected\n"); 708 } 709 710 if (ds1307->regs[1] & RX8025_BIT_VDET) { 711 ds1307->regs[1] &= ~RX8025_BIT_VDET; 712 i2c_smbus_write_byte_data(client, 713 RX8025_REG_CTRL2 << 4 | 0x08, 714 ds1307->regs[1]); 715 dev_warn(&client->dev, "voltage drop detected\n"); 716 } 717 718 /* make sure we are running in 24hour mode */ 719 if (!(ds1307->regs[0] & RX8025_BIT_2412)) { 720 u8 hour; 721 722 /* switch to 24 hour mode */ 723 i2c_smbus_write_byte_data(client, 724 RX8025_REG_CTRL1 << 4 | 0x08, 725 ds1307->regs[0] | 726 RX8025_BIT_2412); 727 728 tmp = i2c_smbus_read_i2c_block_data(ds1307->client, 729 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf); 730 if (tmp != 2) { 731 pr_debug("read error %d\n", tmp); 732 err = -EIO; 733 goto exit_free; 734 } 735 736 /* correct hour */ 737 hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]); 738 if (hour == 12) 739 hour = 0; 740 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) 741 hour += 12; 742 743 i2c_smbus_write_byte_data(client, 744 DS1307_REG_HOUR << 4 | 0x08, 745 hour); 746 } 747 break; 748 case ds_1388: 749 ds1307->offset = 1; /* Seconds starts at 1 */ 750 break; 751 default: 752 break; 753 } 754 755 read_rtc: 756 /* read RTC registers */ 757 tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf); 758 if (tmp != 8) { 759 pr_debug("read error %d\n", tmp); 760 err = -EIO; 761 goto exit_free; 762 } 763 764 /* minimal sanity checking; some chips (like DS1340) don't 765 * specify the extra bits as must-be-zero, but there are 766 * still a few values that are clearly out-of-range. 767 */ 768 tmp = ds1307->regs[DS1307_REG_SECS]; 769 switch (ds1307->type) { 770 case ds_1307: 771 case m41t00: 772 /* clock halted? turn it on, so clock can tick. */ 773 if (tmp & DS1307_BIT_CH) { 774 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); 775 dev_warn(&client->dev, "SET TIME!\n"); 776 goto read_rtc; 777 } 778 break; 779 case ds_1338: 780 /* clock halted? turn it on, so clock can tick. */ 781 if (tmp & DS1307_BIT_CH) 782 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); 783 784 /* oscillator fault? clear flag, and warn */ 785 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) { 786 i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL, 787 ds1307->regs[DS1307_REG_CONTROL] 788 & ~DS1338_BIT_OSF); 789 dev_warn(&client->dev, "SET TIME!\n"); 790 goto read_rtc; 791 } 792 break; 793 case ds_1340: 794 /* clock halted? turn it on, so clock can tick. */ 795 if (tmp & DS1340_BIT_nEOSC) 796 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); 797 798 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG); 799 if (tmp < 0) { 800 pr_debug("read error %d\n", tmp); 801 err = -EIO; 802 goto exit_free; 803 } 804 805 /* oscillator fault? clear flag, and warn */ 806 if (tmp & DS1340_BIT_OSF) { 807 i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0); 808 dev_warn(&client->dev, "SET TIME!\n"); 809 } 810 break; 811 case rx_8025: 812 case ds_1337: 813 case ds_1339: 814 case ds_1388: 815 case ds_3231: 816 break; 817 } 818 819 tmp = ds1307->regs[DS1307_REG_HOUR]; 820 switch (ds1307->type) { 821 case ds_1340: 822 case m41t00: 823 /* NOTE: ignores century bits; fix before deploying 824 * systems that will run through year 2100. 825 */ 826 break; 827 case rx_8025: 828 break; 829 default: 830 if (!(tmp & DS1307_BIT_12HR)) 831 break; 832 833 /* Be sure we're in 24 hour mode. Multi-master systems 834 * take note... 835 */ 836 tmp = bcd2bin(tmp & 0x1f); 837 if (tmp == 12) 838 tmp = 0; 839 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) 840 tmp += 12; 841 i2c_smbus_write_byte_data(client, 842 ds1307->offset + DS1307_REG_HOUR, 843 bin2bcd(tmp)); 844 } 845 846 ds1307->rtc = rtc_device_register(client->name, &client->dev, 847 &ds13xx_rtc_ops, THIS_MODULE); 848 if (IS_ERR(ds1307->rtc)) { 849 err = PTR_ERR(ds1307->rtc); 850 dev_err(&client->dev, 851 "unable to register the class device\n"); 852 goto exit_free; 853 } 854 855 if (want_irq) { 856 err = request_irq(client->irq, ds1307_irq, IRQF_SHARED, 857 ds1307->rtc->name, client); 858 if (err) { 859 dev_err(&client->dev, 860 "unable to request IRQ!\n"); 861 goto exit_irq; 862 } 863 864 device_set_wakeup_capable(&client->dev, 1); 865 set_bit(HAS_ALARM, &ds1307->flags); 866 dev_dbg(&client->dev, "got IRQ %d\n", client->irq); 867 } 868 869 if (chip->nvram56) { 870 err = sysfs_create_bin_file(&client->dev.kobj, &nvram); 871 if (err == 0) { 872 set_bit(HAS_NVRAM, &ds1307->flags); 873 dev_info(&client->dev, "56 bytes nvram\n"); 874 } 875 } 876 877 return 0; 878 879 exit_irq: 880 rtc_device_unregister(ds1307->rtc); 881 exit_free: 882 kfree(ds1307); 883 return err; 884 } 885 886 static int __devexit ds1307_remove(struct i2c_client *client) 887 { 888 struct ds1307 *ds1307 = i2c_get_clientdata(client); 889 890 if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) { 891 free_irq(client->irq, client); 892 cancel_work_sync(&ds1307->work); 893 } 894 895 if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags)) 896 sysfs_remove_bin_file(&client->dev.kobj, &nvram); 897 898 rtc_device_unregister(ds1307->rtc); 899 kfree(ds1307); 900 return 0; 901 } 902 903 static struct i2c_driver ds1307_driver = { 904 .driver = { 905 .name = "rtc-ds1307", 906 .owner = THIS_MODULE, 907 }, 908 .probe = ds1307_probe, 909 .remove = __devexit_p(ds1307_remove), 910 .id_table = ds1307_id, 911 }; 912 913 static int __init ds1307_init(void) 914 { 915 return i2c_add_driver(&ds1307_driver); 916 } 917 module_init(ds1307_init); 918 919 static void __exit ds1307_exit(void) 920 { 921 i2c_del_driver(&ds1307_driver); 922 } 923 module_exit(ds1307_exit); 924 925 MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips"); 926 MODULE_LICENSE("GPL"); 927