1 /* 2 * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips. 3 * 4 * Copyright (C) 2005 James Chapman (ds1337 core) 5 * Copyright (C) 2006 David Brownell 6 * Copyright (C) 2009 Matthias Fuchs (rx8025 support) 7 * Copyright (C) 2012 Bertrand Achard (nvram access fixes) 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/bcd.h> 15 #include <linux/i2c.h> 16 #include <linux/init.h> 17 #include <linux/module.h> 18 #include <linux/of_device.h> 19 #include <linux/of_irq.h> 20 #include <linux/pm_wakeirq.h> 21 #include <linux/rtc/ds1307.h> 22 #include <linux/rtc.h> 23 #include <linux/slab.h> 24 #include <linux/string.h> 25 26 /* 27 * We can't determine type by probing, but if we expect pre-Linux code 28 * to have set the chip up as a clock (turning on the oscillator and 29 * setting the date and time), Linux can ignore the non-clock features. 30 * That's a natural job for a factory or repair bench. 31 */ 32 enum ds_type { 33 ds_1307, 34 ds_1337, 35 ds_1338, 36 ds_1339, 37 ds_1340, 38 ds_1388, 39 ds_3231, 40 m41t00, 41 mcp794xx, 42 rx_8025, 43 last_ds_type /* always last */ 44 /* rs5c372 too? different address... */ 45 }; 46 47 48 /* RTC registers don't differ much, except for the century flag */ 49 #define DS1307_REG_SECS 0x00 /* 00-59 */ 50 # define DS1307_BIT_CH 0x80 51 # define DS1340_BIT_nEOSC 0x80 52 # define MCP794XX_BIT_ST 0x80 53 #define DS1307_REG_MIN 0x01 /* 00-59 */ 54 #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */ 55 # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */ 56 # define DS1307_BIT_PM 0x20 /* in REG_HOUR */ 57 # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */ 58 # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */ 59 #define DS1307_REG_WDAY 0x03 /* 01-07 */ 60 # define MCP794XX_BIT_VBATEN 0x08 61 #define DS1307_REG_MDAY 0x04 /* 01-31 */ 62 #define DS1307_REG_MONTH 0x05 /* 01-12 */ 63 # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */ 64 #define DS1307_REG_YEAR 0x06 /* 00-99 */ 65 66 /* 67 * Other registers (control, status, alarms, trickle charge, NVRAM, etc) 68 * start at 7, and they differ a LOT. Only control and status matter for 69 * basic RTC date and time functionality; be careful using them. 70 */ 71 #define DS1307_REG_CONTROL 0x07 /* or ds1338 */ 72 # define DS1307_BIT_OUT 0x80 73 # define DS1338_BIT_OSF 0x20 74 # define DS1307_BIT_SQWE 0x10 75 # define DS1307_BIT_RS1 0x02 76 # define DS1307_BIT_RS0 0x01 77 #define DS1337_REG_CONTROL 0x0e 78 # define DS1337_BIT_nEOSC 0x80 79 # define DS1339_BIT_BBSQI 0x20 80 # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */ 81 # define DS1337_BIT_RS2 0x10 82 # define DS1337_BIT_RS1 0x08 83 # define DS1337_BIT_INTCN 0x04 84 # define DS1337_BIT_A2IE 0x02 85 # define DS1337_BIT_A1IE 0x01 86 #define DS1340_REG_CONTROL 0x07 87 # define DS1340_BIT_OUT 0x80 88 # define DS1340_BIT_FT 0x40 89 # define DS1340_BIT_CALIB_SIGN 0x20 90 # define DS1340_M_CALIBRATION 0x1f 91 #define DS1340_REG_FLAG 0x09 92 # define DS1340_BIT_OSF 0x80 93 #define DS1337_REG_STATUS 0x0f 94 # define DS1337_BIT_OSF 0x80 95 # define DS1337_BIT_A2I 0x02 96 # define DS1337_BIT_A1I 0x01 97 #define DS1339_REG_ALARM1_SECS 0x07 98 99 #define DS13XX_TRICKLE_CHARGER_MAGIC 0xa0 100 101 #define RX8025_REG_CTRL1 0x0e 102 # define RX8025_BIT_2412 0x20 103 #define RX8025_REG_CTRL2 0x0f 104 # define RX8025_BIT_PON 0x10 105 # define RX8025_BIT_VDET 0x40 106 # define RX8025_BIT_XST 0x20 107 108 109 struct ds1307 { 110 u8 offset; /* register's offset */ 111 u8 regs[11]; 112 u16 nvram_offset; 113 struct bin_attribute *nvram; 114 enum ds_type type; 115 unsigned long flags; 116 #define HAS_NVRAM 0 /* bit 0 == sysfs file active */ 117 #define HAS_ALARM 1 /* bit 1 == irq claimed */ 118 struct i2c_client *client; 119 struct rtc_device *rtc; 120 int wakeirq; 121 s32 (*read_block_data)(const struct i2c_client *client, u8 command, 122 u8 length, u8 *values); 123 s32 (*write_block_data)(const struct i2c_client *client, u8 command, 124 u8 length, const u8 *values); 125 }; 126 127 struct chip_desc { 128 unsigned alarm:1; 129 u16 nvram_offset; 130 u16 nvram_size; 131 u16 trickle_charger_reg; 132 u8 trickle_charger_setup; 133 u8 (*do_trickle_setup)(struct i2c_client *, uint32_t, bool); 134 }; 135 136 static u8 do_trickle_setup_ds1339(struct i2c_client *, 137 uint32_t ohms, bool diode); 138 139 static struct chip_desc chips[last_ds_type] = { 140 [ds_1307] = { 141 .nvram_offset = 8, 142 .nvram_size = 56, 143 }, 144 [ds_1337] = { 145 .alarm = 1, 146 }, 147 [ds_1338] = { 148 .nvram_offset = 8, 149 .nvram_size = 56, 150 }, 151 [ds_1339] = { 152 .alarm = 1, 153 .trickle_charger_reg = 0x10, 154 .do_trickle_setup = &do_trickle_setup_ds1339, 155 }, 156 [ds_1340] = { 157 .trickle_charger_reg = 0x08, 158 }, 159 [ds_1388] = { 160 .trickle_charger_reg = 0x0a, 161 }, 162 [ds_3231] = { 163 .alarm = 1, 164 }, 165 [mcp794xx] = { 166 .alarm = 1, 167 /* this is battery backed SRAM */ 168 .nvram_offset = 0x20, 169 .nvram_size = 0x40, 170 }, 171 }; 172 173 static const struct i2c_device_id ds1307_id[] = { 174 { "ds1307", ds_1307 }, 175 { "ds1337", ds_1337 }, 176 { "ds1338", ds_1338 }, 177 { "ds1339", ds_1339 }, 178 { "ds1388", ds_1388 }, 179 { "ds1340", ds_1340 }, 180 { "ds3231", ds_3231 }, 181 { "m41t00", m41t00 }, 182 { "mcp7940x", mcp794xx }, 183 { "mcp7941x", mcp794xx }, 184 { "pt7c4338", ds_1307 }, 185 { "rx8025", rx_8025 }, 186 { } 187 }; 188 MODULE_DEVICE_TABLE(i2c, ds1307_id); 189 190 /*----------------------------------------------------------------------*/ 191 192 #define BLOCK_DATA_MAX_TRIES 10 193 194 static s32 ds1307_read_block_data_once(const struct i2c_client *client, 195 u8 command, u8 length, u8 *values) 196 { 197 s32 i, data; 198 199 for (i = 0; i < length; i++) { 200 data = i2c_smbus_read_byte_data(client, command + i); 201 if (data < 0) 202 return data; 203 values[i] = data; 204 } 205 return i; 206 } 207 208 static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command, 209 u8 length, u8 *values) 210 { 211 u8 oldvalues[255]; 212 s32 ret; 213 int tries = 0; 214 215 dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length); 216 ret = ds1307_read_block_data_once(client, command, length, values); 217 if (ret < 0) 218 return ret; 219 do { 220 if (++tries > BLOCK_DATA_MAX_TRIES) { 221 dev_err(&client->dev, 222 "ds1307_read_block_data failed\n"); 223 return -EIO; 224 } 225 memcpy(oldvalues, values, length); 226 ret = ds1307_read_block_data_once(client, command, length, 227 values); 228 if (ret < 0) 229 return ret; 230 } while (memcmp(oldvalues, values, length)); 231 return length; 232 } 233 234 static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command, 235 u8 length, const u8 *values) 236 { 237 u8 currvalues[255]; 238 int tries = 0; 239 240 dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length); 241 do { 242 s32 i, ret; 243 244 if (++tries > BLOCK_DATA_MAX_TRIES) { 245 dev_err(&client->dev, 246 "ds1307_write_block_data failed\n"); 247 return -EIO; 248 } 249 for (i = 0; i < length; i++) { 250 ret = i2c_smbus_write_byte_data(client, command + i, 251 values[i]); 252 if (ret < 0) 253 return ret; 254 } 255 ret = ds1307_read_block_data_once(client, command, length, 256 currvalues); 257 if (ret < 0) 258 return ret; 259 } while (memcmp(currvalues, values, length)); 260 return length; 261 } 262 263 /*----------------------------------------------------------------------*/ 264 265 /* These RTC devices are not designed to be connected to a SMbus adapter. 266 SMbus limits block operations length to 32 bytes, whereas it's not 267 limited on I2C buses. As a result, accesses may exceed 32 bytes; 268 in that case, split them into smaller blocks */ 269 270 static s32 ds1307_native_smbus_write_block_data(const struct i2c_client *client, 271 u8 command, u8 length, const u8 *values) 272 { 273 u8 suboffset = 0; 274 275 if (length <= I2C_SMBUS_BLOCK_MAX) 276 return i2c_smbus_write_i2c_block_data(client, 277 command, length, values); 278 279 while (suboffset < length) { 280 s32 retval = i2c_smbus_write_i2c_block_data(client, 281 command + suboffset, 282 min(I2C_SMBUS_BLOCK_MAX, length - suboffset), 283 values + suboffset); 284 if (retval < 0) 285 return retval; 286 287 suboffset += I2C_SMBUS_BLOCK_MAX; 288 } 289 return length; 290 } 291 292 static s32 ds1307_native_smbus_read_block_data(const struct i2c_client *client, 293 u8 command, u8 length, u8 *values) 294 { 295 u8 suboffset = 0; 296 297 if (length <= I2C_SMBUS_BLOCK_MAX) 298 return i2c_smbus_read_i2c_block_data(client, 299 command, length, values); 300 301 while (suboffset < length) { 302 s32 retval = i2c_smbus_read_i2c_block_data(client, 303 command + suboffset, 304 min(I2C_SMBUS_BLOCK_MAX, length - suboffset), 305 values + suboffset); 306 if (retval < 0) 307 return retval; 308 309 suboffset += I2C_SMBUS_BLOCK_MAX; 310 } 311 return length; 312 } 313 314 /*----------------------------------------------------------------------*/ 315 316 /* 317 * The ds1337 and ds1339 both have two alarms, but we only use the first 318 * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm 319 * signal; ds1339 chips have only one alarm signal. 320 */ 321 static irqreturn_t ds1307_irq(int irq, void *dev_id) 322 { 323 struct i2c_client *client = dev_id; 324 struct ds1307 *ds1307 = i2c_get_clientdata(client); 325 struct mutex *lock = &ds1307->rtc->ops_lock; 326 int stat, control; 327 328 mutex_lock(lock); 329 stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS); 330 if (stat < 0) 331 goto out; 332 333 if (stat & DS1337_BIT_A1I) { 334 stat &= ~DS1337_BIT_A1I; 335 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat); 336 337 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); 338 if (control < 0) 339 goto out; 340 341 control &= ~DS1337_BIT_A1IE; 342 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control); 343 344 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF); 345 } 346 347 out: 348 mutex_unlock(lock); 349 350 return IRQ_HANDLED; 351 } 352 353 /*----------------------------------------------------------------------*/ 354 355 static int ds1307_get_time(struct device *dev, struct rtc_time *t) 356 { 357 struct ds1307 *ds1307 = dev_get_drvdata(dev); 358 int tmp; 359 360 /* read the RTC date and time registers all at once */ 361 tmp = ds1307->read_block_data(ds1307->client, 362 ds1307->offset, 7, ds1307->regs); 363 if (tmp != 7) { 364 dev_err(dev, "%s error %d\n", "read", tmp); 365 return -EIO; 366 } 367 368 dev_dbg(dev, "%s: %7ph\n", "read", ds1307->regs); 369 370 t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f); 371 t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f); 372 tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f; 373 t->tm_hour = bcd2bin(tmp); 374 t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1; 375 t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f); 376 tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f; 377 t->tm_mon = bcd2bin(tmp) - 1; 378 379 /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */ 380 t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100; 381 382 dev_dbg(dev, "%s secs=%d, mins=%d, " 383 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", 384 "read", t->tm_sec, t->tm_min, 385 t->tm_hour, t->tm_mday, 386 t->tm_mon, t->tm_year, t->tm_wday); 387 388 /* initial clock setting can be undefined */ 389 return rtc_valid_tm(t); 390 } 391 392 static int ds1307_set_time(struct device *dev, struct rtc_time *t) 393 { 394 struct ds1307 *ds1307 = dev_get_drvdata(dev); 395 int result; 396 int tmp; 397 u8 *buf = ds1307->regs; 398 399 dev_dbg(dev, "%s secs=%d, mins=%d, " 400 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", 401 "write", t->tm_sec, t->tm_min, 402 t->tm_hour, t->tm_mday, 403 t->tm_mon, t->tm_year, t->tm_wday); 404 405 buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec); 406 buf[DS1307_REG_MIN] = bin2bcd(t->tm_min); 407 buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour); 408 buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1); 409 buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday); 410 buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1); 411 412 /* assume 20YY not 19YY */ 413 tmp = t->tm_year - 100; 414 buf[DS1307_REG_YEAR] = bin2bcd(tmp); 415 416 switch (ds1307->type) { 417 case ds_1337: 418 case ds_1339: 419 case ds_3231: 420 buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY; 421 break; 422 case ds_1340: 423 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN 424 | DS1340_BIT_CENTURY; 425 break; 426 case mcp794xx: 427 /* 428 * these bits were cleared when preparing the date/time 429 * values and need to be set again before writing the 430 * buffer out to the device. 431 */ 432 buf[DS1307_REG_SECS] |= MCP794XX_BIT_ST; 433 buf[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN; 434 break; 435 default: 436 break; 437 } 438 439 dev_dbg(dev, "%s: %7ph\n", "write", buf); 440 441 result = ds1307->write_block_data(ds1307->client, 442 ds1307->offset, 7, buf); 443 if (result < 0) { 444 dev_err(dev, "%s error %d\n", "write", result); 445 return result; 446 } 447 return 0; 448 } 449 450 static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t) 451 { 452 struct i2c_client *client = to_i2c_client(dev); 453 struct ds1307 *ds1307 = i2c_get_clientdata(client); 454 int ret; 455 456 if (!test_bit(HAS_ALARM, &ds1307->flags)) 457 return -EINVAL; 458 459 /* read all ALARM1, ALARM2, and status registers at once */ 460 ret = ds1307->read_block_data(client, 461 DS1339_REG_ALARM1_SECS, 9, ds1307->regs); 462 if (ret != 9) { 463 dev_err(dev, "%s error %d\n", "alarm read", ret); 464 return -EIO; 465 } 466 467 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", 468 "alarm read", 469 ds1307->regs[0], ds1307->regs[1], 470 ds1307->regs[2], ds1307->regs[3], 471 ds1307->regs[4], ds1307->regs[5], 472 ds1307->regs[6], ds1307->regs[7], 473 ds1307->regs[8]); 474 475 /* 476 * report alarm time (ALARM1); assume 24 hour and day-of-month modes, 477 * and that all four fields are checked matches 478 */ 479 t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f); 480 t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f); 481 t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f); 482 t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f); 483 t->time.tm_mon = -1; 484 t->time.tm_year = -1; 485 t->time.tm_wday = -1; 486 t->time.tm_yday = -1; 487 t->time.tm_isdst = -1; 488 489 /* ... and status */ 490 t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE); 491 t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I); 492 493 dev_dbg(dev, "%s secs=%d, mins=%d, " 494 "hours=%d, mday=%d, enabled=%d, pending=%d\n", 495 "alarm read", t->time.tm_sec, t->time.tm_min, 496 t->time.tm_hour, t->time.tm_mday, 497 t->enabled, t->pending); 498 499 return 0; 500 } 501 502 static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t) 503 { 504 struct i2c_client *client = to_i2c_client(dev); 505 struct ds1307 *ds1307 = i2c_get_clientdata(client); 506 unsigned char *buf = ds1307->regs; 507 u8 control, status; 508 int ret; 509 510 if (!test_bit(HAS_ALARM, &ds1307->flags)) 511 return -EINVAL; 512 513 dev_dbg(dev, "%s secs=%d, mins=%d, " 514 "hours=%d, mday=%d, enabled=%d, pending=%d\n", 515 "alarm set", t->time.tm_sec, t->time.tm_min, 516 t->time.tm_hour, t->time.tm_mday, 517 t->enabled, t->pending); 518 519 /* read current status of both alarms and the chip */ 520 ret = ds1307->read_block_data(client, 521 DS1339_REG_ALARM1_SECS, 9, buf); 522 if (ret != 9) { 523 dev_err(dev, "%s error %d\n", "alarm write", ret); 524 return -EIO; 525 } 526 control = ds1307->regs[7]; 527 status = ds1307->regs[8]; 528 529 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", 530 "alarm set (old status)", 531 ds1307->regs[0], ds1307->regs[1], 532 ds1307->regs[2], ds1307->regs[3], 533 ds1307->regs[4], ds1307->regs[5], 534 ds1307->regs[6], control, status); 535 536 /* set ALARM1, using 24 hour and day-of-month modes */ 537 buf[0] = bin2bcd(t->time.tm_sec); 538 buf[1] = bin2bcd(t->time.tm_min); 539 buf[2] = bin2bcd(t->time.tm_hour); 540 buf[3] = bin2bcd(t->time.tm_mday); 541 542 /* set ALARM2 to non-garbage */ 543 buf[4] = 0; 544 buf[5] = 0; 545 buf[6] = 0; 546 547 /* optionally enable ALARM1 */ 548 buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE); 549 if (t->enabled) { 550 dev_dbg(dev, "alarm IRQ armed\n"); 551 buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */ 552 } 553 buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I); 554 555 ret = ds1307->write_block_data(client, 556 DS1339_REG_ALARM1_SECS, 9, buf); 557 if (ret < 0) { 558 dev_err(dev, "can't set alarm time\n"); 559 return ret; 560 } 561 562 return 0; 563 } 564 565 static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled) 566 { 567 struct i2c_client *client = to_i2c_client(dev); 568 struct ds1307 *ds1307 = i2c_get_clientdata(client); 569 int ret; 570 571 if (!test_bit(HAS_ALARM, &ds1307->flags)) 572 return -ENOTTY; 573 574 ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); 575 if (ret < 0) 576 return ret; 577 578 if (enabled) 579 ret |= DS1337_BIT_A1IE; 580 else 581 ret &= ~DS1337_BIT_A1IE; 582 583 ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret); 584 if (ret < 0) 585 return ret; 586 587 return 0; 588 } 589 590 static const struct rtc_class_ops ds13xx_rtc_ops = { 591 .read_time = ds1307_get_time, 592 .set_time = ds1307_set_time, 593 .read_alarm = ds1337_read_alarm, 594 .set_alarm = ds1337_set_alarm, 595 .alarm_irq_enable = ds1307_alarm_irq_enable, 596 }; 597 598 /*----------------------------------------------------------------------*/ 599 600 /* 601 * Alarm support for mcp794xx devices. 602 */ 603 604 #define MCP794XX_REG_CONTROL 0x07 605 # define MCP794XX_BIT_ALM0_EN 0x10 606 # define MCP794XX_BIT_ALM1_EN 0x20 607 #define MCP794XX_REG_ALARM0_BASE 0x0a 608 #define MCP794XX_REG_ALARM0_CTRL 0x0d 609 #define MCP794XX_REG_ALARM1_BASE 0x11 610 #define MCP794XX_REG_ALARM1_CTRL 0x14 611 # define MCP794XX_BIT_ALMX_IF (1 << 3) 612 # define MCP794XX_BIT_ALMX_C0 (1 << 4) 613 # define MCP794XX_BIT_ALMX_C1 (1 << 5) 614 # define MCP794XX_BIT_ALMX_C2 (1 << 6) 615 # define MCP794XX_BIT_ALMX_POL (1 << 7) 616 # define MCP794XX_MSK_ALMX_MATCH (MCP794XX_BIT_ALMX_C0 | \ 617 MCP794XX_BIT_ALMX_C1 | \ 618 MCP794XX_BIT_ALMX_C2) 619 620 static irqreturn_t mcp794xx_irq(int irq, void *dev_id) 621 { 622 struct i2c_client *client = dev_id; 623 struct ds1307 *ds1307 = i2c_get_clientdata(client); 624 struct mutex *lock = &ds1307->rtc->ops_lock; 625 int reg, ret; 626 627 mutex_lock(lock); 628 629 /* Check and clear alarm 0 interrupt flag. */ 630 reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_ALARM0_CTRL); 631 if (reg < 0) 632 goto out; 633 if (!(reg & MCP794XX_BIT_ALMX_IF)) 634 goto out; 635 reg &= ~MCP794XX_BIT_ALMX_IF; 636 ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_ALARM0_CTRL, reg); 637 if (ret < 0) 638 goto out; 639 640 /* Disable alarm 0. */ 641 reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL); 642 if (reg < 0) 643 goto out; 644 reg &= ~MCP794XX_BIT_ALM0_EN; 645 ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg); 646 if (ret < 0) 647 goto out; 648 649 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF); 650 651 out: 652 mutex_unlock(lock); 653 654 return IRQ_HANDLED; 655 } 656 657 static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t) 658 { 659 struct i2c_client *client = to_i2c_client(dev); 660 struct ds1307 *ds1307 = i2c_get_clientdata(client); 661 u8 *regs = ds1307->regs; 662 int ret; 663 664 if (!test_bit(HAS_ALARM, &ds1307->flags)) 665 return -EINVAL; 666 667 /* Read control and alarm 0 registers. */ 668 ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs); 669 if (ret < 0) 670 return ret; 671 672 t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN); 673 674 /* Report alarm 0 time assuming 24-hour and day-of-month modes. */ 675 t->time.tm_sec = bcd2bin(ds1307->regs[3] & 0x7f); 676 t->time.tm_min = bcd2bin(ds1307->regs[4] & 0x7f); 677 t->time.tm_hour = bcd2bin(ds1307->regs[5] & 0x3f); 678 t->time.tm_wday = bcd2bin(ds1307->regs[6] & 0x7) - 1; 679 t->time.tm_mday = bcd2bin(ds1307->regs[7] & 0x3f); 680 t->time.tm_mon = bcd2bin(ds1307->regs[8] & 0x1f) - 1; 681 t->time.tm_year = -1; 682 t->time.tm_yday = -1; 683 t->time.tm_isdst = -1; 684 685 dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d " 686 "enabled=%d polarity=%d irq=%d match=%d\n", __func__, 687 t->time.tm_sec, t->time.tm_min, t->time.tm_hour, 688 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled, 689 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_POL), 690 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_IF), 691 (ds1307->regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4); 692 693 return 0; 694 } 695 696 static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t) 697 { 698 struct i2c_client *client = to_i2c_client(dev); 699 struct ds1307 *ds1307 = i2c_get_clientdata(client); 700 unsigned char *regs = ds1307->regs; 701 int ret; 702 703 if (!test_bit(HAS_ALARM, &ds1307->flags)) 704 return -EINVAL; 705 706 dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d " 707 "enabled=%d pending=%d\n", __func__, 708 t->time.tm_sec, t->time.tm_min, t->time.tm_hour, 709 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, 710 t->enabled, t->pending); 711 712 /* Read control and alarm 0 registers. */ 713 ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs); 714 if (ret < 0) 715 return ret; 716 717 /* Set alarm 0, using 24-hour and day-of-month modes. */ 718 regs[3] = bin2bcd(t->time.tm_sec); 719 regs[4] = bin2bcd(t->time.tm_min); 720 regs[5] = bin2bcd(t->time.tm_hour); 721 regs[6] = bin2bcd(t->time.tm_wday) + 1; 722 regs[7] = bin2bcd(t->time.tm_mday); 723 regs[8] = bin2bcd(t->time.tm_mon) + 1; 724 725 /* Clear the alarm 0 interrupt flag. */ 726 regs[6] &= ~MCP794XX_BIT_ALMX_IF; 727 /* Set alarm match: second, minute, hour, day, date, month. */ 728 regs[6] |= MCP794XX_MSK_ALMX_MATCH; 729 /* Disable interrupt. We will not enable until completely programmed */ 730 regs[0] &= ~MCP794XX_BIT_ALM0_EN; 731 732 ret = ds1307->write_block_data(client, MCP794XX_REG_CONTROL, 10, regs); 733 if (ret < 0) 734 return ret; 735 736 if (!t->enabled) 737 return 0; 738 regs[0] |= MCP794XX_BIT_ALM0_EN; 739 return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, regs[0]); 740 } 741 742 static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled) 743 { 744 struct i2c_client *client = to_i2c_client(dev); 745 struct ds1307 *ds1307 = i2c_get_clientdata(client); 746 int reg; 747 748 if (!test_bit(HAS_ALARM, &ds1307->flags)) 749 return -EINVAL; 750 751 reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL); 752 if (reg < 0) 753 return reg; 754 755 if (enabled) 756 reg |= MCP794XX_BIT_ALM0_EN; 757 else 758 reg &= ~MCP794XX_BIT_ALM0_EN; 759 760 return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg); 761 } 762 763 static const struct rtc_class_ops mcp794xx_rtc_ops = { 764 .read_time = ds1307_get_time, 765 .set_time = ds1307_set_time, 766 .read_alarm = mcp794xx_read_alarm, 767 .set_alarm = mcp794xx_set_alarm, 768 .alarm_irq_enable = mcp794xx_alarm_irq_enable, 769 }; 770 771 /*----------------------------------------------------------------------*/ 772 773 static ssize_t 774 ds1307_nvram_read(struct file *filp, struct kobject *kobj, 775 struct bin_attribute *attr, 776 char *buf, loff_t off, size_t count) 777 { 778 struct i2c_client *client; 779 struct ds1307 *ds1307; 780 int result; 781 782 client = kobj_to_i2c_client(kobj); 783 ds1307 = i2c_get_clientdata(client); 784 785 result = ds1307->read_block_data(client, ds1307->nvram_offset + off, 786 count, buf); 787 if (result < 0) 788 dev_err(&client->dev, "%s error %d\n", "nvram read", result); 789 return result; 790 } 791 792 static ssize_t 793 ds1307_nvram_write(struct file *filp, struct kobject *kobj, 794 struct bin_attribute *attr, 795 char *buf, loff_t off, size_t count) 796 { 797 struct i2c_client *client; 798 struct ds1307 *ds1307; 799 int result; 800 801 client = kobj_to_i2c_client(kobj); 802 ds1307 = i2c_get_clientdata(client); 803 804 result = ds1307->write_block_data(client, ds1307->nvram_offset + off, 805 count, buf); 806 if (result < 0) { 807 dev_err(&client->dev, "%s error %d\n", "nvram write", result); 808 return result; 809 } 810 return count; 811 } 812 813 814 /*----------------------------------------------------------------------*/ 815 816 static u8 do_trickle_setup_ds1339(struct i2c_client *client, 817 uint32_t ohms, bool diode) 818 { 819 u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE : 820 DS1307_TRICKLE_CHARGER_NO_DIODE; 821 822 switch (ohms) { 823 case 250: 824 setup |= DS1307_TRICKLE_CHARGER_250_OHM; 825 break; 826 case 2000: 827 setup |= DS1307_TRICKLE_CHARGER_2K_OHM; 828 break; 829 case 4000: 830 setup |= DS1307_TRICKLE_CHARGER_4K_OHM; 831 break; 832 default: 833 dev_warn(&client->dev, 834 "Unsupported ohm value %u in dt\n", ohms); 835 return 0; 836 } 837 return setup; 838 } 839 840 static void ds1307_trickle_of_init(struct i2c_client *client, 841 struct chip_desc *chip) 842 { 843 uint32_t ohms = 0; 844 bool diode = true; 845 846 if (!chip->do_trickle_setup) 847 goto out; 848 if (of_property_read_u32(client->dev.of_node, "trickle-resistor-ohms" , &ohms)) 849 goto out; 850 if (of_property_read_bool(client->dev.of_node, "trickle-diode-disable")) 851 diode = false; 852 chip->trickle_charger_setup = chip->do_trickle_setup(client, 853 ohms, diode); 854 out: 855 return; 856 } 857 858 static int ds1307_probe(struct i2c_client *client, 859 const struct i2c_device_id *id) 860 { 861 struct ds1307 *ds1307; 862 int err = -ENODEV; 863 int tmp; 864 struct chip_desc *chip = &chips[id->driver_data]; 865 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); 866 bool want_irq = false; 867 unsigned char *buf; 868 struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev); 869 irq_handler_t irq_handler = ds1307_irq; 870 871 static const int bbsqi_bitpos[] = { 872 [ds_1337] = 0, 873 [ds_1339] = DS1339_BIT_BBSQI, 874 [ds_3231] = DS3231_BIT_BBSQW, 875 }; 876 const struct rtc_class_ops *rtc_ops = &ds13xx_rtc_ops; 877 878 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA) 879 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) 880 return -EIO; 881 882 ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL); 883 if (!ds1307) 884 return -ENOMEM; 885 886 i2c_set_clientdata(client, ds1307); 887 888 ds1307->client = client; 889 ds1307->type = id->driver_data; 890 891 if (!pdata && client->dev.of_node) 892 ds1307_trickle_of_init(client, chip); 893 else if (pdata && pdata->trickle_charger_setup) 894 chip->trickle_charger_setup = pdata->trickle_charger_setup; 895 896 if (chip->trickle_charger_setup && chip->trickle_charger_reg) { 897 dev_dbg(&client->dev, "writing trickle charger info 0x%x to 0x%x\n", 898 DS13XX_TRICKLE_CHARGER_MAGIC | chip->trickle_charger_setup, 899 chip->trickle_charger_reg); 900 i2c_smbus_write_byte_data(client, chip->trickle_charger_reg, 901 DS13XX_TRICKLE_CHARGER_MAGIC | 902 chip->trickle_charger_setup); 903 } 904 905 buf = ds1307->regs; 906 if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { 907 ds1307->read_block_data = ds1307_native_smbus_read_block_data; 908 ds1307->write_block_data = ds1307_native_smbus_write_block_data; 909 } else { 910 ds1307->read_block_data = ds1307_read_block_data; 911 ds1307->write_block_data = ds1307_write_block_data; 912 } 913 914 switch (ds1307->type) { 915 case ds_1337: 916 case ds_1339: 917 case ds_3231: 918 /* get registers that the "rtc" read below won't read... */ 919 tmp = ds1307->read_block_data(ds1307->client, 920 DS1337_REG_CONTROL, 2, buf); 921 if (tmp != 2) { 922 dev_dbg(&client->dev, "read error %d\n", tmp); 923 err = -EIO; 924 goto exit; 925 } 926 927 /* oscillator off? turn it on, so clock can tick. */ 928 if (ds1307->regs[0] & DS1337_BIT_nEOSC) 929 ds1307->regs[0] &= ~DS1337_BIT_nEOSC; 930 931 /* 932 * Using IRQ? Disable the square wave and both alarms. 933 * For some variants, be sure alarms can trigger when we're 934 * running on Vbackup (BBSQI/BBSQW) 935 */ 936 if (ds1307->client->irq > 0 && chip->alarm) { 937 ds1307->regs[0] |= DS1337_BIT_INTCN 938 | bbsqi_bitpos[ds1307->type]; 939 ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE); 940 941 want_irq = true; 942 } 943 944 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, 945 ds1307->regs[0]); 946 947 /* oscillator fault? clear flag, and warn */ 948 if (ds1307->regs[1] & DS1337_BIT_OSF) { 949 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, 950 ds1307->regs[1] & ~DS1337_BIT_OSF); 951 dev_warn(&client->dev, "SET TIME!\n"); 952 } 953 break; 954 955 case rx_8025: 956 tmp = i2c_smbus_read_i2c_block_data(ds1307->client, 957 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf); 958 if (tmp != 2) { 959 dev_dbg(&client->dev, "read error %d\n", tmp); 960 err = -EIO; 961 goto exit; 962 } 963 964 /* oscillator off? turn it on, so clock can tick. */ 965 if (!(ds1307->regs[1] & RX8025_BIT_XST)) { 966 ds1307->regs[1] |= RX8025_BIT_XST; 967 i2c_smbus_write_byte_data(client, 968 RX8025_REG_CTRL2 << 4 | 0x08, 969 ds1307->regs[1]); 970 dev_warn(&client->dev, 971 "oscillator stop detected - SET TIME!\n"); 972 } 973 974 if (ds1307->regs[1] & RX8025_BIT_PON) { 975 ds1307->regs[1] &= ~RX8025_BIT_PON; 976 i2c_smbus_write_byte_data(client, 977 RX8025_REG_CTRL2 << 4 | 0x08, 978 ds1307->regs[1]); 979 dev_warn(&client->dev, "power-on detected\n"); 980 } 981 982 if (ds1307->regs[1] & RX8025_BIT_VDET) { 983 ds1307->regs[1] &= ~RX8025_BIT_VDET; 984 i2c_smbus_write_byte_data(client, 985 RX8025_REG_CTRL2 << 4 | 0x08, 986 ds1307->regs[1]); 987 dev_warn(&client->dev, "voltage drop detected\n"); 988 } 989 990 /* make sure we are running in 24hour mode */ 991 if (!(ds1307->regs[0] & RX8025_BIT_2412)) { 992 u8 hour; 993 994 /* switch to 24 hour mode */ 995 i2c_smbus_write_byte_data(client, 996 RX8025_REG_CTRL1 << 4 | 0x08, 997 ds1307->regs[0] | 998 RX8025_BIT_2412); 999 1000 tmp = i2c_smbus_read_i2c_block_data(ds1307->client, 1001 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf); 1002 if (tmp != 2) { 1003 dev_dbg(&client->dev, "read error %d\n", tmp); 1004 err = -EIO; 1005 goto exit; 1006 } 1007 1008 /* correct hour */ 1009 hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]); 1010 if (hour == 12) 1011 hour = 0; 1012 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) 1013 hour += 12; 1014 1015 i2c_smbus_write_byte_data(client, 1016 DS1307_REG_HOUR << 4 | 0x08, 1017 hour); 1018 } 1019 break; 1020 case ds_1388: 1021 ds1307->offset = 1; /* Seconds starts at 1 */ 1022 break; 1023 case mcp794xx: 1024 rtc_ops = &mcp794xx_rtc_ops; 1025 if (ds1307->client->irq > 0 && chip->alarm) { 1026 irq_handler = mcp794xx_irq; 1027 want_irq = true; 1028 } 1029 break; 1030 default: 1031 break; 1032 } 1033 1034 read_rtc: 1035 /* read RTC registers */ 1036 tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf); 1037 if (tmp != 8) { 1038 dev_dbg(&client->dev, "read error %d\n", tmp); 1039 err = -EIO; 1040 goto exit; 1041 } 1042 1043 /* 1044 * minimal sanity checking; some chips (like DS1340) don't 1045 * specify the extra bits as must-be-zero, but there are 1046 * still a few values that are clearly out-of-range. 1047 */ 1048 tmp = ds1307->regs[DS1307_REG_SECS]; 1049 switch (ds1307->type) { 1050 case ds_1307: 1051 case m41t00: 1052 /* clock halted? turn it on, so clock can tick. */ 1053 if (tmp & DS1307_BIT_CH) { 1054 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); 1055 dev_warn(&client->dev, "SET TIME!\n"); 1056 goto read_rtc; 1057 } 1058 break; 1059 case ds_1338: 1060 /* clock halted? turn it on, so clock can tick. */ 1061 if (tmp & DS1307_BIT_CH) 1062 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); 1063 1064 /* oscillator fault? clear flag, and warn */ 1065 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) { 1066 i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL, 1067 ds1307->regs[DS1307_REG_CONTROL] 1068 & ~DS1338_BIT_OSF); 1069 dev_warn(&client->dev, "SET TIME!\n"); 1070 goto read_rtc; 1071 } 1072 break; 1073 case ds_1340: 1074 /* clock halted? turn it on, so clock can tick. */ 1075 if (tmp & DS1340_BIT_nEOSC) 1076 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); 1077 1078 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG); 1079 if (tmp < 0) { 1080 dev_dbg(&client->dev, "read error %d\n", tmp); 1081 err = -EIO; 1082 goto exit; 1083 } 1084 1085 /* oscillator fault? clear flag, and warn */ 1086 if (tmp & DS1340_BIT_OSF) { 1087 i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0); 1088 dev_warn(&client->dev, "SET TIME!\n"); 1089 } 1090 break; 1091 case mcp794xx: 1092 /* make sure that the backup battery is enabled */ 1093 if (!(ds1307->regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) { 1094 i2c_smbus_write_byte_data(client, DS1307_REG_WDAY, 1095 ds1307->regs[DS1307_REG_WDAY] 1096 | MCP794XX_BIT_VBATEN); 1097 } 1098 1099 /* clock halted? turn it on, so clock can tick. */ 1100 if (!(tmp & MCP794XX_BIT_ST)) { 1101 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 1102 MCP794XX_BIT_ST); 1103 dev_warn(&client->dev, "SET TIME!\n"); 1104 goto read_rtc; 1105 } 1106 1107 break; 1108 default: 1109 break; 1110 } 1111 1112 tmp = ds1307->regs[DS1307_REG_HOUR]; 1113 switch (ds1307->type) { 1114 case ds_1340: 1115 case m41t00: 1116 /* 1117 * NOTE: ignores century bits; fix before deploying 1118 * systems that will run through year 2100. 1119 */ 1120 break; 1121 case rx_8025: 1122 break; 1123 default: 1124 if (!(tmp & DS1307_BIT_12HR)) 1125 break; 1126 1127 /* 1128 * Be sure we're in 24 hour mode. Multi-master systems 1129 * take note... 1130 */ 1131 tmp = bcd2bin(tmp & 0x1f); 1132 if (tmp == 12) 1133 tmp = 0; 1134 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) 1135 tmp += 12; 1136 i2c_smbus_write_byte_data(client, 1137 ds1307->offset + DS1307_REG_HOUR, 1138 bin2bcd(tmp)); 1139 } 1140 1141 device_set_wakeup_capable(&client->dev, want_irq); 1142 ds1307->rtc = devm_rtc_device_register(&client->dev, client->name, 1143 rtc_ops, THIS_MODULE); 1144 if (IS_ERR(ds1307->rtc)) { 1145 return PTR_ERR(ds1307->rtc); 1146 } 1147 1148 if (want_irq) { 1149 struct device_node *node = client->dev.of_node; 1150 1151 err = devm_request_threaded_irq(&client->dev, 1152 client->irq, NULL, irq_handler, 1153 IRQF_SHARED | IRQF_ONESHOT, 1154 ds1307->rtc->name, client); 1155 if (err) { 1156 client->irq = 0; 1157 dev_err(&client->dev, "unable to request IRQ!\n"); 1158 goto no_irq; 1159 } 1160 1161 set_bit(HAS_ALARM, &ds1307->flags); 1162 dev_dbg(&client->dev, "got IRQ %d\n", client->irq); 1163 1164 /* Currently supported by OF code only! */ 1165 if (!node) 1166 goto no_irq; 1167 1168 err = of_irq_get(node, 1); 1169 if (err <= 0) { 1170 if (err == -EPROBE_DEFER) 1171 goto exit; 1172 goto no_irq; 1173 } 1174 ds1307->wakeirq = err; 1175 1176 err = dev_pm_set_dedicated_wake_irq(&client->dev, 1177 ds1307->wakeirq); 1178 if (err) { 1179 dev_err(&client->dev, "unable to setup wakeIRQ %d!\n", 1180 err); 1181 goto exit; 1182 } 1183 } 1184 1185 no_irq: 1186 if (chip->nvram_size) { 1187 1188 ds1307->nvram = devm_kzalloc(&client->dev, 1189 sizeof(struct bin_attribute), 1190 GFP_KERNEL); 1191 if (!ds1307->nvram) { 1192 dev_err(&client->dev, "cannot allocate memory for nvram sysfs\n"); 1193 } else { 1194 1195 ds1307->nvram->attr.name = "nvram"; 1196 ds1307->nvram->attr.mode = S_IRUGO | S_IWUSR; 1197 1198 sysfs_bin_attr_init(ds1307->nvram); 1199 1200 ds1307->nvram->read = ds1307_nvram_read; 1201 ds1307->nvram->write = ds1307_nvram_write; 1202 ds1307->nvram->size = chip->nvram_size; 1203 ds1307->nvram_offset = chip->nvram_offset; 1204 1205 err = sysfs_create_bin_file(&client->dev.kobj, 1206 ds1307->nvram); 1207 if (err) { 1208 dev_err(&client->dev, 1209 "unable to create sysfs file: %s\n", 1210 ds1307->nvram->attr.name); 1211 } else { 1212 set_bit(HAS_NVRAM, &ds1307->flags); 1213 dev_info(&client->dev, "%zu bytes nvram\n", 1214 ds1307->nvram->size); 1215 } 1216 } 1217 } 1218 1219 return 0; 1220 1221 exit: 1222 return err; 1223 } 1224 1225 static int ds1307_remove(struct i2c_client *client) 1226 { 1227 struct ds1307 *ds1307 = i2c_get_clientdata(client); 1228 1229 if (ds1307->wakeirq) 1230 dev_pm_clear_wake_irq(&client->dev); 1231 1232 if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags)) 1233 sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram); 1234 1235 return 0; 1236 } 1237 1238 static struct i2c_driver ds1307_driver = { 1239 .driver = { 1240 .name = "rtc-ds1307", 1241 }, 1242 .probe = ds1307_probe, 1243 .remove = ds1307_remove, 1244 .id_table = ds1307_id, 1245 }; 1246 1247 module_i2c_driver(ds1307_driver); 1248 1249 MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips"); 1250 MODULE_LICENSE("GPL"); 1251