1 /* 2 * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips. 3 * 4 * Copyright (C) 2005 James Chapman (ds1337 core) 5 * Copyright (C) 2006 David Brownell 6 * Copyright (C) 2009 Matthias Fuchs (rx8025 support) 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/module.h> 14 #include <linux/init.h> 15 #include <linux/slab.h> 16 #include <linux/i2c.h> 17 #include <linux/string.h> 18 #include <linux/rtc.h> 19 #include <linux/bcd.h> 20 #include <linux/rtc/ds1307.h> 21 22 /* 23 * We can't determine type by probing, but if we expect pre-Linux code 24 * to have set the chip up as a clock (turning on the oscillator and 25 * setting the date and time), Linux can ignore the non-clock features. 26 * That's a natural job for a factory or repair bench. 27 */ 28 enum ds_type { 29 ds_1307, 30 ds_1337, 31 ds_1338, 32 ds_1339, 33 ds_1340, 34 ds_1388, 35 ds_3231, 36 m41t00, 37 mcp7941x, 38 rx_8025, 39 last_ds_type /* always last */ 40 /* rs5c372 too? different address... */ 41 }; 42 43 44 /* RTC registers don't differ much, except for the century flag */ 45 #define DS1307_REG_SECS 0x00 /* 00-59 */ 46 # define DS1307_BIT_CH 0x80 47 # define DS1340_BIT_nEOSC 0x80 48 # define MCP7941X_BIT_ST 0x80 49 #define DS1307_REG_MIN 0x01 /* 00-59 */ 50 #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */ 51 # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */ 52 # define DS1307_BIT_PM 0x20 /* in REG_HOUR */ 53 # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */ 54 # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */ 55 #define DS1307_REG_WDAY 0x03 /* 01-07 */ 56 # define MCP7941X_BIT_VBATEN 0x08 57 #define DS1307_REG_MDAY 0x04 /* 01-31 */ 58 #define DS1307_REG_MONTH 0x05 /* 01-12 */ 59 # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */ 60 #define DS1307_REG_YEAR 0x06 /* 00-99 */ 61 62 /* 63 * Other registers (control, status, alarms, trickle charge, NVRAM, etc) 64 * start at 7, and they differ a LOT. Only control and status matter for 65 * basic RTC date and time functionality; be careful using them. 66 */ 67 #define DS1307_REG_CONTROL 0x07 /* or ds1338 */ 68 # define DS1307_BIT_OUT 0x80 69 # define DS1338_BIT_OSF 0x20 70 # define DS1307_BIT_SQWE 0x10 71 # define DS1307_BIT_RS1 0x02 72 # define DS1307_BIT_RS0 0x01 73 #define DS1337_REG_CONTROL 0x0e 74 # define DS1337_BIT_nEOSC 0x80 75 # define DS1339_BIT_BBSQI 0x20 76 # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */ 77 # define DS1337_BIT_RS2 0x10 78 # define DS1337_BIT_RS1 0x08 79 # define DS1337_BIT_INTCN 0x04 80 # define DS1337_BIT_A2IE 0x02 81 # define DS1337_BIT_A1IE 0x01 82 #define DS1340_REG_CONTROL 0x07 83 # define DS1340_BIT_OUT 0x80 84 # define DS1340_BIT_FT 0x40 85 # define DS1340_BIT_CALIB_SIGN 0x20 86 # define DS1340_M_CALIBRATION 0x1f 87 #define DS1340_REG_FLAG 0x09 88 # define DS1340_BIT_OSF 0x80 89 #define DS1337_REG_STATUS 0x0f 90 # define DS1337_BIT_OSF 0x80 91 # define DS1337_BIT_A2I 0x02 92 # define DS1337_BIT_A1I 0x01 93 #define DS1339_REG_ALARM1_SECS 0x07 94 95 #define DS13XX_TRICKLE_CHARGER_MAGIC 0xa0 96 97 #define RX8025_REG_CTRL1 0x0e 98 # define RX8025_BIT_2412 0x20 99 #define RX8025_REG_CTRL2 0x0f 100 # define RX8025_BIT_PON 0x10 101 # define RX8025_BIT_VDET 0x40 102 # define RX8025_BIT_XST 0x20 103 104 105 struct ds1307 { 106 u8 offset; /* register's offset */ 107 u8 regs[11]; 108 u16 nvram_offset; 109 struct bin_attribute *nvram; 110 enum ds_type type; 111 unsigned long flags; 112 #define HAS_NVRAM 0 /* bit 0 == sysfs file active */ 113 #define HAS_ALARM 1 /* bit 1 == irq claimed */ 114 struct i2c_client *client; 115 struct rtc_device *rtc; 116 struct work_struct work; 117 s32 (*read_block_data)(const struct i2c_client *client, u8 command, 118 u8 length, u8 *values); 119 s32 (*write_block_data)(const struct i2c_client *client, u8 command, 120 u8 length, const u8 *values); 121 }; 122 123 struct chip_desc { 124 unsigned alarm:1; 125 u16 nvram_offset; 126 u16 nvram_size; 127 u16 trickle_charger_reg; 128 }; 129 130 static const struct chip_desc chips[last_ds_type] = { 131 [ds_1307] = { 132 .nvram_offset = 8, 133 .nvram_size = 56, 134 }, 135 [ds_1337] = { 136 .alarm = 1, 137 }, 138 [ds_1338] = { 139 .nvram_offset = 8, 140 .nvram_size = 56, 141 }, 142 [ds_1339] = { 143 .alarm = 1, 144 .trickle_charger_reg = 0x10, 145 }, 146 [ds_1340] = { 147 .trickle_charger_reg = 0x08, 148 }, 149 [ds_1388] = { 150 .trickle_charger_reg = 0x0a, 151 }, 152 [ds_3231] = { 153 .alarm = 1, 154 }, 155 [mcp7941x] = { 156 /* this is battery backed SRAM */ 157 .nvram_offset = 0x20, 158 .nvram_size = 0x40, 159 }, 160 }; 161 162 static const struct i2c_device_id ds1307_id[] = { 163 { "ds1307", ds_1307 }, 164 { "ds1337", ds_1337 }, 165 { "ds1338", ds_1338 }, 166 { "ds1339", ds_1339 }, 167 { "ds1388", ds_1388 }, 168 { "ds1340", ds_1340 }, 169 { "ds3231", ds_3231 }, 170 { "m41t00", m41t00 }, 171 { "mcp7941x", mcp7941x }, 172 { "pt7c4338", ds_1307 }, 173 { "rx8025", rx_8025 }, 174 { } 175 }; 176 MODULE_DEVICE_TABLE(i2c, ds1307_id); 177 178 /*----------------------------------------------------------------------*/ 179 180 #define BLOCK_DATA_MAX_TRIES 10 181 182 static s32 ds1307_read_block_data_once(const struct i2c_client *client, 183 u8 command, u8 length, u8 *values) 184 { 185 s32 i, data; 186 187 for (i = 0; i < length; i++) { 188 data = i2c_smbus_read_byte_data(client, command + i); 189 if (data < 0) 190 return data; 191 values[i] = data; 192 } 193 return i; 194 } 195 196 static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command, 197 u8 length, u8 *values) 198 { 199 u8 oldvalues[I2C_SMBUS_BLOCK_MAX]; 200 s32 ret; 201 int tries = 0; 202 203 dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length); 204 ret = ds1307_read_block_data_once(client, command, length, values); 205 if (ret < 0) 206 return ret; 207 do { 208 if (++tries > BLOCK_DATA_MAX_TRIES) { 209 dev_err(&client->dev, 210 "ds1307_read_block_data failed\n"); 211 return -EIO; 212 } 213 memcpy(oldvalues, values, length); 214 ret = ds1307_read_block_data_once(client, command, length, 215 values); 216 if (ret < 0) 217 return ret; 218 } while (memcmp(oldvalues, values, length)); 219 return length; 220 } 221 222 static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command, 223 u8 length, const u8 *values) 224 { 225 u8 currvalues[I2C_SMBUS_BLOCK_MAX]; 226 int tries = 0; 227 228 dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length); 229 do { 230 s32 i, ret; 231 232 if (++tries > BLOCK_DATA_MAX_TRIES) { 233 dev_err(&client->dev, 234 "ds1307_write_block_data failed\n"); 235 return -EIO; 236 } 237 for (i = 0; i < length; i++) { 238 ret = i2c_smbus_write_byte_data(client, command + i, 239 values[i]); 240 if (ret < 0) 241 return ret; 242 } 243 ret = ds1307_read_block_data_once(client, command, length, 244 currvalues); 245 if (ret < 0) 246 return ret; 247 } while (memcmp(currvalues, values, length)); 248 return length; 249 } 250 251 /*----------------------------------------------------------------------*/ 252 253 /* 254 * The IRQ logic includes a "real" handler running in IRQ context just 255 * long enough to schedule this workqueue entry. We need a task context 256 * to talk to the RTC, since I2C I/O calls require that; and disable the 257 * IRQ until we clear its status on the chip, so that this handler can 258 * work with any type of triggering (not just falling edge). 259 * 260 * The ds1337 and ds1339 both have two alarms, but we only use the first 261 * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm 262 * signal; ds1339 chips have only one alarm signal. 263 */ 264 static void ds1307_work(struct work_struct *work) 265 { 266 struct ds1307 *ds1307; 267 struct i2c_client *client; 268 struct mutex *lock; 269 int stat, control; 270 271 ds1307 = container_of(work, struct ds1307, work); 272 client = ds1307->client; 273 lock = &ds1307->rtc->ops_lock; 274 275 mutex_lock(lock); 276 stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS); 277 if (stat < 0) 278 goto out; 279 280 if (stat & DS1337_BIT_A1I) { 281 stat &= ~DS1337_BIT_A1I; 282 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat); 283 284 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); 285 if (control < 0) 286 goto out; 287 288 control &= ~DS1337_BIT_A1IE; 289 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control); 290 291 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF); 292 } 293 294 out: 295 if (test_bit(HAS_ALARM, &ds1307->flags)) 296 enable_irq(client->irq); 297 mutex_unlock(lock); 298 } 299 300 static irqreturn_t ds1307_irq(int irq, void *dev_id) 301 { 302 struct i2c_client *client = dev_id; 303 struct ds1307 *ds1307 = i2c_get_clientdata(client); 304 305 disable_irq_nosync(irq); 306 schedule_work(&ds1307->work); 307 return IRQ_HANDLED; 308 } 309 310 /*----------------------------------------------------------------------*/ 311 312 static int ds1307_get_time(struct device *dev, struct rtc_time *t) 313 { 314 struct ds1307 *ds1307 = dev_get_drvdata(dev); 315 int tmp; 316 317 /* read the RTC date and time registers all at once */ 318 tmp = ds1307->read_block_data(ds1307->client, 319 ds1307->offset, 7, ds1307->regs); 320 if (tmp != 7) { 321 dev_err(dev, "%s error %d\n", "read", tmp); 322 return -EIO; 323 } 324 325 dev_dbg(dev, "%s: %7ph\n", "read", ds1307->regs); 326 327 t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f); 328 t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f); 329 tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f; 330 t->tm_hour = bcd2bin(tmp); 331 t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1; 332 t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f); 333 tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f; 334 t->tm_mon = bcd2bin(tmp) - 1; 335 336 /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */ 337 t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100; 338 339 dev_dbg(dev, "%s secs=%d, mins=%d, " 340 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", 341 "read", t->tm_sec, t->tm_min, 342 t->tm_hour, t->tm_mday, 343 t->tm_mon, t->tm_year, t->tm_wday); 344 345 /* initial clock setting can be undefined */ 346 return rtc_valid_tm(t); 347 } 348 349 static int ds1307_set_time(struct device *dev, struct rtc_time *t) 350 { 351 struct ds1307 *ds1307 = dev_get_drvdata(dev); 352 int result; 353 int tmp; 354 u8 *buf = ds1307->regs; 355 356 dev_dbg(dev, "%s secs=%d, mins=%d, " 357 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", 358 "write", t->tm_sec, t->tm_min, 359 t->tm_hour, t->tm_mday, 360 t->tm_mon, t->tm_year, t->tm_wday); 361 362 buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec); 363 buf[DS1307_REG_MIN] = bin2bcd(t->tm_min); 364 buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour); 365 buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1); 366 buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday); 367 buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1); 368 369 /* assume 20YY not 19YY */ 370 tmp = t->tm_year - 100; 371 buf[DS1307_REG_YEAR] = bin2bcd(tmp); 372 373 switch (ds1307->type) { 374 case ds_1337: 375 case ds_1339: 376 case ds_3231: 377 buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY; 378 break; 379 case ds_1340: 380 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN 381 | DS1340_BIT_CENTURY; 382 break; 383 case mcp7941x: 384 /* 385 * these bits were cleared when preparing the date/time 386 * values and need to be set again before writing the 387 * buffer out to the device. 388 */ 389 buf[DS1307_REG_SECS] |= MCP7941X_BIT_ST; 390 buf[DS1307_REG_WDAY] |= MCP7941X_BIT_VBATEN; 391 break; 392 default: 393 break; 394 } 395 396 dev_dbg(dev, "%s: %7ph\n", "write", buf); 397 398 result = ds1307->write_block_data(ds1307->client, 399 ds1307->offset, 7, buf); 400 if (result < 0) { 401 dev_err(dev, "%s error %d\n", "write", result); 402 return result; 403 } 404 return 0; 405 } 406 407 static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t) 408 { 409 struct i2c_client *client = to_i2c_client(dev); 410 struct ds1307 *ds1307 = i2c_get_clientdata(client); 411 int ret; 412 413 if (!test_bit(HAS_ALARM, &ds1307->flags)) 414 return -EINVAL; 415 416 /* read all ALARM1, ALARM2, and status registers at once */ 417 ret = ds1307->read_block_data(client, 418 DS1339_REG_ALARM1_SECS, 9, ds1307->regs); 419 if (ret != 9) { 420 dev_err(dev, "%s error %d\n", "alarm read", ret); 421 return -EIO; 422 } 423 424 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", 425 "alarm read", 426 ds1307->regs[0], ds1307->regs[1], 427 ds1307->regs[2], ds1307->regs[3], 428 ds1307->regs[4], ds1307->regs[5], 429 ds1307->regs[6], ds1307->regs[7], 430 ds1307->regs[8]); 431 432 /* 433 * report alarm time (ALARM1); assume 24 hour and day-of-month modes, 434 * and that all four fields are checked matches 435 */ 436 t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f); 437 t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f); 438 t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f); 439 t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f); 440 t->time.tm_mon = -1; 441 t->time.tm_year = -1; 442 t->time.tm_wday = -1; 443 t->time.tm_yday = -1; 444 t->time.tm_isdst = -1; 445 446 /* ... and status */ 447 t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE); 448 t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I); 449 450 dev_dbg(dev, "%s secs=%d, mins=%d, " 451 "hours=%d, mday=%d, enabled=%d, pending=%d\n", 452 "alarm read", t->time.tm_sec, t->time.tm_min, 453 t->time.tm_hour, t->time.tm_mday, 454 t->enabled, t->pending); 455 456 return 0; 457 } 458 459 static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t) 460 { 461 struct i2c_client *client = to_i2c_client(dev); 462 struct ds1307 *ds1307 = i2c_get_clientdata(client); 463 unsigned char *buf = ds1307->regs; 464 u8 control, status; 465 int ret; 466 467 if (!test_bit(HAS_ALARM, &ds1307->flags)) 468 return -EINVAL; 469 470 dev_dbg(dev, "%s secs=%d, mins=%d, " 471 "hours=%d, mday=%d, enabled=%d, pending=%d\n", 472 "alarm set", t->time.tm_sec, t->time.tm_min, 473 t->time.tm_hour, t->time.tm_mday, 474 t->enabled, t->pending); 475 476 /* read current status of both alarms and the chip */ 477 ret = ds1307->read_block_data(client, 478 DS1339_REG_ALARM1_SECS, 9, buf); 479 if (ret != 9) { 480 dev_err(dev, "%s error %d\n", "alarm write", ret); 481 return -EIO; 482 } 483 control = ds1307->regs[7]; 484 status = ds1307->regs[8]; 485 486 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", 487 "alarm set (old status)", 488 ds1307->regs[0], ds1307->regs[1], 489 ds1307->regs[2], ds1307->regs[3], 490 ds1307->regs[4], ds1307->regs[5], 491 ds1307->regs[6], control, status); 492 493 /* set ALARM1, using 24 hour and day-of-month modes */ 494 buf[0] = bin2bcd(t->time.tm_sec); 495 buf[1] = bin2bcd(t->time.tm_min); 496 buf[2] = bin2bcd(t->time.tm_hour); 497 buf[3] = bin2bcd(t->time.tm_mday); 498 499 /* set ALARM2 to non-garbage */ 500 buf[4] = 0; 501 buf[5] = 0; 502 buf[6] = 0; 503 504 /* optionally enable ALARM1 */ 505 buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE); 506 if (t->enabled) { 507 dev_dbg(dev, "alarm IRQ armed\n"); 508 buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */ 509 } 510 buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I); 511 512 ret = ds1307->write_block_data(client, 513 DS1339_REG_ALARM1_SECS, 9, buf); 514 if (ret < 0) { 515 dev_err(dev, "can't set alarm time\n"); 516 return ret; 517 } 518 519 return 0; 520 } 521 522 static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled) 523 { 524 struct i2c_client *client = to_i2c_client(dev); 525 struct ds1307 *ds1307 = i2c_get_clientdata(client); 526 int ret; 527 528 if (!test_bit(HAS_ALARM, &ds1307->flags)) 529 return -ENOTTY; 530 531 ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); 532 if (ret < 0) 533 return ret; 534 535 if (enabled) 536 ret |= DS1337_BIT_A1IE; 537 else 538 ret &= ~DS1337_BIT_A1IE; 539 540 ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret); 541 if (ret < 0) 542 return ret; 543 544 return 0; 545 } 546 547 static const struct rtc_class_ops ds13xx_rtc_ops = { 548 .read_time = ds1307_get_time, 549 .set_time = ds1307_set_time, 550 .read_alarm = ds1337_read_alarm, 551 .set_alarm = ds1337_set_alarm, 552 .alarm_irq_enable = ds1307_alarm_irq_enable, 553 }; 554 555 /*----------------------------------------------------------------------*/ 556 557 static ssize_t 558 ds1307_nvram_read(struct file *filp, struct kobject *kobj, 559 struct bin_attribute *attr, 560 char *buf, loff_t off, size_t count) 561 { 562 struct i2c_client *client; 563 struct ds1307 *ds1307; 564 int result; 565 566 client = kobj_to_i2c_client(kobj); 567 ds1307 = i2c_get_clientdata(client); 568 569 if (unlikely(off >= ds1307->nvram->size)) 570 return 0; 571 if ((off + count) > ds1307->nvram->size) 572 count = ds1307->nvram->size - off; 573 if (unlikely(!count)) 574 return count; 575 576 result = ds1307->read_block_data(client, ds1307->nvram_offset + off, 577 count, buf); 578 if (result < 0) 579 dev_err(&client->dev, "%s error %d\n", "nvram read", result); 580 return result; 581 } 582 583 static ssize_t 584 ds1307_nvram_write(struct file *filp, struct kobject *kobj, 585 struct bin_attribute *attr, 586 char *buf, loff_t off, size_t count) 587 { 588 struct i2c_client *client; 589 struct ds1307 *ds1307; 590 int result; 591 592 client = kobj_to_i2c_client(kobj); 593 ds1307 = i2c_get_clientdata(client); 594 595 if (unlikely(off >= ds1307->nvram->size)) 596 return -EFBIG; 597 if ((off + count) > ds1307->nvram->size) 598 count = ds1307->nvram->size - off; 599 if (unlikely(!count)) 600 return count; 601 602 result = ds1307->write_block_data(client, ds1307->nvram_offset + off, 603 count, buf); 604 if (result < 0) { 605 dev_err(&client->dev, "%s error %d\n", "nvram write", result); 606 return result; 607 } 608 return count; 609 } 610 611 /*----------------------------------------------------------------------*/ 612 613 static int ds1307_probe(struct i2c_client *client, 614 const struct i2c_device_id *id) 615 { 616 struct ds1307 *ds1307; 617 int err = -ENODEV; 618 int tmp; 619 const struct chip_desc *chip = &chips[id->driver_data]; 620 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); 621 int want_irq = false; 622 unsigned char *buf; 623 struct ds1307_platform_data *pdata = client->dev.platform_data; 624 static const int bbsqi_bitpos[] = { 625 [ds_1337] = 0, 626 [ds_1339] = DS1339_BIT_BBSQI, 627 [ds_3231] = DS3231_BIT_BBSQW, 628 }; 629 630 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA) 631 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) 632 return -EIO; 633 634 ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL); 635 if (!ds1307) 636 return -ENOMEM; 637 638 i2c_set_clientdata(client, ds1307); 639 640 ds1307->client = client; 641 ds1307->type = id->driver_data; 642 643 if (pdata && pdata->trickle_charger_setup && chip->trickle_charger_reg) 644 i2c_smbus_write_byte_data(client, chip->trickle_charger_reg, 645 DS13XX_TRICKLE_CHARGER_MAGIC | pdata->trickle_charger_setup); 646 647 buf = ds1307->regs; 648 if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { 649 ds1307->read_block_data = i2c_smbus_read_i2c_block_data; 650 ds1307->write_block_data = i2c_smbus_write_i2c_block_data; 651 } else { 652 ds1307->read_block_data = ds1307_read_block_data; 653 ds1307->write_block_data = ds1307_write_block_data; 654 } 655 656 switch (ds1307->type) { 657 case ds_1337: 658 case ds_1339: 659 case ds_3231: 660 /* get registers that the "rtc" read below won't read... */ 661 tmp = ds1307->read_block_data(ds1307->client, 662 DS1337_REG_CONTROL, 2, buf); 663 if (tmp != 2) { 664 pr_debug("read error %d\n", tmp); 665 err = -EIO; 666 goto exit_free; 667 } 668 669 /* oscillator off? turn it on, so clock can tick. */ 670 if (ds1307->regs[0] & DS1337_BIT_nEOSC) 671 ds1307->regs[0] &= ~DS1337_BIT_nEOSC; 672 673 /* 674 * Using IRQ? Disable the square wave and both alarms. 675 * For some variants, be sure alarms can trigger when we're 676 * running on Vbackup (BBSQI/BBSQW) 677 */ 678 if (ds1307->client->irq > 0 && chip->alarm) { 679 INIT_WORK(&ds1307->work, ds1307_work); 680 681 ds1307->regs[0] |= DS1337_BIT_INTCN 682 | bbsqi_bitpos[ds1307->type]; 683 ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE); 684 685 want_irq = true; 686 } 687 688 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, 689 ds1307->regs[0]); 690 691 /* oscillator fault? clear flag, and warn */ 692 if (ds1307->regs[1] & DS1337_BIT_OSF) { 693 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, 694 ds1307->regs[1] & ~DS1337_BIT_OSF); 695 dev_warn(&client->dev, "SET TIME!\n"); 696 } 697 break; 698 699 case rx_8025: 700 tmp = i2c_smbus_read_i2c_block_data(ds1307->client, 701 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf); 702 if (tmp != 2) { 703 pr_debug("read error %d\n", tmp); 704 err = -EIO; 705 goto exit_free; 706 } 707 708 /* oscillator off? turn it on, so clock can tick. */ 709 if (!(ds1307->regs[1] & RX8025_BIT_XST)) { 710 ds1307->regs[1] |= RX8025_BIT_XST; 711 i2c_smbus_write_byte_data(client, 712 RX8025_REG_CTRL2 << 4 | 0x08, 713 ds1307->regs[1]); 714 dev_warn(&client->dev, 715 "oscillator stop detected - SET TIME!\n"); 716 } 717 718 if (ds1307->regs[1] & RX8025_BIT_PON) { 719 ds1307->regs[1] &= ~RX8025_BIT_PON; 720 i2c_smbus_write_byte_data(client, 721 RX8025_REG_CTRL2 << 4 | 0x08, 722 ds1307->regs[1]); 723 dev_warn(&client->dev, "power-on detected\n"); 724 } 725 726 if (ds1307->regs[1] & RX8025_BIT_VDET) { 727 ds1307->regs[1] &= ~RX8025_BIT_VDET; 728 i2c_smbus_write_byte_data(client, 729 RX8025_REG_CTRL2 << 4 | 0x08, 730 ds1307->regs[1]); 731 dev_warn(&client->dev, "voltage drop detected\n"); 732 } 733 734 /* make sure we are running in 24hour mode */ 735 if (!(ds1307->regs[0] & RX8025_BIT_2412)) { 736 u8 hour; 737 738 /* switch to 24 hour mode */ 739 i2c_smbus_write_byte_data(client, 740 RX8025_REG_CTRL1 << 4 | 0x08, 741 ds1307->regs[0] | 742 RX8025_BIT_2412); 743 744 tmp = i2c_smbus_read_i2c_block_data(ds1307->client, 745 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf); 746 if (tmp != 2) { 747 pr_debug("read error %d\n", tmp); 748 err = -EIO; 749 goto exit_free; 750 } 751 752 /* correct hour */ 753 hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]); 754 if (hour == 12) 755 hour = 0; 756 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) 757 hour += 12; 758 759 i2c_smbus_write_byte_data(client, 760 DS1307_REG_HOUR << 4 | 0x08, 761 hour); 762 } 763 break; 764 case ds_1388: 765 ds1307->offset = 1; /* Seconds starts at 1 */ 766 break; 767 default: 768 break; 769 } 770 771 read_rtc: 772 /* read RTC registers */ 773 tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf); 774 if (tmp != 8) { 775 pr_debug("read error %d\n", tmp); 776 err = -EIO; 777 goto exit_free; 778 } 779 780 /* 781 * minimal sanity checking; some chips (like DS1340) don't 782 * specify the extra bits as must-be-zero, but there are 783 * still a few values that are clearly out-of-range. 784 */ 785 tmp = ds1307->regs[DS1307_REG_SECS]; 786 switch (ds1307->type) { 787 case ds_1307: 788 case m41t00: 789 /* clock halted? turn it on, so clock can tick. */ 790 if (tmp & DS1307_BIT_CH) { 791 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); 792 dev_warn(&client->dev, "SET TIME!\n"); 793 goto read_rtc; 794 } 795 break; 796 case ds_1338: 797 /* clock halted? turn it on, so clock can tick. */ 798 if (tmp & DS1307_BIT_CH) 799 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); 800 801 /* oscillator fault? clear flag, and warn */ 802 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) { 803 i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL, 804 ds1307->regs[DS1307_REG_CONTROL] 805 & ~DS1338_BIT_OSF); 806 dev_warn(&client->dev, "SET TIME!\n"); 807 goto read_rtc; 808 } 809 break; 810 case ds_1340: 811 /* clock halted? turn it on, so clock can tick. */ 812 if (tmp & DS1340_BIT_nEOSC) 813 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); 814 815 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG); 816 if (tmp < 0) { 817 pr_debug("read error %d\n", tmp); 818 err = -EIO; 819 goto exit_free; 820 } 821 822 /* oscillator fault? clear flag, and warn */ 823 if (tmp & DS1340_BIT_OSF) { 824 i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0); 825 dev_warn(&client->dev, "SET TIME!\n"); 826 } 827 break; 828 case mcp7941x: 829 /* make sure that the backup battery is enabled */ 830 if (!(ds1307->regs[DS1307_REG_WDAY] & MCP7941X_BIT_VBATEN)) { 831 i2c_smbus_write_byte_data(client, DS1307_REG_WDAY, 832 ds1307->regs[DS1307_REG_WDAY] 833 | MCP7941X_BIT_VBATEN); 834 } 835 836 /* clock halted? turn it on, so clock can tick. */ 837 if (!(tmp & MCP7941X_BIT_ST)) { 838 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 839 MCP7941X_BIT_ST); 840 dev_warn(&client->dev, "SET TIME!\n"); 841 goto read_rtc; 842 } 843 844 break; 845 default: 846 break; 847 } 848 849 tmp = ds1307->regs[DS1307_REG_HOUR]; 850 switch (ds1307->type) { 851 case ds_1340: 852 case m41t00: 853 /* 854 * NOTE: ignores century bits; fix before deploying 855 * systems that will run through year 2100. 856 */ 857 break; 858 case rx_8025: 859 break; 860 default: 861 if (!(tmp & DS1307_BIT_12HR)) 862 break; 863 864 /* 865 * Be sure we're in 24 hour mode. Multi-master systems 866 * take note... 867 */ 868 tmp = bcd2bin(tmp & 0x1f); 869 if (tmp == 12) 870 tmp = 0; 871 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) 872 tmp += 12; 873 i2c_smbus_write_byte_data(client, 874 ds1307->offset + DS1307_REG_HOUR, 875 bin2bcd(tmp)); 876 } 877 878 ds1307->rtc = rtc_device_register(client->name, &client->dev, 879 &ds13xx_rtc_ops, THIS_MODULE); 880 if (IS_ERR(ds1307->rtc)) { 881 err = PTR_ERR(ds1307->rtc); 882 dev_err(&client->dev, 883 "unable to register the class device\n"); 884 goto exit_free; 885 } 886 887 if (want_irq) { 888 err = request_irq(client->irq, ds1307_irq, IRQF_SHARED, 889 ds1307->rtc->name, client); 890 if (err) { 891 dev_err(&client->dev, 892 "unable to request IRQ!\n"); 893 goto exit_irq; 894 } 895 896 device_set_wakeup_capable(&client->dev, 1); 897 set_bit(HAS_ALARM, &ds1307->flags); 898 dev_dbg(&client->dev, "got IRQ %d\n", client->irq); 899 } 900 901 if (chip->nvram_size) { 902 ds1307->nvram = kzalloc(sizeof(struct bin_attribute), 903 GFP_KERNEL); 904 if (!ds1307->nvram) { 905 err = -ENOMEM; 906 goto exit_nvram; 907 } 908 ds1307->nvram->attr.name = "nvram"; 909 ds1307->nvram->attr.mode = S_IRUGO | S_IWUSR; 910 sysfs_bin_attr_init(ds1307->nvram); 911 ds1307->nvram->read = ds1307_nvram_read, 912 ds1307->nvram->write = ds1307_nvram_write, 913 ds1307->nvram->size = chip->nvram_size; 914 ds1307->nvram_offset = chip->nvram_offset; 915 err = sysfs_create_bin_file(&client->dev.kobj, ds1307->nvram); 916 if (err) { 917 kfree(ds1307->nvram); 918 goto exit_nvram; 919 } 920 set_bit(HAS_NVRAM, &ds1307->flags); 921 dev_info(&client->dev, "%zu bytes nvram\n", ds1307->nvram->size); 922 } 923 924 return 0; 925 926 exit_nvram: 927 exit_irq: 928 rtc_device_unregister(ds1307->rtc); 929 exit_free: 930 kfree(ds1307); 931 return err; 932 } 933 934 static int ds1307_remove(struct i2c_client *client) 935 { 936 struct ds1307 *ds1307 = i2c_get_clientdata(client); 937 938 if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) { 939 free_irq(client->irq, client); 940 cancel_work_sync(&ds1307->work); 941 } 942 943 if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags)) { 944 sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram); 945 kfree(ds1307->nvram); 946 } 947 948 rtc_device_unregister(ds1307->rtc); 949 kfree(ds1307); 950 return 0; 951 } 952 953 static struct i2c_driver ds1307_driver = { 954 .driver = { 955 .name = "rtc-ds1307", 956 .owner = THIS_MODULE, 957 }, 958 .probe = ds1307_probe, 959 .remove = ds1307_remove, 960 .id_table = ds1307_id, 961 }; 962 963 module_i2c_driver(ds1307_driver); 964 965 MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips"); 966 MODULE_LICENSE("GPL"); 967