1 /* 2 * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips. 3 * 4 * Copyright (C) 2005 James Chapman (ds1337 core) 5 * Copyright (C) 2006 David Brownell 6 * Copyright (C) 2009 Matthias Fuchs (rx8025 support) 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/module.h> 14 #include <linux/init.h> 15 #include <linux/slab.h> 16 #include <linux/i2c.h> 17 #include <linux/string.h> 18 #include <linux/rtc.h> 19 #include <linux/bcd.h> 20 21 22 23 /* We can't determine type by probing, but if we expect pre-Linux code 24 * to have set the chip up as a clock (turning on the oscillator and 25 * setting the date and time), Linux can ignore the non-clock features. 26 * That's a natural job for a factory or repair bench. 27 */ 28 enum ds_type { 29 ds_1307, 30 ds_1337, 31 ds_1338, 32 ds_1339, 33 ds_1340, 34 ds_1388, 35 ds_3231, 36 m41t00, 37 rx_8025, 38 // rs5c372 too? different address... 39 }; 40 41 42 /* RTC registers don't differ much, except for the century flag */ 43 #define DS1307_REG_SECS 0x00 /* 00-59 */ 44 # define DS1307_BIT_CH 0x80 45 # define DS1340_BIT_nEOSC 0x80 46 #define DS1307_REG_MIN 0x01 /* 00-59 */ 47 #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */ 48 # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */ 49 # define DS1307_BIT_PM 0x20 /* in REG_HOUR */ 50 # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */ 51 # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */ 52 #define DS1307_REG_WDAY 0x03 /* 01-07 */ 53 #define DS1307_REG_MDAY 0x04 /* 01-31 */ 54 #define DS1307_REG_MONTH 0x05 /* 01-12 */ 55 # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */ 56 #define DS1307_REG_YEAR 0x06 /* 00-99 */ 57 58 /* Other registers (control, status, alarms, trickle charge, NVRAM, etc) 59 * start at 7, and they differ a LOT. Only control and status matter for 60 * basic RTC date and time functionality; be careful using them. 61 */ 62 #define DS1307_REG_CONTROL 0x07 /* or ds1338 */ 63 # define DS1307_BIT_OUT 0x80 64 # define DS1338_BIT_OSF 0x20 65 # define DS1307_BIT_SQWE 0x10 66 # define DS1307_BIT_RS1 0x02 67 # define DS1307_BIT_RS0 0x01 68 #define DS1337_REG_CONTROL 0x0e 69 # define DS1337_BIT_nEOSC 0x80 70 # define DS1339_BIT_BBSQI 0x20 71 # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */ 72 # define DS1337_BIT_RS2 0x10 73 # define DS1337_BIT_RS1 0x08 74 # define DS1337_BIT_INTCN 0x04 75 # define DS1337_BIT_A2IE 0x02 76 # define DS1337_BIT_A1IE 0x01 77 #define DS1340_REG_CONTROL 0x07 78 # define DS1340_BIT_OUT 0x80 79 # define DS1340_BIT_FT 0x40 80 # define DS1340_BIT_CALIB_SIGN 0x20 81 # define DS1340_M_CALIBRATION 0x1f 82 #define DS1340_REG_FLAG 0x09 83 # define DS1340_BIT_OSF 0x80 84 #define DS1337_REG_STATUS 0x0f 85 # define DS1337_BIT_OSF 0x80 86 # define DS1337_BIT_A2I 0x02 87 # define DS1337_BIT_A1I 0x01 88 #define DS1339_REG_ALARM1_SECS 0x07 89 #define DS1339_REG_TRICKLE 0x10 90 91 #define RX8025_REG_CTRL1 0x0e 92 # define RX8025_BIT_2412 0x20 93 #define RX8025_REG_CTRL2 0x0f 94 # define RX8025_BIT_PON 0x10 95 # define RX8025_BIT_VDET 0x40 96 # define RX8025_BIT_XST 0x20 97 98 99 struct ds1307 { 100 u8 offset; /* register's offset */ 101 u8 regs[11]; 102 enum ds_type type; 103 unsigned long flags; 104 #define HAS_NVRAM 0 /* bit 0 == sysfs file active */ 105 #define HAS_ALARM 1 /* bit 1 == irq claimed */ 106 struct i2c_client *client; 107 struct rtc_device *rtc; 108 struct work_struct work; 109 s32 (*read_block_data)(const struct i2c_client *client, u8 command, 110 u8 length, u8 *values); 111 s32 (*write_block_data)(const struct i2c_client *client, u8 command, 112 u8 length, const u8 *values); 113 }; 114 115 struct chip_desc { 116 unsigned nvram56:1; 117 unsigned alarm:1; 118 }; 119 120 static const struct chip_desc chips[] = { 121 [ds_1307] = { 122 .nvram56 = 1, 123 }, 124 [ds_1337] = { 125 .alarm = 1, 126 }, 127 [ds_1338] = { 128 .nvram56 = 1, 129 }, 130 [ds_1339] = { 131 .alarm = 1, 132 }, 133 [ds_1340] = { 134 }, 135 [ds_3231] = { 136 .alarm = 1, 137 }, 138 [m41t00] = { 139 }, 140 [rx_8025] = { 141 }, }; 142 143 static const struct i2c_device_id ds1307_id[] = { 144 { "ds1307", ds_1307 }, 145 { "ds1337", ds_1337 }, 146 { "ds1338", ds_1338 }, 147 { "ds1339", ds_1339 }, 148 { "ds1388", ds_1388 }, 149 { "ds1340", ds_1340 }, 150 { "ds3231", ds_3231 }, 151 { "m41t00", m41t00 }, 152 { "pt7c4338", ds_1307 }, 153 { "rx8025", rx_8025 }, 154 { } 155 }; 156 MODULE_DEVICE_TABLE(i2c, ds1307_id); 157 158 /*----------------------------------------------------------------------*/ 159 160 #define BLOCK_DATA_MAX_TRIES 10 161 162 static s32 ds1307_read_block_data_once(const struct i2c_client *client, 163 u8 command, u8 length, u8 *values) 164 { 165 s32 i, data; 166 167 for (i = 0; i < length; i++) { 168 data = i2c_smbus_read_byte_data(client, command + i); 169 if (data < 0) 170 return data; 171 values[i] = data; 172 } 173 return i; 174 } 175 176 static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command, 177 u8 length, u8 *values) 178 { 179 u8 oldvalues[I2C_SMBUS_BLOCK_MAX]; 180 s32 ret; 181 int tries = 0; 182 183 dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length); 184 ret = ds1307_read_block_data_once(client, command, length, values); 185 if (ret < 0) 186 return ret; 187 do { 188 if (++tries > BLOCK_DATA_MAX_TRIES) { 189 dev_err(&client->dev, 190 "ds1307_read_block_data failed\n"); 191 return -EIO; 192 } 193 memcpy(oldvalues, values, length); 194 ret = ds1307_read_block_data_once(client, command, length, 195 values); 196 if (ret < 0) 197 return ret; 198 } while (memcmp(oldvalues, values, length)); 199 return length; 200 } 201 202 static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command, 203 u8 length, const u8 *values) 204 { 205 u8 currvalues[I2C_SMBUS_BLOCK_MAX]; 206 int tries = 0; 207 208 dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length); 209 do { 210 s32 i, ret; 211 212 if (++tries > BLOCK_DATA_MAX_TRIES) { 213 dev_err(&client->dev, 214 "ds1307_write_block_data failed\n"); 215 return -EIO; 216 } 217 for (i = 0; i < length; i++) { 218 ret = i2c_smbus_write_byte_data(client, command + i, 219 values[i]); 220 if (ret < 0) 221 return ret; 222 } 223 ret = ds1307_read_block_data_once(client, command, length, 224 currvalues); 225 if (ret < 0) 226 return ret; 227 } while (memcmp(currvalues, values, length)); 228 return length; 229 } 230 231 /*----------------------------------------------------------------------*/ 232 233 /* 234 * The IRQ logic includes a "real" handler running in IRQ context just 235 * long enough to schedule this workqueue entry. We need a task context 236 * to talk to the RTC, since I2C I/O calls require that; and disable the 237 * IRQ until we clear its status on the chip, so that this handler can 238 * work with any type of triggering (not just falling edge). 239 * 240 * The ds1337 and ds1339 both have two alarms, but we only use the first 241 * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm 242 * signal; ds1339 chips have only one alarm signal. 243 */ 244 static void ds1307_work(struct work_struct *work) 245 { 246 struct ds1307 *ds1307; 247 struct i2c_client *client; 248 struct mutex *lock; 249 int stat, control; 250 251 ds1307 = container_of(work, struct ds1307, work); 252 client = ds1307->client; 253 lock = &ds1307->rtc->ops_lock; 254 255 mutex_lock(lock); 256 stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS); 257 if (stat < 0) 258 goto out; 259 260 if (stat & DS1337_BIT_A1I) { 261 stat &= ~DS1337_BIT_A1I; 262 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat); 263 264 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); 265 if (control < 0) 266 goto out; 267 268 control &= ~DS1337_BIT_A1IE; 269 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control); 270 271 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF); 272 } 273 274 out: 275 if (test_bit(HAS_ALARM, &ds1307->flags)) 276 enable_irq(client->irq); 277 mutex_unlock(lock); 278 } 279 280 static irqreturn_t ds1307_irq(int irq, void *dev_id) 281 { 282 struct i2c_client *client = dev_id; 283 struct ds1307 *ds1307 = i2c_get_clientdata(client); 284 285 disable_irq_nosync(irq); 286 schedule_work(&ds1307->work); 287 return IRQ_HANDLED; 288 } 289 290 /*----------------------------------------------------------------------*/ 291 292 static int ds1307_get_time(struct device *dev, struct rtc_time *t) 293 { 294 struct ds1307 *ds1307 = dev_get_drvdata(dev); 295 int tmp; 296 297 /* read the RTC date and time registers all at once */ 298 tmp = ds1307->read_block_data(ds1307->client, 299 ds1307->offset, 7, ds1307->regs); 300 if (tmp != 7) { 301 dev_err(dev, "%s error %d\n", "read", tmp); 302 return -EIO; 303 } 304 305 dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", 306 "read", 307 ds1307->regs[0], ds1307->regs[1], 308 ds1307->regs[2], ds1307->regs[3], 309 ds1307->regs[4], ds1307->regs[5], 310 ds1307->regs[6]); 311 312 t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f); 313 t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f); 314 tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f; 315 t->tm_hour = bcd2bin(tmp); 316 t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1; 317 t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f); 318 tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f; 319 t->tm_mon = bcd2bin(tmp) - 1; 320 321 /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */ 322 t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100; 323 324 dev_dbg(dev, "%s secs=%d, mins=%d, " 325 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", 326 "read", t->tm_sec, t->tm_min, 327 t->tm_hour, t->tm_mday, 328 t->tm_mon, t->tm_year, t->tm_wday); 329 330 /* initial clock setting can be undefined */ 331 return rtc_valid_tm(t); 332 } 333 334 static int ds1307_set_time(struct device *dev, struct rtc_time *t) 335 { 336 struct ds1307 *ds1307 = dev_get_drvdata(dev); 337 int result; 338 int tmp; 339 u8 *buf = ds1307->regs; 340 341 dev_dbg(dev, "%s secs=%d, mins=%d, " 342 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n", 343 "write", t->tm_sec, t->tm_min, 344 t->tm_hour, t->tm_mday, 345 t->tm_mon, t->tm_year, t->tm_wday); 346 347 buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec); 348 buf[DS1307_REG_MIN] = bin2bcd(t->tm_min); 349 buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour); 350 buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1); 351 buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday); 352 buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1); 353 354 /* assume 20YY not 19YY */ 355 tmp = t->tm_year - 100; 356 buf[DS1307_REG_YEAR] = bin2bcd(tmp); 357 358 switch (ds1307->type) { 359 case ds_1337: 360 case ds_1339: 361 case ds_3231: 362 buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY; 363 break; 364 case ds_1340: 365 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN 366 | DS1340_BIT_CENTURY; 367 break; 368 default: 369 break; 370 } 371 372 dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n", 373 "write", buf[0], buf[1], buf[2], buf[3], 374 buf[4], buf[5], buf[6]); 375 376 result = ds1307->write_block_data(ds1307->client, 377 ds1307->offset, 7, buf); 378 if (result < 0) { 379 dev_err(dev, "%s error %d\n", "write", result); 380 return result; 381 } 382 return 0; 383 } 384 385 static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t) 386 { 387 struct i2c_client *client = to_i2c_client(dev); 388 struct ds1307 *ds1307 = i2c_get_clientdata(client); 389 int ret; 390 391 if (!test_bit(HAS_ALARM, &ds1307->flags)) 392 return -EINVAL; 393 394 /* read all ALARM1, ALARM2, and status registers at once */ 395 ret = ds1307->read_block_data(client, 396 DS1339_REG_ALARM1_SECS, 9, ds1307->regs); 397 if (ret != 9) { 398 dev_err(dev, "%s error %d\n", "alarm read", ret); 399 return -EIO; 400 } 401 402 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", 403 "alarm read", 404 ds1307->regs[0], ds1307->regs[1], 405 ds1307->regs[2], ds1307->regs[3], 406 ds1307->regs[4], ds1307->regs[5], 407 ds1307->regs[6], ds1307->regs[7], 408 ds1307->regs[8]); 409 410 /* report alarm time (ALARM1); assume 24 hour and day-of-month modes, 411 * and that all four fields are checked matches 412 */ 413 t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f); 414 t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f); 415 t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f); 416 t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f); 417 t->time.tm_mon = -1; 418 t->time.tm_year = -1; 419 t->time.tm_wday = -1; 420 t->time.tm_yday = -1; 421 t->time.tm_isdst = -1; 422 423 /* ... and status */ 424 t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE); 425 t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I); 426 427 dev_dbg(dev, "%s secs=%d, mins=%d, " 428 "hours=%d, mday=%d, enabled=%d, pending=%d\n", 429 "alarm read", t->time.tm_sec, t->time.tm_min, 430 t->time.tm_hour, t->time.tm_mday, 431 t->enabled, t->pending); 432 433 return 0; 434 } 435 436 static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t) 437 { 438 struct i2c_client *client = to_i2c_client(dev); 439 struct ds1307 *ds1307 = i2c_get_clientdata(client); 440 unsigned char *buf = ds1307->regs; 441 u8 control, status; 442 int ret; 443 444 if (!test_bit(HAS_ALARM, &ds1307->flags)) 445 return -EINVAL; 446 447 dev_dbg(dev, "%s secs=%d, mins=%d, " 448 "hours=%d, mday=%d, enabled=%d, pending=%d\n", 449 "alarm set", t->time.tm_sec, t->time.tm_min, 450 t->time.tm_hour, t->time.tm_mday, 451 t->enabled, t->pending); 452 453 /* read current status of both alarms and the chip */ 454 ret = ds1307->read_block_data(client, 455 DS1339_REG_ALARM1_SECS, 9, buf); 456 if (ret != 9) { 457 dev_err(dev, "%s error %d\n", "alarm write", ret); 458 return -EIO; 459 } 460 control = ds1307->regs[7]; 461 status = ds1307->regs[8]; 462 463 dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n", 464 "alarm set (old status)", 465 ds1307->regs[0], ds1307->regs[1], 466 ds1307->regs[2], ds1307->regs[3], 467 ds1307->regs[4], ds1307->regs[5], 468 ds1307->regs[6], control, status); 469 470 /* set ALARM1, using 24 hour and day-of-month modes */ 471 buf[0] = bin2bcd(t->time.tm_sec); 472 buf[1] = bin2bcd(t->time.tm_min); 473 buf[2] = bin2bcd(t->time.tm_hour); 474 buf[3] = bin2bcd(t->time.tm_mday); 475 476 /* set ALARM2 to non-garbage */ 477 buf[4] = 0; 478 buf[5] = 0; 479 buf[6] = 0; 480 481 /* optionally enable ALARM1 */ 482 buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE); 483 if (t->enabled) { 484 dev_dbg(dev, "alarm IRQ armed\n"); 485 buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */ 486 } 487 buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I); 488 489 ret = ds1307->write_block_data(client, 490 DS1339_REG_ALARM1_SECS, 9, buf); 491 if (ret < 0) { 492 dev_err(dev, "can't set alarm time\n"); 493 return ret; 494 } 495 496 return 0; 497 } 498 499 static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled) 500 { 501 struct i2c_client *client = to_i2c_client(dev); 502 struct ds1307 *ds1307 = i2c_get_clientdata(client); 503 int ret; 504 505 if (!test_bit(HAS_ALARM, &ds1307->flags)) 506 return -ENOTTY; 507 508 ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); 509 if (ret < 0) 510 return ret; 511 512 if (enabled) 513 ret |= DS1337_BIT_A1IE; 514 else 515 ret &= ~DS1337_BIT_A1IE; 516 517 ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret); 518 if (ret < 0) 519 return ret; 520 521 return 0; 522 } 523 524 static const struct rtc_class_ops ds13xx_rtc_ops = { 525 .read_time = ds1307_get_time, 526 .set_time = ds1307_set_time, 527 .read_alarm = ds1337_read_alarm, 528 .set_alarm = ds1337_set_alarm, 529 .alarm_irq_enable = ds1307_alarm_irq_enable, 530 }; 531 532 /*----------------------------------------------------------------------*/ 533 534 #define NVRAM_SIZE 56 535 536 static ssize_t 537 ds1307_nvram_read(struct file *filp, struct kobject *kobj, 538 struct bin_attribute *attr, 539 char *buf, loff_t off, size_t count) 540 { 541 struct i2c_client *client; 542 struct ds1307 *ds1307; 543 int result; 544 545 client = kobj_to_i2c_client(kobj); 546 ds1307 = i2c_get_clientdata(client); 547 548 if (unlikely(off >= NVRAM_SIZE)) 549 return 0; 550 if ((off + count) > NVRAM_SIZE) 551 count = NVRAM_SIZE - off; 552 if (unlikely(!count)) 553 return count; 554 555 result = ds1307->read_block_data(client, 8 + off, count, buf); 556 if (result < 0) 557 dev_err(&client->dev, "%s error %d\n", "nvram read", result); 558 return result; 559 } 560 561 static ssize_t 562 ds1307_nvram_write(struct file *filp, struct kobject *kobj, 563 struct bin_attribute *attr, 564 char *buf, loff_t off, size_t count) 565 { 566 struct i2c_client *client; 567 struct ds1307 *ds1307; 568 int result; 569 570 client = kobj_to_i2c_client(kobj); 571 ds1307 = i2c_get_clientdata(client); 572 573 if (unlikely(off >= NVRAM_SIZE)) 574 return -EFBIG; 575 if ((off + count) > NVRAM_SIZE) 576 count = NVRAM_SIZE - off; 577 if (unlikely(!count)) 578 return count; 579 580 result = ds1307->write_block_data(client, 8 + off, count, buf); 581 if (result < 0) { 582 dev_err(&client->dev, "%s error %d\n", "nvram write", result); 583 return result; 584 } 585 return count; 586 } 587 588 static struct bin_attribute nvram = { 589 .attr = { 590 .name = "nvram", 591 .mode = S_IRUGO | S_IWUSR, 592 }, 593 594 .read = ds1307_nvram_read, 595 .write = ds1307_nvram_write, 596 .size = NVRAM_SIZE, 597 }; 598 599 /*----------------------------------------------------------------------*/ 600 601 static struct i2c_driver ds1307_driver; 602 603 static int __devinit ds1307_probe(struct i2c_client *client, 604 const struct i2c_device_id *id) 605 { 606 struct ds1307 *ds1307; 607 int err = -ENODEV; 608 int tmp; 609 const struct chip_desc *chip = &chips[id->driver_data]; 610 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); 611 int want_irq = false; 612 unsigned char *buf; 613 static const int bbsqi_bitpos[] = { 614 [ds_1337] = 0, 615 [ds_1339] = DS1339_BIT_BBSQI, 616 [ds_3231] = DS3231_BIT_BBSQW, 617 }; 618 619 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA) 620 && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) 621 return -EIO; 622 623 if (!(ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL))) 624 return -ENOMEM; 625 626 i2c_set_clientdata(client, ds1307); 627 628 ds1307->client = client; 629 ds1307->type = id->driver_data; 630 ds1307->offset = 0; 631 632 buf = ds1307->regs; 633 if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) { 634 ds1307->read_block_data = i2c_smbus_read_i2c_block_data; 635 ds1307->write_block_data = i2c_smbus_write_i2c_block_data; 636 } else { 637 ds1307->read_block_data = ds1307_read_block_data; 638 ds1307->write_block_data = ds1307_write_block_data; 639 } 640 641 switch (ds1307->type) { 642 case ds_1337: 643 case ds_1339: 644 case ds_3231: 645 /* has IRQ? */ 646 if (ds1307->client->irq > 0 && chip->alarm) { 647 INIT_WORK(&ds1307->work, ds1307_work); 648 want_irq = true; 649 } 650 /* get registers that the "rtc" read below won't read... */ 651 tmp = ds1307->read_block_data(ds1307->client, 652 DS1337_REG_CONTROL, 2, buf); 653 if (tmp != 2) { 654 pr_debug("read error %d\n", tmp); 655 err = -EIO; 656 goto exit_free; 657 } 658 659 /* oscillator off? turn it on, so clock can tick. */ 660 if (ds1307->regs[0] & DS1337_BIT_nEOSC) 661 ds1307->regs[0] &= ~DS1337_BIT_nEOSC; 662 663 /* Using IRQ? Disable the square wave and both alarms. 664 * For some variants, be sure alarms can trigger when we're 665 * running on Vbackup (BBSQI/BBSQW) 666 */ 667 if (want_irq) { 668 ds1307->regs[0] |= DS1337_BIT_INTCN 669 | bbsqi_bitpos[ds1307->type]; 670 ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE); 671 } 672 673 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, 674 ds1307->regs[0]); 675 676 /* oscillator fault? clear flag, and warn */ 677 if (ds1307->regs[1] & DS1337_BIT_OSF) { 678 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, 679 ds1307->regs[1] & ~DS1337_BIT_OSF); 680 dev_warn(&client->dev, "SET TIME!\n"); 681 } 682 break; 683 684 case rx_8025: 685 tmp = i2c_smbus_read_i2c_block_data(ds1307->client, 686 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf); 687 if (tmp != 2) { 688 pr_debug("read error %d\n", tmp); 689 err = -EIO; 690 goto exit_free; 691 } 692 693 /* oscillator off? turn it on, so clock can tick. */ 694 if (!(ds1307->regs[1] & RX8025_BIT_XST)) { 695 ds1307->regs[1] |= RX8025_BIT_XST; 696 i2c_smbus_write_byte_data(client, 697 RX8025_REG_CTRL2 << 4 | 0x08, 698 ds1307->regs[1]); 699 dev_warn(&client->dev, 700 "oscillator stop detected - SET TIME!\n"); 701 } 702 703 if (ds1307->regs[1] & RX8025_BIT_PON) { 704 ds1307->regs[1] &= ~RX8025_BIT_PON; 705 i2c_smbus_write_byte_data(client, 706 RX8025_REG_CTRL2 << 4 | 0x08, 707 ds1307->regs[1]); 708 dev_warn(&client->dev, "power-on detected\n"); 709 } 710 711 if (ds1307->regs[1] & RX8025_BIT_VDET) { 712 ds1307->regs[1] &= ~RX8025_BIT_VDET; 713 i2c_smbus_write_byte_data(client, 714 RX8025_REG_CTRL2 << 4 | 0x08, 715 ds1307->regs[1]); 716 dev_warn(&client->dev, "voltage drop detected\n"); 717 } 718 719 /* make sure we are running in 24hour mode */ 720 if (!(ds1307->regs[0] & RX8025_BIT_2412)) { 721 u8 hour; 722 723 /* switch to 24 hour mode */ 724 i2c_smbus_write_byte_data(client, 725 RX8025_REG_CTRL1 << 4 | 0x08, 726 ds1307->regs[0] | 727 RX8025_BIT_2412); 728 729 tmp = i2c_smbus_read_i2c_block_data(ds1307->client, 730 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf); 731 if (tmp != 2) { 732 pr_debug("read error %d\n", tmp); 733 err = -EIO; 734 goto exit_free; 735 } 736 737 /* correct hour */ 738 hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]); 739 if (hour == 12) 740 hour = 0; 741 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) 742 hour += 12; 743 744 i2c_smbus_write_byte_data(client, 745 DS1307_REG_HOUR << 4 | 0x08, 746 hour); 747 } 748 break; 749 case ds_1388: 750 ds1307->offset = 1; /* Seconds starts at 1 */ 751 break; 752 default: 753 break; 754 } 755 756 read_rtc: 757 /* read RTC registers */ 758 tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf); 759 if (tmp != 8) { 760 pr_debug("read error %d\n", tmp); 761 err = -EIO; 762 goto exit_free; 763 } 764 765 /* minimal sanity checking; some chips (like DS1340) don't 766 * specify the extra bits as must-be-zero, but there are 767 * still a few values that are clearly out-of-range. 768 */ 769 tmp = ds1307->regs[DS1307_REG_SECS]; 770 switch (ds1307->type) { 771 case ds_1307: 772 case m41t00: 773 /* clock halted? turn it on, so clock can tick. */ 774 if (tmp & DS1307_BIT_CH) { 775 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); 776 dev_warn(&client->dev, "SET TIME!\n"); 777 goto read_rtc; 778 } 779 break; 780 case ds_1338: 781 /* clock halted? turn it on, so clock can tick. */ 782 if (tmp & DS1307_BIT_CH) 783 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); 784 785 /* oscillator fault? clear flag, and warn */ 786 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) { 787 i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL, 788 ds1307->regs[DS1307_REG_CONTROL] 789 & ~DS1338_BIT_OSF); 790 dev_warn(&client->dev, "SET TIME!\n"); 791 goto read_rtc; 792 } 793 break; 794 case ds_1340: 795 /* clock halted? turn it on, so clock can tick. */ 796 if (tmp & DS1340_BIT_nEOSC) 797 i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0); 798 799 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG); 800 if (tmp < 0) { 801 pr_debug("read error %d\n", tmp); 802 err = -EIO; 803 goto exit_free; 804 } 805 806 /* oscillator fault? clear flag, and warn */ 807 if (tmp & DS1340_BIT_OSF) { 808 i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0); 809 dev_warn(&client->dev, "SET TIME!\n"); 810 } 811 break; 812 case rx_8025: 813 case ds_1337: 814 case ds_1339: 815 case ds_1388: 816 case ds_3231: 817 break; 818 } 819 820 tmp = ds1307->regs[DS1307_REG_HOUR]; 821 switch (ds1307->type) { 822 case ds_1340: 823 case m41t00: 824 /* NOTE: ignores century bits; fix before deploying 825 * systems that will run through year 2100. 826 */ 827 break; 828 case rx_8025: 829 break; 830 default: 831 if (!(tmp & DS1307_BIT_12HR)) 832 break; 833 834 /* Be sure we're in 24 hour mode. Multi-master systems 835 * take note... 836 */ 837 tmp = bcd2bin(tmp & 0x1f); 838 if (tmp == 12) 839 tmp = 0; 840 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM) 841 tmp += 12; 842 i2c_smbus_write_byte_data(client, 843 ds1307->offset + DS1307_REG_HOUR, 844 bin2bcd(tmp)); 845 } 846 847 ds1307->rtc = rtc_device_register(client->name, &client->dev, 848 &ds13xx_rtc_ops, THIS_MODULE); 849 if (IS_ERR(ds1307->rtc)) { 850 err = PTR_ERR(ds1307->rtc); 851 dev_err(&client->dev, 852 "unable to register the class device\n"); 853 goto exit_free; 854 } 855 856 if (want_irq) { 857 err = request_irq(client->irq, ds1307_irq, IRQF_SHARED, 858 ds1307->rtc->name, client); 859 if (err) { 860 dev_err(&client->dev, 861 "unable to request IRQ!\n"); 862 goto exit_irq; 863 } 864 865 device_set_wakeup_capable(&client->dev, 1); 866 set_bit(HAS_ALARM, &ds1307->flags); 867 dev_dbg(&client->dev, "got IRQ %d\n", client->irq); 868 } 869 870 if (chip->nvram56) { 871 err = sysfs_create_bin_file(&client->dev.kobj, &nvram); 872 if (err == 0) { 873 set_bit(HAS_NVRAM, &ds1307->flags); 874 dev_info(&client->dev, "56 bytes nvram\n"); 875 } 876 } 877 878 return 0; 879 880 exit_irq: 881 rtc_device_unregister(ds1307->rtc); 882 exit_free: 883 kfree(ds1307); 884 return err; 885 } 886 887 static int __devexit ds1307_remove(struct i2c_client *client) 888 { 889 struct ds1307 *ds1307 = i2c_get_clientdata(client); 890 891 if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) { 892 free_irq(client->irq, client); 893 cancel_work_sync(&ds1307->work); 894 } 895 896 if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags)) 897 sysfs_remove_bin_file(&client->dev.kobj, &nvram); 898 899 rtc_device_unregister(ds1307->rtc); 900 kfree(ds1307); 901 return 0; 902 } 903 904 static struct i2c_driver ds1307_driver = { 905 .driver = { 906 .name = "rtc-ds1307", 907 .owner = THIS_MODULE, 908 }, 909 .probe = ds1307_probe, 910 .remove = __devexit_p(ds1307_remove), 911 .id_table = ds1307_id, 912 }; 913 914 static int __init ds1307_init(void) 915 { 916 return i2c_add_driver(&ds1307_driver); 917 } 918 module_init(ds1307_init); 919 920 static void __exit ds1307_exit(void) 921 { 922 i2c_del_driver(&ds1307_driver); 923 } 924 module_exit(ds1307_exit); 925 926 MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips"); 927 MODULE_LICENSE("GPL"); 928