1 /* 2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc 3 * 4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c) 5 * Copyright (C) 2006 David Brownell (convert to new framework) 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 /* 14 * The original "cmos clock" chip was an MC146818 chip, now obsolete. 15 * That defined the register interface now provided by all PCs, some 16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets 17 * integrate an MC146818 clone in their southbridge, and boards use 18 * that instead of discrete clones like the DS12887 or M48T86. There 19 * are also clones that connect using the LPC bus. 20 * 21 * That register API is also used directly by various other drivers 22 * (notably for integrated NVRAM), infrastructure (x86 has code to 23 * bypass the RTC framework, directly reading the RTC during boot 24 * and updating minutes/seconds for systems using NTP synch) and 25 * utilities (like userspace 'hwclock', if no /dev node exists). 26 * 27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with 28 * interrupts disabled, holding the global rtc_lock, to exclude those 29 * other drivers and utilities on correctly configured systems. 30 */ 31 32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 33 34 #include <linux/kernel.h> 35 #include <linux/module.h> 36 #include <linux/init.h> 37 #include <linux/interrupt.h> 38 #include <linux/spinlock.h> 39 #include <linux/platform_device.h> 40 #include <linux/log2.h> 41 #include <linux/pm.h> 42 #include <linux/of.h> 43 #include <linux/of_platform.h> 44 #ifdef CONFIG_X86 45 #include <asm/i8259.h> 46 #include <asm/processor.h> 47 #include <linux/dmi.h> 48 #endif 49 50 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */ 51 #include <linux/mc146818rtc.h> 52 53 #ifdef CONFIG_ACPI 54 /* 55 * Use ACPI SCI to replace HPET interrupt for RTC Alarm event 56 * 57 * If cleared, ACPI SCI is only used to wake up the system from suspend 58 * 59 * If set, ACPI SCI is used to handle UIE/AIE and system wakeup 60 */ 61 62 static bool use_acpi_alarm; 63 module_param(use_acpi_alarm, bool, 0444); 64 65 static inline int cmos_use_acpi_alarm(void) 66 { 67 return use_acpi_alarm; 68 } 69 #else /* !CONFIG_ACPI */ 70 71 static inline int cmos_use_acpi_alarm(void) 72 { 73 return 0; 74 } 75 #endif 76 77 struct cmos_rtc { 78 struct rtc_device *rtc; 79 struct device *dev; 80 int irq; 81 struct resource *iomem; 82 time64_t alarm_expires; 83 84 void (*wake_on)(struct device *); 85 void (*wake_off)(struct device *); 86 87 u8 enabled_wake; 88 u8 suspend_ctrl; 89 90 /* newer hardware extends the original register set */ 91 u8 day_alrm; 92 u8 mon_alrm; 93 u8 century; 94 95 struct rtc_wkalrm saved_wkalrm; 96 }; 97 98 /* both platform and pnp busses use negative numbers for invalid irqs */ 99 #define is_valid_irq(n) ((n) > 0) 100 101 static const char driver_name[] = "rtc_cmos"; 102 103 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear; 104 * always mask it against the irq enable bits in RTC_CONTROL. Bit values 105 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both. 106 */ 107 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF) 108 109 static inline int is_intr(u8 rtc_intr) 110 { 111 if (!(rtc_intr & RTC_IRQF)) 112 return 0; 113 return rtc_intr & RTC_IRQMASK; 114 } 115 116 /*----------------------------------------------------------------*/ 117 118 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because 119 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly 120 * used in a broken "legacy replacement" mode. The breakage includes 121 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for 122 * other (better) use. 123 * 124 * When that broken mode is in use, platform glue provides a partial 125 * emulation of hardware RTC IRQ facilities using HPET #1. We don't 126 * want to use HPET for anything except those IRQs though... 127 */ 128 #ifdef CONFIG_HPET_EMULATE_RTC 129 #include <asm/hpet.h> 130 #else 131 132 static inline int is_hpet_enabled(void) 133 { 134 return 0; 135 } 136 137 static inline int hpet_mask_rtc_irq_bit(unsigned long mask) 138 { 139 return 0; 140 } 141 142 static inline int hpet_set_rtc_irq_bit(unsigned long mask) 143 { 144 return 0; 145 } 146 147 static inline int 148 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec) 149 { 150 return 0; 151 } 152 153 static inline int hpet_set_periodic_freq(unsigned long freq) 154 { 155 return 0; 156 } 157 158 static inline int hpet_rtc_dropped_irq(void) 159 { 160 return 0; 161 } 162 163 static inline int hpet_rtc_timer_init(void) 164 { 165 return 0; 166 } 167 168 extern irq_handler_t hpet_rtc_interrupt; 169 170 static inline int hpet_register_irq_handler(irq_handler_t handler) 171 { 172 return 0; 173 } 174 175 static inline int hpet_unregister_irq_handler(irq_handler_t handler) 176 { 177 return 0; 178 } 179 180 #endif 181 182 /* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */ 183 static inline int use_hpet_alarm(void) 184 { 185 return is_hpet_enabled() && !cmos_use_acpi_alarm(); 186 } 187 188 /*----------------------------------------------------------------*/ 189 190 #ifdef RTC_PORT 191 192 /* Most newer x86 systems have two register banks, the first used 193 * for RTC and NVRAM and the second only for NVRAM. Caller must 194 * own rtc_lock ... and we won't worry about access during NMI. 195 */ 196 #define can_bank2 true 197 198 static inline unsigned char cmos_read_bank2(unsigned char addr) 199 { 200 outb(addr, RTC_PORT(2)); 201 return inb(RTC_PORT(3)); 202 } 203 204 static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 205 { 206 outb(addr, RTC_PORT(2)); 207 outb(val, RTC_PORT(3)); 208 } 209 210 #else 211 212 #define can_bank2 false 213 214 static inline unsigned char cmos_read_bank2(unsigned char addr) 215 { 216 return 0; 217 } 218 219 static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 220 { 221 } 222 223 #endif 224 225 /*----------------------------------------------------------------*/ 226 227 static int cmos_read_time(struct device *dev, struct rtc_time *t) 228 { 229 /* 230 * If pm_trace abused the RTC for storage, set the timespec to 0, 231 * which tells the caller that this RTC value is unusable. 232 */ 233 if (!pm_trace_rtc_valid()) 234 return -EIO; 235 236 /* REVISIT: if the clock has a "century" register, use 237 * that instead of the heuristic in mc146818_get_time(). 238 * That'll make Y3K compatility (year > 2070) easy! 239 */ 240 mc146818_get_time(t); 241 return 0; 242 } 243 244 static int cmos_set_time(struct device *dev, struct rtc_time *t) 245 { 246 /* REVISIT: set the "century" register if available 247 * 248 * NOTE: this ignores the issue whereby updating the seconds 249 * takes effect exactly 500ms after we write the register. 250 * (Also queueing and other delays before we get this far.) 251 */ 252 return mc146818_set_time(t); 253 } 254 255 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t) 256 { 257 struct cmos_rtc *cmos = dev_get_drvdata(dev); 258 unsigned char rtc_control; 259 260 if (!is_valid_irq(cmos->irq)) 261 return -EIO; 262 263 /* Basic alarms only support hour, minute, and seconds fields. 264 * Some also support day and month, for alarms up to a year in 265 * the future. 266 */ 267 268 spin_lock_irq(&rtc_lock); 269 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM); 270 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM); 271 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM); 272 273 if (cmos->day_alrm) { 274 /* ignore upper bits on readback per ACPI spec */ 275 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f; 276 if (!t->time.tm_mday) 277 t->time.tm_mday = -1; 278 279 if (cmos->mon_alrm) { 280 t->time.tm_mon = CMOS_READ(cmos->mon_alrm); 281 if (!t->time.tm_mon) 282 t->time.tm_mon = -1; 283 } 284 } 285 286 rtc_control = CMOS_READ(RTC_CONTROL); 287 spin_unlock_irq(&rtc_lock); 288 289 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 290 if (((unsigned)t->time.tm_sec) < 0x60) 291 t->time.tm_sec = bcd2bin(t->time.tm_sec); 292 else 293 t->time.tm_sec = -1; 294 if (((unsigned)t->time.tm_min) < 0x60) 295 t->time.tm_min = bcd2bin(t->time.tm_min); 296 else 297 t->time.tm_min = -1; 298 if (((unsigned)t->time.tm_hour) < 0x24) 299 t->time.tm_hour = bcd2bin(t->time.tm_hour); 300 else 301 t->time.tm_hour = -1; 302 303 if (cmos->day_alrm) { 304 if (((unsigned)t->time.tm_mday) <= 0x31) 305 t->time.tm_mday = bcd2bin(t->time.tm_mday); 306 else 307 t->time.tm_mday = -1; 308 309 if (cmos->mon_alrm) { 310 if (((unsigned)t->time.tm_mon) <= 0x12) 311 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1; 312 else 313 t->time.tm_mon = -1; 314 } 315 } 316 } 317 318 t->enabled = !!(rtc_control & RTC_AIE); 319 t->pending = 0; 320 321 return 0; 322 } 323 324 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control) 325 { 326 unsigned char rtc_intr; 327 328 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS; 329 * allegedly some older rtcs need that to handle irqs properly 330 */ 331 rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 332 333 if (use_hpet_alarm()) 334 return; 335 336 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 337 if (is_intr(rtc_intr)) 338 rtc_update_irq(cmos->rtc, 1, rtc_intr); 339 } 340 341 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask) 342 { 343 unsigned char rtc_control; 344 345 /* flush any pending IRQ status, notably for update irqs, 346 * before we enable new IRQs 347 */ 348 rtc_control = CMOS_READ(RTC_CONTROL); 349 cmos_checkintr(cmos, rtc_control); 350 351 rtc_control |= mask; 352 CMOS_WRITE(rtc_control, RTC_CONTROL); 353 if (use_hpet_alarm()) 354 hpet_set_rtc_irq_bit(mask); 355 356 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) { 357 if (cmos->wake_on) 358 cmos->wake_on(cmos->dev); 359 } 360 361 cmos_checkintr(cmos, rtc_control); 362 } 363 364 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask) 365 { 366 unsigned char rtc_control; 367 368 rtc_control = CMOS_READ(RTC_CONTROL); 369 rtc_control &= ~mask; 370 CMOS_WRITE(rtc_control, RTC_CONTROL); 371 if (use_hpet_alarm()) 372 hpet_mask_rtc_irq_bit(mask); 373 374 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) { 375 if (cmos->wake_off) 376 cmos->wake_off(cmos->dev); 377 } 378 379 cmos_checkintr(cmos, rtc_control); 380 } 381 382 static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t) 383 { 384 struct cmos_rtc *cmos = dev_get_drvdata(dev); 385 struct rtc_time now; 386 387 cmos_read_time(dev, &now); 388 389 if (!cmos->day_alrm) { 390 time64_t t_max_date; 391 time64_t t_alrm; 392 393 t_max_date = rtc_tm_to_time64(&now); 394 t_max_date += 24 * 60 * 60 - 1; 395 t_alrm = rtc_tm_to_time64(&t->time); 396 if (t_alrm > t_max_date) { 397 dev_err(dev, 398 "Alarms can be up to one day in the future\n"); 399 return -EINVAL; 400 } 401 } else if (!cmos->mon_alrm) { 402 struct rtc_time max_date = now; 403 time64_t t_max_date; 404 time64_t t_alrm; 405 int max_mday; 406 407 if (max_date.tm_mon == 11) { 408 max_date.tm_mon = 0; 409 max_date.tm_year += 1; 410 } else { 411 max_date.tm_mon += 1; 412 } 413 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); 414 if (max_date.tm_mday > max_mday) 415 max_date.tm_mday = max_mday; 416 417 t_max_date = rtc_tm_to_time64(&max_date); 418 t_max_date -= 1; 419 t_alrm = rtc_tm_to_time64(&t->time); 420 if (t_alrm > t_max_date) { 421 dev_err(dev, 422 "Alarms can be up to one month in the future\n"); 423 return -EINVAL; 424 } 425 } else { 426 struct rtc_time max_date = now; 427 time64_t t_max_date; 428 time64_t t_alrm; 429 int max_mday; 430 431 max_date.tm_year += 1; 432 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); 433 if (max_date.tm_mday > max_mday) 434 max_date.tm_mday = max_mday; 435 436 t_max_date = rtc_tm_to_time64(&max_date); 437 t_max_date -= 1; 438 t_alrm = rtc_tm_to_time64(&t->time); 439 if (t_alrm > t_max_date) { 440 dev_err(dev, 441 "Alarms can be up to one year in the future\n"); 442 return -EINVAL; 443 } 444 } 445 446 return 0; 447 } 448 449 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t) 450 { 451 struct cmos_rtc *cmos = dev_get_drvdata(dev); 452 unsigned char mon, mday, hrs, min, sec, rtc_control; 453 int ret; 454 455 if (!is_valid_irq(cmos->irq)) 456 return -EIO; 457 458 ret = cmos_validate_alarm(dev, t); 459 if (ret < 0) 460 return ret; 461 462 mon = t->time.tm_mon + 1; 463 mday = t->time.tm_mday; 464 hrs = t->time.tm_hour; 465 min = t->time.tm_min; 466 sec = t->time.tm_sec; 467 468 rtc_control = CMOS_READ(RTC_CONTROL); 469 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 470 /* Writing 0xff means "don't care" or "match all". */ 471 mon = (mon <= 12) ? bin2bcd(mon) : 0xff; 472 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff; 473 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff; 474 min = (min < 60) ? bin2bcd(min) : 0xff; 475 sec = (sec < 60) ? bin2bcd(sec) : 0xff; 476 } 477 478 spin_lock_irq(&rtc_lock); 479 480 /* next rtc irq must not be from previous alarm setting */ 481 cmos_irq_disable(cmos, RTC_AIE); 482 483 /* update alarm */ 484 CMOS_WRITE(hrs, RTC_HOURS_ALARM); 485 CMOS_WRITE(min, RTC_MINUTES_ALARM); 486 CMOS_WRITE(sec, RTC_SECONDS_ALARM); 487 488 /* the system may support an "enhanced" alarm */ 489 if (cmos->day_alrm) { 490 CMOS_WRITE(mday, cmos->day_alrm); 491 if (cmos->mon_alrm) 492 CMOS_WRITE(mon, cmos->mon_alrm); 493 } 494 495 if (use_hpet_alarm()) { 496 /* 497 * FIXME the HPET alarm glue currently ignores day_alrm 498 * and mon_alrm ... 499 */ 500 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, 501 t->time.tm_sec); 502 } 503 504 if (t->enabled) 505 cmos_irq_enable(cmos, RTC_AIE); 506 507 spin_unlock_irq(&rtc_lock); 508 509 cmos->alarm_expires = rtc_tm_to_time64(&t->time); 510 511 return 0; 512 } 513 514 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled) 515 { 516 struct cmos_rtc *cmos = dev_get_drvdata(dev); 517 unsigned long flags; 518 519 if (!is_valid_irq(cmos->irq)) 520 return -EINVAL; 521 522 spin_lock_irqsave(&rtc_lock, flags); 523 524 if (enabled) 525 cmos_irq_enable(cmos, RTC_AIE); 526 else 527 cmos_irq_disable(cmos, RTC_AIE); 528 529 spin_unlock_irqrestore(&rtc_lock, flags); 530 return 0; 531 } 532 533 #if IS_ENABLED(CONFIG_RTC_INTF_PROC) 534 535 static int cmos_procfs(struct device *dev, struct seq_file *seq) 536 { 537 struct cmos_rtc *cmos = dev_get_drvdata(dev); 538 unsigned char rtc_control, valid; 539 540 spin_lock_irq(&rtc_lock); 541 rtc_control = CMOS_READ(RTC_CONTROL); 542 valid = CMOS_READ(RTC_VALID); 543 spin_unlock_irq(&rtc_lock); 544 545 /* NOTE: at least ICH6 reports battery status using a different 546 * (non-RTC) bit; and SQWE is ignored on many current systems. 547 */ 548 seq_printf(seq, 549 "periodic_IRQ\t: %s\n" 550 "update_IRQ\t: %s\n" 551 "HPET_emulated\t: %s\n" 552 // "square_wave\t: %s\n" 553 "BCD\t\t: %s\n" 554 "DST_enable\t: %s\n" 555 "periodic_freq\t: %d\n" 556 "batt_status\t: %s\n", 557 (rtc_control & RTC_PIE) ? "yes" : "no", 558 (rtc_control & RTC_UIE) ? "yes" : "no", 559 use_hpet_alarm() ? "yes" : "no", 560 // (rtc_control & RTC_SQWE) ? "yes" : "no", 561 (rtc_control & RTC_DM_BINARY) ? "no" : "yes", 562 (rtc_control & RTC_DST_EN) ? "yes" : "no", 563 cmos->rtc->irq_freq, 564 (valid & RTC_VRT) ? "okay" : "dead"); 565 566 return 0; 567 } 568 569 #else 570 #define cmos_procfs NULL 571 #endif 572 573 static const struct rtc_class_ops cmos_rtc_ops = { 574 .read_time = cmos_read_time, 575 .set_time = cmos_set_time, 576 .read_alarm = cmos_read_alarm, 577 .set_alarm = cmos_set_alarm, 578 .proc = cmos_procfs, 579 .alarm_irq_enable = cmos_alarm_irq_enable, 580 }; 581 582 /*----------------------------------------------------------------*/ 583 584 /* 585 * All these chips have at least 64 bytes of address space, shared by 586 * RTC registers and NVRAM. Most of those bytes of NVRAM are used 587 * by boot firmware. Modern chips have 128 or 256 bytes. 588 */ 589 590 #define NVRAM_OFFSET (RTC_REG_D + 1) 591 592 static int cmos_nvram_read(void *priv, unsigned int off, void *val, 593 size_t count) 594 { 595 unsigned char *buf = val; 596 int retval; 597 598 off += NVRAM_OFFSET; 599 spin_lock_irq(&rtc_lock); 600 for (retval = 0; count; count--, off++, retval++) { 601 if (off < 128) 602 *buf++ = CMOS_READ(off); 603 else if (can_bank2) 604 *buf++ = cmos_read_bank2(off); 605 else 606 break; 607 } 608 spin_unlock_irq(&rtc_lock); 609 610 return retval; 611 } 612 613 static int cmos_nvram_write(void *priv, unsigned int off, void *val, 614 size_t count) 615 { 616 struct cmos_rtc *cmos = priv; 617 unsigned char *buf = val; 618 int retval; 619 620 /* NOTE: on at least PCs and Ataris, the boot firmware uses a 621 * checksum on part of the NVRAM data. That's currently ignored 622 * here. If userspace is smart enough to know what fields of 623 * NVRAM to update, updating checksums is also part of its job. 624 */ 625 off += NVRAM_OFFSET; 626 spin_lock_irq(&rtc_lock); 627 for (retval = 0; count; count--, off++, retval++) { 628 /* don't trash RTC registers */ 629 if (off == cmos->day_alrm 630 || off == cmos->mon_alrm 631 || off == cmos->century) 632 buf++; 633 else if (off < 128) 634 CMOS_WRITE(*buf++, off); 635 else if (can_bank2) 636 cmos_write_bank2(*buf++, off); 637 else 638 break; 639 } 640 spin_unlock_irq(&rtc_lock); 641 642 return retval; 643 } 644 645 /*----------------------------------------------------------------*/ 646 647 static struct cmos_rtc cmos_rtc; 648 649 static irqreturn_t cmos_interrupt(int irq, void *p) 650 { 651 u8 irqstat; 652 u8 rtc_control; 653 654 spin_lock(&rtc_lock); 655 656 /* When the HPET interrupt handler calls us, the interrupt 657 * status is passed as arg1 instead of the irq number. But 658 * always clear irq status, even when HPET is in the way. 659 * 660 * Note that HPET and RTC are almost certainly out of phase, 661 * giving different IRQ status ... 662 */ 663 irqstat = CMOS_READ(RTC_INTR_FLAGS); 664 rtc_control = CMOS_READ(RTC_CONTROL); 665 if (use_hpet_alarm()) 666 irqstat = (unsigned long)irq & 0xF0; 667 668 /* If we were suspended, RTC_CONTROL may not be accurate since the 669 * bios may have cleared it. 670 */ 671 if (!cmos_rtc.suspend_ctrl) 672 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 673 else 674 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF; 675 676 /* All Linux RTC alarms should be treated as if they were oneshot. 677 * Similar code may be needed in system wakeup paths, in case the 678 * alarm woke the system. 679 */ 680 if (irqstat & RTC_AIE) { 681 cmos_rtc.suspend_ctrl &= ~RTC_AIE; 682 rtc_control &= ~RTC_AIE; 683 CMOS_WRITE(rtc_control, RTC_CONTROL); 684 if (use_hpet_alarm()) 685 hpet_mask_rtc_irq_bit(RTC_AIE); 686 CMOS_READ(RTC_INTR_FLAGS); 687 } 688 spin_unlock(&rtc_lock); 689 690 if (is_intr(irqstat)) { 691 rtc_update_irq(p, 1, irqstat); 692 return IRQ_HANDLED; 693 } else 694 return IRQ_NONE; 695 } 696 697 #ifdef CONFIG_PNP 698 #define INITSECTION 699 700 #else 701 #define INITSECTION __init 702 #endif 703 704 static int INITSECTION 705 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) 706 { 707 struct cmos_rtc_board_info *info = dev_get_platdata(dev); 708 int retval = 0; 709 unsigned char rtc_control; 710 unsigned address_space; 711 u32 flags = 0; 712 struct nvmem_config nvmem_cfg = { 713 .name = "cmos_nvram", 714 .word_size = 1, 715 .stride = 1, 716 .reg_read = cmos_nvram_read, 717 .reg_write = cmos_nvram_write, 718 .priv = &cmos_rtc, 719 }; 720 721 /* there can be only one ... */ 722 if (cmos_rtc.dev) 723 return -EBUSY; 724 725 if (!ports) 726 return -ENODEV; 727 728 /* Claim I/O ports ASAP, minimizing conflict with legacy driver. 729 * 730 * REVISIT non-x86 systems may instead use memory space resources 731 * (needing ioremap etc), not i/o space resources like this ... 732 */ 733 if (RTC_IOMAPPED) 734 ports = request_region(ports->start, resource_size(ports), 735 driver_name); 736 else 737 ports = request_mem_region(ports->start, resource_size(ports), 738 driver_name); 739 if (!ports) { 740 dev_dbg(dev, "i/o registers already in use\n"); 741 return -EBUSY; 742 } 743 744 cmos_rtc.irq = rtc_irq; 745 cmos_rtc.iomem = ports; 746 747 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM 748 * driver did, but don't reject unknown configs. Old hardware 749 * won't address 128 bytes. Newer chips have multiple banks, 750 * though they may not be listed in one I/O resource. 751 */ 752 #if defined(CONFIG_ATARI) 753 address_space = 64; 754 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \ 755 || defined(__sparc__) || defined(__mips__) \ 756 || defined(__powerpc__) 757 address_space = 128; 758 #else 759 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. 760 address_space = 128; 761 #endif 762 if (can_bank2 && ports->end > (ports->start + 1)) 763 address_space = 256; 764 765 /* For ACPI systems extension info comes from the FADT. On others, 766 * board specific setup provides it as appropriate. Systems where 767 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and 768 * some almost-clones) can provide hooks to make that behave. 769 * 770 * Note that ACPI doesn't preclude putting these registers into 771 * "extended" areas of the chip, including some that we won't yet 772 * expect CMOS_READ and friends to handle. 773 */ 774 if (info) { 775 if (info->flags) 776 flags = info->flags; 777 if (info->address_space) 778 address_space = info->address_space; 779 780 if (info->rtc_day_alarm && info->rtc_day_alarm < 128) 781 cmos_rtc.day_alrm = info->rtc_day_alarm; 782 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128) 783 cmos_rtc.mon_alrm = info->rtc_mon_alarm; 784 if (info->rtc_century && info->rtc_century < 128) 785 cmos_rtc.century = info->rtc_century; 786 787 if (info->wake_on && info->wake_off) { 788 cmos_rtc.wake_on = info->wake_on; 789 cmos_rtc.wake_off = info->wake_off; 790 } 791 } 792 793 cmos_rtc.dev = dev; 794 dev_set_drvdata(dev, &cmos_rtc); 795 796 cmos_rtc.rtc = devm_rtc_allocate_device(dev); 797 if (IS_ERR(cmos_rtc.rtc)) { 798 retval = PTR_ERR(cmos_rtc.rtc); 799 goto cleanup0; 800 } 801 802 rename_region(ports, dev_name(&cmos_rtc.rtc->dev)); 803 804 spin_lock_irq(&rtc_lock); 805 806 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) { 807 /* force periodic irq to CMOS reset default of 1024Hz; 808 * 809 * REVISIT it's been reported that at least one x86_64 ALI 810 * mobo doesn't use 32KHz here ... for portability we might 811 * need to do something about other clock frequencies. 812 */ 813 cmos_rtc.rtc->irq_freq = 1024; 814 if (use_hpet_alarm()) 815 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq); 816 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); 817 } 818 819 /* disable irqs */ 820 if (is_valid_irq(rtc_irq)) 821 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE); 822 823 rtc_control = CMOS_READ(RTC_CONTROL); 824 825 spin_unlock_irq(&rtc_lock); 826 827 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) { 828 dev_warn(dev, "only 24-hr supported\n"); 829 retval = -ENXIO; 830 goto cleanup1; 831 } 832 833 if (use_hpet_alarm()) 834 hpet_rtc_timer_init(); 835 836 if (is_valid_irq(rtc_irq)) { 837 irq_handler_t rtc_cmos_int_handler; 838 839 if (use_hpet_alarm()) { 840 rtc_cmos_int_handler = hpet_rtc_interrupt; 841 retval = hpet_register_irq_handler(cmos_interrupt); 842 if (retval) { 843 hpet_mask_rtc_irq_bit(RTC_IRQMASK); 844 dev_warn(dev, "hpet_register_irq_handler " 845 " failed in rtc_init()."); 846 goto cleanup1; 847 } 848 } else 849 rtc_cmos_int_handler = cmos_interrupt; 850 851 retval = request_irq(rtc_irq, rtc_cmos_int_handler, 852 IRQF_SHARED, dev_name(&cmos_rtc.rtc->dev), 853 cmos_rtc.rtc); 854 if (retval < 0) { 855 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); 856 goto cleanup1; 857 } 858 } 859 860 cmos_rtc.rtc->ops = &cmos_rtc_ops; 861 cmos_rtc.rtc->nvram_old_abi = true; 862 retval = rtc_register_device(cmos_rtc.rtc); 863 if (retval) 864 goto cleanup2; 865 866 /* export at least the first block of NVRAM */ 867 nvmem_cfg.size = address_space - NVRAM_OFFSET; 868 if (rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg)) 869 dev_err(dev, "nvmem registration failed\n"); 870 871 dev_info(dev, "%s%s, %d bytes nvram%s\n", 872 !is_valid_irq(rtc_irq) ? "no alarms" : 873 cmos_rtc.mon_alrm ? "alarms up to one year" : 874 cmos_rtc.day_alrm ? "alarms up to one month" : 875 "alarms up to one day", 876 cmos_rtc.century ? ", y3k" : "", 877 nvmem_cfg.size, 878 use_hpet_alarm() ? ", hpet irqs" : ""); 879 880 return 0; 881 882 cleanup2: 883 if (is_valid_irq(rtc_irq)) 884 free_irq(rtc_irq, cmos_rtc.rtc); 885 cleanup1: 886 cmos_rtc.dev = NULL; 887 cleanup0: 888 if (RTC_IOMAPPED) 889 release_region(ports->start, resource_size(ports)); 890 else 891 release_mem_region(ports->start, resource_size(ports)); 892 return retval; 893 } 894 895 static void cmos_do_shutdown(int rtc_irq) 896 { 897 spin_lock_irq(&rtc_lock); 898 if (is_valid_irq(rtc_irq)) 899 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK); 900 spin_unlock_irq(&rtc_lock); 901 } 902 903 static void cmos_do_remove(struct device *dev) 904 { 905 struct cmos_rtc *cmos = dev_get_drvdata(dev); 906 struct resource *ports; 907 908 cmos_do_shutdown(cmos->irq); 909 910 if (is_valid_irq(cmos->irq)) { 911 free_irq(cmos->irq, cmos->rtc); 912 if (use_hpet_alarm()) 913 hpet_unregister_irq_handler(cmos_interrupt); 914 } 915 916 cmos->rtc = NULL; 917 918 ports = cmos->iomem; 919 if (RTC_IOMAPPED) 920 release_region(ports->start, resource_size(ports)); 921 else 922 release_mem_region(ports->start, resource_size(ports)); 923 cmos->iomem = NULL; 924 925 cmos->dev = NULL; 926 } 927 928 static int cmos_aie_poweroff(struct device *dev) 929 { 930 struct cmos_rtc *cmos = dev_get_drvdata(dev); 931 struct rtc_time now; 932 time64_t t_now; 933 int retval = 0; 934 unsigned char rtc_control; 935 936 if (!cmos->alarm_expires) 937 return -EINVAL; 938 939 spin_lock_irq(&rtc_lock); 940 rtc_control = CMOS_READ(RTC_CONTROL); 941 spin_unlock_irq(&rtc_lock); 942 943 /* We only care about the situation where AIE is disabled. */ 944 if (rtc_control & RTC_AIE) 945 return -EBUSY; 946 947 cmos_read_time(dev, &now); 948 t_now = rtc_tm_to_time64(&now); 949 950 /* 951 * When enabling "RTC wake-up" in BIOS setup, the machine reboots 952 * automatically right after shutdown on some buggy boxes. 953 * This automatic rebooting issue won't happen when the alarm 954 * time is larger than now+1 seconds. 955 * 956 * If the alarm time is equal to now+1 seconds, the issue can be 957 * prevented by cancelling the alarm. 958 */ 959 if (cmos->alarm_expires == t_now + 1) { 960 struct rtc_wkalrm alarm; 961 962 /* Cancel the AIE timer by configuring the past time. */ 963 rtc_time64_to_tm(t_now - 1, &alarm.time); 964 alarm.enabled = 0; 965 retval = cmos_set_alarm(dev, &alarm); 966 } else if (cmos->alarm_expires > t_now + 1) { 967 retval = -EBUSY; 968 } 969 970 return retval; 971 } 972 973 static int cmos_suspend(struct device *dev) 974 { 975 struct cmos_rtc *cmos = dev_get_drvdata(dev); 976 unsigned char tmp; 977 978 /* only the alarm might be a wakeup event source */ 979 spin_lock_irq(&rtc_lock); 980 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL); 981 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { 982 unsigned char mask; 983 984 if (device_may_wakeup(dev)) 985 mask = RTC_IRQMASK & ~RTC_AIE; 986 else 987 mask = RTC_IRQMASK; 988 tmp &= ~mask; 989 CMOS_WRITE(tmp, RTC_CONTROL); 990 if (use_hpet_alarm()) 991 hpet_mask_rtc_irq_bit(mask); 992 cmos_checkintr(cmos, tmp); 993 } 994 spin_unlock_irq(&rtc_lock); 995 996 if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) { 997 cmos->enabled_wake = 1; 998 if (cmos->wake_on) 999 cmos->wake_on(dev); 1000 else 1001 enable_irq_wake(cmos->irq); 1002 } 1003 1004 cmos_read_alarm(dev, &cmos->saved_wkalrm); 1005 1006 dev_dbg(dev, "suspend%s, ctrl %02x\n", 1007 (tmp & RTC_AIE) ? ", alarm may wake" : "", 1008 tmp); 1009 1010 return 0; 1011 } 1012 1013 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even 1014 * after a detour through G3 "mechanical off", although the ACPI spec 1015 * says wakeup should only work from G1/S4 "hibernate". To most users, 1016 * distinctions between S4 and S5 are pointless. So when the hardware 1017 * allows, don't draw that distinction. 1018 */ 1019 static inline int cmos_poweroff(struct device *dev) 1020 { 1021 if (!IS_ENABLED(CONFIG_PM)) 1022 return -ENOSYS; 1023 1024 return cmos_suspend(dev); 1025 } 1026 1027 static void cmos_check_wkalrm(struct device *dev) 1028 { 1029 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1030 struct rtc_wkalrm current_alarm; 1031 time64_t t_now; 1032 time64_t t_current_expires; 1033 time64_t t_saved_expires; 1034 struct rtc_time now; 1035 1036 /* Check if we have RTC Alarm armed */ 1037 if (!(cmos->suspend_ctrl & RTC_AIE)) 1038 return; 1039 1040 cmos_read_time(dev, &now); 1041 t_now = rtc_tm_to_time64(&now); 1042 1043 /* 1044 * ACPI RTC wake event is cleared after resume from STR, 1045 * ACK the rtc irq here 1046 */ 1047 if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) { 1048 cmos_interrupt(0, (void *)cmos->rtc); 1049 return; 1050 } 1051 1052 cmos_read_alarm(dev, ¤t_alarm); 1053 t_current_expires = rtc_tm_to_time64(¤t_alarm.time); 1054 t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time); 1055 if (t_current_expires != t_saved_expires || 1056 cmos->saved_wkalrm.enabled != current_alarm.enabled) { 1057 cmos_set_alarm(dev, &cmos->saved_wkalrm); 1058 } 1059 } 1060 1061 static void cmos_check_acpi_rtc_status(struct device *dev, 1062 unsigned char *rtc_control); 1063 1064 static int __maybe_unused cmos_resume(struct device *dev) 1065 { 1066 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1067 unsigned char tmp; 1068 1069 if (cmos->enabled_wake && !cmos_use_acpi_alarm()) { 1070 if (cmos->wake_off) 1071 cmos->wake_off(dev); 1072 else 1073 disable_irq_wake(cmos->irq); 1074 cmos->enabled_wake = 0; 1075 } 1076 1077 /* The BIOS might have changed the alarm, restore it */ 1078 cmos_check_wkalrm(dev); 1079 1080 spin_lock_irq(&rtc_lock); 1081 tmp = cmos->suspend_ctrl; 1082 cmos->suspend_ctrl = 0; 1083 /* re-enable any irqs previously active */ 1084 if (tmp & RTC_IRQMASK) { 1085 unsigned char mask; 1086 1087 if (device_may_wakeup(dev) && use_hpet_alarm()) 1088 hpet_rtc_timer_init(); 1089 1090 do { 1091 CMOS_WRITE(tmp, RTC_CONTROL); 1092 if (use_hpet_alarm()) 1093 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK); 1094 1095 mask = CMOS_READ(RTC_INTR_FLAGS); 1096 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF; 1097 if (!use_hpet_alarm() || !is_intr(mask)) 1098 break; 1099 1100 /* force one-shot behavior if HPET blocked 1101 * the wake alarm's irq 1102 */ 1103 rtc_update_irq(cmos->rtc, 1, mask); 1104 tmp &= ~RTC_AIE; 1105 hpet_mask_rtc_irq_bit(RTC_AIE); 1106 } while (mask & RTC_AIE); 1107 1108 if (tmp & RTC_AIE) 1109 cmos_check_acpi_rtc_status(dev, &tmp); 1110 } 1111 spin_unlock_irq(&rtc_lock); 1112 1113 dev_dbg(dev, "resume, ctrl %02x\n", tmp); 1114 1115 return 0; 1116 } 1117 1118 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume); 1119 1120 /*----------------------------------------------------------------*/ 1121 1122 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus. 1123 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs 1124 * probably list them in similar PNPBIOS tables; so PNP is more common. 1125 * 1126 * We don't use legacy "poke at the hardware" probing. Ancient PCs that 1127 * predate even PNPBIOS should set up platform_bus devices. 1128 */ 1129 1130 #ifdef CONFIG_ACPI 1131 1132 #include <linux/acpi.h> 1133 1134 static u32 rtc_handler(void *context) 1135 { 1136 struct device *dev = context; 1137 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1138 unsigned char rtc_control = 0; 1139 unsigned char rtc_intr; 1140 unsigned long flags; 1141 1142 1143 /* 1144 * Always update rtc irq when ACPI is used as RTC Alarm. 1145 * Or else, ACPI SCI is enabled during suspend/resume only, 1146 * update rtc irq in that case. 1147 */ 1148 if (cmos_use_acpi_alarm()) 1149 cmos_interrupt(0, (void *)cmos->rtc); 1150 else { 1151 /* Fix me: can we use cmos_interrupt() here as well? */ 1152 spin_lock_irqsave(&rtc_lock, flags); 1153 if (cmos_rtc.suspend_ctrl) 1154 rtc_control = CMOS_READ(RTC_CONTROL); 1155 if (rtc_control & RTC_AIE) { 1156 cmos_rtc.suspend_ctrl &= ~RTC_AIE; 1157 CMOS_WRITE(rtc_control, RTC_CONTROL); 1158 rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 1159 rtc_update_irq(cmos->rtc, 1, rtc_intr); 1160 } 1161 spin_unlock_irqrestore(&rtc_lock, flags); 1162 } 1163 1164 pm_wakeup_hard_event(dev); 1165 acpi_clear_event(ACPI_EVENT_RTC); 1166 acpi_disable_event(ACPI_EVENT_RTC, 0); 1167 return ACPI_INTERRUPT_HANDLED; 1168 } 1169 1170 static inline void rtc_wake_setup(struct device *dev) 1171 { 1172 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev); 1173 /* 1174 * After the RTC handler is installed, the Fixed_RTC event should 1175 * be disabled. Only when the RTC alarm is set will it be enabled. 1176 */ 1177 acpi_clear_event(ACPI_EVENT_RTC); 1178 acpi_disable_event(ACPI_EVENT_RTC, 0); 1179 } 1180 1181 static void rtc_wake_on(struct device *dev) 1182 { 1183 acpi_clear_event(ACPI_EVENT_RTC); 1184 acpi_enable_event(ACPI_EVENT_RTC, 0); 1185 } 1186 1187 static void rtc_wake_off(struct device *dev) 1188 { 1189 acpi_disable_event(ACPI_EVENT_RTC, 0); 1190 } 1191 1192 #ifdef CONFIG_X86 1193 /* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */ 1194 static void use_acpi_alarm_quirks(void) 1195 { 1196 int year; 1197 1198 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) 1199 return; 1200 1201 if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0)) 1202 return; 1203 1204 if (!is_hpet_enabled()) 1205 return; 1206 1207 if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year >= 2015) 1208 use_acpi_alarm = true; 1209 } 1210 #else 1211 static inline void use_acpi_alarm_quirks(void) { } 1212 #endif 1213 1214 /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find 1215 * its device node and pass extra config data. This helps its driver use 1216 * capabilities that the now-obsolete mc146818 didn't have, and informs it 1217 * that this board's RTC is wakeup-capable (per ACPI spec). 1218 */ 1219 static struct cmos_rtc_board_info acpi_rtc_info; 1220 1221 static void cmos_wake_setup(struct device *dev) 1222 { 1223 if (acpi_disabled) 1224 return; 1225 1226 use_acpi_alarm_quirks(); 1227 1228 rtc_wake_setup(dev); 1229 acpi_rtc_info.wake_on = rtc_wake_on; 1230 acpi_rtc_info.wake_off = rtc_wake_off; 1231 1232 /* workaround bug in some ACPI tables */ 1233 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) { 1234 dev_dbg(dev, "bogus FADT month_alarm (%d)\n", 1235 acpi_gbl_FADT.month_alarm); 1236 acpi_gbl_FADT.month_alarm = 0; 1237 } 1238 1239 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm; 1240 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm; 1241 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century; 1242 1243 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */ 1244 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE) 1245 dev_info(dev, "RTC can wake from S4\n"); 1246 1247 dev->platform_data = &acpi_rtc_info; 1248 1249 /* RTC always wakes from S1/S2/S3, and often S4/STD */ 1250 device_init_wakeup(dev, 1); 1251 } 1252 1253 static void cmos_check_acpi_rtc_status(struct device *dev, 1254 unsigned char *rtc_control) 1255 { 1256 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1257 acpi_event_status rtc_status; 1258 acpi_status status; 1259 1260 if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC) 1261 return; 1262 1263 status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status); 1264 if (ACPI_FAILURE(status)) { 1265 dev_err(dev, "Could not get RTC status\n"); 1266 } else if (rtc_status & ACPI_EVENT_FLAG_SET) { 1267 unsigned char mask; 1268 *rtc_control &= ~RTC_AIE; 1269 CMOS_WRITE(*rtc_control, RTC_CONTROL); 1270 mask = CMOS_READ(RTC_INTR_FLAGS); 1271 rtc_update_irq(cmos->rtc, 1, mask); 1272 } 1273 } 1274 1275 #else 1276 1277 static void cmos_wake_setup(struct device *dev) 1278 { 1279 } 1280 1281 static void cmos_check_acpi_rtc_status(struct device *dev, 1282 unsigned char *rtc_control) 1283 { 1284 } 1285 1286 #endif 1287 1288 #ifdef CONFIG_PNP 1289 1290 #include <linux/pnp.h> 1291 1292 static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id) 1293 { 1294 cmos_wake_setup(&pnp->dev); 1295 1296 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) { 1297 unsigned int irq = 0; 1298 #ifdef CONFIG_X86 1299 /* Some machines contain a PNP entry for the RTC, but 1300 * don't define the IRQ. It should always be safe to 1301 * hardcode it on systems with a legacy PIC. 1302 */ 1303 if (nr_legacy_irqs()) 1304 irq = 8; 1305 #endif 1306 return cmos_do_probe(&pnp->dev, 1307 pnp_get_resource(pnp, IORESOURCE_IO, 0), irq); 1308 } else { 1309 return cmos_do_probe(&pnp->dev, 1310 pnp_get_resource(pnp, IORESOURCE_IO, 0), 1311 pnp_irq(pnp, 0)); 1312 } 1313 } 1314 1315 static void cmos_pnp_remove(struct pnp_dev *pnp) 1316 { 1317 cmos_do_remove(&pnp->dev); 1318 } 1319 1320 static void cmos_pnp_shutdown(struct pnp_dev *pnp) 1321 { 1322 struct device *dev = &pnp->dev; 1323 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1324 1325 if (system_state == SYSTEM_POWER_OFF) { 1326 int retval = cmos_poweroff(dev); 1327 1328 if (cmos_aie_poweroff(dev) < 0 && !retval) 1329 return; 1330 } 1331 1332 cmos_do_shutdown(cmos->irq); 1333 } 1334 1335 static const struct pnp_device_id rtc_ids[] = { 1336 { .id = "PNP0b00", }, 1337 { .id = "PNP0b01", }, 1338 { .id = "PNP0b02", }, 1339 { }, 1340 }; 1341 MODULE_DEVICE_TABLE(pnp, rtc_ids); 1342 1343 static struct pnp_driver cmos_pnp_driver = { 1344 .name = (char *) driver_name, 1345 .id_table = rtc_ids, 1346 .probe = cmos_pnp_probe, 1347 .remove = cmos_pnp_remove, 1348 .shutdown = cmos_pnp_shutdown, 1349 1350 /* flag ensures resume() gets called, and stops syslog spam */ 1351 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, 1352 .driver = { 1353 .pm = &cmos_pm_ops, 1354 }, 1355 }; 1356 1357 #endif /* CONFIG_PNP */ 1358 1359 #ifdef CONFIG_OF 1360 static const struct of_device_id of_cmos_match[] = { 1361 { 1362 .compatible = "motorola,mc146818", 1363 }, 1364 { }, 1365 }; 1366 MODULE_DEVICE_TABLE(of, of_cmos_match); 1367 1368 static __init void cmos_of_init(struct platform_device *pdev) 1369 { 1370 struct device_node *node = pdev->dev.of_node; 1371 const __be32 *val; 1372 1373 if (!node) 1374 return; 1375 1376 val = of_get_property(node, "ctrl-reg", NULL); 1377 if (val) 1378 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL); 1379 1380 val = of_get_property(node, "freq-reg", NULL); 1381 if (val) 1382 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT); 1383 } 1384 #else 1385 static inline void cmos_of_init(struct platform_device *pdev) {} 1386 #endif 1387 /*----------------------------------------------------------------*/ 1388 1389 /* Platform setup should have set up an RTC device, when PNP is 1390 * unavailable ... this could happen even on (older) PCs. 1391 */ 1392 1393 static int __init cmos_platform_probe(struct platform_device *pdev) 1394 { 1395 struct resource *resource; 1396 int irq; 1397 1398 cmos_of_init(pdev); 1399 cmos_wake_setup(&pdev->dev); 1400 1401 if (RTC_IOMAPPED) 1402 resource = platform_get_resource(pdev, IORESOURCE_IO, 0); 1403 else 1404 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1405 irq = platform_get_irq(pdev, 0); 1406 if (irq < 0) 1407 irq = -1; 1408 1409 return cmos_do_probe(&pdev->dev, resource, irq); 1410 } 1411 1412 static int cmos_platform_remove(struct platform_device *pdev) 1413 { 1414 cmos_do_remove(&pdev->dev); 1415 return 0; 1416 } 1417 1418 static void cmos_platform_shutdown(struct platform_device *pdev) 1419 { 1420 struct device *dev = &pdev->dev; 1421 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1422 1423 if (system_state == SYSTEM_POWER_OFF) { 1424 int retval = cmos_poweroff(dev); 1425 1426 if (cmos_aie_poweroff(dev) < 0 && !retval) 1427 return; 1428 } 1429 1430 cmos_do_shutdown(cmos->irq); 1431 } 1432 1433 /* work with hotplug and coldplug */ 1434 MODULE_ALIAS("platform:rtc_cmos"); 1435 1436 static struct platform_driver cmos_platform_driver = { 1437 .remove = cmos_platform_remove, 1438 .shutdown = cmos_platform_shutdown, 1439 .driver = { 1440 .name = driver_name, 1441 .pm = &cmos_pm_ops, 1442 .of_match_table = of_match_ptr(of_cmos_match), 1443 } 1444 }; 1445 1446 #ifdef CONFIG_PNP 1447 static bool pnp_driver_registered; 1448 #endif 1449 static bool platform_driver_registered; 1450 1451 static int __init cmos_init(void) 1452 { 1453 int retval = 0; 1454 1455 #ifdef CONFIG_PNP 1456 retval = pnp_register_driver(&cmos_pnp_driver); 1457 if (retval == 0) 1458 pnp_driver_registered = true; 1459 #endif 1460 1461 if (!cmos_rtc.dev) { 1462 retval = platform_driver_probe(&cmos_platform_driver, 1463 cmos_platform_probe); 1464 if (retval == 0) 1465 platform_driver_registered = true; 1466 } 1467 1468 if (retval == 0) 1469 return 0; 1470 1471 #ifdef CONFIG_PNP 1472 if (pnp_driver_registered) 1473 pnp_unregister_driver(&cmos_pnp_driver); 1474 #endif 1475 return retval; 1476 } 1477 module_init(cmos_init); 1478 1479 static void __exit cmos_exit(void) 1480 { 1481 #ifdef CONFIG_PNP 1482 if (pnp_driver_registered) 1483 pnp_unregister_driver(&cmos_pnp_driver); 1484 #endif 1485 if (platform_driver_registered) 1486 platform_driver_unregister(&cmos_platform_driver); 1487 } 1488 module_exit(cmos_exit); 1489 1490 1491 MODULE_AUTHOR("David Brownell"); 1492 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs"); 1493 MODULE_LICENSE("GPL"); 1494