1 /* 2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc 3 * 4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c) 5 * Copyright (C) 2006 David Brownell (convert to new framework) 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 /* 14 * The original "cmos clock" chip was an MC146818 chip, now obsolete. 15 * That defined the register interface now provided by all PCs, some 16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets 17 * integrate an MC146818 clone in their southbridge, and boards use 18 * that instead of discrete clones like the DS12887 or M48T86. There 19 * are also clones that connect using the LPC bus. 20 * 21 * That register API is also used directly by various other drivers 22 * (notably for integrated NVRAM), infrastructure (x86 has code to 23 * bypass the RTC framework, directly reading the RTC during boot 24 * and updating minutes/seconds for systems using NTP synch) and 25 * utilities (like userspace 'hwclock', if no /dev node exists). 26 * 27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with 28 * interrupts disabled, holding the global rtc_lock, to exclude those 29 * other drivers and utilities on correctly configured systems. 30 */ 31 32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 33 34 #include <linux/kernel.h> 35 #include <linux/module.h> 36 #include <linux/init.h> 37 #include <linux/interrupt.h> 38 #include <linux/spinlock.h> 39 #include <linux/platform_device.h> 40 #include <linux/log2.h> 41 #include <linux/pm.h> 42 #include <linux/of.h> 43 #include <linux/of_platform.h> 44 #ifdef CONFIG_X86 45 #include <asm/i8259.h> 46 #include <asm/processor.h> 47 #include <linux/dmi.h> 48 #endif 49 50 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */ 51 #include <linux/mc146818rtc.h> 52 53 #ifdef CONFIG_ACPI 54 /* 55 * Use ACPI SCI to replace HPET interrupt for RTC Alarm event 56 * 57 * If cleared, ACPI SCI is only used to wake up the system from suspend 58 * 59 * If set, ACPI SCI is used to handle UIE/AIE and system wakeup 60 */ 61 62 static bool use_acpi_alarm; 63 module_param(use_acpi_alarm, bool, 0444); 64 65 static inline int cmos_use_acpi_alarm(void) 66 { 67 return use_acpi_alarm; 68 } 69 #else /* !CONFIG_ACPI */ 70 71 static inline int cmos_use_acpi_alarm(void) 72 { 73 return 0; 74 } 75 #endif 76 77 struct cmos_rtc { 78 struct rtc_device *rtc; 79 struct device *dev; 80 int irq; 81 struct resource *iomem; 82 time64_t alarm_expires; 83 84 void (*wake_on)(struct device *); 85 void (*wake_off)(struct device *); 86 87 u8 enabled_wake; 88 u8 suspend_ctrl; 89 90 /* newer hardware extends the original register set */ 91 u8 day_alrm; 92 u8 mon_alrm; 93 u8 century; 94 95 struct rtc_wkalrm saved_wkalrm; 96 }; 97 98 /* both platform and pnp busses use negative numbers for invalid irqs */ 99 #define is_valid_irq(n) ((n) > 0) 100 101 static const char driver_name[] = "rtc_cmos"; 102 103 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear; 104 * always mask it against the irq enable bits in RTC_CONTROL. Bit values 105 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both. 106 */ 107 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF) 108 109 static inline int is_intr(u8 rtc_intr) 110 { 111 if (!(rtc_intr & RTC_IRQF)) 112 return 0; 113 return rtc_intr & RTC_IRQMASK; 114 } 115 116 /*----------------------------------------------------------------*/ 117 118 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because 119 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly 120 * used in a broken "legacy replacement" mode. The breakage includes 121 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for 122 * other (better) use. 123 * 124 * When that broken mode is in use, platform glue provides a partial 125 * emulation of hardware RTC IRQ facilities using HPET #1. We don't 126 * want to use HPET for anything except those IRQs though... 127 */ 128 #ifdef CONFIG_HPET_EMULATE_RTC 129 #include <asm/hpet.h> 130 #else 131 132 static inline int is_hpet_enabled(void) 133 { 134 return 0; 135 } 136 137 static inline int hpet_mask_rtc_irq_bit(unsigned long mask) 138 { 139 return 0; 140 } 141 142 static inline int hpet_set_rtc_irq_bit(unsigned long mask) 143 { 144 return 0; 145 } 146 147 static inline int 148 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec) 149 { 150 return 0; 151 } 152 153 static inline int hpet_set_periodic_freq(unsigned long freq) 154 { 155 return 0; 156 } 157 158 static inline int hpet_rtc_dropped_irq(void) 159 { 160 return 0; 161 } 162 163 static inline int hpet_rtc_timer_init(void) 164 { 165 return 0; 166 } 167 168 extern irq_handler_t hpet_rtc_interrupt; 169 170 static inline int hpet_register_irq_handler(irq_handler_t handler) 171 { 172 return 0; 173 } 174 175 static inline int hpet_unregister_irq_handler(irq_handler_t handler) 176 { 177 return 0; 178 } 179 180 #endif 181 182 /* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */ 183 static inline int use_hpet_alarm(void) 184 { 185 return is_hpet_enabled() && !cmos_use_acpi_alarm(); 186 } 187 188 /*----------------------------------------------------------------*/ 189 190 #ifdef RTC_PORT 191 192 /* Most newer x86 systems have two register banks, the first used 193 * for RTC and NVRAM and the second only for NVRAM. Caller must 194 * own rtc_lock ... and we won't worry about access during NMI. 195 */ 196 #define can_bank2 true 197 198 static inline unsigned char cmos_read_bank2(unsigned char addr) 199 { 200 outb(addr, RTC_PORT(2)); 201 return inb(RTC_PORT(3)); 202 } 203 204 static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 205 { 206 outb(addr, RTC_PORT(2)); 207 outb(val, RTC_PORT(3)); 208 } 209 210 #else 211 212 #define can_bank2 false 213 214 static inline unsigned char cmos_read_bank2(unsigned char addr) 215 { 216 return 0; 217 } 218 219 static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 220 { 221 } 222 223 #endif 224 225 /*----------------------------------------------------------------*/ 226 227 static int cmos_read_time(struct device *dev, struct rtc_time *t) 228 { 229 /* 230 * If pm_trace abused the RTC for storage, set the timespec to 0, 231 * which tells the caller that this RTC value is unusable. 232 */ 233 if (!pm_trace_rtc_valid()) 234 return -EIO; 235 236 /* REVISIT: if the clock has a "century" register, use 237 * that instead of the heuristic in mc146818_get_time(). 238 * That'll make Y3K compatility (year > 2070) easy! 239 */ 240 mc146818_get_time(t); 241 return 0; 242 } 243 244 static int cmos_set_time(struct device *dev, struct rtc_time *t) 245 { 246 /* REVISIT: set the "century" register if available 247 * 248 * NOTE: this ignores the issue whereby updating the seconds 249 * takes effect exactly 500ms after we write the register. 250 * (Also queueing and other delays before we get this far.) 251 */ 252 return mc146818_set_time(t); 253 } 254 255 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t) 256 { 257 struct cmos_rtc *cmos = dev_get_drvdata(dev); 258 unsigned char rtc_control; 259 260 /* This not only a rtc_op, but also called directly */ 261 if (!is_valid_irq(cmos->irq)) 262 return -EIO; 263 264 /* Basic alarms only support hour, minute, and seconds fields. 265 * Some also support day and month, for alarms up to a year in 266 * the future. 267 */ 268 269 spin_lock_irq(&rtc_lock); 270 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM); 271 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM); 272 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM); 273 274 if (cmos->day_alrm) { 275 /* ignore upper bits on readback per ACPI spec */ 276 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f; 277 if (!t->time.tm_mday) 278 t->time.tm_mday = -1; 279 280 if (cmos->mon_alrm) { 281 t->time.tm_mon = CMOS_READ(cmos->mon_alrm); 282 if (!t->time.tm_mon) 283 t->time.tm_mon = -1; 284 } 285 } 286 287 rtc_control = CMOS_READ(RTC_CONTROL); 288 spin_unlock_irq(&rtc_lock); 289 290 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 291 if (((unsigned)t->time.tm_sec) < 0x60) 292 t->time.tm_sec = bcd2bin(t->time.tm_sec); 293 else 294 t->time.tm_sec = -1; 295 if (((unsigned)t->time.tm_min) < 0x60) 296 t->time.tm_min = bcd2bin(t->time.tm_min); 297 else 298 t->time.tm_min = -1; 299 if (((unsigned)t->time.tm_hour) < 0x24) 300 t->time.tm_hour = bcd2bin(t->time.tm_hour); 301 else 302 t->time.tm_hour = -1; 303 304 if (cmos->day_alrm) { 305 if (((unsigned)t->time.tm_mday) <= 0x31) 306 t->time.tm_mday = bcd2bin(t->time.tm_mday); 307 else 308 t->time.tm_mday = -1; 309 310 if (cmos->mon_alrm) { 311 if (((unsigned)t->time.tm_mon) <= 0x12) 312 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1; 313 else 314 t->time.tm_mon = -1; 315 } 316 } 317 } 318 319 t->enabled = !!(rtc_control & RTC_AIE); 320 t->pending = 0; 321 322 return 0; 323 } 324 325 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control) 326 { 327 unsigned char rtc_intr; 328 329 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS; 330 * allegedly some older rtcs need that to handle irqs properly 331 */ 332 rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 333 334 if (use_hpet_alarm()) 335 return; 336 337 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 338 if (is_intr(rtc_intr)) 339 rtc_update_irq(cmos->rtc, 1, rtc_intr); 340 } 341 342 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask) 343 { 344 unsigned char rtc_control; 345 346 /* flush any pending IRQ status, notably for update irqs, 347 * before we enable new IRQs 348 */ 349 rtc_control = CMOS_READ(RTC_CONTROL); 350 cmos_checkintr(cmos, rtc_control); 351 352 rtc_control |= mask; 353 CMOS_WRITE(rtc_control, RTC_CONTROL); 354 if (use_hpet_alarm()) 355 hpet_set_rtc_irq_bit(mask); 356 357 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) { 358 if (cmos->wake_on) 359 cmos->wake_on(cmos->dev); 360 } 361 362 cmos_checkintr(cmos, rtc_control); 363 } 364 365 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask) 366 { 367 unsigned char rtc_control; 368 369 rtc_control = CMOS_READ(RTC_CONTROL); 370 rtc_control &= ~mask; 371 CMOS_WRITE(rtc_control, RTC_CONTROL); 372 if (use_hpet_alarm()) 373 hpet_mask_rtc_irq_bit(mask); 374 375 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) { 376 if (cmos->wake_off) 377 cmos->wake_off(cmos->dev); 378 } 379 380 cmos_checkintr(cmos, rtc_control); 381 } 382 383 static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t) 384 { 385 struct cmos_rtc *cmos = dev_get_drvdata(dev); 386 struct rtc_time now; 387 388 cmos_read_time(dev, &now); 389 390 if (!cmos->day_alrm) { 391 time64_t t_max_date; 392 time64_t t_alrm; 393 394 t_max_date = rtc_tm_to_time64(&now); 395 t_max_date += 24 * 60 * 60 - 1; 396 t_alrm = rtc_tm_to_time64(&t->time); 397 if (t_alrm > t_max_date) { 398 dev_err(dev, 399 "Alarms can be up to one day in the future\n"); 400 return -EINVAL; 401 } 402 } else if (!cmos->mon_alrm) { 403 struct rtc_time max_date = now; 404 time64_t t_max_date; 405 time64_t t_alrm; 406 int max_mday; 407 408 if (max_date.tm_mon == 11) { 409 max_date.tm_mon = 0; 410 max_date.tm_year += 1; 411 } else { 412 max_date.tm_mon += 1; 413 } 414 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); 415 if (max_date.tm_mday > max_mday) 416 max_date.tm_mday = max_mday; 417 418 t_max_date = rtc_tm_to_time64(&max_date); 419 t_max_date -= 1; 420 t_alrm = rtc_tm_to_time64(&t->time); 421 if (t_alrm > t_max_date) { 422 dev_err(dev, 423 "Alarms can be up to one month in the future\n"); 424 return -EINVAL; 425 } 426 } else { 427 struct rtc_time max_date = now; 428 time64_t t_max_date; 429 time64_t t_alrm; 430 int max_mday; 431 432 max_date.tm_year += 1; 433 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); 434 if (max_date.tm_mday > max_mday) 435 max_date.tm_mday = max_mday; 436 437 t_max_date = rtc_tm_to_time64(&max_date); 438 t_max_date -= 1; 439 t_alrm = rtc_tm_to_time64(&t->time); 440 if (t_alrm > t_max_date) { 441 dev_err(dev, 442 "Alarms can be up to one year in the future\n"); 443 return -EINVAL; 444 } 445 } 446 447 return 0; 448 } 449 450 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t) 451 { 452 struct cmos_rtc *cmos = dev_get_drvdata(dev); 453 unsigned char mon, mday, hrs, min, sec, rtc_control; 454 int ret; 455 456 /* This not only a rtc_op, but also called directly */ 457 if (!is_valid_irq(cmos->irq)) 458 return -EIO; 459 460 ret = cmos_validate_alarm(dev, t); 461 if (ret < 0) 462 return ret; 463 464 mon = t->time.tm_mon + 1; 465 mday = t->time.tm_mday; 466 hrs = t->time.tm_hour; 467 min = t->time.tm_min; 468 sec = t->time.tm_sec; 469 470 rtc_control = CMOS_READ(RTC_CONTROL); 471 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 472 /* Writing 0xff means "don't care" or "match all". */ 473 mon = (mon <= 12) ? bin2bcd(mon) : 0xff; 474 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff; 475 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff; 476 min = (min < 60) ? bin2bcd(min) : 0xff; 477 sec = (sec < 60) ? bin2bcd(sec) : 0xff; 478 } 479 480 spin_lock_irq(&rtc_lock); 481 482 /* next rtc irq must not be from previous alarm setting */ 483 cmos_irq_disable(cmos, RTC_AIE); 484 485 /* update alarm */ 486 CMOS_WRITE(hrs, RTC_HOURS_ALARM); 487 CMOS_WRITE(min, RTC_MINUTES_ALARM); 488 CMOS_WRITE(sec, RTC_SECONDS_ALARM); 489 490 /* the system may support an "enhanced" alarm */ 491 if (cmos->day_alrm) { 492 CMOS_WRITE(mday, cmos->day_alrm); 493 if (cmos->mon_alrm) 494 CMOS_WRITE(mon, cmos->mon_alrm); 495 } 496 497 if (use_hpet_alarm()) { 498 /* 499 * FIXME the HPET alarm glue currently ignores day_alrm 500 * and mon_alrm ... 501 */ 502 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, 503 t->time.tm_sec); 504 } 505 506 if (t->enabled) 507 cmos_irq_enable(cmos, RTC_AIE); 508 509 spin_unlock_irq(&rtc_lock); 510 511 cmos->alarm_expires = rtc_tm_to_time64(&t->time); 512 513 return 0; 514 } 515 516 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled) 517 { 518 struct cmos_rtc *cmos = dev_get_drvdata(dev); 519 unsigned long flags; 520 521 spin_lock_irqsave(&rtc_lock, flags); 522 523 if (enabled) 524 cmos_irq_enable(cmos, RTC_AIE); 525 else 526 cmos_irq_disable(cmos, RTC_AIE); 527 528 spin_unlock_irqrestore(&rtc_lock, flags); 529 return 0; 530 } 531 532 #if IS_ENABLED(CONFIG_RTC_INTF_PROC) 533 534 static int cmos_procfs(struct device *dev, struct seq_file *seq) 535 { 536 struct cmos_rtc *cmos = dev_get_drvdata(dev); 537 unsigned char rtc_control, valid; 538 539 spin_lock_irq(&rtc_lock); 540 rtc_control = CMOS_READ(RTC_CONTROL); 541 valid = CMOS_READ(RTC_VALID); 542 spin_unlock_irq(&rtc_lock); 543 544 /* NOTE: at least ICH6 reports battery status using a different 545 * (non-RTC) bit; and SQWE is ignored on many current systems. 546 */ 547 seq_printf(seq, 548 "periodic_IRQ\t: %s\n" 549 "update_IRQ\t: %s\n" 550 "HPET_emulated\t: %s\n" 551 // "square_wave\t: %s\n" 552 "BCD\t\t: %s\n" 553 "DST_enable\t: %s\n" 554 "periodic_freq\t: %d\n" 555 "batt_status\t: %s\n", 556 (rtc_control & RTC_PIE) ? "yes" : "no", 557 (rtc_control & RTC_UIE) ? "yes" : "no", 558 use_hpet_alarm() ? "yes" : "no", 559 // (rtc_control & RTC_SQWE) ? "yes" : "no", 560 (rtc_control & RTC_DM_BINARY) ? "no" : "yes", 561 (rtc_control & RTC_DST_EN) ? "yes" : "no", 562 cmos->rtc->irq_freq, 563 (valid & RTC_VRT) ? "okay" : "dead"); 564 565 return 0; 566 } 567 568 #else 569 #define cmos_procfs NULL 570 #endif 571 572 static const struct rtc_class_ops cmos_rtc_ops = { 573 .read_time = cmos_read_time, 574 .set_time = cmos_set_time, 575 .read_alarm = cmos_read_alarm, 576 .set_alarm = cmos_set_alarm, 577 .proc = cmos_procfs, 578 .alarm_irq_enable = cmos_alarm_irq_enable, 579 }; 580 581 static const struct rtc_class_ops cmos_rtc_ops_no_alarm = { 582 .read_time = cmos_read_time, 583 .set_time = cmos_set_time, 584 .proc = cmos_procfs, 585 }; 586 587 /*----------------------------------------------------------------*/ 588 589 /* 590 * All these chips have at least 64 bytes of address space, shared by 591 * RTC registers and NVRAM. Most of those bytes of NVRAM are used 592 * by boot firmware. Modern chips have 128 or 256 bytes. 593 */ 594 595 #define NVRAM_OFFSET (RTC_REG_D + 1) 596 597 static int cmos_nvram_read(void *priv, unsigned int off, void *val, 598 size_t count) 599 { 600 unsigned char *buf = val; 601 int retval; 602 603 off += NVRAM_OFFSET; 604 spin_lock_irq(&rtc_lock); 605 for (retval = 0; count; count--, off++, retval++) { 606 if (off < 128) 607 *buf++ = CMOS_READ(off); 608 else if (can_bank2) 609 *buf++ = cmos_read_bank2(off); 610 else 611 break; 612 } 613 spin_unlock_irq(&rtc_lock); 614 615 return retval; 616 } 617 618 static int cmos_nvram_write(void *priv, unsigned int off, void *val, 619 size_t count) 620 { 621 struct cmos_rtc *cmos = priv; 622 unsigned char *buf = val; 623 int retval; 624 625 /* NOTE: on at least PCs and Ataris, the boot firmware uses a 626 * checksum on part of the NVRAM data. That's currently ignored 627 * here. If userspace is smart enough to know what fields of 628 * NVRAM to update, updating checksums is also part of its job. 629 */ 630 off += NVRAM_OFFSET; 631 spin_lock_irq(&rtc_lock); 632 for (retval = 0; count; count--, off++, retval++) { 633 /* don't trash RTC registers */ 634 if (off == cmos->day_alrm 635 || off == cmos->mon_alrm 636 || off == cmos->century) 637 buf++; 638 else if (off < 128) 639 CMOS_WRITE(*buf++, off); 640 else if (can_bank2) 641 cmos_write_bank2(*buf++, off); 642 else 643 break; 644 } 645 spin_unlock_irq(&rtc_lock); 646 647 return retval; 648 } 649 650 /*----------------------------------------------------------------*/ 651 652 static struct cmos_rtc cmos_rtc; 653 654 static irqreturn_t cmos_interrupt(int irq, void *p) 655 { 656 u8 irqstat; 657 u8 rtc_control; 658 659 spin_lock(&rtc_lock); 660 661 /* When the HPET interrupt handler calls us, the interrupt 662 * status is passed as arg1 instead of the irq number. But 663 * always clear irq status, even when HPET is in the way. 664 * 665 * Note that HPET and RTC are almost certainly out of phase, 666 * giving different IRQ status ... 667 */ 668 irqstat = CMOS_READ(RTC_INTR_FLAGS); 669 rtc_control = CMOS_READ(RTC_CONTROL); 670 if (use_hpet_alarm()) 671 irqstat = (unsigned long)irq & 0xF0; 672 673 /* If we were suspended, RTC_CONTROL may not be accurate since the 674 * bios may have cleared it. 675 */ 676 if (!cmos_rtc.suspend_ctrl) 677 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 678 else 679 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF; 680 681 /* All Linux RTC alarms should be treated as if they were oneshot. 682 * Similar code may be needed in system wakeup paths, in case the 683 * alarm woke the system. 684 */ 685 if (irqstat & RTC_AIE) { 686 cmos_rtc.suspend_ctrl &= ~RTC_AIE; 687 rtc_control &= ~RTC_AIE; 688 CMOS_WRITE(rtc_control, RTC_CONTROL); 689 if (use_hpet_alarm()) 690 hpet_mask_rtc_irq_bit(RTC_AIE); 691 CMOS_READ(RTC_INTR_FLAGS); 692 } 693 spin_unlock(&rtc_lock); 694 695 if (is_intr(irqstat)) { 696 rtc_update_irq(p, 1, irqstat); 697 return IRQ_HANDLED; 698 } else 699 return IRQ_NONE; 700 } 701 702 #ifdef CONFIG_PNP 703 #define INITSECTION 704 705 #else 706 #define INITSECTION __init 707 #endif 708 709 static int INITSECTION 710 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) 711 { 712 struct cmos_rtc_board_info *info = dev_get_platdata(dev); 713 int retval = 0; 714 unsigned char rtc_control; 715 unsigned address_space; 716 u32 flags = 0; 717 struct nvmem_config nvmem_cfg = { 718 .name = "cmos_nvram", 719 .word_size = 1, 720 .stride = 1, 721 .reg_read = cmos_nvram_read, 722 .reg_write = cmos_nvram_write, 723 .priv = &cmos_rtc, 724 }; 725 726 /* there can be only one ... */ 727 if (cmos_rtc.dev) 728 return -EBUSY; 729 730 if (!ports) 731 return -ENODEV; 732 733 /* Claim I/O ports ASAP, minimizing conflict with legacy driver. 734 * 735 * REVISIT non-x86 systems may instead use memory space resources 736 * (needing ioremap etc), not i/o space resources like this ... 737 */ 738 if (RTC_IOMAPPED) 739 ports = request_region(ports->start, resource_size(ports), 740 driver_name); 741 else 742 ports = request_mem_region(ports->start, resource_size(ports), 743 driver_name); 744 if (!ports) { 745 dev_dbg(dev, "i/o registers already in use\n"); 746 return -EBUSY; 747 } 748 749 cmos_rtc.irq = rtc_irq; 750 cmos_rtc.iomem = ports; 751 752 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM 753 * driver did, but don't reject unknown configs. Old hardware 754 * won't address 128 bytes. Newer chips have multiple banks, 755 * though they may not be listed in one I/O resource. 756 */ 757 #if defined(CONFIG_ATARI) 758 address_space = 64; 759 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \ 760 || defined(__sparc__) || defined(__mips__) \ 761 || defined(__powerpc__) 762 address_space = 128; 763 #else 764 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. 765 address_space = 128; 766 #endif 767 if (can_bank2 && ports->end > (ports->start + 1)) 768 address_space = 256; 769 770 /* For ACPI systems extension info comes from the FADT. On others, 771 * board specific setup provides it as appropriate. Systems where 772 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and 773 * some almost-clones) can provide hooks to make that behave. 774 * 775 * Note that ACPI doesn't preclude putting these registers into 776 * "extended" areas of the chip, including some that we won't yet 777 * expect CMOS_READ and friends to handle. 778 */ 779 if (info) { 780 if (info->flags) 781 flags = info->flags; 782 if (info->address_space) 783 address_space = info->address_space; 784 785 if (info->rtc_day_alarm && info->rtc_day_alarm < 128) 786 cmos_rtc.day_alrm = info->rtc_day_alarm; 787 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128) 788 cmos_rtc.mon_alrm = info->rtc_mon_alarm; 789 if (info->rtc_century && info->rtc_century < 128) 790 cmos_rtc.century = info->rtc_century; 791 792 if (info->wake_on && info->wake_off) { 793 cmos_rtc.wake_on = info->wake_on; 794 cmos_rtc.wake_off = info->wake_off; 795 } 796 } 797 798 cmos_rtc.dev = dev; 799 dev_set_drvdata(dev, &cmos_rtc); 800 801 cmos_rtc.rtc = devm_rtc_allocate_device(dev); 802 if (IS_ERR(cmos_rtc.rtc)) { 803 retval = PTR_ERR(cmos_rtc.rtc); 804 goto cleanup0; 805 } 806 807 rename_region(ports, dev_name(&cmos_rtc.rtc->dev)); 808 809 spin_lock_irq(&rtc_lock); 810 811 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) { 812 /* force periodic irq to CMOS reset default of 1024Hz; 813 * 814 * REVISIT it's been reported that at least one x86_64 ALI 815 * mobo doesn't use 32KHz here ... for portability we might 816 * need to do something about other clock frequencies. 817 */ 818 cmos_rtc.rtc->irq_freq = 1024; 819 if (use_hpet_alarm()) 820 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq); 821 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); 822 } 823 824 /* disable irqs */ 825 if (is_valid_irq(rtc_irq)) 826 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE); 827 828 rtc_control = CMOS_READ(RTC_CONTROL); 829 830 spin_unlock_irq(&rtc_lock); 831 832 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) { 833 dev_warn(dev, "only 24-hr supported\n"); 834 retval = -ENXIO; 835 goto cleanup1; 836 } 837 838 if (use_hpet_alarm()) 839 hpet_rtc_timer_init(); 840 841 if (is_valid_irq(rtc_irq)) { 842 irq_handler_t rtc_cmos_int_handler; 843 844 if (use_hpet_alarm()) { 845 rtc_cmos_int_handler = hpet_rtc_interrupt; 846 retval = hpet_register_irq_handler(cmos_interrupt); 847 if (retval) { 848 hpet_mask_rtc_irq_bit(RTC_IRQMASK); 849 dev_warn(dev, "hpet_register_irq_handler " 850 " failed in rtc_init()."); 851 goto cleanup1; 852 } 853 } else 854 rtc_cmos_int_handler = cmos_interrupt; 855 856 retval = request_irq(rtc_irq, rtc_cmos_int_handler, 857 IRQF_SHARED, dev_name(&cmos_rtc.rtc->dev), 858 cmos_rtc.rtc); 859 if (retval < 0) { 860 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); 861 goto cleanup1; 862 } 863 864 cmos_rtc.rtc->ops = &cmos_rtc_ops; 865 } else { 866 cmos_rtc.rtc->ops = &cmos_rtc_ops_no_alarm; 867 } 868 869 cmos_rtc.rtc->nvram_old_abi = true; 870 retval = rtc_register_device(cmos_rtc.rtc); 871 if (retval) 872 goto cleanup2; 873 874 /* export at least the first block of NVRAM */ 875 nvmem_cfg.size = address_space - NVRAM_OFFSET; 876 if (rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg)) 877 dev_err(dev, "nvmem registration failed\n"); 878 879 dev_info(dev, "%s%s, %d bytes nvram%s\n", 880 !is_valid_irq(rtc_irq) ? "no alarms" : 881 cmos_rtc.mon_alrm ? "alarms up to one year" : 882 cmos_rtc.day_alrm ? "alarms up to one month" : 883 "alarms up to one day", 884 cmos_rtc.century ? ", y3k" : "", 885 nvmem_cfg.size, 886 use_hpet_alarm() ? ", hpet irqs" : ""); 887 888 return 0; 889 890 cleanup2: 891 if (is_valid_irq(rtc_irq)) 892 free_irq(rtc_irq, cmos_rtc.rtc); 893 cleanup1: 894 cmos_rtc.dev = NULL; 895 cleanup0: 896 if (RTC_IOMAPPED) 897 release_region(ports->start, resource_size(ports)); 898 else 899 release_mem_region(ports->start, resource_size(ports)); 900 return retval; 901 } 902 903 static void cmos_do_shutdown(int rtc_irq) 904 { 905 spin_lock_irq(&rtc_lock); 906 if (is_valid_irq(rtc_irq)) 907 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK); 908 spin_unlock_irq(&rtc_lock); 909 } 910 911 static void cmos_do_remove(struct device *dev) 912 { 913 struct cmos_rtc *cmos = dev_get_drvdata(dev); 914 struct resource *ports; 915 916 cmos_do_shutdown(cmos->irq); 917 918 if (is_valid_irq(cmos->irq)) { 919 free_irq(cmos->irq, cmos->rtc); 920 if (use_hpet_alarm()) 921 hpet_unregister_irq_handler(cmos_interrupt); 922 } 923 924 cmos->rtc = NULL; 925 926 ports = cmos->iomem; 927 if (RTC_IOMAPPED) 928 release_region(ports->start, resource_size(ports)); 929 else 930 release_mem_region(ports->start, resource_size(ports)); 931 cmos->iomem = NULL; 932 933 cmos->dev = NULL; 934 } 935 936 static int cmos_aie_poweroff(struct device *dev) 937 { 938 struct cmos_rtc *cmos = dev_get_drvdata(dev); 939 struct rtc_time now; 940 time64_t t_now; 941 int retval = 0; 942 unsigned char rtc_control; 943 944 if (!cmos->alarm_expires) 945 return -EINVAL; 946 947 spin_lock_irq(&rtc_lock); 948 rtc_control = CMOS_READ(RTC_CONTROL); 949 spin_unlock_irq(&rtc_lock); 950 951 /* We only care about the situation where AIE is disabled. */ 952 if (rtc_control & RTC_AIE) 953 return -EBUSY; 954 955 cmos_read_time(dev, &now); 956 t_now = rtc_tm_to_time64(&now); 957 958 /* 959 * When enabling "RTC wake-up" in BIOS setup, the machine reboots 960 * automatically right after shutdown on some buggy boxes. 961 * This automatic rebooting issue won't happen when the alarm 962 * time is larger than now+1 seconds. 963 * 964 * If the alarm time is equal to now+1 seconds, the issue can be 965 * prevented by cancelling the alarm. 966 */ 967 if (cmos->alarm_expires == t_now + 1) { 968 struct rtc_wkalrm alarm; 969 970 /* Cancel the AIE timer by configuring the past time. */ 971 rtc_time64_to_tm(t_now - 1, &alarm.time); 972 alarm.enabled = 0; 973 retval = cmos_set_alarm(dev, &alarm); 974 } else if (cmos->alarm_expires > t_now + 1) { 975 retval = -EBUSY; 976 } 977 978 return retval; 979 } 980 981 static int cmos_suspend(struct device *dev) 982 { 983 struct cmos_rtc *cmos = dev_get_drvdata(dev); 984 unsigned char tmp; 985 986 /* only the alarm might be a wakeup event source */ 987 spin_lock_irq(&rtc_lock); 988 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL); 989 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { 990 unsigned char mask; 991 992 if (device_may_wakeup(dev)) 993 mask = RTC_IRQMASK & ~RTC_AIE; 994 else 995 mask = RTC_IRQMASK; 996 tmp &= ~mask; 997 CMOS_WRITE(tmp, RTC_CONTROL); 998 if (use_hpet_alarm()) 999 hpet_mask_rtc_irq_bit(mask); 1000 cmos_checkintr(cmos, tmp); 1001 } 1002 spin_unlock_irq(&rtc_lock); 1003 1004 if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) { 1005 cmos->enabled_wake = 1; 1006 if (cmos->wake_on) 1007 cmos->wake_on(dev); 1008 else 1009 enable_irq_wake(cmos->irq); 1010 } 1011 1012 cmos_read_alarm(dev, &cmos->saved_wkalrm); 1013 1014 dev_dbg(dev, "suspend%s, ctrl %02x\n", 1015 (tmp & RTC_AIE) ? ", alarm may wake" : "", 1016 tmp); 1017 1018 return 0; 1019 } 1020 1021 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even 1022 * after a detour through G3 "mechanical off", although the ACPI spec 1023 * says wakeup should only work from G1/S4 "hibernate". To most users, 1024 * distinctions between S4 and S5 are pointless. So when the hardware 1025 * allows, don't draw that distinction. 1026 */ 1027 static inline int cmos_poweroff(struct device *dev) 1028 { 1029 if (!IS_ENABLED(CONFIG_PM)) 1030 return -ENOSYS; 1031 1032 return cmos_suspend(dev); 1033 } 1034 1035 static void cmos_check_wkalrm(struct device *dev) 1036 { 1037 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1038 struct rtc_wkalrm current_alarm; 1039 time64_t t_now; 1040 time64_t t_current_expires; 1041 time64_t t_saved_expires; 1042 struct rtc_time now; 1043 1044 /* Check if we have RTC Alarm armed */ 1045 if (!(cmos->suspend_ctrl & RTC_AIE)) 1046 return; 1047 1048 cmos_read_time(dev, &now); 1049 t_now = rtc_tm_to_time64(&now); 1050 1051 /* 1052 * ACPI RTC wake event is cleared after resume from STR, 1053 * ACK the rtc irq here 1054 */ 1055 if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) { 1056 cmos_interrupt(0, (void *)cmos->rtc); 1057 return; 1058 } 1059 1060 cmos_read_alarm(dev, ¤t_alarm); 1061 t_current_expires = rtc_tm_to_time64(¤t_alarm.time); 1062 t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time); 1063 if (t_current_expires != t_saved_expires || 1064 cmos->saved_wkalrm.enabled != current_alarm.enabled) { 1065 cmos_set_alarm(dev, &cmos->saved_wkalrm); 1066 } 1067 } 1068 1069 static void cmos_check_acpi_rtc_status(struct device *dev, 1070 unsigned char *rtc_control); 1071 1072 static int __maybe_unused cmos_resume(struct device *dev) 1073 { 1074 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1075 unsigned char tmp; 1076 1077 if (cmos->enabled_wake && !cmos_use_acpi_alarm()) { 1078 if (cmos->wake_off) 1079 cmos->wake_off(dev); 1080 else 1081 disable_irq_wake(cmos->irq); 1082 cmos->enabled_wake = 0; 1083 } 1084 1085 /* The BIOS might have changed the alarm, restore it */ 1086 cmos_check_wkalrm(dev); 1087 1088 spin_lock_irq(&rtc_lock); 1089 tmp = cmos->suspend_ctrl; 1090 cmos->suspend_ctrl = 0; 1091 /* re-enable any irqs previously active */ 1092 if (tmp & RTC_IRQMASK) { 1093 unsigned char mask; 1094 1095 if (device_may_wakeup(dev) && use_hpet_alarm()) 1096 hpet_rtc_timer_init(); 1097 1098 do { 1099 CMOS_WRITE(tmp, RTC_CONTROL); 1100 if (use_hpet_alarm()) 1101 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK); 1102 1103 mask = CMOS_READ(RTC_INTR_FLAGS); 1104 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF; 1105 if (!use_hpet_alarm() || !is_intr(mask)) 1106 break; 1107 1108 /* force one-shot behavior if HPET blocked 1109 * the wake alarm's irq 1110 */ 1111 rtc_update_irq(cmos->rtc, 1, mask); 1112 tmp &= ~RTC_AIE; 1113 hpet_mask_rtc_irq_bit(RTC_AIE); 1114 } while (mask & RTC_AIE); 1115 1116 if (tmp & RTC_AIE) 1117 cmos_check_acpi_rtc_status(dev, &tmp); 1118 } 1119 spin_unlock_irq(&rtc_lock); 1120 1121 dev_dbg(dev, "resume, ctrl %02x\n", tmp); 1122 1123 return 0; 1124 } 1125 1126 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume); 1127 1128 /*----------------------------------------------------------------*/ 1129 1130 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus. 1131 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs 1132 * probably list them in similar PNPBIOS tables; so PNP is more common. 1133 * 1134 * We don't use legacy "poke at the hardware" probing. Ancient PCs that 1135 * predate even PNPBIOS should set up platform_bus devices. 1136 */ 1137 1138 #ifdef CONFIG_ACPI 1139 1140 #include <linux/acpi.h> 1141 1142 static u32 rtc_handler(void *context) 1143 { 1144 struct device *dev = context; 1145 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1146 unsigned char rtc_control = 0; 1147 unsigned char rtc_intr; 1148 unsigned long flags; 1149 1150 1151 /* 1152 * Always update rtc irq when ACPI is used as RTC Alarm. 1153 * Or else, ACPI SCI is enabled during suspend/resume only, 1154 * update rtc irq in that case. 1155 */ 1156 if (cmos_use_acpi_alarm()) 1157 cmos_interrupt(0, (void *)cmos->rtc); 1158 else { 1159 /* Fix me: can we use cmos_interrupt() here as well? */ 1160 spin_lock_irqsave(&rtc_lock, flags); 1161 if (cmos_rtc.suspend_ctrl) 1162 rtc_control = CMOS_READ(RTC_CONTROL); 1163 if (rtc_control & RTC_AIE) { 1164 cmos_rtc.suspend_ctrl &= ~RTC_AIE; 1165 CMOS_WRITE(rtc_control, RTC_CONTROL); 1166 rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 1167 rtc_update_irq(cmos->rtc, 1, rtc_intr); 1168 } 1169 spin_unlock_irqrestore(&rtc_lock, flags); 1170 } 1171 1172 pm_wakeup_hard_event(dev); 1173 acpi_clear_event(ACPI_EVENT_RTC); 1174 acpi_disable_event(ACPI_EVENT_RTC, 0); 1175 return ACPI_INTERRUPT_HANDLED; 1176 } 1177 1178 static inline void rtc_wake_setup(struct device *dev) 1179 { 1180 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev); 1181 /* 1182 * After the RTC handler is installed, the Fixed_RTC event should 1183 * be disabled. Only when the RTC alarm is set will it be enabled. 1184 */ 1185 acpi_clear_event(ACPI_EVENT_RTC); 1186 acpi_disable_event(ACPI_EVENT_RTC, 0); 1187 } 1188 1189 static void rtc_wake_on(struct device *dev) 1190 { 1191 acpi_clear_event(ACPI_EVENT_RTC); 1192 acpi_enable_event(ACPI_EVENT_RTC, 0); 1193 } 1194 1195 static void rtc_wake_off(struct device *dev) 1196 { 1197 acpi_disable_event(ACPI_EVENT_RTC, 0); 1198 } 1199 1200 #ifdef CONFIG_X86 1201 /* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */ 1202 static void use_acpi_alarm_quirks(void) 1203 { 1204 int year; 1205 1206 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) 1207 return; 1208 1209 if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0)) 1210 return; 1211 1212 if (!is_hpet_enabled()) 1213 return; 1214 1215 if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year >= 2015) 1216 use_acpi_alarm = true; 1217 } 1218 #else 1219 static inline void use_acpi_alarm_quirks(void) { } 1220 #endif 1221 1222 /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find 1223 * its device node and pass extra config data. This helps its driver use 1224 * capabilities that the now-obsolete mc146818 didn't have, and informs it 1225 * that this board's RTC is wakeup-capable (per ACPI spec). 1226 */ 1227 static struct cmos_rtc_board_info acpi_rtc_info; 1228 1229 static void cmos_wake_setup(struct device *dev) 1230 { 1231 if (acpi_disabled) 1232 return; 1233 1234 use_acpi_alarm_quirks(); 1235 1236 rtc_wake_setup(dev); 1237 acpi_rtc_info.wake_on = rtc_wake_on; 1238 acpi_rtc_info.wake_off = rtc_wake_off; 1239 1240 /* workaround bug in some ACPI tables */ 1241 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) { 1242 dev_dbg(dev, "bogus FADT month_alarm (%d)\n", 1243 acpi_gbl_FADT.month_alarm); 1244 acpi_gbl_FADT.month_alarm = 0; 1245 } 1246 1247 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm; 1248 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm; 1249 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century; 1250 1251 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */ 1252 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE) 1253 dev_info(dev, "RTC can wake from S4\n"); 1254 1255 dev->platform_data = &acpi_rtc_info; 1256 1257 /* RTC always wakes from S1/S2/S3, and often S4/STD */ 1258 device_init_wakeup(dev, 1); 1259 } 1260 1261 static void cmos_check_acpi_rtc_status(struct device *dev, 1262 unsigned char *rtc_control) 1263 { 1264 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1265 acpi_event_status rtc_status; 1266 acpi_status status; 1267 1268 if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC) 1269 return; 1270 1271 status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status); 1272 if (ACPI_FAILURE(status)) { 1273 dev_err(dev, "Could not get RTC status\n"); 1274 } else if (rtc_status & ACPI_EVENT_FLAG_SET) { 1275 unsigned char mask; 1276 *rtc_control &= ~RTC_AIE; 1277 CMOS_WRITE(*rtc_control, RTC_CONTROL); 1278 mask = CMOS_READ(RTC_INTR_FLAGS); 1279 rtc_update_irq(cmos->rtc, 1, mask); 1280 } 1281 } 1282 1283 #else 1284 1285 static void cmos_wake_setup(struct device *dev) 1286 { 1287 } 1288 1289 static void cmos_check_acpi_rtc_status(struct device *dev, 1290 unsigned char *rtc_control) 1291 { 1292 } 1293 1294 #endif 1295 1296 #ifdef CONFIG_PNP 1297 1298 #include <linux/pnp.h> 1299 1300 static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id) 1301 { 1302 cmos_wake_setup(&pnp->dev); 1303 1304 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) { 1305 unsigned int irq = 0; 1306 #ifdef CONFIG_X86 1307 /* Some machines contain a PNP entry for the RTC, but 1308 * don't define the IRQ. It should always be safe to 1309 * hardcode it on systems with a legacy PIC. 1310 */ 1311 if (nr_legacy_irqs()) 1312 irq = 8; 1313 #endif 1314 return cmos_do_probe(&pnp->dev, 1315 pnp_get_resource(pnp, IORESOURCE_IO, 0), irq); 1316 } else { 1317 return cmos_do_probe(&pnp->dev, 1318 pnp_get_resource(pnp, IORESOURCE_IO, 0), 1319 pnp_irq(pnp, 0)); 1320 } 1321 } 1322 1323 static void cmos_pnp_remove(struct pnp_dev *pnp) 1324 { 1325 cmos_do_remove(&pnp->dev); 1326 } 1327 1328 static void cmos_pnp_shutdown(struct pnp_dev *pnp) 1329 { 1330 struct device *dev = &pnp->dev; 1331 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1332 1333 if (system_state == SYSTEM_POWER_OFF) { 1334 int retval = cmos_poweroff(dev); 1335 1336 if (cmos_aie_poweroff(dev) < 0 && !retval) 1337 return; 1338 } 1339 1340 cmos_do_shutdown(cmos->irq); 1341 } 1342 1343 static const struct pnp_device_id rtc_ids[] = { 1344 { .id = "PNP0b00", }, 1345 { .id = "PNP0b01", }, 1346 { .id = "PNP0b02", }, 1347 { }, 1348 }; 1349 MODULE_DEVICE_TABLE(pnp, rtc_ids); 1350 1351 static struct pnp_driver cmos_pnp_driver = { 1352 .name = (char *) driver_name, 1353 .id_table = rtc_ids, 1354 .probe = cmos_pnp_probe, 1355 .remove = cmos_pnp_remove, 1356 .shutdown = cmos_pnp_shutdown, 1357 1358 /* flag ensures resume() gets called, and stops syslog spam */ 1359 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, 1360 .driver = { 1361 .pm = &cmos_pm_ops, 1362 }, 1363 }; 1364 1365 #endif /* CONFIG_PNP */ 1366 1367 #ifdef CONFIG_OF 1368 static const struct of_device_id of_cmos_match[] = { 1369 { 1370 .compatible = "motorola,mc146818", 1371 }, 1372 { }, 1373 }; 1374 MODULE_DEVICE_TABLE(of, of_cmos_match); 1375 1376 static __init void cmos_of_init(struct platform_device *pdev) 1377 { 1378 struct device_node *node = pdev->dev.of_node; 1379 const __be32 *val; 1380 1381 if (!node) 1382 return; 1383 1384 val = of_get_property(node, "ctrl-reg", NULL); 1385 if (val) 1386 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL); 1387 1388 val = of_get_property(node, "freq-reg", NULL); 1389 if (val) 1390 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT); 1391 } 1392 #else 1393 static inline void cmos_of_init(struct platform_device *pdev) {} 1394 #endif 1395 /*----------------------------------------------------------------*/ 1396 1397 /* Platform setup should have set up an RTC device, when PNP is 1398 * unavailable ... this could happen even on (older) PCs. 1399 */ 1400 1401 static int __init cmos_platform_probe(struct platform_device *pdev) 1402 { 1403 struct resource *resource; 1404 int irq; 1405 1406 cmos_of_init(pdev); 1407 cmos_wake_setup(&pdev->dev); 1408 1409 if (RTC_IOMAPPED) 1410 resource = platform_get_resource(pdev, IORESOURCE_IO, 0); 1411 else 1412 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1413 irq = platform_get_irq(pdev, 0); 1414 if (irq < 0) 1415 irq = -1; 1416 1417 return cmos_do_probe(&pdev->dev, resource, irq); 1418 } 1419 1420 static int cmos_platform_remove(struct platform_device *pdev) 1421 { 1422 cmos_do_remove(&pdev->dev); 1423 return 0; 1424 } 1425 1426 static void cmos_platform_shutdown(struct platform_device *pdev) 1427 { 1428 struct device *dev = &pdev->dev; 1429 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1430 1431 if (system_state == SYSTEM_POWER_OFF) { 1432 int retval = cmos_poweroff(dev); 1433 1434 if (cmos_aie_poweroff(dev) < 0 && !retval) 1435 return; 1436 } 1437 1438 cmos_do_shutdown(cmos->irq); 1439 } 1440 1441 /* work with hotplug and coldplug */ 1442 MODULE_ALIAS("platform:rtc_cmos"); 1443 1444 static struct platform_driver cmos_platform_driver = { 1445 .remove = cmos_platform_remove, 1446 .shutdown = cmos_platform_shutdown, 1447 .driver = { 1448 .name = driver_name, 1449 .pm = &cmos_pm_ops, 1450 .of_match_table = of_match_ptr(of_cmos_match), 1451 } 1452 }; 1453 1454 #ifdef CONFIG_PNP 1455 static bool pnp_driver_registered; 1456 #endif 1457 static bool platform_driver_registered; 1458 1459 static int __init cmos_init(void) 1460 { 1461 int retval = 0; 1462 1463 #ifdef CONFIG_PNP 1464 retval = pnp_register_driver(&cmos_pnp_driver); 1465 if (retval == 0) 1466 pnp_driver_registered = true; 1467 #endif 1468 1469 if (!cmos_rtc.dev) { 1470 retval = platform_driver_probe(&cmos_platform_driver, 1471 cmos_platform_probe); 1472 if (retval == 0) 1473 platform_driver_registered = true; 1474 } 1475 1476 if (retval == 0) 1477 return 0; 1478 1479 #ifdef CONFIG_PNP 1480 if (pnp_driver_registered) 1481 pnp_unregister_driver(&cmos_pnp_driver); 1482 #endif 1483 return retval; 1484 } 1485 module_init(cmos_init); 1486 1487 static void __exit cmos_exit(void) 1488 { 1489 #ifdef CONFIG_PNP 1490 if (pnp_driver_registered) 1491 pnp_unregister_driver(&cmos_pnp_driver); 1492 #endif 1493 if (platform_driver_registered) 1494 platform_driver_unregister(&cmos_platform_driver); 1495 } 1496 module_exit(cmos_exit); 1497 1498 1499 MODULE_AUTHOR("David Brownell"); 1500 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs"); 1501 MODULE_LICENSE("GPL"); 1502