1 /* 2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc 3 * 4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c) 5 * Copyright (C) 2006 David Brownell (convert to new framework) 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13 /* 14 * The original "cmos clock" chip was an MC146818 chip, now obsolete. 15 * That defined the register interface now provided by all PCs, some 16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets 17 * integrate an MC146818 clone in their southbridge, and boards use 18 * that instead of discrete clones like the DS12887 or M48T86. There 19 * are also clones that connect using the LPC bus. 20 * 21 * That register API is also used directly by various other drivers 22 * (notably for integrated NVRAM), infrastructure (x86 has code to 23 * bypass the RTC framework, directly reading the RTC during boot 24 * and updating minutes/seconds for systems using NTP synch) and 25 * utilities (like userspace 'hwclock', if no /dev node exists). 26 * 27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with 28 * interrupts disabled, holding the global rtc_lock, to exclude those 29 * other drivers and utilities on correctly configured systems. 30 */ 31 32 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 33 34 #include <linux/kernel.h> 35 #include <linux/module.h> 36 #include <linux/init.h> 37 #include <linux/interrupt.h> 38 #include <linux/spinlock.h> 39 #include <linux/platform_device.h> 40 #include <linux/log2.h> 41 #include <linux/pm.h> 42 #include <linux/of.h> 43 #include <linux/of_platform.h> 44 #ifdef CONFIG_X86 45 #include <asm/i8259.h> 46 #include <asm/processor.h> 47 #include <linux/dmi.h> 48 #endif 49 50 /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */ 51 #include <linux/mc146818rtc.h> 52 53 /* 54 * Use ACPI SCI to replace HPET interrupt for RTC Alarm event 55 * 56 * If cleared, ACPI SCI is only used to wake up the system from suspend 57 * 58 * If set, ACPI SCI is used to handle UIE/AIE and system wakeup 59 */ 60 61 static bool use_acpi_alarm; 62 module_param(use_acpi_alarm, bool, 0444); 63 64 struct cmos_rtc { 65 struct rtc_device *rtc; 66 struct device *dev; 67 int irq; 68 struct resource *iomem; 69 time64_t alarm_expires; 70 71 void (*wake_on)(struct device *); 72 void (*wake_off)(struct device *); 73 74 u8 enabled_wake; 75 u8 suspend_ctrl; 76 77 /* newer hardware extends the original register set */ 78 u8 day_alrm; 79 u8 mon_alrm; 80 u8 century; 81 82 struct rtc_wkalrm saved_wkalrm; 83 }; 84 85 /* both platform and pnp busses use negative numbers for invalid irqs */ 86 #define is_valid_irq(n) ((n) > 0) 87 88 static const char driver_name[] = "rtc_cmos"; 89 90 /* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear; 91 * always mask it against the irq enable bits in RTC_CONTROL. Bit values 92 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both. 93 */ 94 #define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF) 95 96 static inline int is_intr(u8 rtc_intr) 97 { 98 if (!(rtc_intr & RTC_IRQF)) 99 return 0; 100 return rtc_intr & RTC_IRQMASK; 101 } 102 103 /*----------------------------------------------------------------*/ 104 105 /* Much modern x86 hardware has HPETs (10+ MHz timers) which, because 106 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly 107 * used in a broken "legacy replacement" mode. The breakage includes 108 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for 109 * other (better) use. 110 * 111 * When that broken mode is in use, platform glue provides a partial 112 * emulation of hardware RTC IRQ facilities using HPET #1. We don't 113 * want to use HPET for anything except those IRQs though... 114 */ 115 #ifdef CONFIG_HPET_EMULATE_RTC 116 #include <asm/hpet.h> 117 #else 118 119 static inline int is_hpet_enabled(void) 120 { 121 return 0; 122 } 123 124 static inline int hpet_mask_rtc_irq_bit(unsigned long mask) 125 { 126 return 0; 127 } 128 129 static inline int hpet_set_rtc_irq_bit(unsigned long mask) 130 { 131 return 0; 132 } 133 134 static inline int 135 hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec) 136 { 137 return 0; 138 } 139 140 static inline int hpet_set_periodic_freq(unsigned long freq) 141 { 142 return 0; 143 } 144 145 static inline int hpet_rtc_dropped_irq(void) 146 { 147 return 0; 148 } 149 150 static inline int hpet_rtc_timer_init(void) 151 { 152 return 0; 153 } 154 155 extern irq_handler_t hpet_rtc_interrupt; 156 157 static inline int hpet_register_irq_handler(irq_handler_t handler) 158 { 159 return 0; 160 } 161 162 static inline int hpet_unregister_irq_handler(irq_handler_t handler) 163 { 164 return 0; 165 } 166 167 #endif 168 169 /* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */ 170 static int use_hpet_alarm(void) 171 { 172 return is_hpet_enabled() && !use_acpi_alarm; 173 } 174 175 /*----------------------------------------------------------------*/ 176 177 #ifdef RTC_PORT 178 179 /* Most newer x86 systems have two register banks, the first used 180 * for RTC and NVRAM and the second only for NVRAM. Caller must 181 * own rtc_lock ... and we won't worry about access during NMI. 182 */ 183 #define can_bank2 true 184 185 static inline unsigned char cmos_read_bank2(unsigned char addr) 186 { 187 outb(addr, RTC_PORT(2)); 188 return inb(RTC_PORT(3)); 189 } 190 191 static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 192 { 193 outb(addr, RTC_PORT(2)); 194 outb(val, RTC_PORT(3)); 195 } 196 197 #else 198 199 #define can_bank2 false 200 201 static inline unsigned char cmos_read_bank2(unsigned char addr) 202 { 203 return 0; 204 } 205 206 static inline void cmos_write_bank2(unsigned char val, unsigned char addr) 207 { 208 } 209 210 #endif 211 212 /*----------------------------------------------------------------*/ 213 214 static int cmos_read_time(struct device *dev, struct rtc_time *t) 215 { 216 /* 217 * If pm_trace abused the RTC for storage, set the timespec to 0, 218 * which tells the caller that this RTC value is unusable. 219 */ 220 if (!pm_trace_rtc_valid()) 221 return -EIO; 222 223 /* REVISIT: if the clock has a "century" register, use 224 * that instead of the heuristic in mc146818_get_time(). 225 * That'll make Y3K compatility (year > 2070) easy! 226 */ 227 mc146818_get_time(t); 228 return 0; 229 } 230 231 static int cmos_set_time(struct device *dev, struct rtc_time *t) 232 { 233 /* REVISIT: set the "century" register if available 234 * 235 * NOTE: this ignores the issue whereby updating the seconds 236 * takes effect exactly 500ms after we write the register. 237 * (Also queueing and other delays before we get this far.) 238 */ 239 return mc146818_set_time(t); 240 } 241 242 static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t) 243 { 244 struct cmos_rtc *cmos = dev_get_drvdata(dev); 245 unsigned char rtc_control; 246 247 if (!is_valid_irq(cmos->irq)) 248 return -EIO; 249 250 /* Basic alarms only support hour, minute, and seconds fields. 251 * Some also support day and month, for alarms up to a year in 252 * the future. 253 */ 254 255 spin_lock_irq(&rtc_lock); 256 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM); 257 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM); 258 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM); 259 260 if (cmos->day_alrm) { 261 /* ignore upper bits on readback per ACPI spec */ 262 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f; 263 if (!t->time.tm_mday) 264 t->time.tm_mday = -1; 265 266 if (cmos->mon_alrm) { 267 t->time.tm_mon = CMOS_READ(cmos->mon_alrm); 268 if (!t->time.tm_mon) 269 t->time.tm_mon = -1; 270 } 271 } 272 273 rtc_control = CMOS_READ(RTC_CONTROL); 274 spin_unlock_irq(&rtc_lock); 275 276 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 277 if (((unsigned)t->time.tm_sec) < 0x60) 278 t->time.tm_sec = bcd2bin(t->time.tm_sec); 279 else 280 t->time.tm_sec = -1; 281 if (((unsigned)t->time.tm_min) < 0x60) 282 t->time.tm_min = bcd2bin(t->time.tm_min); 283 else 284 t->time.tm_min = -1; 285 if (((unsigned)t->time.tm_hour) < 0x24) 286 t->time.tm_hour = bcd2bin(t->time.tm_hour); 287 else 288 t->time.tm_hour = -1; 289 290 if (cmos->day_alrm) { 291 if (((unsigned)t->time.tm_mday) <= 0x31) 292 t->time.tm_mday = bcd2bin(t->time.tm_mday); 293 else 294 t->time.tm_mday = -1; 295 296 if (cmos->mon_alrm) { 297 if (((unsigned)t->time.tm_mon) <= 0x12) 298 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1; 299 else 300 t->time.tm_mon = -1; 301 } 302 } 303 } 304 305 t->enabled = !!(rtc_control & RTC_AIE); 306 t->pending = 0; 307 308 return 0; 309 } 310 311 static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control) 312 { 313 unsigned char rtc_intr; 314 315 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS; 316 * allegedly some older rtcs need that to handle irqs properly 317 */ 318 rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 319 320 if (use_hpet_alarm()) 321 return; 322 323 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 324 if (is_intr(rtc_intr)) 325 rtc_update_irq(cmos->rtc, 1, rtc_intr); 326 } 327 328 static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask) 329 { 330 unsigned char rtc_control; 331 332 /* flush any pending IRQ status, notably for update irqs, 333 * before we enable new IRQs 334 */ 335 rtc_control = CMOS_READ(RTC_CONTROL); 336 cmos_checkintr(cmos, rtc_control); 337 338 rtc_control |= mask; 339 CMOS_WRITE(rtc_control, RTC_CONTROL); 340 if (use_hpet_alarm()) 341 hpet_set_rtc_irq_bit(mask); 342 343 if ((mask & RTC_AIE) && use_acpi_alarm) { 344 if (cmos->wake_on) 345 cmos->wake_on(cmos->dev); 346 } 347 348 cmos_checkintr(cmos, rtc_control); 349 } 350 351 static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask) 352 { 353 unsigned char rtc_control; 354 355 rtc_control = CMOS_READ(RTC_CONTROL); 356 rtc_control &= ~mask; 357 CMOS_WRITE(rtc_control, RTC_CONTROL); 358 if (use_hpet_alarm()) 359 hpet_mask_rtc_irq_bit(mask); 360 361 if ((mask & RTC_AIE) && use_acpi_alarm) { 362 if (cmos->wake_off) 363 cmos->wake_off(cmos->dev); 364 } 365 366 cmos_checkintr(cmos, rtc_control); 367 } 368 369 static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t) 370 { 371 struct cmos_rtc *cmos = dev_get_drvdata(dev); 372 struct rtc_time now; 373 374 cmos_read_time(dev, &now); 375 376 if (!cmos->day_alrm) { 377 time64_t t_max_date; 378 time64_t t_alrm; 379 380 t_max_date = rtc_tm_to_time64(&now); 381 t_max_date += 24 * 60 * 60 - 1; 382 t_alrm = rtc_tm_to_time64(&t->time); 383 if (t_alrm > t_max_date) { 384 dev_err(dev, 385 "Alarms can be up to one day in the future\n"); 386 return -EINVAL; 387 } 388 } else if (!cmos->mon_alrm) { 389 struct rtc_time max_date = now; 390 time64_t t_max_date; 391 time64_t t_alrm; 392 int max_mday; 393 394 if (max_date.tm_mon == 11) { 395 max_date.tm_mon = 0; 396 max_date.tm_year += 1; 397 } else { 398 max_date.tm_mon += 1; 399 } 400 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); 401 if (max_date.tm_mday > max_mday) 402 max_date.tm_mday = max_mday; 403 404 t_max_date = rtc_tm_to_time64(&max_date); 405 t_max_date -= 1; 406 t_alrm = rtc_tm_to_time64(&t->time); 407 if (t_alrm > t_max_date) { 408 dev_err(dev, 409 "Alarms can be up to one month in the future\n"); 410 return -EINVAL; 411 } 412 } else { 413 struct rtc_time max_date = now; 414 time64_t t_max_date; 415 time64_t t_alrm; 416 int max_mday; 417 418 max_date.tm_year += 1; 419 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year); 420 if (max_date.tm_mday > max_mday) 421 max_date.tm_mday = max_mday; 422 423 t_max_date = rtc_tm_to_time64(&max_date); 424 t_max_date -= 1; 425 t_alrm = rtc_tm_to_time64(&t->time); 426 if (t_alrm > t_max_date) { 427 dev_err(dev, 428 "Alarms can be up to one year in the future\n"); 429 return -EINVAL; 430 } 431 } 432 433 return 0; 434 } 435 436 static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t) 437 { 438 struct cmos_rtc *cmos = dev_get_drvdata(dev); 439 unsigned char mon, mday, hrs, min, sec, rtc_control; 440 int ret; 441 442 if (!is_valid_irq(cmos->irq)) 443 return -EIO; 444 445 ret = cmos_validate_alarm(dev, t); 446 if (ret < 0) 447 return ret; 448 449 mon = t->time.tm_mon + 1; 450 mday = t->time.tm_mday; 451 hrs = t->time.tm_hour; 452 min = t->time.tm_min; 453 sec = t->time.tm_sec; 454 455 rtc_control = CMOS_READ(RTC_CONTROL); 456 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) { 457 /* Writing 0xff means "don't care" or "match all". */ 458 mon = (mon <= 12) ? bin2bcd(mon) : 0xff; 459 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff; 460 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff; 461 min = (min < 60) ? bin2bcd(min) : 0xff; 462 sec = (sec < 60) ? bin2bcd(sec) : 0xff; 463 } 464 465 spin_lock_irq(&rtc_lock); 466 467 /* next rtc irq must not be from previous alarm setting */ 468 cmos_irq_disable(cmos, RTC_AIE); 469 470 /* update alarm */ 471 CMOS_WRITE(hrs, RTC_HOURS_ALARM); 472 CMOS_WRITE(min, RTC_MINUTES_ALARM); 473 CMOS_WRITE(sec, RTC_SECONDS_ALARM); 474 475 /* the system may support an "enhanced" alarm */ 476 if (cmos->day_alrm) { 477 CMOS_WRITE(mday, cmos->day_alrm); 478 if (cmos->mon_alrm) 479 CMOS_WRITE(mon, cmos->mon_alrm); 480 } 481 482 if (use_hpet_alarm()) { 483 /* 484 * FIXME the HPET alarm glue currently ignores day_alrm 485 * and mon_alrm ... 486 */ 487 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, 488 t->time.tm_sec); 489 } 490 491 if (t->enabled) 492 cmos_irq_enable(cmos, RTC_AIE); 493 494 spin_unlock_irq(&rtc_lock); 495 496 cmos->alarm_expires = rtc_tm_to_time64(&t->time); 497 498 return 0; 499 } 500 501 static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled) 502 { 503 struct cmos_rtc *cmos = dev_get_drvdata(dev); 504 unsigned long flags; 505 506 if (!is_valid_irq(cmos->irq)) 507 return -EINVAL; 508 509 spin_lock_irqsave(&rtc_lock, flags); 510 511 if (enabled) 512 cmos_irq_enable(cmos, RTC_AIE); 513 else 514 cmos_irq_disable(cmos, RTC_AIE); 515 516 spin_unlock_irqrestore(&rtc_lock, flags); 517 return 0; 518 } 519 520 #if IS_ENABLED(CONFIG_RTC_INTF_PROC) 521 522 static int cmos_procfs(struct device *dev, struct seq_file *seq) 523 { 524 struct cmos_rtc *cmos = dev_get_drvdata(dev); 525 unsigned char rtc_control, valid; 526 527 spin_lock_irq(&rtc_lock); 528 rtc_control = CMOS_READ(RTC_CONTROL); 529 valid = CMOS_READ(RTC_VALID); 530 spin_unlock_irq(&rtc_lock); 531 532 /* NOTE: at least ICH6 reports battery status using a different 533 * (non-RTC) bit; and SQWE is ignored on many current systems. 534 */ 535 seq_printf(seq, 536 "periodic_IRQ\t: %s\n" 537 "update_IRQ\t: %s\n" 538 "HPET_emulated\t: %s\n" 539 // "square_wave\t: %s\n" 540 "BCD\t\t: %s\n" 541 "DST_enable\t: %s\n" 542 "periodic_freq\t: %d\n" 543 "batt_status\t: %s\n", 544 (rtc_control & RTC_PIE) ? "yes" : "no", 545 (rtc_control & RTC_UIE) ? "yes" : "no", 546 use_hpet_alarm() ? "yes" : "no", 547 // (rtc_control & RTC_SQWE) ? "yes" : "no", 548 (rtc_control & RTC_DM_BINARY) ? "no" : "yes", 549 (rtc_control & RTC_DST_EN) ? "yes" : "no", 550 cmos->rtc->irq_freq, 551 (valid & RTC_VRT) ? "okay" : "dead"); 552 553 return 0; 554 } 555 556 #else 557 #define cmos_procfs NULL 558 #endif 559 560 static const struct rtc_class_ops cmos_rtc_ops = { 561 .read_time = cmos_read_time, 562 .set_time = cmos_set_time, 563 .read_alarm = cmos_read_alarm, 564 .set_alarm = cmos_set_alarm, 565 .proc = cmos_procfs, 566 .alarm_irq_enable = cmos_alarm_irq_enable, 567 }; 568 569 /*----------------------------------------------------------------*/ 570 571 /* 572 * All these chips have at least 64 bytes of address space, shared by 573 * RTC registers and NVRAM. Most of those bytes of NVRAM are used 574 * by boot firmware. Modern chips have 128 or 256 bytes. 575 */ 576 577 #define NVRAM_OFFSET (RTC_REG_D + 1) 578 579 static int cmos_nvram_read(void *priv, unsigned int off, void *val, 580 size_t count) 581 { 582 unsigned char *buf = val; 583 int retval; 584 585 off += NVRAM_OFFSET; 586 spin_lock_irq(&rtc_lock); 587 for (retval = 0; count; count--, off++, retval++) { 588 if (off < 128) 589 *buf++ = CMOS_READ(off); 590 else if (can_bank2) 591 *buf++ = cmos_read_bank2(off); 592 else 593 break; 594 } 595 spin_unlock_irq(&rtc_lock); 596 597 return retval; 598 } 599 600 static int cmos_nvram_write(void *priv, unsigned int off, void *val, 601 size_t count) 602 { 603 struct cmos_rtc *cmos = priv; 604 unsigned char *buf = val; 605 int retval; 606 607 /* NOTE: on at least PCs and Ataris, the boot firmware uses a 608 * checksum on part of the NVRAM data. That's currently ignored 609 * here. If userspace is smart enough to know what fields of 610 * NVRAM to update, updating checksums is also part of its job. 611 */ 612 off += NVRAM_OFFSET; 613 spin_lock_irq(&rtc_lock); 614 for (retval = 0; count; count--, off++, retval++) { 615 /* don't trash RTC registers */ 616 if (off == cmos->day_alrm 617 || off == cmos->mon_alrm 618 || off == cmos->century) 619 buf++; 620 else if (off < 128) 621 CMOS_WRITE(*buf++, off); 622 else if (can_bank2) 623 cmos_write_bank2(*buf++, off); 624 else 625 break; 626 } 627 spin_unlock_irq(&rtc_lock); 628 629 return retval; 630 } 631 632 /*----------------------------------------------------------------*/ 633 634 static struct cmos_rtc cmos_rtc; 635 636 static irqreturn_t cmos_interrupt(int irq, void *p) 637 { 638 u8 irqstat; 639 u8 rtc_control; 640 641 spin_lock(&rtc_lock); 642 643 /* When the HPET interrupt handler calls us, the interrupt 644 * status is passed as arg1 instead of the irq number. But 645 * always clear irq status, even when HPET is in the way. 646 * 647 * Note that HPET and RTC are almost certainly out of phase, 648 * giving different IRQ status ... 649 */ 650 irqstat = CMOS_READ(RTC_INTR_FLAGS); 651 rtc_control = CMOS_READ(RTC_CONTROL); 652 if (use_hpet_alarm()) 653 irqstat = (unsigned long)irq & 0xF0; 654 655 /* If we were suspended, RTC_CONTROL may not be accurate since the 656 * bios may have cleared it. 657 */ 658 if (!cmos_rtc.suspend_ctrl) 659 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF; 660 else 661 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF; 662 663 /* All Linux RTC alarms should be treated as if they were oneshot. 664 * Similar code may be needed in system wakeup paths, in case the 665 * alarm woke the system. 666 */ 667 if (irqstat & RTC_AIE) { 668 cmos_rtc.suspend_ctrl &= ~RTC_AIE; 669 rtc_control &= ~RTC_AIE; 670 CMOS_WRITE(rtc_control, RTC_CONTROL); 671 if (use_hpet_alarm()) 672 hpet_mask_rtc_irq_bit(RTC_AIE); 673 CMOS_READ(RTC_INTR_FLAGS); 674 } 675 spin_unlock(&rtc_lock); 676 677 if (is_intr(irqstat)) { 678 rtc_update_irq(p, 1, irqstat); 679 return IRQ_HANDLED; 680 } else 681 return IRQ_NONE; 682 } 683 684 #ifdef CONFIG_PNP 685 #define INITSECTION 686 687 #else 688 #define INITSECTION __init 689 #endif 690 691 static int INITSECTION 692 cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) 693 { 694 struct cmos_rtc_board_info *info = dev_get_platdata(dev); 695 int retval = 0; 696 unsigned char rtc_control; 697 unsigned address_space; 698 u32 flags = 0; 699 struct nvmem_config nvmem_cfg = { 700 .name = "cmos_nvram", 701 .word_size = 1, 702 .stride = 1, 703 .reg_read = cmos_nvram_read, 704 .reg_write = cmos_nvram_write, 705 .priv = &cmos_rtc, 706 }; 707 708 /* there can be only one ... */ 709 if (cmos_rtc.dev) 710 return -EBUSY; 711 712 if (!ports) 713 return -ENODEV; 714 715 /* Claim I/O ports ASAP, minimizing conflict with legacy driver. 716 * 717 * REVISIT non-x86 systems may instead use memory space resources 718 * (needing ioremap etc), not i/o space resources like this ... 719 */ 720 if (RTC_IOMAPPED) 721 ports = request_region(ports->start, resource_size(ports), 722 driver_name); 723 else 724 ports = request_mem_region(ports->start, resource_size(ports), 725 driver_name); 726 if (!ports) { 727 dev_dbg(dev, "i/o registers already in use\n"); 728 return -EBUSY; 729 } 730 731 cmos_rtc.irq = rtc_irq; 732 cmos_rtc.iomem = ports; 733 734 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM 735 * driver did, but don't reject unknown configs. Old hardware 736 * won't address 128 bytes. Newer chips have multiple banks, 737 * though they may not be listed in one I/O resource. 738 */ 739 #if defined(CONFIG_ATARI) 740 address_space = 64; 741 #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \ 742 || defined(__sparc__) || defined(__mips__) \ 743 || defined(__powerpc__) 744 address_space = 128; 745 #else 746 #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. 747 address_space = 128; 748 #endif 749 if (can_bank2 && ports->end > (ports->start + 1)) 750 address_space = 256; 751 752 /* For ACPI systems extension info comes from the FADT. On others, 753 * board specific setup provides it as appropriate. Systems where 754 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and 755 * some almost-clones) can provide hooks to make that behave. 756 * 757 * Note that ACPI doesn't preclude putting these registers into 758 * "extended" areas of the chip, including some that we won't yet 759 * expect CMOS_READ and friends to handle. 760 */ 761 if (info) { 762 if (info->flags) 763 flags = info->flags; 764 if (info->address_space) 765 address_space = info->address_space; 766 767 if (info->rtc_day_alarm && info->rtc_day_alarm < 128) 768 cmos_rtc.day_alrm = info->rtc_day_alarm; 769 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128) 770 cmos_rtc.mon_alrm = info->rtc_mon_alarm; 771 if (info->rtc_century && info->rtc_century < 128) 772 cmos_rtc.century = info->rtc_century; 773 774 if (info->wake_on && info->wake_off) { 775 cmos_rtc.wake_on = info->wake_on; 776 cmos_rtc.wake_off = info->wake_off; 777 } 778 } 779 780 cmos_rtc.dev = dev; 781 dev_set_drvdata(dev, &cmos_rtc); 782 783 cmos_rtc.rtc = devm_rtc_allocate_device(dev); 784 if (IS_ERR(cmos_rtc.rtc)) { 785 retval = PTR_ERR(cmos_rtc.rtc); 786 goto cleanup0; 787 } 788 789 rename_region(ports, dev_name(&cmos_rtc.rtc->dev)); 790 791 spin_lock_irq(&rtc_lock); 792 793 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) { 794 /* force periodic irq to CMOS reset default of 1024Hz; 795 * 796 * REVISIT it's been reported that at least one x86_64 ALI 797 * mobo doesn't use 32KHz here ... for portability we might 798 * need to do something about other clock frequencies. 799 */ 800 cmos_rtc.rtc->irq_freq = 1024; 801 if (use_hpet_alarm()) 802 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq); 803 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT); 804 } 805 806 /* disable irqs */ 807 if (is_valid_irq(rtc_irq)) 808 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE); 809 810 rtc_control = CMOS_READ(RTC_CONTROL); 811 812 spin_unlock_irq(&rtc_lock); 813 814 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) { 815 dev_warn(dev, "only 24-hr supported\n"); 816 retval = -ENXIO; 817 goto cleanup1; 818 } 819 820 if (use_hpet_alarm()) 821 hpet_rtc_timer_init(); 822 823 if (is_valid_irq(rtc_irq)) { 824 irq_handler_t rtc_cmos_int_handler; 825 826 if (use_hpet_alarm()) { 827 rtc_cmos_int_handler = hpet_rtc_interrupt; 828 retval = hpet_register_irq_handler(cmos_interrupt); 829 if (retval) { 830 hpet_mask_rtc_irq_bit(RTC_IRQMASK); 831 dev_warn(dev, "hpet_register_irq_handler " 832 " failed in rtc_init()."); 833 goto cleanup1; 834 } 835 } else 836 rtc_cmos_int_handler = cmos_interrupt; 837 838 retval = request_irq(rtc_irq, rtc_cmos_int_handler, 839 IRQF_SHARED, dev_name(&cmos_rtc.rtc->dev), 840 cmos_rtc.rtc); 841 if (retval < 0) { 842 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq); 843 goto cleanup1; 844 } 845 } 846 847 cmos_rtc.rtc->ops = &cmos_rtc_ops; 848 cmos_rtc.rtc->nvram_old_abi = true; 849 retval = rtc_register_device(cmos_rtc.rtc); 850 if (retval) 851 goto cleanup2; 852 853 /* export at least the first block of NVRAM */ 854 nvmem_cfg.size = address_space - NVRAM_OFFSET; 855 if (rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg)) 856 dev_err(dev, "nvmem registration failed\n"); 857 858 dev_info(dev, "%s%s, %d bytes nvram%s\n", 859 !is_valid_irq(rtc_irq) ? "no alarms" : 860 cmos_rtc.mon_alrm ? "alarms up to one year" : 861 cmos_rtc.day_alrm ? "alarms up to one month" : 862 "alarms up to one day", 863 cmos_rtc.century ? ", y3k" : "", 864 nvmem_cfg.size, 865 use_hpet_alarm() ? ", hpet irqs" : ""); 866 867 return 0; 868 869 cleanup2: 870 if (is_valid_irq(rtc_irq)) 871 free_irq(rtc_irq, cmos_rtc.rtc); 872 cleanup1: 873 cmos_rtc.dev = NULL; 874 cleanup0: 875 if (RTC_IOMAPPED) 876 release_region(ports->start, resource_size(ports)); 877 else 878 release_mem_region(ports->start, resource_size(ports)); 879 return retval; 880 } 881 882 static void cmos_do_shutdown(int rtc_irq) 883 { 884 spin_lock_irq(&rtc_lock); 885 if (is_valid_irq(rtc_irq)) 886 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK); 887 spin_unlock_irq(&rtc_lock); 888 } 889 890 static void cmos_do_remove(struct device *dev) 891 { 892 struct cmos_rtc *cmos = dev_get_drvdata(dev); 893 struct resource *ports; 894 895 cmos_do_shutdown(cmos->irq); 896 897 if (is_valid_irq(cmos->irq)) { 898 free_irq(cmos->irq, cmos->rtc); 899 if (use_hpet_alarm()) 900 hpet_unregister_irq_handler(cmos_interrupt); 901 } 902 903 cmos->rtc = NULL; 904 905 ports = cmos->iomem; 906 if (RTC_IOMAPPED) 907 release_region(ports->start, resource_size(ports)); 908 else 909 release_mem_region(ports->start, resource_size(ports)); 910 cmos->iomem = NULL; 911 912 cmos->dev = NULL; 913 } 914 915 static int cmos_aie_poweroff(struct device *dev) 916 { 917 struct cmos_rtc *cmos = dev_get_drvdata(dev); 918 struct rtc_time now; 919 time64_t t_now; 920 int retval = 0; 921 unsigned char rtc_control; 922 923 if (!cmos->alarm_expires) 924 return -EINVAL; 925 926 spin_lock_irq(&rtc_lock); 927 rtc_control = CMOS_READ(RTC_CONTROL); 928 spin_unlock_irq(&rtc_lock); 929 930 /* We only care about the situation where AIE is disabled. */ 931 if (rtc_control & RTC_AIE) 932 return -EBUSY; 933 934 cmos_read_time(dev, &now); 935 t_now = rtc_tm_to_time64(&now); 936 937 /* 938 * When enabling "RTC wake-up" in BIOS setup, the machine reboots 939 * automatically right after shutdown on some buggy boxes. 940 * This automatic rebooting issue won't happen when the alarm 941 * time is larger than now+1 seconds. 942 * 943 * If the alarm time is equal to now+1 seconds, the issue can be 944 * prevented by cancelling the alarm. 945 */ 946 if (cmos->alarm_expires == t_now + 1) { 947 struct rtc_wkalrm alarm; 948 949 /* Cancel the AIE timer by configuring the past time. */ 950 rtc_time64_to_tm(t_now - 1, &alarm.time); 951 alarm.enabled = 0; 952 retval = cmos_set_alarm(dev, &alarm); 953 } else if (cmos->alarm_expires > t_now + 1) { 954 retval = -EBUSY; 955 } 956 957 return retval; 958 } 959 960 static int cmos_suspend(struct device *dev) 961 { 962 struct cmos_rtc *cmos = dev_get_drvdata(dev); 963 unsigned char tmp; 964 965 /* only the alarm might be a wakeup event source */ 966 spin_lock_irq(&rtc_lock); 967 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL); 968 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) { 969 unsigned char mask; 970 971 if (device_may_wakeup(dev)) 972 mask = RTC_IRQMASK & ~RTC_AIE; 973 else 974 mask = RTC_IRQMASK; 975 tmp &= ~mask; 976 CMOS_WRITE(tmp, RTC_CONTROL); 977 if (use_hpet_alarm()) 978 hpet_mask_rtc_irq_bit(mask); 979 cmos_checkintr(cmos, tmp); 980 } 981 spin_unlock_irq(&rtc_lock); 982 983 if ((tmp & RTC_AIE) && !use_acpi_alarm) { 984 cmos->enabled_wake = 1; 985 if (cmos->wake_on) 986 cmos->wake_on(dev); 987 else 988 enable_irq_wake(cmos->irq); 989 } 990 991 cmos_read_alarm(dev, &cmos->saved_wkalrm); 992 993 dev_dbg(dev, "suspend%s, ctrl %02x\n", 994 (tmp & RTC_AIE) ? ", alarm may wake" : "", 995 tmp); 996 997 return 0; 998 } 999 1000 /* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even 1001 * after a detour through G3 "mechanical off", although the ACPI spec 1002 * says wakeup should only work from G1/S4 "hibernate". To most users, 1003 * distinctions between S4 and S5 are pointless. So when the hardware 1004 * allows, don't draw that distinction. 1005 */ 1006 static inline int cmos_poweroff(struct device *dev) 1007 { 1008 if (!IS_ENABLED(CONFIG_PM)) 1009 return -ENOSYS; 1010 1011 return cmos_suspend(dev); 1012 } 1013 1014 static void cmos_check_wkalrm(struct device *dev) 1015 { 1016 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1017 struct rtc_wkalrm current_alarm; 1018 time64_t t_now; 1019 time64_t t_current_expires; 1020 time64_t t_saved_expires; 1021 struct rtc_time now; 1022 1023 /* Check if we have RTC Alarm armed */ 1024 if (!(cmos->suspend_ctrl & RTC_AIE)) 1025 return; 1026 1027 cmos_read_time(dev, &now); 1028 t_now = rtc_tm_to_time64(&now); 1029 1030 /* 1031 * ACPI RTC wake event is cleared after resume from STR, 1032 * ACK the rtc irq here 1033 */ 1034 if (t_now >= cmos->alarm_expires && use_acpi_alarm) { 1035 cmos_interrupt(0, (void *)cmos->rtc); 1036 return; 1037 } 1038 1039 cmos_read_alarm(dev, ¤t_alarm); 1040 t_current_expires = rtc_tm_to_time64(¤t_alarm.time); 1041 t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time); 1042 if (t_current_expires != t_saved_expires || 1043 cmos->saved_wkalrm.enabled != current_alarm.enabled) { 1044 cmos_set_alarm(dev, &cmos->saved_wkalrm); 1045 } 1046 } 1047 1048 static void cmos_check_acpi_rtc_status(struct device *dev, 1049 unsigned char *rtc_control); 1050 1051 static int __maybe_unused cmos_resume(struct device *dev) 1052 { 1053 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1054 unsigned char tmp; 1055 1056 if (cmos->enabled_wake && !use_acpi_alarm) { 1057 if (cmos->wake_off) 1058 cmos->wake_off(dev); 1059 else 1060 disable_irq_wake(cmos->irq); 1061 cmos->enabled_wake = 0; 1062 } 1063 1064 /* The BIOS might have changed the alarm, restore it */ 1065 cmos_check_wkalrm(dev); 1066 1067 spin_lock_irq(&rtc_lock); 1068 tmp = cmos->suspend_ctrl; 1069 cmos->suspend_ctrl = 0; 1070 /* re-enable any irqs previously active */ 1071 if (tmp & RTC_IRQMASK) { 1072 unsigned char mask; 1073 1074 if (device_may_wakeup(dev) && use_hpet_alarm()) 1075 hpet_rtc_timer_init(); 1076 1077 do { 1078 CMOS_WRITE(tmp, RTC_CONTROL); 1079 if (use_hpet_alarm()) 1080 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK); 1081 1082 mask = CMOS_READ(RTC_INTR_FLAGS); 1083 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF; 1084 if (!use_hpet_alarm() || !is_intr(mask)) 1085 break; 1086 1087 /* force one-shot behavior if HPET blocked 1088 * the wake alarm's irq 1089 */ 1090 rtc_update_irq(cmos->rtc, 1, mask); 1091 tmp &= ~RTC_AIE; 1092 hpet_mask_rtc_irq_bit(RTC_AIE); 1093 } while (mask & RTC_AIE); 1094 1095 if (tmp & RTC_AIE) 1096 cmos_check_acpi_rtc_status(dev, &tmp); 1097 } 1098 spin_unlock_irq(&rtc_lock); 1099 1100 dev_dbg(dev, "resume, ctrl %02x\n", tmp); 1101 1102 return 0; 1103 } 1104 1105 static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume); 1106 1107 /*----------------------------------------------------------------*/ 1108 1109 /* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus. 1110 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs 1111 * probably list them in similar PNPBIOS tables; so PNP is more common. 1112 * 1113 * We don't use legacy "poke at the hardware" probing. Ancient PCs that 1114 * predate even PNPBIOS should set up platform_bus devices. 1115 */ 1116 1117 #ifdef CONFIG_ACPI 1118 1119 #include <linux/acpi.h> 1120 1121 static u32 rtc_handler(void *context) 1122 { 1123 struct device *dev = context; 1124 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1125 unsigned char rtc_control = 0; 1126 unsigned char rtc_intr; 1127 unsigned long flags; 1128 1129 1130 /* 1131 * Always update rtc irq when ACPI is used as RTC Alarm. 1132 * Or else, ACPI SCI is enabled during suspend/resume only, 1133 * update rtc irq in that case. 1134 */ 1135 if (use_acpi_alarm) 1136 cmos_interrupt(0, (void *)cmos->rtc); 1137 else { 1138 /* Fix me: can we use cmos_interrupt() here as well? */ 1139 spin_lock_irqsave(&rtc_lock, flags); 1140 if (cmos_rtc.suspend_ctrl) 1141 rtc_control = CMOS_READ(RTC_CONTROL); 1142 if (rtc_control & RTC_AIE) { 1143 cmos_rtc.suspend_ctrl &= ~RTC_AIE; 1144 CMOS_WRITE(rtc_control, RTC_CONTROL); 1145 rtc_intr = CMOS_READ(RTC_INTR_FLAGS); 1146 rtc_update_irq(cmos->rtc, 1, rtc_intr); 1147 } 1148 spin_unlock_irqrestore(&rtc_lock, flags); 1149 } 1150 1151 pm_wakeup_hard_event(dev); 1152 acpi_clear_event(ACPI_EVENT_RTC); 1153 acpi_disable_event(ACPI_EVENT_RTC, 0); 1154 return ACPI_INTERRUPT_HANDLED; 1155 } 1156 1157 static inline void rtc_wake_setup(struct device *dev) 1158 { 1159 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev); 1160 /* 1161 * After the RTC handler is installed, the Fixed_RTC event should 1162 * be disabled. Only when the RTC alarm is set will it be enabled. 1163 */ 1164 acpi_clear_event(ACPI_EVENT_RTC); 1165 acpi_disable_event(ACPI_EVENT_RTC, 0); 1166 } 1167 1168 static void rtc_wake_on(struct device *dev) 1169 { 1170 acpi_clear_event(ACPI_EVENT_RTC); 1171 acpi_enable_event(ACPI_EVENT_RTC, 0); 1172 } 1173 1174 static void rtc_wake_off(struct device *dev) 1175 { 1176 acpi_disable_event(ACPI_EVENT_RTC, 0); 1177 } 1178 1179 #ifdef CONFIG_X86 1180 /* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */ 1181 static void use_acpi_alarm_quirks(void) 1182 { 1183 int year; 1184 1185 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) 1186 return; 1187 1188 if (!(acpi_gbl_FADT.flags & ACPI_FADT_LOW_POWER_S0)) 1189 return; 1190 1191 if (!is_hpet_enabled()) 1192 return; 1193 1194 if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year >= 2015) 1195 use_acpi_alarm = true; 1196 } 1197 #else 1198 static inline void use_acpi_alarm_quirks(void) { } 1199 #endif 1200 1201 /* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find 1202 * its device node and pass extra config data. This helps its driver use 1203 * capabilities that the now-obsolete mc146818 didn't have, and informs it 1204 * that this board's RTC is wakeup-capable (per ACPI spec). 1205 */ 1206 static struct cmos_rtc_board_info acpi_rtc_info; 1207 1208 static void cmos_wake_setup(struct device *dev) 1209 { 1210 if (acpi_disabled) 1211 return; 1212 1213 use_acpi_alarm_quirks(); 1214 1215 rtc_wake_setup(dev); 1216 acpi_rtc_info.wake_on = rtc_wake_on; 1217 acpi_rtc_info.wake_off = rtc_wake_off; 1218 1219 /* workaround bug in some ACPI tables */ 1220 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) { 1221 dev_dbg(dev, "bogus FADT month_alarm (%d)\n", 1222 acpi_gbl_FADT.month_alarm); 1223 acpi_gbl_FADT.month_alarm = 0; 1224 } 1225 1226 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm; 1227 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm; 1228 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century; 1229 1230 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */ 1231 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE) 1232 dev_info(dev, "RTC can wake from S4\n"); 1233 1234 dev->platform_data = &acpi_rtc_info; 1235 1236 /* RTC always wakes from S1/S2/S3, and often S4/STD */ 1237 device_init_wakeup(dev, 1); 1238 } 1239 1240 static void cmos_check_acpi_rtc_status(struct device *dev, 1241 unsigned char *rtc_control) 1242 { 1243 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1244 acpi_event_status rtc_status; 1245 acpi_status status; 1246 1247 if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC) 1248 return; 1249 1250 status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status); 1251 if (ACPI_FAILURE(status)) { 1252 dev_err(dev, "Could not get RTC status\n"); 1253 } else if (rtc_status & ACPI_EVENT_FLAG_SET) { 1254 unsigned char mask; 1255 *rtc_control &= ~RTC_AIE; 1256 CMOS_WRITE(*rtc_control, RTC_CONTROL); 1257 mask = CMOS_READ(RTC_INTR_FLAGS); 1258 rtc_update_irq(cmos->rtc, 1, mask); 1259 } 1260 } 1261 1262 #else 1263 1264 static void cmos_wake_setup(struct device *dev) 1265 { 1266 } 1267 1268 static void cmos_check_acpi_rtc_status(struct device *dev, 1269 unsigned char *rtc_control) 1270 { 1271 } 1272 1273 #endif 1274 1275 #ifdef CONFIG_PNP 1276 1277 #include <linux/pnp.h> 1278 1279 static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id) 1280 { 1281 cmos_wake_setup(&pnp->dev); 1282 1283 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) { 1284 unsigned int irq = 0; 1285 #ifdef CONFIG_X86 1286 /* Some machines contain a PNP entry for the RTC, but 1287 * don't define the IRQ. It should always be safe to 1288 * hardcode it on systems with a legacy PIC. 1289 */ 1290 if (nr_legacy_irqs()) 1291 irq = 8; 1292 #endif 1293 return cmos_do_probe(&pnp->dev, 1294 pnp_get_resource(pnp, IORESOURCE_IO, 0), irq); 1295 } else { 1296 return cmos_do_probe(&pnp->dev, 1297 pnp_get_resource(pnp, IORESOURCE_IO, 0), 1298 pnp_irq(pnp, 0)); 1299 } 1300 } 1301 1302 static void cmos_pnp_remove(struct pnp_dev *pnp) 1303 { 1304 cmos_do_remove(&pnp->dev); 1305 } 1306 1307 static void cmos_pnp_shutdown(struct pnp_dev *pnp) 1308 { 1309 struct device *dev = &pnp->dev; 1310 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1311 1312 if (system_state == SYSTEM_POWER_OFF) { 1313 int retval = cmos_poweroff(dev); 1314 1315 if (cmos_aie_poweroff(dev) < 0 && !retval) 1316 return; 1317 } 1318 1319 cmos_do_shutdown(cmos->irq); 1320 } 1321 1322 static const struct pnp_device_id rtc_ids[] = { 1323 { .id = "PNP0b00", }, 1324 { .id = "PNP0b01", }, 1325 { .id = "PNP0b02", }, 1326 { }, 1327 }; 1328 MODULE_DEVICE_TABLE(pnp, rtc_ids); 1329 1330 static struct pnp_driver cmos_pnp_driver = { 1331 .name = (char *) driver_name, 1332 .id_table = rtc_ids, 1333 .probe = cmos_pnp_probe, 1334 .remove = cmos_pnp_remove, 1335 .shutdown = cmos_pnp_shutdown, 1336 1337 /* flag ensures resume() gets called, and stops syslog spam */ 1338 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE, 1339 .driver = { 1340 .pm = &cmos_pm_ops, 1341 }, 1342 }; 1343 1344 #endif /* CONFIG_PNP */ 1345 1346 #ifdef CONFIG_OF 1347 static const struct of_device_id of_cmos_match[] = { 1348 { 1349 .compatible = "motorola,mc146818", 1350 }, 1351 { }, 1352 }; 1353 MODULE_DEVICE_TABLE(of, of_cmos_match); 1354 1355 static __init void cmos_of_init(struct platform_device *pdev) 1356 { 1357 struct device_node *node = pdev->dev.of_node; 1358 const __be32 *val; 1359 1360 if (!node) 1361 return; 1362 1363 val = of_get_property(node, "ctrl-reg", NULL); 1364 if (val) 1365 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL); 1366 1367 val = of_get_property(node, "freq-reg", NULL); 1368 if (val) 1369 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT); 1370 } 1371 #else 1372 static inline void cmos_of_init(struct platform_device *pdev) {} 1373 #endif 1374 /*----------------------------------------------------------------*/ 1375 1376 /* Platform setup should have set up an RTC device, when PNP is 1377 * unavailable ... this could happen even on (older) PCs. 1378 */ 1379 1380 static int __init cmos_platform_probe(struct platform_device *pdev) 1381 { 1382 struct resource *resource; 1383 int irq; 1384 1385 cmos_of_init(pdev); 1386 cmos_wake_setup(&pdev->dev); 1387 1388 if (RTC_IOMAPPED) 1389 resource = platform_get_resource(pdev, IORESOURCE_IO, 0); 1390 else 1391 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1392 irq = platform_get_irq(pdev, 0); 1393 if (irq < 0) 1394 irq = -1; 1395 1396 return cmos_do_probe(&pdev->dev, resource, irq); 1397 } 1398 1399 static int cmos_platform_remove(struct platform_device *pdev) 1400 { 1401 cmos_do_remove(&pdev->dev); 1402 return 0; 1403 } 1404 1405 static void cmos_platform_shutdown(struct platform_device *pdev) 1406 { 1407 struct device *dev = &pdev->dev; 1408 struct cmos_rtc *cmos = dev_get_drvdata(dev); 1409 1410 if (system_state == SYSTEM_POWER_OFF) { 1411 int retval = cmos_poweroff(dev); 1412 1413 if (cmos_aie_poweroff(dev) < 0 && !retval) 1414 return; 1415 } 1416 1417 cmos_do_shutdown(cmos->irq); 1418 } 1419 1420 /* work with hotplug and coldplug */ 1421 MODULE_ALIAS("platform:rtc_cmos"); 1422 1423 static struct platform_driver cmos_platform_driver = { 1424 .remove = cmos_platform_remove, 1425 .shutdown = cmos_platform_shutdown, 1426 .driver = { 1427 .name = driver_name, 1428 .pm = &cmos_pm_ops, 1429 .of_match_table = of_match_ptr(of_cmos_match), 1430 } 1431 }; 1432 1433 #ifdef CONFIG_PNP 1434 static bool pnp_driver_registered; 1435 #endif 1436 static bool platform_driver_registered; 1437 1438 static int __init cmos_init(void) 1439 { 1440 int retval = 0; 1441 1442 #ifdef CONFIG_PNP 1443 retval = pnp_register_driver(&cmos_pnp_driver); 1444 if (retval == 0) 1445 pnp_driver_registered = true; 1446 #endif 1447 1448 if (!cmos_rtc.dev) { 1449 retval = platform_driver_probe(&cmos_platform_driver, 1450 cmos_platform_probe); 1451 if (retval == 0) 1452 platform_driver_registered = true; 1453 } 1454 1455 if (retval == 0) 1456 return 0; 1457 1458 #ifdef CONFIG_PNP 1459 if (pnp_driver_registered) 1460 pnp_unregister_driver(&cmos_pnp_driver); 1461 #endif 1462 return retval; 1463 } 1464 module_init(cmos_init); 1465 1466 static void __exit cmos_exit(void) 1467 { 1468 #ifdef CONFIG_PNP 1469 if (pnp_driver_registered) 1470 pnp_unregister_driver(&cmos_pnp_driver); 1471 #endif 1472 if (platform_driver_registered) 1473 platform_driver_unregister(&cmos_platform_driver); 1474 } 1475 module_exit(cmos_exit); 1476 1477 1478 MODULE_AUTHOR("David Brownell"); 1479 MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs"); 1480 MODULE_LICENSE("GPL"); 1481